diff options
| author | Tom Rini <trini@konsulko.com> | 2025-06-05 08:40:42 -0600 |
|---|---|---|
| committer | Tom Rini <trini@konsulko.com> | 2025-06-05 08:40:42 -0600 |
| commit | b3f69c14187d413610abbc2b82d1a3752cb342c1 (patch) | |
| tree | 63aa82b10575e335a7a9fe2ce3a92cdb7a91e118 /drivers/net/zynq_gem.c | |
| parent | 27cd65ca1bf16c21818c233c6d658f3e747f5e85 (diff) | |
| parent | 77b053502f396e83f6a0ea38d747d6836dc501f0 (diff) | |
Merge tag 'xilinx-for-v2025.07-rc4' of https://source.denx.de/u-boot/custodians/u-boot-microblaze
AMD/Xilinx/FPGA changes for v2025.07-rc4
usb:
- Fix regulator handling
net:
- Fix MII clock handling
phy:
- Fix GTR line logic for sgmii
pci:
- Fix pcireg_base logic
fpga:
- Fix change handling in intel_sdm_mb driver
Diffstat (limited to 'drivers/net/zynq_gem.c')
| -rw-r--r-- | drivers/net/zynq_gem.c | 14 |
1 files changed, 8 insertions, 6 deletions
diff --git a/drivers/net/zynq_gem.c b/drivers/net/zynq_gem.c index 461805ae53f..703e22479d2 100644 --- a/drivers/net/zynq_gem.c +++ b/drivers/net/zynq_gem.c @@ -567,12 +567,14 @@ static int zynq_gem_init(struct udevice *dev) } #endif - ret = clk_get_rate(&priv->tx_clk); - if (ret != clk_rate) { - ret = clk_set_rate(&priv->tx_clk, clk_rate); - if (IS_ERR_VALUE(ret)) { - dev_err(dev, "failed to set tx clock rate %ld\n", clk_rate); - return ret; + if (priv->interface != PHY_INTERFACE_MODE_MII) { + ret = clk_get_rate(&priv->tx_clk); + if (ret != clk_rate) { + ret = clk_set_rate(&priv->tx_clk, clk_rate); + if (IS_ERR_VALUE(ret)) { + dev_err(dev, "failed to set tx clock rate %ld\n", clk_rate); + return ret; + } } } |