diff options
| author | Cheick Traore <cheick.traore@foss.st.com> | 2025-06-20 17:49:59 +0200 |
|---|---|---|
| committer | Patrice Chotard <patrice.chotard@foss.st.com> | 2025-07-29 16:44:58 +0200 |
| commit | 3f14dc91ab3bcaf441def4309de7184b0646b6c4 (patch) | |
| tree | ce4b628cdd16113b2530c387b94235ca2f03a264 /drivers/pwm/pwm-stm32.c | |
| parent | 8e1fafb807dcc4304fc703a00bde034a2c1bbdbf (diff) | |
pwm: stm32: add support for stm32mp25
Add support for STM32MP25 SoC.
IPIDR register is used to check the hardware configuration register
when available to gather the number of complementary outputs.
Signed-off-by: Cheick Traore <cheick.traore@foss.st.com>
Reviewed-by: Patrice Chotard <patrice.chotard@foss.st.com>
Diffstat (limited to 'drivers/pwm/pwm-stm32.c')
| -rw-r--r-- | drivers/pwm/pwm-stm32.c | 11 |
1 files changed, 10 insertions, 1 deletions
diff --git a/drivers/pwm/pwm-stm32.c b/drivers/pwm/pwm-stm32.c index 5fa649b5903..a691f75e4a7 100644 --- a/drivers/pwm/pwm-stm32.c +++ b/drivers/pwm/pwm-stm32.c @@ -12,6 +12,7 @@ #include <asm/io.h> #include <asm/arch/timers.h> #include <dm/device_compat.h> +#include <linux/bitfield.h> #include <linux/time.h> #define CCMR_CHANNEL_SHIFT 8 @@ -157,7 +158,14 @@ static void stm32_pwm_detect_complementary(struct udevice *dev) { struct stm32_timers_plat *plat = dev_get_plat(dev_get_parent(dev)); struct stm32_pwm_priv *priv = dev_get_priv(dev); - u32 ccer; + u32 ccer, val; + + if (plat->ipidr) { + /* Simply read from HWCFGR the number of complementary outputs (MP25). */ + val = readl(plat->base + TIM_HWCFGR1); + priv->have_complementary_output = !!FIELD_GET(TIM_HWCFGR1_NB_OF_DT, val); + return; + } /* * If complementary bit doesn't exist writing 1 will have no @@ -192,6 +200,7 @@ static const struct pwm_ops stm32_pwm_ops = { static const struct udevice_id stm32_pwm_ids[] = { { .compatible = "st,stm32-pwm" }, + { .compatible = "st,stm32mp25-pwm" }, { } }; |