diff options
| author | Tom Rini <trini@konsulko.com> | 2024-02-07 08:33:47 -0500 |
|---|---|---|
| committer | Tom Rini <trini@konsulko.com> | 2024-02-07 08:33:47 -0500 |
| commit | 7ebc77fede4bb8f1c0b1239c7093d1fa69ccc5a9 (patch) | |
| tree | 2f48a4a3086f4a92c53f06f4d646682e1b45ff92 /drivers/ram/rockchip/sdram-rv1126-ddr4-detect-784.inc | |
| parent | daa3100250839dd30626f7f4b7daf041f1114f1c (diff) | |
| parent | b8f1f60c23c9b3edb70159c4e2b1be232a008ee3 (diff) | |
Merge tag 'u-boot-rockchip-20240207' of https://source.denx.de/u-boot/custodians/u-boot-rockchip
- Add board: rv1126 Sonoff iHost board
- rv1126 ddr4 support;
- Enable BOOTSTD_FULL for RK3399 and RK3588;
- rk3036 spl stack addr fix;
- dts sync from linux v6.8-rc1 for rk356x, rk3588, rv1126;
- Enable eMMC HS200 mode by default for rk3568 and rk3588;
Diffstat (limited to 'drivers/ram/rockchip/sdram-rv1126-ddr4-detect-784.inc')
| -rw-r--r-- | drivers/ram/rockchip/sdram-rv1126-ddr4-detect-784.inc | 75 |
1 files changed, 75 insertions, 0 deletions
diff --git a/drivers/ram/rockchip/sdram-rv1126-ddr4-detect-784.inc b/drivers/ram/rockchip/sdram-rv1126-ddr4-detect-784.inc new file mode 100644 index 00000000000..ef2e9347bf6 --- /dev/null +++ b/drivers/ram/rockchip/sdram-rv1126-ddr4-detect-784.inc @@ -0,0 +1,75 @@ +{ + { + { + .rank = 0x1, + .col = 0xA, + .bk = 0x2, + .bw = 0x1, + .dbw = 0x0, + .row_3_4 = 0x0, + .cs0_row = 0x11, + .cs1_row = 0x0, + .cs0_high16bit_row = 0x11, + .cs1_high16bit_row = 0x0, + .ddrconfig = 0 + }, + { + {0x50160d14}, + {0x0e020502}, + {0x00000002}, + {0x00001111}, + {0x0000000c}, + {0x0000033a}, + 0x000000ff + } + }, + { + .ddr_freq = 784, /* clock rate(MHz) */ + .dramtype = DDR4, + .num_channels = 1, + .stride = 0, + .odt = 1 + }, + { + { + {0x00000000, 0x43041010}, /* MSTR */ + {0x00000064, 0x005f008a}, /* RFSHTMG */ + {0x000000d0, 0x000200c1}, /* INIT0 */ + {0x000000d4, 0x004e0000}, /* INIT1 */ + {0x000000d8, 0x00000100}, /* INIT2 */ + {0x000000dc, 0x03140401}, /* INIT3 */ + {0x000000e0, 0x00000000}, /* INIT4 */ + {0x000000e4, 0x00110000}, /* INIT5 */ + {0x000000e8, 0x00000420}, /* INIT6 */ + {0x000000ec, 0x00000400}, /* INIT7 */ + {0x000000f4, 0x000f011f}, /* RANKCTL */ + {0x00000100, 0x0c0e1a0e}, /* DRAMTMG0 */ + {0x00000104, 0x00030314}, /* DRAMTMG1 */ + {0x00000108, 0x0506050b}, /* DRAMTMG2 */ + {0x0000010c, 0x0040400c}, /* DRAMTMG3 */ + {0x00000110, 0x06030307}, /* DRAMTMG4 */ + {0x00000114, 0x04040302}, /* DRAMTMG5 */ + {0x00000120, 0x06060b06}, /* DRAMTMG8 */ + {0x00000124, 0x00020308}, /* DRAMTMG9 */ + {0x00000180, 0x01000040}, /* ZQCTL0 */ + {0x00000184, 0x00000000}, /* ZQCTL1 */ + {0x00000190, 0x07040003}, /* DFITMG0 */ + {0x00000198, 0x07000101}, /* DFILPCFG0 */ + {0x000001a0, 0xc0400003}, /* DFIUPD0 */ + {0x00000240, 0x0600060c}, /* ODTCFG */ + {0x00000244, 0x00000201}, /* ODTMAP */ + {0x00000250, 0x00001f00}, /* SCHED */ + {0x00000490, 0x00000001}, /* PCTRL_0 */ + {0xffffffff, 0xffffffff} + } + }, + { + { + {0x00000004, 0x0000008c}, /* PHYREG01 */ + {0x00000014, 0x0000000c}, /* PHYREG05 */ + {0x00000018, 0x00000000}, /* PHYREG06 */ + {0x0000001c, 0x00000009}, /* PHYREG07 */ + {0xffffffff, 0xffffffff} + } + } +}, |