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| author | Tom Rini <trini@konsulko.com> | 2025-07-03 08:26:50 -0600 |
|---|---|---|
| committer | Tom Rini <trini@konsulko.com> | 2025-07-03 08:26:50 -0600 |
| commit | 1323b480a6fc053475901a90bdaece2ddcc47310 (patch) | |
| tree | ad95724d3b8a81e0992eb1a6dedb0c6c129f302c /drivers/ram/stm32mp1/stm32mp1_ddr.c | |
| parent | 218db7bdbd0ea115c166f8bf18e1292c588beb10 (diff) | |
| parent | f62062a64daeb3f3b148372d0afae3821aff16de (diff) | |
Merge branch 'next' of https://source.denx.de/u-boot/custodians/u-boot-riscv into next
CI: https://source.denx.de/u-boot/custodians/u-boot-riscv/-/pipelines/26936
- RISC-V: Add big-endian build support
- Board: aclint_ipi: Support T-Head C900 CLINT
- Board: mpfs_icicle: Implement
board_fdt_blob_setup()/board_fit_config_name_match()
- Driver: pinctrl: Port pin controller driver for T-Head TH1520 SoC
- Driver: cache: Update dependency for ANDES_L2_CACHE
Diffstat (limited to 'drivers/ram/stm32mp1/stm32mp1_ddr.c')
0 files changed, 0 insertions, 0 deletions