diff options
| author | Patrick Delaunay <patrick.delaunay@st.com> | 2019-04-10 14:09:26 +0200 |
|---|---|---|
| committer | Patrice Chotard <patrice.chotard@st.com> | 2019-05-23 11:38:11 +0200 |
| commit | 1767ac2d1f7fadc0780f95243906dda7553ac77a (patch) | |
| tree | 7244cadea8e21eac617c7e5ccc9271232717998a /drivers/ram/stm32mp1/stm32mp1_ddr.c | |
| parent | 53bb8316583bf2206918457ec049b001d5b40a0f (diff) | |
stm32mp1: ram: add support for LPDDR2/LPDDR3
Manage power supply configuration for board using stpmic1
with LPDDR2 or with LPDDR3:
+ VDD_DDR1 = 1.8V with BUCK3 (bypass if possible)
+ VDD_DDR2 = 1.2V with BUCK2
Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com>
Diffstat (limited to 'drivers/ram/stm32mp1/stm32mp1_ddr.c')
| -rw-r--r-- | drivers/ram/stm32mp1/stm32mp1_ddr.c | 11 |
1 files changed, 8 insertions, 3 deletions
diff --git a/drivers/ram/stm32mp1/stm32mp1_ddr.c b/drivers/ram/stm32mp1/stm32mp1_ddr.c index 5e1041dffeb..cfd223e37fd 100644 --- a/drivers/ram/stm32mp1/stm32mp1_ddr.c +++ b/drivers/ram/stm32mp1/stm32mp1_ddr.c @@ -372,7 +372,7 @@ void stm32mp1_refresh_restore(struct stm32mp1_ddrctl *ctl, } /* board-specific DDR power initializations. */ -__weak int board_ddr_power_init(void) +__weak int board_ddr_power_init(enum ddr_type ddr_type) { return 0; } @@ -382,9 +382,14 @@ void stm32mp1_ddr_init(struct ddr_info *priv, const struct stm32mp1_ddr_config *config) { u32 pir; - int ret; + int ret = -EINVAL; - ret = board_ddr_power_init(); + if (config->c_reg.mstr & DDRCTRL_MSTR_DDR3) + ret = board_ddr_power_init(STM32MP_DDR3); + else if (config->c_reg.mstr & DDRCTRL_MSTR_LPDDR2) + ret = board_ddr_power_init(STM32MP_LPDDR2); + else if (config->c_reg.mstr & DDRCTRL_MSTR_LPDDR3) + ret = board_ddr_power_init(STM32MP_LPDDR3); if (ret) panic("ddr power init failed\n"); |