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authorTom Rini <trini@konsulko.com>2025-06-11 09:47:10 -0600
committerTom Rini <trini@konsulko.com>2025-06-11 12:00:36 -0600
commit4b5cb576116663813768ddeb46523d1aa717133e (patch)
tree7df3998044bae529e9812b8f1861a650d2d6359e /drivers/ram/stm32mp1/stm32mp1_ddr.h
parent9e50cf80d0ec5d6856a5efa5b42b8b70ed1d17ed (diff)
parent7ab0ee3a59c01ca164a5b71e0c4c90555da5e806 (diff)
Merge tag 'u-boot-stm32-20250611' of https://source.denx.de/u-boot/custodians/u-boot-stm into next
CI: https://source.denx.de/u-boot/custodians/u-boot-stm/-/pipelines/26607 - Add clock and reset drivers support for STM32MP25 - Add STM32H747-Discovery board support - Add tamp_nvram driver - Add SPL support and clock tree init to STM32MP13 RCC driver - Add STM32MP13xx ram support - Add support for STM32 Image V2.0 for STM32MP13xx - Fix SYSRAM size on STM32MP13xx - Fix DBGMCU macro on STM32MP13xx - Auto-detect ROM API table on STM32MP15xx
Diffstat (limited to 'drivers/ram/stm32mp1/stm32mp1_ddr.h')
-rw-r--r--drivers/ram/stm32mp1/stm32mp1_ddr.h6
1 files changed, 6 insertions, 0 deletions
diff --git a/drivers/ram/stm32mp1/stm32mp1_ddr.h b/drivers/ram/stm32mp1/stm32mp1_ddr.h
index 861efff92be..3621e6c9a1b 100644
--- a/drivers/ram/stm32mp1/stm32mp1_ddr.h
+++ b/drivers/ram/stm32mp1/stm32mp1_ddr.h
@@ -105,12 +105,14 @@ struct stm32mp1_ddrctrl_perf {
u32 pcfgqos1_0;
u32 pcfgwqos0_0;
u32 pcfgwqos1_0;
+#if IS_ENABLED(CONFIG_STM32MP15X)
u32 pcfgr_1;
u32 pcfgw_1;
u32 pcfgqos0_1;
u32 pcfgqos1_1;
u32 pcfgwqos0_1;
u32 pcfgwqos1_1;
+#endif
};
struct stm32mp1_ddrphy_reg {
@@ -123,8 +125,10 @@ struct stm32mp1_ddrphy_reg {
u32 zq0cr1;
u32 dx0gcr;
u32 dx1gcr;
+#if IS_ENABLED(CONFIG_STM32MP15X)
u32 dx2gcr;
u32 dx3gcr;
+#endif
};
struct stm32mp1_ddrphy_timing {
@@ -181,4 +185,6 @@ bool stm32mp1_ddr_interactive(
enum stm32mp1_ddr_interact_step step,
const struct stm32mp1_ddr_config *config);
+bool is_stm32mp13_ddrc(const struct ddr_info *priv);
+
#endif