diff options
| author | Patrick Delaunay <patrick.delaunay@foss.st.com> | 2021-11-24 10:52:18 +0100 |
|---|---|---|
| committer | Patrice Chotard <patrice.chotard@foss.st.com> | 2021-11-30 16:43:28 +0100 |
| commit | d72e7bbe7c2841f161848d57b723495a731d0121 (patch) | |
| tree | a63817010a300a77f917f93a4e8a1ce3422c5843 /drivers/ram/stm32mp1/stm32mp1_ddr_regs.h | |
| parent | e84ee40b0b2d378aab66e45315ff835954b2078f (diff) | |
ram: stm32mp1: compute DDR size from DDRCTL registers
Compute the DDR size from DDR controller register (mstr and addrmap)
in U-Boot proper as the DDR information are useful only for SPL
but not for U-Boot proper, for example with TFABOOT.
This patch simplify U-Boot DT when several DDR size are supported
and support of next SOC in STM32MP family.
Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com>
Signed-off-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
Diffstat (limited to 'drivers/ram/stm32mp1/stm32mp1_ddr_regs.h')
| -rw-r--r-- | drivers/ram/stm32mp1/stm32mp1_ddr_regs.h | 1 |
1 files changed, 1 insertions, 0 deletions
diff --git a/drivers/ram/stm32mp1/stm32mp1_ddr_regs.h b/drivers/ram/stm32mp1/stm32mp1_ddr_regs.h index be89d810182..f1a26e31f6c 100644 --- a/drivers/ram/stm32mp1/stm32mp1_ddr_regs.h +++ b/drivers/ram/stm32mp1/stm32mp1_ddr_regs.h @@ -239,6 +239,7 @@ struct stm32mp1_ddrphy { #define DDRCTRL_MSTR_LPDDR2 BIT(2) #define DDRCTRL_MSTR_LPDDR3 BIT(3) #define DDRCTRL_MSTR_DATA_BUS_WIDTH_MASK GENMASK(13, 12) +#define DDRCTRL_MSTR_DATA_BUS_WIDTH_SHIFT 12 #define DDRCTRL_MSTR_DATA_BUS_WIDTH_FULL (0 << 12) #define DDRCTRL_MSTR_DATA_BUS_WIDTH_HALF (1 << 12) #define DDRCTRL_MSTR_DATA_BUS_WIDTH_QUARTER (2 << 12) |