diff options
author | Tom Rini <trini@konsulko.com> | 2025-06-11 09:47:10 -0600 |
---|---|---|
committer | Tom Rini <trini@konsulko.com> | 2025-06-11 12:00:36 -0600 |
commit | 4b5cb576116663813768ddeb46523d1aa717133e (patch) | |
tree | 7df3998044bae529e9812b8f1861a650d2d6359e /drivers/ram/stm32mp1/stm32mp1_ram.c | |
parent | 9e50cf80d0ec5d6856a5efa5b42b8b70ed1d17ed (diff) | |
parent | 7ab0ee3a59c01ca164a5b71e0c4c90555da5e806 (diff) |
Merge tag 'u-boot-stm32-20250611' of https://source.denx.de/u-boot/custodians/u-boot-stm into next
CI: https://source.denx.de/u-boot/custodians/u-boot-stm/-/pipelines/26607
- Add clock and reset drivers support for STM32MP25
- Add STM32H747-Discovery board support
- Add tamp_nvram driver
- Add SPL support and clock tree init to STM32MP13 RCC driver
- Add STM32MP13xx ram support
- Add support for STM32 Image V2.0 for STM32MP13xx
- Fix SYSRAM size on STM32MP13xx
- Fix DBGMCU macro on STM32MP13xx
- Auto-detect ROM API table on STM32MP15xx
Diffstat (limited to 'drivers/ram/stm32mp1/stm32mp1_ram.c')
-rw-r--r-- | drivers/ram/stm32mp1/stm32mp1_ram.c | 5 |
1 files changed, 5 insertions, 0 deletions
diff --git a/drivers/ram/stm32mp1/stm32mp1_ram.c b/drivers/ram/stm32mp1/stm32mp1_ram.c index e9cd6229ec4..5f9b91d50e4 100644 --- a/drivers/ram/stm32mp1/stm32mp1_ram.c +++ b/drivers/ram/stm32mp1/stm32mp1_ram.c @@ -33,6 +33,7 @@ static const char *const clkname[] = { int stm32mp1_ddr_clk_enable(struct ddr_info *priv, uint32_t mem_speed) { + bool is_mp13 = is_stm32mp13_ddrc(priv); unsigned long ddrphy_clk; unsigned long ddr_clk; struct clk clk; @@ -40,6 +41,10 @@ int stm32mp1_ddr_clk_enable(struct ddr_info *priv, uint32_t mem_speed) unsigned int idx; for (idx = 0; idx < ARRAY_SIZE(clkname); idx++) { + /* DDRC2 clock are available only on STM32MP15xx */ + if (is_mp13 && !strcmp(clkname[idx], "ddrc2")) + continue; + ret = clk_get_by_name(priv->dev, clkname[idx], &clk); if (!ret) |