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authorTom Rini <trini@konsulko.com>2020-03-26 13:18:22 -0400
committerTom Rini <trini@konsulko.com>2020-03-26 13:18:22 -0400
commit779e6dc6a429ac28dfd4f07ab0c3648a31399d4a (patch)
tree2dfc6d6953793e85d78b4ca79bec6b1a5fbca421 /drivers/ram/stm32mp1/stm32mp1_ram.c
parent2738f0edea7d19960d692284d1f378b1a2b4c4a5 (diff)
parent5b5699cdc97122e08e7fd0886a9e4474ca3ccb35 (diff)
Merge tag 'u-boot-stm32-20200324' of https://gitlab.denx.de/u-boot/custodians/u-boot-stm into next
- stm32mp: fix command stboard - stm32mp: update kernel device tree according the part number - stm32mp: add 800 MHz profile support = stm32mp15xd and stm32mp15xf - stm32mp: set cp15 frequency in psci cpu on - stm32mp: DT alignment with Linux 5.6-rc1 - stm32mp: clk: add SPI5 support and correct CKSELR masks - stm32mp: ram: fixes on LPDDR2/LPDDR3 support and on tuning - stm32: i2c: allows for any bus frequency - sti: timer: livetree and clk API conversion
Diffstat (limited to 'drivers/ram/stm32mp1/stm32mp1_ram.c')
-rw-r--r--drivers/ram/stm32mp1/stm32mp1_ram.c34
1 files changed, 26 insertions, 8 deletions
diff --git a/drivers/ram/stm32mp1/stm32mp1_ram.c b/drivers/ram/stm32mp1/stm32mp1_ram.c
index eb78f1198d7..b1e593f86bd 100644
--- a/drivers/ram/stm32mp1/stm32mp1_ram.c
+++ b/drivers/ram/stm32mp1/stm32mp1_ram.c
@@ -65,18 +65,22 @@ static __maybe_unused int stm32mp1_ddr_setup(struct udevice *dev)
struct clk axidcg;
struct stm32mp1_ddr_config config;
-#define PARAM(x, y) \
- { x,\
- offsetof(struct stm32mp1_ddr_config, y),\
- sizeof(config.y) / sizeof(u32)}
+#define PARAM(x, y, z) \
+ { .name = x, \
+ .offset = offsetof(struct stm32mp1_ddr_config, y), \
+ .size = sizeof(config.y) / sizeof(u32), \
+ .present = z, \
+ }
-#define CTL_PARAM(x) PARAM("st,ctl-"#x, c_##x)
-#define PHY_PARAM(x) PARAM("st,phy-"#x, p_##x)
+#define CTL_PARAM(x) PARAM("st,ctl-"#x, c_##x, NULL)
+#define PHY_PARAM(x) PARAM("st,phy-"#x, p_##x, NULL)
+#define PHY_PARAM_OPT(x) PARAM("st,phy-"#x, p_##x, &config.p_##x##_present)
const struct {
const char *name; /* name in DT */
const u32 offset; /* offset in config struct */
const u32 size; /* size of parameters */
+ bool * const present; /* presence indication for opt */
} param[] = {
CTL_PARAM(reg),
CTL_PARAM(timing),
@@ -84,7 +88,7 @@ static __maybe_unused int stm32mp1_ddr_setup(struct udevice *dev)
CTL_PARAM(perf),
PHY_PARAM(reg),
PHY_PARAM(timing),
- PHY_PARAM(cal)
+ PHY_PARAM_OPT(cal)
};
config.info.speed = dev_read_u32_default(dev, "st,mem-speed", 0);
@@ -103,11 +107,25 @@ static __maybe_unused int stm32mp1_ddr_setup(struct udevice *dev)
param[idx].size);
debug("%s: %s[0x%x] = %d\n", __func__,
param[idx].name, param[idx].size, ret);
- if (ret) {
+ if (ret &&
+ (ret != -FDT_ERR_NOTFOUND || !param[idx].present)) {
pr_err("%s: Cannot read %s, error=%d\n",
__func__, param[idx].name, ret);
return -EINVAL;
}
+ if (param[idx].present) {
+ /* save presence of optional parameters */
+ *param[idx].present = true;
+ if (ret == -FDT_ERR_NOTFOUND) {
+ *param[idx].present = false;
+#ifdef CONFIG_STM32MP1_DDR_INTERACTIVE
+ /* reset values if used later */
+ memset((void *)((u32)&config +
+ param[idx].offset),
+ 0, param[idx].size * sizeof(u32));
+#endif
+ }
+ }
}
ret = clk_get_by_name(dev, "axidcg", &axidcg);