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authorPatrice Chotard <patrice.chotard@foss.st.com>2025-07-30 14:14:01 +0200
committerPatrice Chotard <patrice.chotard@foss.st.com>2025-07-30 14:55:17 +0200
commite064db5fe77caaddb21a7793f266119ad89dd79a (patch)
tree508b6b35dfc63cf175f245883b947b89a741a182 /drivers/reset/stm32/stm32-reset.c
parent1cec03bb1f8baee0bda151392ea1b5bb7c742547 (diff)
reset: stm32: Fix set_clr field
STM32F4/F7 and H7 series doesn't have a clear reset register, so set_clr field must be set to false. Fixes: 0994a627c278 ("reset: stm32mp25: add stm32mp25 reset driver") Signed-off-by: Patrice Chotard <patrice.chotard@foss.st.com>
Diffstat (limited to 'drivers/reset/stm32/stm32-reset.c')
-rw-r--r--drivers/reset/stm32/stm32-reset.c2
1 files changed, 1 insertions, 1 deletions
diff --git a/drivers/reset/stm32/stm32-reset.c b/drivers/reset/stm32/stm32-reset.c
index 918e81e588f..024f15cb25e 100644
--- a/drivers/reset/stm32/stm32-reset.c
+++ b/drivers/reset/stm32/stm32-reset.c
@@ -19,7 +19,7 @@ static const struct stm32_reset_cfg *stm32_get_reset_line(struct reset_ctl *rese
ptr_line->offset = bank;
ptr_line->bit_idx = offset;
- ptr_line->set_clr = true;
+ ptr_line->set_clr = false;
return ptr_line;
}