diff options
| author | T Karthik Reddy <t.karthik.reddy@xilinx.com> | 2022-05-12 04:05:34 -0600 |
|---|---|---|
| committer | Michal Simek <michal.simek@amd.com> | 2022-06-29 16:00:31 +0200 |
| commit | 248fe9f302df5f20d75a7d88b793db017262d750 (patch) | |
| tree | 642dc7f671ce7af7deca3a61857a43c5c60e38f5 /drivers/spi/cadence_ospi_versal.c | |
| parent | bf8dae5fcf400a593d56d5847d8ee62bc4c27855 (diff) | |
spi: cadence_qspi: Enable apb linear mode for apb read & write operations
On versal platform, enable apb linear mode for apb read and write
execute operations amd disable it when using dma reads. This is done by
xilinx_pm_request() secure calls when CONFIG_ZYNQMP_FIRMWARE is enabled,
else we use direct raw reads and writes in case of mini U-Boot.
Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com>
Signed-off-by: Ashok Reddy Soma <ashok.reddy.soma@xilinx.com>
Link: https://lore.kernel.org/r/20220512100535.16364-5-ashok.reddy.soma@xilinx.com
Signed-off-by: Michal Simek <michal.simek@amd.com>
Diffstat (limited to 'drivers/spi/cadence_ospi_versal.c')
| -rw-r--r-- | drivers/spi/cadence_ospi_versal.c | 24 |
1 files changed, 24 insertions, 0 deletions
diff --git a/drivers/spi/cadence_ospi_versal.c b/drivers/spi/cadence_ospi_versal.c index 0caf2502034..52bcad053fe 100644 --- a/drivers/spi/cadence_ospi_versal.c +++ b/drivers/spi/cadence_ospi_versal.c @@ -33,6 +33,7 @@ int cadence_qspi_apb_dma_read(struct cadence_spi_plat *plat, bytes_to_dma = n_rx - rx_rem; if (bytes_to_dma) { + cadence_qspi_apb_enable_linear_mode(false); reg = readl(plat->regbase + CQSPI_REG_CONFIG); reg |= CQSPI_REG_CONFIG_ENBL_DMA; writel(reg, plat->regbase + CQSPI_REG_CONFIG); @@ -211,3 +212,26 @@ int cadence_spi_versal_flash_reset(struct udevice *dev) return 0; } #endif + +void cadence_qspi_apb_enable_linear_mode(bool enable) +{ + if (CONFIG_IS_ENABLED(ZYNQMP_FIRMWARE)) { + if (enable) + /* ahb read mode */ + xilinx_pm_request(PM_IOCTL, PM_DEV_OSPI, + IOCTL_OSPI_MUX_SELECT, + PM_OSPI_MUX_SEL_LINEAR, 0, NULL); + else + /* DMA mode */ + xilinx_pm_request(PM_IOCTL, PM_DEV_OSPI, + IOCTL_OSPI_MUX_SELECT, + PM_OSPI_MUX_SEL_DMA, 0, NULL); + } else { + if (enable) + writel(readl(VERSAL_AXI_MUX_SEL) | + VERSAL_OSPI_LINEAR_MODE, VERSAL_AXI_MUX_SEL); + else + writel(readl(VERSAL_AXI_MUX_SEL) & + ~VERSAL_OSPI_LINEAR_MODE, VERSAL_AXI_MUX_SEL); + } +} |