diff options
| author | Venkatesh Yadav Abbarapu <venkatesh.abbarapu@amd.com> | 2024-09-26 10:25:05 +0530 |
|---|---|---|
| committer | Tom Rini <trini@konsulko.com> | 2024-10-09 09:01:54 -0600 |
| commit | 34da258bb0465de4bf44dc8949a9536cc06bf725 (patch) | |
| tree | 7aa92b21cd25503e3ad8ed496a38a3ef080546c1 /drivers/spi/spi-sifive.c | |
| parent | c480ec2c45b221b2044c6268c9773e78fa47f305 (diff) | |
spi: spi-uclass: Read chipselect and restrict capabilities
Read chipselect properties from DT which are populated using 'reg'
property and save it in plat->cs[] array for later use.
Also read multi chipselect capability which is used for
parallel-memories and return errors if they are passed on using DT but
driver is not capable of handling it.
Signed-off-by: Ashok Reddy Soma <ashok.reddy.soma@amd.com>
Signed-off-by: Venkatesh Yadav Abbarapu <venkatesh.abbarapu@amd.com>
Diffstat (limited to 'drivers/spi/spi-sifive.c')
| -rw-r--r-- | drivers/spi/spi-sifive.c | 6 |
1 files changed, 3 insertions, 3 deletions
diff --git a/drivers/spi/spi-sifive.c b/drivers/spi/spi-sifive.c index 0c8666c05f9..15407d482c9 100644 --- a/drivers/spi/spi-sifive.c +++ b/drivers/spi/spi-sifive.c @@ -108,13 +108,13 @@ static void sifive_spi_prep_device(struct sifive_spi *spi, { /* Update the chip select polarity */ if (slave_plat->mode & SPI_CS_HIGH) - spi->cs_inactive &= ~BIT(slave_plat->cs); + spi->cs_inactive &= ~BIT(slave_plat->cs[0]); else - spi->cs_inactive |= BIT(slave_plat->cs); + spi->cs_inactive |= BIT(slave_plat->cs[0]); writel(spi->cs_inactive, spi->regs + SIFIVE_SPI_REG_CSDEF); /* Select the correct device */ - writel(slave_plat->cs, spi->regs + SIFIVE_SPI_REG_CSID); + writel(slave_plat->cs[0], spi->regs + SIFIVE_SPI_REG_CSID); } static int sifive_spi_set_cs(struct sifive_spi *spi, |