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authorTom Rini <trini@konsulko.com>2023-04-22 18:30:56 -0400
committerTom Rini <trini@konsulko.com>2023-04-22 18:30:56 -0400
commitf2db24556f33e8dfb8865fbc1c75e48f96be4fbf (patch)
tree798b5ec26a35d52f30bcd302c2265027bd7b9bc9 /drivers/spi/stm32_qspi.c
parent03972a10acad1d4aca0db20c4744b56dfc145e8a (diff)
parent0d5bd362f61dd3dc54f9a32fd38541b8d5c5d869 (diff)
Merge tag 'u-boot-stm32-20230419' of https://source.denx.de/u-boot/custodians/u-boot-stm
configs: _ Add usb_pgood_delay for ST boards _ increase malloc size for pre-reloc for stm32mp15 _ Set CONFIG_USB_HUB_DEBOUNCE_TIMEOUT=2s for stm32mp15 dts: _ Add QSPI support on STM32MP13x SoC family _ Add FMC support on STM32MP13x SoC family drivers/machine: _ pinctrl_stm32: Add slew rate support for stm32_pinctrl_get_pin_muxing() _ spi: stm32_qspi: Remove useless struct stm32_qspi_flash _ rawnand: stm32_fmc2: remove unsupported EDO mode _ stm32mp: fix various array bounds checks
Diffstat (limited to 'drivers/spi/stm32_qspi.c')
-rw-r--r--drivers/spi/stm32_qspi.c27
1 files changed, 3 insertions, 24 deletions
diff --git a/drivers/spi/stm32_qspi.c b/drivers/spi/stm32_qspi.c
index 90c207d5184..eb52ff73b23 100644
--- a/drivers/spi/stm32_qspi.c
+++ b/drivers/spi/stm32_qspi.c
@@ -115,15 +115,8 @@ struct stm32_qspi_regs {
#define STM32_BUSY_TIMEOUT_US 100000
#define STM32_ABT_TIMEOUT_US 100000
-struct stm32_qspi_flash {
- u32 cr;
- u32 dcr;
- bool initialized;
-};
-
struct stm32_qspi_priv {
struct stm32_qspi_regs *regs;
- struct stm32_qspi_flash flash[STM32_QSPI_MAX_CHIP];
void __iomem *mm_base;
resource_size_t mm_size;
ulong clock_rate;
@@ -407,25 +400,11 @@ static int stm32_qspi_claim_bus(struct udevice *dev)
return -ENODEV;
if (priv->cs_used != slave_cs) {
- struct stm32_qspi_flash *flash = &priv->flash[slave_cs];
-
priv->cs_used = slave_cs;
- if (flash->initialized) {
- /* Set the configuration: speed + cs */
- writel(flash->cr, &priv->regs->cr);
- writel(flash->dcr, &priv->regs->dcr);
- } else {
- /* Set chip select */
- clrsetbits_le32(&priv->regs->cr, STM32_QSPI_CR_FSEL,
- priv->cs_used ? STM32_QSPI_CR_FSEL : 0);
-
- /* Save the configuration: speed + cs */
- flash->cr = readl(&priv->regs->cr);
- flash->dcr = readl(&priv->regs->dcr);
-
- flash->initialized = true;
- }
+ /* Set chip select */
+ clrsetbits_le32(&priv->regs->cr, STM32_QSPI_CR_FSEL,
+ priv->cs_used ? STM32_QSPI_CR_FSEL : 0);
}
setbits_le32(&priv->regs->cr, STM32_QSPI_CR_EN);