diff options
author | Conor Dooley <conor.dooley@microchip.com> | 2022-10-25 08:58:49 +0100 |
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committer | Leo Yu-Chi Liang <ycliang@andestech.com> | 2022-11-15 15:37:17 +0800 |
commit | 3f3527044d7460543b69931c3385925119dcf945 (patch) | |
tree | 6d46a16cc5a82bfbf729a4f6ab92593192413494 /drivers/timer/timer-uclass.c | |
parent | 4e405c68fbf53e52fdb36631caa090c081c59bd0 (diff) |
riscv: dts: fix the mpfs's reference clock frequency
The initial devicetree for PolarFire SoC incorrectly created a fixed
frequency clock in the devicetree to represent the msspll, but the
msspll is not a fixed frequency clock. The actual reference clock on a
board is either 125 or 100 MHz, 125 MHz in the case of the icicle kit.
Swap the incorrect representation of the msspll out for the actual
reference clock.
Fixes: dd4ee416a6 ("riscv: dts: Add device tree for Microchip Icicle Kit")
Signed-off-by: Conor Dooley <conor.dooley@microchip.com>
Reviewed-by: Leo Yu-Chi Liang <ycliang@andestech.com>
Reviewed-by: Padmarao Begari <padmarao.begari@microchip.com>
Diffstat (limited to 'drivers/timer/timer-uclass.c')
0 files changed, 0 insertions, 0 deletions