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author | Ovidiu Panait <ovpanait@gmail.com> | 2022-05-31 21:14:31 +0300 |
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committer | Michal Simek <michal.simek@amd.com> | 2022-06-24 14:16:00 +0200 |
commit | 95b7a8fd128aec8214d13b33131a4ea1fa4cc9a3 (patch) | |
tree | b3686f51bf152049642c884e67f912e8d6a47f21 /drivers/timer/xilinx-timer.c | |
parent | b195134984ec714f92632704e4725ced170ab1da (diff) |
microblaze: cache: introduce cpuinfo structure
Introduce a minimal cpuinfo structure to hold cache related info. The
instruction/data cache size and cache line size are initialized early in
the boot to default Kconfig values. They will be overwritten with data
from PVR/dtb if the microblaze UCLASS_CPU driver is enabled.
The cpuinfo struct was placed in global_data to allow the microblaze
UCLASS_CPU driver to also run before relocation (initialized global data
should be read-only before relocation).
gd_cpuinfo() helper macro was added to avoid volatile
"-Wdiscarded-qualifiers" warnings when using the pointer directly.
Signed-off-by: Ovidiu Panait <ovpanait@gmail.com>
Link: https://lore.kernel.org/r/20220531181435.3473549-10-ovpanait@gmail.com
Signed-off-by: Michal Simek <michal.simek@amd.com> (s/bralid/brlid/)
Diffstat (limited to 'drivers/timer/xilinx-timer.c')
0 files changed, 0 insertions, 0 deletions