diff options
author | Sean Anderson <sean.anderson@seco.com> | 2022-11-27 15:31:55 +0100 |
---|---|---|
committer | Marek Vasut <marex@denx.de> | 2022-11-27 15:34:56 +0100 |
commit | c55ac51a550c8d2f8485abe94cb80c15b81d08fa (patch) | |
tree | 8706946987793b17b8cd92f73d08461be184dae9 /drivers/usb/dwc3/core.h | |
parent | 6bae0eb5b8bd7f7f87c7bf106acea869da187b66 (diff) |
usb: dwc3: Program GFLADJ
GUCTL.REFCLKPER can only account for clock frequencies with integer
periods. To address this, program REFCLK_FLADJ with the relative error
caused by period truncation. The formula given in the register reference
has been rearranged to allow calculation based on rate (instead of
period), and to allow for fixed-point arithmetic.
Additionally, calculate a value for 240MHZDECR. This configures a
simulated 240Mhz clock using a counter with one fractional bit (PLS1).
This register is programmed only for versions >= 2.50a, since this is
the check also used by commit db2be4e9e30c ("usb: dwc3: Add frame length
adjustment quirk").
[ marek: Ported from Linux kernel commit
596c87856e08d ("usb: dwc3: Program GFLADJ") ]
Reviewed-by: Sean Anderson <seanga2@gmail.com>
Signed-off-by: Sean Anderson <sean.anderson@seco.com>
Signed-off-by: Marek Vasut <marex@denx.de> # Port from Linux
Diffstat (limited to 'drivers/usb/dwc3/core.h')
-rw-r--r-- | drivers/usb/dwc3/core.h | 3 |
1 files changed, 3 insertions, 0 deletions
diff --git a/drivers/usb/dwc3/core.h b/drivers/usb/dwc3/core.h index b4a7d9e52bc..532746dd88d 100644 --- a/drivers/usb/dwc3/core.h +++ b/drivers/usb/dwc3/core.h @@ -248,6 +248,9 @@ /* Global Frame Length Adjustment Register */ #define DWC3_GFLADJ_30MHZ_SDBND_SEL (1 << 7) #define DWC3_GFLADJ_30MHZ_MASK 0x3f +#define DWC3_GFLADJ_REFCLK_FLADJ_MASK GENMASK(21, 8) +#define DWC3_GFLADJ_240MHZDECR GENMASK(30, 24) +#define DWC3_GFLADJ_240MHZDECR_PLS1 BIT(31) /* Global User Control Register*/ #define DWC3_GUCTL_REFCLKPER_MASK 0xffc00000 |