Merge https://source.denx.de/u-boot/custodians/u-boot-marvell

- mvebu/turris_omina: Misc fixes and improvements (Pali & Marek)
- mvebu: spl: Always fallback to BootROM boot method (Pali)
- mvebu: Cleanup u-boot,dm-pre-reloc code (Pali)
- gpio: Remove mvgpio driver (Chris)
- SBx81LIFKW/SBx81LIFXCAT disable KIRKWOOD_GPIO (Chris)
- misc: atsha204a: Don't check for error when waking up the device (Pali)

8 files changed, 63 insertions, 200 deletions

diff --git a/drivers/gpio/Makefile b/drivers/gpio/Makefile
index 219f37e0e43..39762fa06ce 100644
--- a/drivers/gpio/Makefile
+++ b/drivers/gpio/Makefile
@@ -24,7 +24,6 @@ obj-$(CONFIG_INTEL_BROADWELL_GPIO)	+= intel_broadwell_gpio.o
 obj-$(CONFIG_IPROC_GPIO)	+= iproc_gpio.o
 obj-$(CONFIG_KIRKWOOD_GPIO)	+= kw_gpio.o
 obj-$(CONFIG_KONA_GPIO)	+= kona_gpio.o
-obj-$(CONFIG_MARVELL_GPIO)	+= mvgpio.o
 obj-$(CONFIG_MCP230XX_GPIO)	+= mcp230xx_gpio.o
 obj-$(CONFIG_MXC_GPIO)	+= mxc_gpio.o
 obj-$(CONFIG_MXS_GPIO)	+= mxs_gpio.o
diff --git a/drivers/gpio/mvgpio.c b/drivers/gpio/mvgpio.c
deleted file mode 100644
index 12e7197daf7..00000000000
--- a/drivers/gpio/mvgpio.c
+++ /dev/null
@@ -1,97 +0,0 @@
-// SPDX-License-Identifier: GPL-2.0+
-/*
- * (C) Copyright 2011
- * eInfochips Ltd. <www.einfochips.com>
- * Written-by: Ajay Bhargav <contact@8051projects.net>
- *
- * (C) Copyright 2010
- * Marvell Semiconductor <www.marvell.com>
- */
-
-#include <common.h>
-#include <malloc.h>
-#include <asm/io.h>
-#include <linux/errno.h>
-#include "mvgpio.h"
-#include <asm/gpio.h>
-
-#ifndef MV_MAX_GPIO
-#define MV_MAX_GPIO	128
-#endif
-
-int gpio_request(unsigned gpio, const char *label)
-{
-	if (gpio >= MV_MAX_GPIO) {
-		printf("%s: Invalid GPIO requested %d\n", __func__, gpio);
-		return -1;
-	}
-	return 0;
-}
-
-int gpio_free(unsigned gpio)
-{
-	return 0;
-}
-
-int gpio_direction_input(unsigned gpio)
-{
-	struct gpio_reg *gpio_reg_bank;
-
-	if (gpio >= MV_MAX_GPIO) {
-		printf("%s: Invalid GPIO %d\n", __func__, gpio);
-		return -1;
-	}
-
-	gpio_reg_bank = get_gpio_base(GPIO_TO_REG(gpio));
-	writel(GPIO_TO_BIT(gpio), &gpio_reg_bank->gcdr);
-	return 0;
-}
-
-int gpio_direction_output(unsigned gpio, int value)
-{
-	struct gpio_reg *gpio_reg_bank;
-
-	if (gpio >= MV_MAX_GPIO) {
-		printf("%s: Invalid GPIO %d\n", __func__, gpio);
-		return -1;
-	}
-
-	gpio_reg_bank = get_gpio_base(GPIO_TO_REG(gpio));
-	writel(GPIO_TO_BIT(gpio), &gpio_reg_bank->gsdr);
-	gpio_set_value(gpio, value);
-	return 0;
-}
-
-int gpio_get_value(unsigned gpio)
-{
-	struct gpio_reg *gpio_reg_bank;
-	u32 gpio_val;
-
-	if (gpio >= MV_MAX_GPIO) {
-		printf("%s: Invalid GPIO %d\n", __func__, gpio);
-		return -1;
-	}
-
-	gpio_reg_bank = get_gpio_base(GPIO_TO_REG(gpio));
-	gpio_val = readl(&gpio_reg_bank->gplr);
-
-	return GPIO_VAL(gpio, gpio_val);
-}
-
-int gpio_set_value(unsigned gpio, int value)
-{
-	struct gpio_reg *gpio_reg_bank;
-
-	if (gpio >= MV_MAX_GPIO) {
-		printf("%s: Invalid GPIO %d\n", __func__, gpio);
-		return -1;
-	}
-
-	gpio_reg_bank = get_gpio_base(GPIO_TO_REG(gpio));
-	if (value)
-		writel(GPIO_TO_BIT(gpio), &gpio_reg_bank->gpsr);
-	else
-		writel(GPIO_TO_BIT(gpio), &gpio_reg_bank->gpcr);
-
-	return 0;
-}
diff --git a/drivers/gpio/mvgpio.h b/drivers/gpio/mvgpio.h
deleted file mode 100644
index d68c48e6373..00000000000
--- a/drivers/gpio/mvgpio.h
+++ /dev/null
@@ -1,53 +0,0 @@
-/* SPDX-License-Identifier: GPL-2.0+ */
-/*
- * (C) Copyright 2011
- * eInfochips Ltd. <www.einfochips.com>
- * Written-by: Ajay Bhargav <contact@8051projects.net>
- *
- * (C) Copyright 2010
- * Marvell Semiconductor <www.marvell.com>
- */
-
-#ifndef __MVGPIO_H__
-#define __MVGPIO_H__
-
-#include <common.h>
-
-/*
- * GPIO Register map for Marvell SOCs
- */
-struct gpio_reg {
-	u32 gplr;	/* Pin Level Register - 0x0000 */
-	u32 pad0[2];
-	u32 gpdr;	/* Pin Direction Register - 0x000C */
-	u32 pad1[2];
-	u32 gpsr;	/* Pin Output Set Register - 0x0018 */
-	u32 pad2[2];
-	u32 gpcr;	/* Pin Output Clear Register - 0x0024 */
-	u32 pad3[2];
-	u32 grer;	/* Rising-Edge Detect Enable Register - 0x0030 */
-	u32 pad4[2];
-	u32 gfer;	/* Falling-Edge Detect Enable Register - 0x003C */
-	u32 pad5[2];
-	u32 gedr;	/* Edge Detect Status Register - 0x0048 */
-	u32 pad6[2];
-	u32 gsdr;	/* Bitwise Set of GPIO Direction Register - 0x0054 */
-	u32 pad7[2];
-	u32 gcdr;	/* Bitwise Clear of GPIO Direction Register - 0x0060 */
-	u32 pad8[2];
-	u32 gsrer;	/* Bitwise Set of Rising-Edge Detect Enable
-			   Register - 0x006C */
-	u32 pad9[2];
-	u32 gcrer;	/* Bitwise Clear of Rising-Edge Detect Enable
-			   Register - 0x0078 */
-	u32 pad10[2];
-	u32 gsfer;	/* Bitwise Set of Falling-Edge Detect Enable
-			   Register - 0x0084 */
-	u32 pad11[2];
-	u32 gcfer;	/* Bitwise Clear of Falling-Edge Detect Enable
-			   Register - 0x0090 */
-	u32 pad12[2];
-	u32 apmask;	/* Bitwise Mask of Edge Detect Register - 0x009C */
-};
-
-#endif /* __MVGPIO_H__ */
diff --git a/drivers/gpio/turris_omnia_mcu.c b/drivers/gpio/turris_omnia_mcu.c
index 3e5d74e62cd..986ccde6bc7 100644
--- a/drivers/gpio/turris_omnia_mcu.c
+++ b/drivers/gpio/turris_omnia_mcu.c
@@ -137,48 +137,44 @@ static int turris_omnia_mcu_get_value(struct udevice *dev, uint offset)
 static int turris_omnia_mcu_set_value(struct udevice *dev, uint offset, int value)
 {
 	struct turris_omnia_mcu_info *info = dev_get_plat(dev);
-	u8 val[2];
-	int ret;
-	u8 reg;
+	u8 val16[2];
+	u8 val32[4];
 
 	switch (offset) {
 	/* bank 0 */
-	case ilog2(STS_USB30_PWRON):
-		reg = CMD_GENERAL_CONTROL;
-		val[1] = CTL_USB30_PWRON;
-		break;
-	case ilog2(STS_USB31_PWRON):
-		reg = CMD_GENERAL_CONTROL;
-		val[1] = CTL_USB31_PWRON;
-		break;
-	case ilog2(STS_ENABLE_4V5):
-		reg = CMD_GENERAL_CONTROL;
-		val[1] = CTL_ENABLE_4V5;
-		break;
-	case ilog2(STS_BUTTON_MODE):
-		reg = CMD_GENERAL_CONTROL;
-		val[1] = CTL_BUTTON_MODE;
-		break;
+	case 0 ... 15:
+		switch (offset) {
+		case ilog2(STS_USB30_PWRON):
+			val16[1] = CTL_USB30_PWRON;
+			break;
+		case ilog2(STS_USB31_PWRON):
+			val16[1] = CTL_USB31_PWRON;
+			break;
+		case ilog2(STS_ENABLE_4V5):
+			val16[1] = CTL_ENABLE_4V5;
+			break;
+		case ilog2(STS_BUTTON_MODE):
+			val16[1] = CTL_BUTTON_MODE;
+			break;
+		default:
+			return -EINVAL;
+		}
+		val16[0] = value ? val16[1] : 0;
+		return dm_i2c_write(dev, CMD_GENERAL_CONTROL, val16, sizeof(val16));
 
 	/* bank 2 - supported only when FEAT_EXT_CMDS is set */
 	case (16 + 32 + 0) ... (16 + 32 + 15):
 		if (!(info->features & FEAT_EXT_CMDS))
 			return -EINVAL;
-		reg = CMD_EXT_CONTROL;
-		val[1] = BIT(offset - 16 - 32);
-		break;
+		val32[3] = BIT(offset - 16 - 32) >> 8;
+		val32[2] = BIT(offset - 16 - 32) & 0xff;
+		val32[1] = value ? val32[3] : 0;
+		val32[0] = value ? val32[2] : 0;
+		return dm_i2c_write(dev, CMD_EXT_CONTROL, val32, sizeof(val32));
 
 	default:
 		return -EINVAL;
 	}
-
-	val[0] = value ? val[1] : 0;
-
-	ret = dm_i2c_write(dev, reg, val, 2);
-	if (ret)
-		return ret;
-
-	return 0;
 }
 
 static int turris_omnia_mcu_direction_input(struct udevice *dev, uint offset)
diff --git a/drivers/misc/atsha204a-i2c.c b/drivers/misc/atsha204a-i2c.c
index e7c6be593dc..d3c515828ff 100644
--- a/drivers/misc/atsha204a-i2c.c
+++ b/drivers/misc/atsha204a-i2c.c
@@ -103,12 +103,13 @@ int atsha204a_wakeup(struct udevice *dev)
 	for (try = 1; try <= 10; ++try) {
 		debug("Try %i... ", try);
 
+		/*
+		 * The device ignores any levels or transitions on the SCL pin
+		 * when the device is idle, asleep or during waking up.
+		 * Don't check for error when waking up the device.
+		 */
 		memset(req, 0, 4);
-		res = atsha204a_send(dev, req, 4);
-		if (res) {
-			debug("failed on I2C send, trying again\n");
-			continue;
-		}
+		atsha204a_send(dev, req, 4);
 
 		udelay(ATSHA204A_TWLO_US + ATSHA204A_TWHI_US);
 
diff --git a/drivers/pci/Kconfig b/drivers/pci/Kconfig
index 436acca898e..22f4995453e 100644
--- a/drivers/pci/Kconfig
+++ b/drivers/pci/Kconfig
@@ -301,6 +301,7 @@ config PCI_MVEBU
 	depends on (ARCH_KIRKWOOD || ARCH_MVEBU)
 	select MISC
 	select DM_RESET
+	select DM_GPIO
 	help
 	  Say Y here if you want to enable PCIe controller support on
 	  Kirkwood and Armada 370/XP/375/38x SoCs.
diff --git a/drivers/pci/pci_mvebu.c b/drivers/pci/pci_mvebu.c
index d80f87e0cfc..5bd340a421b 100644
--- a/drivers/pci/pci_mvebu.c
+++ b/drivers/pci/pci_mvebu.c
@@ -22,6 +22,7 @@
 #include <asm/io.h>
 #include <asm/arch/cpu.h>
 #include <asm/arch/soc.h>
+#include <asm/gpio.h>
 #include <linux/bitops.h>
 #include <linux/delay.h>
 #include <linux/errno.h>
@@ -60,6 +61,7 @@ struct mvebu_pcie {
 	struct resource mem;
 	void __iomem *iobase;
 	struct resource io;
+	struct gpio_desc reset_gpio;
 	u32 intregs;
 	u32 port;
 	u32 lane;
@@ -416,6 +418,14 @@ static int mvebu_pcie_probe(struct udevice *dev)
 	struct udevice *ctlr = pci_get_controller(dev);
 	struct pci_controller *hose = dev_get_uclass_priv(ctlr);
 	u32 reg;
+	int ret;
+
+	/* Request for optional PERST# GPIO */
+	ret = gpio_request_by_name(dev, "reset-gpios", 0, &pcie->reset_gpio, GPIOD_IS_OUT);
+	if (ret && ret != -ENOENT) {
+		printf("%s: unable to request reset-gpios: %d\n", pcie->name, ret);
+		return ret;
+	}
 
 	/*
 	 * Change Class Code of PCI Bridge device to PCI Bridge (0x600400)
@@ -537,6 +547,10 @@ static int mvebu_pcie_probe(struct udevice *dev)
 	pcie->cfgcache[(PCI_PREF_MEMORY_BASE - 0x10) / 4] =
 		PCI_PREF_RANGE_TYPE_64 | (PCI_PREF_RANGE_TYPE_64 << 16);
 
+	/* Release PERST# via GPIO when it was defined */
+	if (dm_gpio_is_valid(&pcie->reset_gpio))
+		dm_gpio_set_value(&pcie->reset_gpio, 0);
+
 	mvebu_pcie_wait_for_link(pcie);
 
 	return 0;
diff --git a/drivers/pinctrl/mvebu/pinctrl-armada-37xx.c b/drivers/pinctrl/mvebu/pinctrl-armada-37xx.c
index bb7a76baed1..25fbe39abd1 100644
--- a/drivers/pinctrl/mvebu/pinctrl-armada-37xx.c
+++ b/drivers/pinctrl/mvebu/pinctrl-armada-37xx.c
@@ -99,16 +99,6 @@ struct armada_37xx_pinctrl {
 	unsigned int			nfuncs;
 };
 
-#define PIN_GRP(_name, _start, _nr, _mask, _func1, _func2)	\
-	{					\
-		.name = _name,			\
-		.start_pin = _start,		\
-		.npins = _nr,			\
-		.reg_mask = _mask,		\
-		.val = {0, _mask},		\
-		.funcs = {_func1, _func2}	\
-	}
-
 #define PIN_GRP_GPIO_0(_name, _start, _nr)	\
 	{					\
 		.name = _name,			\
@@ -200,9 +190,11 @@ static struct armada_37xx_pin_group armada_37xx_sb_groups[] = {
 	PIN_GRP_GPIO("pcie1", 3, 1, BIT(5), "pcie"), /* this actually controls "pcie1_reset" */
 	PIN_GRP_GPIO("pcie1_clkreq", 4, 1, BIT(9), "pcie"),
 	PIN_GRP_GPIO("pcie1_wakeup", 5, 1, BIT(10), "pcie"),
-	PIN_GRP_GPIO("ptp", 20, 3, BIT(11) | BIT(12) | BIT(13), "ptp"),
-	PIN_GRP("ptp_clk", 21, 1, BIT(6), "ptp", "mii"),
-	PIN_GRP("ptp_trig", 22, 1, BIT(7), "ptp", "mii"),
+	PIN_GRP_GPIO("ptp", 20, 1, BIT(11), "ptp"),
+	PIN_GRP_GPIO_3("ptp_clk", 21, 1, BIT(6) | BIT(12), 0, BIT(6), BIT(12),
+		       "ptp", "mii"),
+	PIN_GRP_GPIO_3("ptp_trig", 22, 1, BIT(7) | BIT(13), 0, BIT(7), BIT(13),
+		       "ptp", "mii"),
 	PIN_GRP_GPIO_3("mii_col", 23, 1, BIT(8) | BIT(14), 0, BIT(8), BIT(14),
 		       "mii", "mii_err"),
 };
@@ -414,7 +406,17 @@ static int armada_37xx_pmx_get_pin_muxing(struct udevice *dev, unsigned int sele
 
 			for (f = 0; f < NB_FUNCS && grp->funcs[f]; f++) {
 				if (grp->val[f] == val) {
-					strlcpy(buf, grp->funcs[f], size);
+					/*
+					 * In more cases group name consist of
+					 * function name followed by function
+					 * number. So if function name is just
+					 * prefix of group name, show group name.
+					 */
+					if (strncmp(grp->name, grp->funcs[f],
+						    strlen(grp->funcs[f])) == 0)
+						strlcpy(buf, grp->name, size);
+					else
+						strlcpy(buf, grp->funcs[f], size);
 					return 0;
 				}
 			}