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authorTom Rini <trini@konsulko.com>2022-06-15 23:10:17 -0400
committerTom Rini <trini@konsulko.com>2022-06-15 23:10:17 -0400
commit488d30a1e9f937b6e2726791dceb865e9e10e118 (patch)
tree539dceeba73019a41c8c59a304d1ae85e0aa443c /drivers
parentc18e5fb055ab789f58434e3cb432582adee0134c (diff)
parent12a29d3b851029212ca3b3e0f233fc7b62aa0a39 (diff)
Merge branch 'master' of https://source.denx.de/u-boot/custodians/u-boot-mmc
Diffstat (limited to 'drivers')
-rw-r--r--drivers/mmc/fsl_esdhc_imx.c50
-rw-r--r--drivers/mmc/mmc.c3
-rw-r--r--drivers/mmc/mmc_write.c2
3 files changed, 37 insertions, 18 deletions
diff --git a/drivers/mmc/fsl_esdhc_imx.c b/drivers/mmc/fsl_esdhc_imx.c
index 893d7e241f2..9befb190bdf 100644
--- a/drivers/mmc/fsl_esdhc_imx.c
+++ b/drivers/mmc/fsl_esdhc_imx.c
@@ -1060,6 +1060,30 @@ static int esdhc_getcd_common(struct fsl_esdhc_priv *priv)
return timeout > 0;
}
+static int esdhc_wait_dat0_common(struct fsl_esdhc_priv *priv, int state,
+ int timeout_us)
+{
+ struct fsl_esdhc *regs = priv->esdhc_regs;
+ int ret, err;
+ u32 tmp;
+
+ /* make sure the card clock keep on */
+ esdhc_setbits32(&regs->vendorspec, VENDORSPEC_FRC_SDCLK_ON);
+
+ ret = readx_poll_timeout(esdhc_read32, &regs->prsstat, tmp,
+ !!(tmp & PRSSTAT_DAT0) == !!state,
+ timeout_us);
+
+ /* change to default setting, let host control the card clock */
+ esdhc_clrbits32(&regs->vendorspec, VENDORSPEC_FRC_SDCLK_ON);
+
+ err = readx_poll_timeout(esdhc_read32, &regs->prsstat, tmp, tmp & PRSSTAT_SDOFF, 100);
+ if (err)
+ pr_warn("card clock not gate off as expect.\n");
+
+ return ret;
+}
+
static int esdhc_reset(struct fsl_esdhc *regs)
{
ulong start;
@@ -1109,11 +1133,19 @@ static int esdhc_set_ios(struct mmc *mmc)
return esdhc_set_ios_common(priv, mmc);
}
+static int esdhc_wait_dat0(struct mmc *mmc, int state, int timeout_us)
+{
+ struct fsl_esdhc_priv *priv = mmc->priv;
+
+ return esdhc_wait_dat0_common(priv, state, timeout_us);
+}
+
static const struct mmc_ops esdhc_ops = {
.getcd = esdhc_getcd,
.init = esdhc_init,
.send_cmd = esdhc_send_cmd,
.set_ios = esdhc_set_ios,
+ .wait_dat0 = esdhc_wait_dat0,
};
#endif
@@ -1576,25 +1608,9 @@ static int __maybe_unused fsl_esdhc_set_enhanced_strobe(struct udevice *dev)
static int fsl_esdhc_wait_dat0(struct udevice *dev, int state,
int timeout_us)
{
- int ret, err;
- u32 tmp;
struct fsl_esdhc_priv *priv = dev_get_priv(dev);
- struct fsl_esdhc *regs = priv->esdhc_regs;
- /* make sure the card clock keep on */
- esdhc_setbits32(&regs->vendorspec, VENDORSPEC_FRC_SDCLK_ON);
-
- ret = readx_poll_timeout(esdhc_read32, &regs->prsstat, tmp,
- !!(tmp & PRSSTAT_DAT0) == !!state,
- timeout_us);
-
- /* change to default setting, let host control the card clock */
- esdhc_clrbits32(&regs->vendorspec, VENDORSPEC_FRC_SDCLK_ON);
- err = readx_poll_timeout(esdhc_read32, &regs->prsstat, tmp, tmp & PRSSTAT_SDOFF, 100);
- if (err)
- dev_warn(dev, "card clock not gate off as expect.\n");
-
- return ret;
+ return esdhc_wait_dat0_common(priv, state, timeout_us);
}
static const struct dm_mmc_ops fsl_esdhc_ops = {
diff --git a/drivers/mmc/mmc.c b/drivers/mmc/mmc.c
index 8a7d0739006..12d29da528a 100644
--- a/drivers/mmc/mmc.c
+++ b/drivers/mmc/mmc.c
@@ -34,6 +34,9 @@ static int mmc_set_signal_voltage(struct mmc *mmc, uint signal_voltage);
static int mmc_wait_dat0(struct mmc *mmc, int state, int timeout_us)
{
+ if (mmc->cfg->ops->wait_dat0)
+ return mmc->cfg->ops->wait_dat0(mmc, state, timeout_us);
+
return -ENOSYS;
}
diff --git a/drivers/mmc/mmc_write.c b/drivers/mmc/mmc_write.c
index d23b7d9729f..eab94c7b607 100644
--- a/drivers/mmc/mmc_write.c
+++ b/drivers/mmc/mmc_write.c
@@ -102,7 +102,7 @@ ulong mmc_berase(struct blk_desc *block_dev, lbaint_t start, lbaint_t blkcnt)
"The erase range would be change to "
"0x" LBAF "~0x" LBAF "\n\n",
mmc->erase_grp_size, start & ~(mmc->erase_grp_size - 1),
- ((start + blkcnt + mmc->erase_grp_size)
+ ((start + blkcnt + mmc->erase_grp_size - 1)
& ~(mmc->erase_grp_size - 1)) - 1);
while (blk < blkcnt) {