Merge tag 'u-boot-imx-master-20241018a' of https://gitlab.denx.de/u-boot/custodians/u-boot-imx

CI: https://source.denx.de/u-boot/custodians/u-boot-imx/-/pipelines/22796

- Switch to using upstream DT on DH i.MX8MP DHCOM PDK2/PDK3.
- Add ability to build fallback DTBOs from arch/$(ARCH)/dts.
- Remove fdt_high and initrd_high env variables from imx6-dhcom.
- Add dummy clk for imx8.
- Fix DT corruption in imx8_cpu.
- Improve DDR stability on pico-imx7d.

3 files changed, 25 insertions, 15 deletions

diff --git a/drivers/clk/imx/clk-imx8qm.c b/drivers/clk/imx/clk-imx8qm.c
index 62fed7e3e32..466d71786cf 100644
--- a/drivers/clk/imx/clk-imx8qm.c
+++ b/drivers/clk/imx/clk-imx8qm.c
@@ -48,6 +48,8 @@ ulong imx8_clk_get_rate(struct clk *clk)
 	debug("%s(#%lu)\n", __func__, clk->id);
 
 	switch (clk->id) {
+	case IMX8QM_CLK_DUMMY:
+		return 0;
 	case IMX8QM_A53_DIV:
 		resource = SC_R_A53;
 		pm_clk = SC_PM_CLK_CPU;
@@ -264,6 +266,8 @@ int __imx8_clk_enable(struct clk *clk, bool enable)
 	debug("%s(#%lu)\n", __func__, clk->id);
 
 	switch (clk->id) {
+	case IMX8QM_CLK_DUMMY:
+		return 0;
 	case IMX8QM_I2C0_IPG_CLK:
 	case IMX8QM_I2C0_CLK:
 	case IMX8QM_I2C0_DIV:
diff --git a/drivers/clk/imx/clk-imx8qxp.c b/drivers/clk/imx/clk-imx8qxp.c
index 18bdc08971b..79098623bc8 100644
--- a/drivers/clk/imx/clk-imx8qxp.c
+++ b/drivers/clk/imx/clk-imx8qxp.c
@@ -51,6 +51,8 @@ ulong imx8_clk_get_rate(struct clk *clk)
 	debug("%s(#%lu)\n", __func__, clk->id);
 
 	switch (clk->id) {
+	case IMX8QXP_CLK_DUMMY:
+		return 0;
 	case IMX8QXP_A35_DIV:
 		resource = SC_R_A35;
 		pm_clk = SC_PM_CLK_CPU;
@@ -248,6 +250,8 @@ int __imx8_clk_enable(struct clk *clk, bool enable)
 	debug("%s(#%lu)\n", __func__, clk->id);
 
 	switch (clk->id) {
+	case IMX8QXP_CLK_DUMMY:
+		return 0;
 	case IMX8QXP_I2C0_CLK:
 	case IMX8QXP_I2C0_IPG_CLK:
 		resource = SC_R_I2C_0;
diff --git a/drivers/cpu/imx8_cpu.c b/drivers/cpu/imx8_cpu.c
index 6c0a8c0cbe4..51262befaff 100644
--- a/drivers/cpu/imx8_cpu.c
+++ b/drivers/cpu/imx8_cpu.c
@@ -20,10 +20,11 @@
 
 DECLARE_GLOBAL_DATA_PTR;
 
+#define IMX_REV_LEN	4
 struct cpu_imx_plat {
 	const char *name;
-	const char *rev;
 	const char *type;
+	char rev[IMX_REV_LEN];
 	u32 cpu_rsrc;
 	u32 cpurev;
 	u32 freq_mhz;
@@ -69,28 +70,29 @@ static const char *get_imx_type_str(u32 imxtype)
 	}
 }
 
-static const char *get_imx_rev_str(u32 rev)
+static void get_imx_rev_str(struct cpu_imx_plat *plat, u32 rev)
 {
-	static char revision[4];
-
 	if (IS_ENABLED(CONFIG_IMX8)) {
 		switch (rev) {
 		case CHIP_REV_A:
-			return "A";
+			plat->rev[0] = 'A';
+			break;
 		case CHIP_REV_B:
-			return "B";
+			plat->rev[0] = 'B';
+			break;
 		case CHIP_REV_C:
-			return "C";
+			plat->rev[0] = 'C';
+			break;
 		default:
-			return "?";
+			plat->rev[0] = '?';
+			break;
 		}
+		plat->rev[1] = '\0';
 	} else {
-		revision[0] = '1' + (((rev & 0xf0) - CHIP_REV_1_0) >> 4);
-		revision[1] = '.';
-		revision[2] = '0' + (rev & 0xf);
-		revision[3] = '\0';
-
-		return revision;
+		plat->rev[0] = '1' + (((rev & 0xf0) - CHIP_REV_1_0) >> 4);
+		plat->rev[1] = '.';
+		plat->rev[2] = '0' + (rev & 0xf);
+		plat->rev[3] = '\0';
 	}
 }
 
@@ -318,7 +320,7 @@ static int imx_cpu_probe(struct udevice *dev)
 	set_core_data(dev);
 	cpurev = get_cpu_rev();
 	plat->cpurev = cpurev;
-	plat->rev = get_imx_rev_str(cpurev & 0xFFF);
+	get_imx_rev_str(plat, cpurev & 0xFFF);
 	plat->type = get_imx_type_str((cpurev & 0x1FF000) >> 12);
 	plat->freq_mhz = imx_get_cpu_rate(dev) / 1000000;
 	plat->mpidr = dev_read_addr(dev);