Merge https://gitlab.denx.de/u-boot/custodians/u-boot-fsl-qoriq into next

- updates and fixes on ls1028a, lx2, ls1046a, MC-DPSPARSER support

10 files changed, 451 insertions, 47 deletions

diff --git a/drivers/net/fsl-mc/Kconfig b/drivers/net/fsl-mc/Kconfig
index 25a2cb8ffa9..2cf651d3b3e 100644
--- a/drivers/net/fsl-mc/Kconfig
+++ b/drivers/net/fsl-mc/Kconfig
@@ -22,4 +22,16 @@ config SYS_MC_RSV_MEM_ALIGN
 	  Reserved memory needs to be aligned for MC to use. Default value
 	  is 512MB.
 
+config MC_DRAM_SPB_OFFSET
+	hex "Soft Parser SPB DRAM offset"
+	default 0x00F40000
+	help
+	  Set the DRAM offset for Soft Parser Blob.
+
+config MC_SPB_MAX_SIZE
+	hex "Soft Parser SPB maximum size"
+	default 0x00020000
+	help
+	  Set the maximum size for Soft Parser Blob.
+
 endif # FSL_MC_ENET
diff --git a/drivers/net/fsl-mc/Makefile b/drivers/net/fsl-mc/Makefile
index 1b1b4a77f88..5a1acd576ab 100644
--- a/drivers/net/fsl-mc/Makefile
+++ b/drivers/net/fsl-mc/Makefile
@@ -1,6 +1,7 @@
 # SPDX-License-Identifier: GPL-2.0+
 #
 # Copyright 2014 Freescale Semiconductor, Inc.
+# Copyright 2018 NXP
 
 # Layerscape MC driver
 obj-y += mc.o \
@@ -9,5 +10,6 @@ obj-y += mc.o \
 	dprc.o	\
 	dpbp.o	\
 	dpni.o	\
-	dpmac.o
+	dpmac.o	\
+	dpsparser.o
 obj-y += dpio/
diff --git a/drivers/net/fsl-mc/dpsparser.c b/drivers/net/fsl-mc/dpsparser.c
new file mode 100644
index 00000000000..cfd1ba66a05
--- /dev/null
+++ b/drivers/net/fsl-mc/dpsparser.c
@@ -0,0 +1,138 @@
+// SPDX-License-Identifier: GPL-2.0+
+/*
+ * Data Path Soft Parser
+ *
+ * Copyright 2018 NXP
+ */
+#include <fsl-mc/fsl_mc_sys.h>
+#include <fsl-mc/fsl_mc_cmd.h>
+#include <fsl-mc/fsl_dpsparser.h>
+
+int dpsparser_open(struct fsl_mc_io *mc_io,
+		   u32 cmd_flags,
+		   u16 *token)
+{
+	struct mc_command cmd = { 0 };
+	int err;
+
+	/* prepare command */
+	cmd.header = mc_encode_cmd_header(DPSPARSER_CMDID_OPEN,
+					  cmd_flags,
+					  0);
+
+	/* send command to mc*/
+	err = mc_send_command(mc_io, &cmd);
+	if (err)
+		return err;
+
+	/* retrieve response parameters */
+	*token = MC_CMD_HDR_READ_TOKEN(cmd.header);
+
+	return err;
+}
+
+int dpsparser_close(struct fsl_mc_io *mc_io,
+		    u32 cmd_flags,
+		    u16 token)
+{
+	struct mc_command cmd = { 0 };
+
+	/* prepare command */
+	cmd.header = mc_encode_cmd_header(DPSPARSER_CMDID_CLOSE, cmd_flags,
+					  token);
+
+	/* send command to mc*/
+	return mc_send_command(mc_io, &cmd);
+}
+
+int dpsparser_create(struct fsl_mc_io *mc_io,
+		     u16 token,
+		     u32 cmd_flags,
+		     u32 *obj_id)
+{
+	struct mc_command cmd = { 0 };
+	int err;
+
+	/* prepare command */
+	cmd.header = mc_encode_cmd_header(DPSPARSER_CMDID_CREATE,
+					  cmd_flags,
+					  token);
+
+	/* send command to mc*/
+	err = mc_send_command(mc_io, &cmd);
+	if (err)
+		return err;
+
+	/* retrieve response parameters */
+	MC_CMD_READ_OBJ_ID(cmd, *obj_id);
+
+	return 0;
+}
+
+int dpsparser_destroy(struct fsl_mc_io *mc_io,
+		      u16 token,
+		      u32 cmd_flags,
+		      u32 obj_id)
+{
+	struct mc_command cmd = { 0 };
+
+	/* prepare command */
+	cmd.header = mc_encode_cmd_header(DPSPARSER_CMDID_DESTROY,
+					  cmd_flags,
+					  token);
+
+	/* set object id to destroy */
+	CMD_DESTROY_SET_OBJ_ID_PARAM0(cmd, obj_id);
+
+	/* send command to mc*/
+	return mc_send_command(mc_io, &cmd);
+}
+
+int dpsparser_apply_spb(struct fsl_mc_io *mc_io,
+			u32 cmd_flags,
+			u16 token,
+			u64 blob_addr,
+			u16 *error)
+{
+	struct mc_command cmd = { 0 };
+	int err;
+
+	/* prepare command */
+	cmd.header = mc_encode_cmd_header(DPSPARSER_CMDID_APPLY_SPB,
+					  cmd_flags,
+					  token);
+	DPSPARSER_CMD_BLOB_SET_ADDR(cmd, blob_addr);
+
+	/* send command to mc*/
+	err = mc_send_command(mc_io, &cmd);
+	if (err)
+		return err;
+
+	/* retrieve response parameters: MC error code */
+	DPSPARSER_CMD_BLOB_REPORT_ERROR(cmd, *error);
+
+	return 0;
+}
+
+int dpsparser_get_api_version(struct fsl_mc_io *mc_io,
+			      u32 cmd_flags,
+			      u16 *major_ver,
+			      u16 *minor_ver)
+{
+	struct mc_command cmd = { 0 };
+	int err;
+
+	/* prepare command */
+	cmd.header = mc_encode_cmd_header(DPSPARSER_CMDID_GET_API_VERSION,
+					  cmd_flags, 0);
+
+	/* send command to mc */
+	err = mc_send_command(mc_io, &cmd);
+	if (err)
+		return err;
+
+	/* retrieve response parameters */
+	mc_cmd_read_api_version(&cmd, major_ver, minor_ver);
+
+	return 0;
+}
diff --git a/drivers/net/fsl-mc/mc.c b/drivers/net/fsl-mc/mc.c
index ffc408e3a4a..8ff43a91c76 100644
--- a/drivers/net/fsl-mc/mc.c
+++ b/drivers/net/fsl-mc/mc.c
@@ -1,7 +1,6 @@
 // SPDX-License-Identifier: GPL-2.0+
 /*
  * Copyright 2014 Freescale Semiconductor, Inc.
- * Copyright 2017 NXP
  * Copyright 2017-2018 NXP
  */
 #include <common.h>
@@ -21,6 +20,7 @@
 #include <fsl-mc/fsl_dprc.h>
 #include <fsl-mc/fsl_dpio.h>
 #include <fsl-mc/fsl_dpni.h>
+#include <fsl-mc/fsl_dpsparser.h>
 #include <fsl-mc/fsl_qbman_portal.h>
 #include <fsl-mc/ldpaa_wriop.h>
 
@@ -35,6 +35,7 @@
 
 DECLARE_GLOBAL_DATA_PTR;
 static int mc_memset_resv_ram;
+static struct mc_version mc_ver_info;
 static int mc_boot_status = -1;
 static int mc_dpl_applied = -1;
 #ifdef CONFIG_SYS_LS_MC_DRAM_AIOP_IMG_OFFSET
@@ -49,6 +50,9 @@ struct fsl_dpbp_obj *dflt_dpbp = NULL;
 struct fsl_dpio_obj *dflt_dpio = NULL;
 struct fsl_dpni_obj *dflt_dpni = NULL;
 static u64 mc_lazy_dpl_addr;
+static u32 dpsparser_obj_id;
+static u16 dpsparser_handle;
+static char *mc_err_msg_apply_spb[] = MC_ERROR_MSG_APPLY_SPB;
 
 #ifdef DEBUG
 void dump_ram_words(const char *title, void *addr)
@@ -92,7 +96,6 @@ void dump_mc_ccsr_regs(struct mc_ccsr_registers __iomem *mc_ccsr_regs)
 
 #endif /* DEBUG */
 
-#ifndef CONFIG_SYS_LS_MC_FW_IN_DDR
 /**
  * Copying MC firmware or DPL image to DDR
  */
@@ -105,6 +108,7 @@ static int mc_copy_image(const char *title,
 	return 0;
 }
 
+#ifndef CONFIG_SYS_LS_MC_FW_IN_DDR
 /**
  * MC firmware FIT image parser checks if the image is in FIT
  * format, verifies integrity of the image and calculates
@@ -691,7 +695,6 @@ int mc_init(u64 mc_fw_addr, u64 mc_dpc_addr)
 	const void *raw_image_addr;
 	size_t raw_image_size = 0;
 #endif
-	struct mc_version mc_ver_info;
 	u8 mc_ram_num_256mb_blocks;
 	size_t mc_ram_size = mc_get_dram_block_size();
 
@@ -1447,6 +1450,170 @@ err:
 	return err;
 }
 
+static bool is_dpsparser_supported(void)
+{
+	/* dpsparser support was first introduced in MC version: 10.12.0 */
+	if (mc_ver_info.major < 10)
+		return false;
+	if (mc_ver_info.major == 10)
+		return (mc_ver_info.minor >= 12);
+	return true;
+}
+
+static int dpsparser_version_check(struct fsl_mc_io *mc_io)
+{
+	int error;
+	u16 major_ver, minor_ver;
+
+	if (!is_dpsparser_supported())
+		return 0;
+
+	error = dpsparser_get_api_version(mc_io, 0,
+					  &major_ver,
+					  &minor_ver);
+	if (error < 0) {
+		printf("dpsparser_get_api_version() failed: %d\n", error);
+		return error;
+	}
+
+	if (major_ver < DPSPARSER_VER_MAJOR || (major_ver ==
+	    DPSPARSER_VER_MAJOR && minor_ver < DPSPARSER_VER_MINOR)) {
+		printf("DPSPARSER version mismatch found %u.%u,",
+		       major_ver, minor_ver);
+		printf("supported version is %u.%u\n",
+		       DPSPARSER_VER_MAJOR, DPSPARSER_VER_MINOR);
+	}
+
+	return error;
+}
+
+static int dpsparser_init(void)
+{
+	int err = 0;
+
+	if (!is_dpsparser_supported())
+		return 0;
+
+	err = dpsparser_create(dflt_mc_io,
+			       dflt_dprc_handle,
+			       MC_CMD_NO_FLAGS,
+			       &dpsparser_obj_id);
+	if (err)
+		printf("dpsparser_create() failed\n");
+
+	err = dpsparser_version_check(dflt_mc_io);
+	if (err < 0) {
+		printf("dpsparser_version_check() failed: %d\n", err);
+		goto err_version_check;
+	}
+
+	err = dpsparser_open(dflt_mc_io,
+			     MC_CMD_NO_FLAGS,
+			     &dpsparser_handle);
+	if (err < 0) {
+		printf("dpsparser_open() failed: %d\n", err);
+		goto err_open;
+	}
+
+	return err;
+
+err_open:
+err_version_check:
+	dpsparser_destroy(dflt_mc_io,
+			  dflt_dprc_handle,
+			  MC_CMD_NO_FLAGS, dpsparser_obj_id);
+
+	return err;
+}
+
+#ifdef DPSPARSER_DESTROY
+/* TODO: refactoring needed in the future to allow DPSPARSER object destroy
+ * Workaround: DO NOT destroy DPSPARSER object because it needs to be available
+ * on Apply DPL
+ */
+static int dpsparser_exit(void)
+{
+	int err;
+
+	if (!is_dpsparser_supported())
+		return 0;
+
+	dpsparser_close(dflt_mc_io, MC_CMD_NO_FLAGS, dpsparser_handle);
+	if (err < 0) {
+		printf("dpsparser_close() failed: %d\n", err);
+		goto err;
+	}
+
+	err = dpsparser_destroy(dflt_mc_io, dflt_dprc_handle,
+				MC_CMD_NO_FLAGS, dpsparser_obj_id);
+	if (err < 0) {
+		printf("dpsparser_destroy() failed: %d\n", err);
+		goto err;
+	}
+	return 0;
+
+err:
+	return err;
+}
+#endif
+
+int mc_apply_spb(u64 mc_spb_addr)
+{
+	int err = 0;
+	u16 error, err_arr_size;
+	u64 mc_spb_offset;
+	u32 spb_size;
+	struct sp_blob_header *sp_blob;
+	u64 mc_ram_addr = mc_get_dram_addr();
+
+	if (!is_dpsparser_supported())
+		return 0;
+
+	if (!mc_spb_addr) {
+		printf("fsl-mc: Invalid Blob address\n");
+		return -1;
+	}
+
+#ifdef CONFIG_MC_DRAM_SPB_OFFSET
+	mc_spb_offset = CONFIG_MC_DRAM_SPB_OFFSET;
+#else
+#error "CONFIG_MC_DRAM_SPB_OFFSET not defined"
+#endif
+
+	// Read blob header and get size of SPB blob
+	sp_blob = (struct sp_blob_header *)mc_spb_addr;
+	spb_size = le32_to_cpu(sp_blob->length);
+	if (spb_size > CONFIG_MC_SPB_MAX_SIZE) {
+		printf("\nfsl-mc: ERROR: Bad SPB image (too large: %d)\n",
+		       spb_size);
+		return -EINVAL;
+	}
+
+	mc_copy_image("MC SP Blob", mc_spb_addr, spb_size,
+		      mc_ram_addr + mc_spb_offset);
+
+	//Invoke MC command to apply SPB blob
+	printf("fsl-mc: Applying soft parser blob... ");
+	err = dpsparser_apply_spb(dflt_mc_io, MC_CMD_NO_FLAGS, dpsparser_handle,
+				  mc_spb_offset, &error);
+	if (err)
+		return err;
+
+	if (error == 0) {
+		printf("SUCCESS\n");
+	} else {
+		printf("FAILED with error code = %d:\n", error);
+		err_arr_size = (u16)ARRAY_SIZE(mc_err_msg_apply_spb);
+
+		if (error > 0 && error < err_arr_size)
+			printf(mc_err_msg_apply_spb[error]);
+		else
+			printf(MC_ERROR_MSG_SPB_UNKNOWN);
+	}
+
+	return err;
+}
+
 static int mc_init_object(void)
 {
 	int err = 0;
@@ -1475,6 +1642,12 @@ static int mc_init_object(void)
 		goto err;
 	}
 
+	err = dpsparser_init();
+	if (err < 0) {
+		printf("dpsparser_init() failed: %d\n", err);
+		goto err;
+	}
+
 	return 0;
 err:
 	return err;
@@ -1608,39 +1781,87 @@ static int do_fsl_mc(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])
 		}
 		break;
 
-	case 'l':
+	case 'l': {
+		/* lazyapply */
+		u64 mc_dpl_addr;
+
+		if (argc < 4)
+			goto usage;
+
+		if (get_dpl_apply_status() == 0) {
+			printf("fsl-mc: DPL already applied\n");
+			return err;
+		}
+
+		mc_dpl_addr = simple_strtoull(argv[3], NULL, 16);
+
+		if (get_mc_boot_status() != 0) {
+			printf("fsl-mc: Deploying data path layout ..");
+			printf("ERROR (MC is not booted)\n");
+			return -ENODEV;
+		}
+
+		/*
+		 * We will do the actual dpaa exit and dpl apply
+		 * later from announce_and_cleanup().
+		 */
+		mc_lazy_dpl_addr = mc_dpl_addr;
+		break;
+		}
+
 	case 'a': {
-			u64 mc_dpl_addr;
+		/* apply */
+		char sub_cmd;
+		u64 mc_apply_addr;
 
-			if (argc < 4)
-				goto usage;
+		if (argc < 4)
+			goto usage;
+
+		sub_cmd = argv[2][0];
 
+		switch (sub_cmd) {
+		case 'd':
+		case 'D':
 			if (get_dpl_apply_status() == 0) {
 				printf("fsl-mc: DPL already applied\n");
 				return err;
 			}
-
-			mc_dpl_addr = simple_strtoull(argv[3], NULL,
-							      16);
-
 			if (get_mc_boot_status() != 0) {
 				printf("fsl-mc: Deploying data path layout ..");
 				printf("ERROR (MC is not booted)\n");
 				return -ENODEV;
 			}
 
-			if (argv[1][0] == 'l') {
-				/*
-				 * We will do the actual dpaa exit and dpl apply
-				 * later from announce_and_cleanup().
-				 */
-				mc_lazy_dpl_addr = mc_dpl_addr;
-			} else {
-				/* The user wants it applied now */
-				if (!fsl_mc_ldpaa_exit(NULL))
-					err = mc_apply_dpl(mc_dpl_addr);
+			mc_apply_addr = simple_strtoull(argv[3], NULL, 16);
+
+			/* The user wants DPL applied now */
+			if (!fsl_mc_ldpaa_exit(NULL))
+				err = mc_apply_dpl(mc_apply_addr);
+			break;
+
+		case 's':
+			if (!is_dpsparser_supported()) {
+				printf("fsl-mc: apply spb command .. ");
+				printf("ERROR: requires at least MC 10.12.0\n");
+				return err;
 			}
+			if (get_mc_boot_status() != 0) {
+				printf("fsl-mc: Deploying Soft Parser Blob...");
+				printf("ERROR (MC is not booted)\n");
+				return err;
+			}
+
+			mc_apply_addr = simple_strtoull(argv[3], NULL, 16);
+
+			/* Apply spb (Soft Parser Blob) */
+			err = mc_apply_spb(mc_apply_addr);
 			break;
+
+		default:
+			printf("Invalid option: %s\n", argv[2]);
+			goto usage;
+		}
+		break;
 		}
 	default:
 		printf("Invalid option: %s\n", argv[1]);
@@ -1658,6 +1879,7 @@ U_BOOT_CMD(
 	"start mc [FW_addr] [DPC_addr] - Start Management Complex\n"
 	"fsl_mc apply DPL [DPL_addr] - Apply DPL file\n"
 	"fsl_mc lazyapply DPL [DPL_addr] - Apply DPL file on exit\n"
+	"fsl_mc apply spb [spb_addr] - Apply SPB Soft Parser Blob\n"
 	"fsl_mc start aiop [FW_addr] - Start AIOP\n"
 );
 
diff --git a/drivers/pci/Kconfig b/drivers/pci/Kconfig
index 13603b9d57d..437cd9a055d 100644
--- a/drivers/pci/Kconfig
+++ b/drivers/pci/Kconfig
@@ -143,6 +143,30 @@ config PCIE_LAYERSCAPE_GEN4
 	  several PCIe controllers. The PCIe controller can work in RC or
 	  EP mode according to RCW[HOST_AGT_PEX] setting.
 
+config FSL_PCIE_COMPAT
+	string "PCIe compatible of Kernel DT"
+	depends on PCIE_LAYERSCAPE || PCIE_LAYERSCAPE_GEN4
+	default "fsl,ls1012a-pcie" if ARCH_LS1012A
+	default "fsl,ls1028a-pcie" if ARCH_LS1028A
+	default "fsl,ls1043a-pcie" if ARCH_LS1043A
+	default "fsl,ls1046a-pcie" if ARCH_LS1046A
+	default "fsl,ls2080a-pcie" if ARCH_LS2080A
+	default "fsl,ls1088a-pcie" if ARCH_LS1088A
+	default "fsl,lx2160a-pcie" if ARCH_LX2160A
+	default "fsl,ls1021a-pcie" if ARCH_LS1021A
+	help
+	  This compatible is used to find pci controller node in Kernel DT
+	  to complete fixup.
+
+config FSL_PCIE_EP_COMPAT
+	string "PCIe EP compatible of Kernel DT"
+	depends on PCIE_LAYERSCAPE || PCIE_LAYERSCAPE_GEN4
+	default "fsl,lx2160a-pcie-ep" if ARCH_LX2160A
+	default "fsl,ls-pcie-ep"
+	help
+	  This compatible is used to find pci controller ep node in Kernel DT
+	  to complete fixup.
+
 config PCIE_INTEL_FPGA
 	bool "Intel FPGA PCIe support"
 	depends on DM_PCI
diff --git a/drivers/pci/Makefile b/drivers/pci/Makefile
index da8b826d69c..8a33eb02665 100644
--- a/drivers/pci/Makefile
+++ b/drivers/pci/Makefile
@@ -36,7 +36,7 @@ obj-$(CONFIG_PCIE_FSL) += pcie_fsl.o pcie_fsl_fixup.o
 obj-$(CONFIG_PCIE_LAYERSCAPE) += pcie_layerscape.o
 obj-$(CONFIG_PCIE_LAYERSCAPE) += pcie_layerscape_fixup.o
 obj-$(CONFIG_PCIE_LAYERSCAPE_GEN4) += pcie_layerscape_gen4.o \
-				pcie_layerscape_gen4_fixup.o
+				pcie_layerscape_gen4_fixup.o pcie_layerscape.o
 obj-$(CONFIG_PCI_XILINX) += pcie_xilinx.o
 obj-$(CONFIG_PCI_PHYTIUM) += pcie_phytium.o
 obj-$(CONFIG_PCIE_INTEL_FPGA) += pcie_intel_fpga.o
diff --git a/drivers/pci/pcie_layerscape.c b/drivers/pci/pcie_layerscape.c
index 5ad7c287735..47394bdba71 100644
--- a/drivers/pci/pcie_layerscape.c
+++ b/drivers/pci/pcie_layerscape.c
@@ -1,6 +1,6 @@
 // SPDX-License-Identifier: GPL-2.0+
 /*
- * Copyright 2017 NXP
+ * Copyright 2017-2019 NXP
  * Copyright 2014-2015 Freescale Semiconductor, Inc.
  * Layerscape PCIe driver
  */
@@ -339,6 +339,7 @@ static void ls_pcie_setup_ctrl(struct ls_pcie *pcie)
 	dbi_writel(pcie, 0, PCIE_DBI_RO_WR_EN);
 
 	ls_pcie_disable_bars(pcie);
+	pcie->stream_id_cur = 0;
 }
 
 static void ls_pcie_ep_setup_atu(struct ls_pcie *pcie)
diff --git a/drivers/pci/pcie_layerscape.h b/drivers/pci/pcie_layerscape.h
index ddfbba65384..95454bc1886 100644
--- a/drivers/pci/pcie_layerscape.h
+++ b/drivers/pci/pcie_layerscape.h
@@ -1,6 +1,6 @@
 /* SPDX-License-Identifier: GPL-2.0+ */
 /*
- * Copyright 2017 NXP
+ * Copyright 2017-2019 NXP
  * Copyright 2014-2015 Freescale Semiconductor, Inc.
  * Layerscape PCIe driver
  */
@@ -144,6 +144,7 @@ struct ls_pcie {
 	bool big_endian;
 	bool enabled;
 	int next_lut_index;
+	int stream_id_cur;
 	int mode;
 };
 
diff --git a/drivers/pci/pcie_layerscape_fixup.c b/drivers/pci/pcie_layerscape_fixup.c
index 089e031724a..27ef20d4c3d 100644
--- a/drivers/pci/pcie_layerscape_fixup.c
+++ b/drivers/pci/pcie_layerscape_fixup.c
@@ -1,6 +1,6 @@
 // SPDX-License-Identifier: GPL-2.0+
 /*
- * Copyright 2017 NXP
+ * Copyright 2017-2019 NXP
  * Copyright 2014-2015 Freescale Semiconductor, Inc.
  * Layerscape PCIe driver
  */
@@ -69,8 +69,8 @@ static void ls_pcie_lut_set_mapping(struct ls_pcie *pcie, int index, u32 devid,
  *      msi-map = <[devid] [phandle-to-msi-ctrl] [stream-id] [count]
  *                 [devid] [phandle-to-msi-ctrl] [stream-id] [count]>;
  */
-static void fdt_pcie_set_msi_map_entry(void *blob, struct ls_pcie *pcie,
-				       u32 devid, u32 streamid)
+static void fdt_pcie_set_msi_map_entry_ls(void *blob, struct ls_pcie *pcie,
+					  u32 devid, u32 streamid)
 {
 	u32 *prop;
 	u32 phandle;
@@ -122,8 +122,8 @@ static void fdt_pcie_set_msi_map_entry(void *blob, struct ls_pcie *pcie,
  *      iommu-map = <[devid] [phandle-to-iommu-ctrl] [stream-id] [count]
  *                 [devid] [phandle-to-iommu-ctrl] [stream-id] [count]>;
  */
-static void fdt_pcie_set_iommu_map_entry(void *blob, struct ls_pcie *pcie,
-				       u32 devid, u32 streamid)
+static void fdt_pcie_set_iommu_map_entry_ls(void *blob, struct ls_pcie *pcie,
+					    u32 devid, u32 streamid)
 {
 	u32 *prop;
 	u32 iommu_map[4];
@@ -175,7 +175,7 @@ static void fdt_pcie_set_iommu_map_entry(void *blob, struct ls_pcie *pcie,
 	}
 }
 
-static void fdt_fixup_pcie(void *blob)
+static void fdt_fixup_pcie_ls(void *blob)
 {
 	struct udevice *dev, *bus;
 	struct ls_pcie *pcie;
@@ -209,11 +209,11 @@ static void fdt_fixup_pcie(void *blob)
 		ls_pcie_lut_set_mapping(pcie, index, bdf >> 8,
 					streamid);
 		/* update msi-map in device tree */
-		fdt_pcie_set_msi_map_entry(blob, pcie, bdf >> 8,
-					   streamid);
+		fdt_pcie_set_msi_map_entry_ls(blob, pcie, bdf >> 8,
+					      streamid);
 		/* update iommu-map in device tree */
-		fdt_pcie_set_iommu_map_entry(blob, pcie, bdf >> 8,
-					     streamid);
+		fdt_pcie_set_iommu_map_entry_ls(blob, pcie, bdf >> 8,
+						streamid);
 	}
 }
 #endif
@@ -253,7 +253,7 @@ static void ft_pcie_ep_fix(void *blob, struct ls_pcie *pcie)
 {
 	int off;
 
-	off = fdt_node_offset_by_compat_reg(blob, "fsl,ls-pcie-ep",
+	off = fdt_node_offset_by_compat_reg(blob, CONFIG_FSL_PCIE_EP_COMPAT,
 					    pcie->dbi_res.start);
 	if (off < 0)
 		return;
@@ -279,7 +279,7 @@ void ft_pci_setup(void *blob, bd_t *bd)
 		ft_pcie_ls_setup(blob, pcie);
 
 #if defined(CONFIG_FSL_LSCH3) || defined(CONFIG_FSL_LSCH2)
-	fdt_fixup_pcie(blob);
+	fdt_fixup_pcie_ls(blob);
 #endif
 }
 
diff --git a/drivers/pci/pcie_layerscape_gen4_fixup.c b/drivers/pci/pcie_layerscape_gen4_fixup.c
index 1c9e5750bdb..da9817159fd 100644
--- a/drivers/pci/pcie_layerscape_gen4_fixup.c
+++ b/drivers/pci/pcie_layerscape_gen4_fixup.c
@@ -37,7 +37,7 @@ static int ls_pcie_g4_next_streamid(struct ls_pcie_g4 *pcie)
 {
 	int stream_id = pcie->stream_id_cur;
 
-	if (stream_id > FSL_PEX_STREAM_ID_NUM)
+	if (stream_id > FSL_PEX_STREAM_ID_END)
 		return -EINVAL;
 
 	pcie->stream_id_cur++;
@@ -64,8 +64,9 @@ static void ls_pcie_g4_lut_set_mapping(struct ls_pcie_g4 *pcie, int index,
  *      msi-map = <[devid] [phandle-to-msi-ctrl] [stream-id] [count]
  *                 [devid] [phandle-to-msi-ctrl] [stream-id] [count]>;
  */
-static void fdt_pcie_set_msi_map_entry(void *blob, struct ls_pcie_g4 *pcie,
-				       u32 devid, u32 streamid)
+static void fdt_pcie_set_msi_map_entry_ls_gen4(void *blob,
+					       struct ls_pcie_g4 *pcie,
+					       u32 devid, u32 streamid)
 {
 	u32 *prop;
 	u32 phandle;
@@ -106,8 +107,9 @@ static void fdt_pcie_set_msi_map_entry(void *blob, struct ls_pcie_g4 *pcie,
  *      iommu-map = <[devid] [phandle-to-iommu-ctrl] [stream-id] [count]
  *                 [devid] [phandle-to-iommu-ctrl] [stream-id] [count]>;
  */
-static void fdt_pcie_set_iommu_map_entry(void *blob, struct ls_pcie_g4 *pcie,
-					 u32 devid, u32 streamid)
+static void fdt_pcie_set_iommu_map_entry_ls_gen4(void *blob,
+						 struct ls_pcie_g4 *pcie,
+						 u32 devid, u32 streamid)
 {
 	u32 *prop;
 	u32 iommu_map[4];
@@ -145,7 +147,7 @@ static void fdt_pcie_set_iommu_map_entry(void *blob, struct ls_pcie_g4 *pcie,
 		fdt_appendprop(blob, nodeoff, "iommu-map", iommu_map, 16);
 }
 
-static void fdt_fixup_pcie(void *blob)
+static void fdt_fixup_pcie_ls_gen4(void *blob)
 {
 	struct udevice *dev, *bus;
 	struct ls_pcie_g4 *pcie;
@@ -176,9 +178,11 @@ static void fdt_fixup_pcie(void *blob)
 		/* map PCI b.d.f to streamID in LUT */
 		ls_pcie_g4_lut_set_mapping(pcie, index, bdf >> 8, streamid);
 		/* update msi-map in device tree */
-		fdt_pcie_set_msi_map_entry(blob, pcie, bdf >> 8, streamid);
+		fdt_pcie_set_msi_map_entry_ls_gen4(blob, pcie, bdf >> 8,
+						   streamid);
 		/* update iommu-map in device tree */
-		fdt_pcie_set_iommu_map_entry(blob, pcie, bdf >> 8, streamid);
+		fdt_pcie_set_iommu_map_entry_ls_gen4(blob, pcie, bdf >> 8,
+						     streamid);
 	}
 }
 #endif
@@ -187,7 +191,7 @@ static void ft_pcie_ep_layerscape_gen4_fix(void *blob, struct ls_pcie_g4 *pcie)
 {
 	int off;
 
-	off = fdt_node_offset_by_compat_reg(blob, "fsl,lx2160a-pcie-ep",
+	off = fdt_node_offset_by_compat_reg(blob, CONFIG_FSL_PCIE_EP_COMPAT,
 					    pcie->ccsr_res.start);
 
 	if (off < 0) {
@@ -238,7 +242,7 @@ void ft_pci_setup(void *blob, bd_t *bd)
 		ft_pcie_layerscape_gen4_setup(blob, pcie);
 
 #if defined(CONFIG_FSL_LSCH3) || defined(CONFIG_FSL_LSCH2)
-	fdt_fixup_pcie(blob);
+	fdt_fixup_pcie_ls_gen4(blob);
 #endif
 }