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authorE Shattow <e@freeshell.de>2025-10-15 03:22:47 -0700
committerLeo Yu-Chi Liang <ycliang@andestech.com>2025-10-28 19:29:43 +0800
commitb1b5079c7e03f2b3483e901fb0e8bb029e0699e7 (patch)
tree64d63c703f6964975fd33490efb6769dbfc79db5 /dts
parente085b7b731644a7062eee83bcc786aa6a2bb3366 (diff)
riscv: dts: starfive: jh7110-common: drop no-mmc property from mmc1
Relax no-mmc restriction on mmc1 for jh7110 boards. The restriction is only needed to block use of commands that would cause a device to malfunction, which by testing and observation [1] is not any problem. 1: https://lore.kernel.org/lkml/NT0PR01MB1312E0D9EE9F158A57B77700E63D2@NT0PR01MB1312.CHNPR01.prod.partner.outlook.cn/ Signed-off-by: E Shattow <e@freeshell.de> Tested-by: Hal Feng <hal.feng@starfivetech.com> Signed-off-by: Conor Dooley <conor.dooley@microchip.com> [ upstream commit: 08128670a931a4117f7b93c703d0186c67c9e1e2 ] (cherry picked from commit cd5d4277d9515be5c10752fd8140f03c3dfec541)
Diffstat (limited to 'dts')
-rw-r--r--dts/upstream/src/riscv/starfive/jh7110-common.dtsi1
1 files changed, 0 insertions, 1 deletions
diff --git a/dts/upstream/src/riscv/starfive/jh7110-common.dtsi b/dts/upstream/src/riscv/starfive/jh7110-common.dtsi
index a315113840e..4fa77ffd54e 100644
--- a/dts/upstream/src/riscv/starfive/jh7110-common.dtsi
+++ b/dts/upstream/src/riscv/starfive/jh7110-common.dtsi
@@ -299,7 +299,6 @@
assigned-clock-rates = <50000000>;
bus-width = <4>;
bootph-pre-ram;
- no-mmc;
cd-gpios = <&sysgpio 41 GPIO_ACTIVE_LOW>;
disable-wp;
cap-sd-highspeed;