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authorTom Rini <trini@konsulko.com>2019-09-02 23:21:44 -0400
committerTom Rini <trini@konsulko.com>2019-09-02 23:21:44 -0400
commit83a5df42614c566c3c642871f683e66a53d228ae (patch)
treeea53c8fd1dd9bf65bc1d29dd9a0957d060dc1917 /include/cache.h
parentd22c8be964a870f59d2fdab6c67cefa0c4799364 (diff)
parent61ce84b2cf1a6672c8e402ce8174554b25629692 (diff)
Merge https://gitlab.denx.de/u-boot/custodians/u-boot-riscv
- Skip unavailable hart in the get_count(). - fu540 set serial env from otp. - fu540 add mmc0 as a boot target device. - Update fix_rela_dyn and add absolute reloc addend. - Andestech PLIC driver will skip unavailable hart. - Support Andestech V5L2 cache driver.
Diffstat (limited to 'include/cache.h')
-rw-r--r--include/cache.h31
1 files changed, 31 insertions, 0 deletions
diff --git a/include/cache.h b/include/cache.h
index c6334ca27fb..32f59fd8f71 100644
--- a/include/cache.h
+++ b/include/cache.h
@@ -22,6 +22,22 @@ struct cache_ops {
* @return 0 if OK, -ve on error
*/
int (*get_info)(struct udevice *dev, struct cache_info *info);
+
+ /**
+ * enable() - Enable cache
+ *
+ * @dev: Device to check (UCLASS_CACHE)
+ * @return 0 if OK, -ve on error
+ */
+ int (*enable)(struct udevice *dev);
+
+ /**
+ * disable() - Flush and disable cache
+ *
+ * @dev: Device to check (UCLASS_CACHE)
+ * @return 0 if OK, -ve on error
+ */
+ int (*disable)(struct udevice *dev);
};
#define cache_get_ops(dev) ((struct cache_ops *)(dev)->driver->ops)
@@ -35,4 +51,19 @@ struct cache_ops {
*/
int cache_get_info(struct udevice *dev, struct cache_info *info);
+/**
+ * cache_enable() - Enable cache
+ *
+ * @dev: Device to check (UCLASS_CACHE)
+ * @return 0 if OK, -ve on error
+ */
+int cache_enable(struct udevice *dev);
+
+/**
+ * cache_disable() - Flush and disable cache
+ *
+ * @dev: Device to check (UCLASS_CACHE)
+ * @return 0 if OK, -ve on error
+ */
+int cache_disable(struct udevice *dev);
#endif