Merge tag 'u-boot-stm32-20250131' of https://source.denx.de/u-boot/custodians/u-boot-stm

STM32 MPU:
- Remove dt-bindings headers available in dts/upstream
- Fixes for stm32prog
- Enable CONFIG_SYS_64BIT_LBA for STM32MP15/13/25 defconfigs
- Add upport of ck_usbo_48m in pre-reloc stage for STM32MP13
- Clean env_get_location() for STM32MP1
- Fix board_get_usable_ram_top() to fix infinite loop in cache
  management for STM32MP2.
- Fix ck_flexgen_08 frequency for STM32MP2

STM32 MCU:
- Tune CYCLIC_MAX_CPU_TIME_US to avoid cyclic warning for STM32F469-Disco
- Tune CYCLIC_MAX_CPU_TIME_US to avoid cyclic warning for STM32F769-Disco

4 files changed, 0 insertions, 733 deletions

diff --git a/include/dt-bindings/clock/stm32fx-clock.h b/include/dt-bindings/clock/stm32fx-clock.h
deleted file mode 100644
index e5dad050d51..00000000000
--- a/include/dt-bindings/clock/stm32fx-clock.h
+++ /dev/null
@@ -1,63 +0,0 @@
-/* SPDX-License-Identifier: GPL-2.0-only */
-/*
- * stm32fx-clock.h
- *
- * Copyright (C) 2016 STMicroelectronics
- * Author: Gabriel Fernandez for STMicroelectronics.
- */
-
-/*
- * List of clocks which are not derived from system clock (SYSCLOCK)
- *
- * The index of these clocks is the secondary index of DT bindings
- * (see Documentation/devicetree/bindings/clock/st,stm32-rcc.txt)
- *
- * e.g:
-	<assigned-clocks = <&rcc 1 CLK_LSE>;
-*/
-
-#ifndef _DT_BINDINGS_CLK_STMFX_H
-#define _DT_BINDINGS_CLK_STMFX_H
-
-#define SYSTICK			0
-#define FCLK			1
-#define CLK_LSI			2
-#define CLK_LSE			3
-#define CLK_HSE_RTC		4
-#define CLK_RTC			5
-#define PLL_VCO_I2S		6
-#define PLL_VCO_SAI		7
-#define CLK_LCD			8
-#define CLK_I2S			9
-#define CLK_SAI1		10
-#define CLK_SAI2		11
-#define CLK_I2SQ_PDIV		12
-#define CLK_SAIQ_PDIV		13
-#define CLK_HSI			14
-#define CLK_SYSCLK		15
-#define CLK_F469_DSI		16
-
-#define END_PRIMARY_CLK		17
-
-#define CLK_HDMI_CEC		16
-#define CLK_SPDIF		17
-#define CLK_USART1		18
-#define CLK_USART2		19
-#define CLK_USART3		20
-#define CLK_UART4		21
-#define CLK_UART5		22
-#define CLK_USART6		23
-#define CLK_UART7		24
-#define CLK_UART8		25
-#define CLK_I2C1		26
-#define CLK_I2C2		27
-#define CLK_I2C3		28
-#define CLK_I2C4		29
-#define CLK_LPTIMER		30
-#define CLK_PLL_SRC		31
-#define CLK_DFSDM1		32
-#define CLK_ADFSDM1		33
-#define CLK_F769_DSI		34
-#define END_PRIMARY_CLK_F7	35
-
-#endif
diff --git a/include/dt-bindings/clock/stm32h7-clks.h b/include/dt-bindings/clock/stm32h7-clks.h
deleted file mode 100644
index 4d87e7ebc39..00000000000
--- a/include/dt-bindings/clock/stm32h7-clks.h
+++ /dev/null
@@ -1,167 +0,0 @@
-/* SYS, CORE AND BUS CLOCKS */
-#define SYS_D1CPRE 0
-#define HCLK 1
-#define PCLK1 2
-#define PCLK2 3
-#define PCLK3 4
-#define PCLK4 5
-#define HSI_DIV 6
-#define HSE_1M 7
-#define I2S_CKIN 8
-#define CK_DSI_PHY 9
-#define HSE_CK 10
-#define LSE_CK 11
-#define CSI_KER_DIV122 12
-#define RTC_CK 13
-#define CPU_SYSTICK 14
-
-/* OSCILLATOR BANK */
-#define OSC_BANK 18
-#define HSI_CK 18
-#define HSI_KER_CK 19
-#define CSI_CK 20
-#define CSI_KER_CK 21
-#define RC48_CK 22
-#define LSI_CK 23
-
-/* MCLOCK BANK */
-#define MCLK_BANK 28
-#define PER_CK 28
-#define PLLSRC 29
-#define SYS_CK 30
-#define TRACEIN_CK 31
-
-/* ODF BANK */
-#define ODF_BANK 32
-#define PLL1_P 32
-#define PLL1_Q 33
-#define PLL1_R 34
-#define PLL2_P 35
-#define PLL2_Q 36
-#define PLL2_R 37
-#define PLL3_P 38
-#define PLL3_Q 39
-#define PLL3_R 40
-
-/* MCO BANK */
-#define MCO_BANK 41
-#define MCO1 41
-#define MCO2 42
-
-/* PERIF BANK */
-#define PERIF_BANK 50
-#define D1SRAM1_CK 50
-#define ITCM_CK 51
-#define DTCM2_CK 52
-#define DTCM1_CK 53
-#define FLITF_CK 54
-#define JPGDEC_CK 55
-#define DMA2D_CK 56
-#define MDMA_CK 57
-#define USB2ULPI_CK 58
-#define USB1ULPI_CK 59
-#define ETH1RX_CK 60
-#define ETH1TX_CK 61
-#define ETH1MAC_CK 62
-#define ART_CK 63
-#define DMA2_CK 64
-#define DMA1_CK 65
-#define D2SRAM3_CK 66
-#define D2SRAM2_CK 67
-#define D2SRAM1_CK 68
-#define HASH_CK 69
-#define CRYPT_CK 70
-#define CAMITF_CK 71
-#define BKPRAM_CK 72
-#define HSEM_CK 73
-#define BDMA_CK 74
-#define CRC_CK 75
-#define GPIOK_CK 76
-#define GPIOJ_CK 77
-#define GPIOI_CK 78
-#define GPIOH_CK 79
-#define GPIOG_CK 80
-#define GPIOF_CK 81
-#define GPIOE_CK 82
-#define GPIOD_CK 83
-#define GPIOC_CK 84
-#define GPIOB_CK 85
-#define GPIOA_CK 86
-#define WWDG1_CK 87
-#define DAC12_CK 88
-#define WWDG2_CK 89
-#define TIM14_CK 90
-#define TIM13_CK 91
-#define TIM12_CK 92
-#define TIM7_CK 93
-#define TIM6_CK 94
-#define TIM5_CK 95
-#define TIM4_CK 96
-#define TIM3_CK 97
-#define TIM2_CK 98
-#define MDIOS_CK 99
-#define OPAMP_CK 100
-#define CRS_CK 101
-#define TIM17_CK 102
-#define TIM16_CK 103
-#define TIM15_CK 104
-#define TIM8_CK 105
-#define TIM1_CK 106
-#define TMPSENS_CK 107
-#define RTCAPB_CK 108
-#define VREF_CK 109
-#define COMP12_CK 110
-#define SYSCFG_CK 111
-/* must be equal to last peripheral clock index */
-#define LAST_PERIF_BANK SYSCFG_CK
-
-/* KERNEL BANK */
-#define KERN_BANK 120
-#define SDMMC1_CK 120
-#define QUADSPI_CK 121
-#define FMC_CK 122
-#define USB2OTG_CK 123
-#define USB1OTG_CK 124
-#define ADC12_CK 125
-#define SDMMC2_CK 126
-#define RNG_CK 127
-#define ADC3_CK 128
-#define DSI_CK 129
-#define LTDC_CK 130
-#define USART8_CK 131
-#define USART7_CK 132
-#define HDMICEC_CK 133
-#define I2C3_CK 134
-#define I2C2_CK 135
-#define I2C1_CK 136
-#define UART5_CK 137
-#define UART4_CK 138
-#define USART3_CK 139
-#define USART2_CK 140
-#define SPDIFRX_CK 141
-#define SPI3_CK 142
-#define SPI2_CK 143
-#define LPTIM1_CK 144
-#define FDCAN_CK 145
-#define SWP_CK 146
-#define HRTIM_CK 147
-#define DFSDM1_CK 148
-#define SAI3_CK 149
-#define SAI2_CK 150
-#define SAI1_CK 151
-#define SPI5_CK 152
-#define SPI4_CK 153
-#define SPI1_CK 154
-#define USART6_CK 155
-#define USART1_CK 156
-#define SAI4B_CK 157
-#define SAI4A_CK 158
-#define LPTIM5_CK 159
-#define LPTIM4_CK 160
-#define LPTIM3_CK 161
-#define LPTIM2_CK 162
-#define I2C4_CK 163
-#define SPI6_CK 164
-#define LPUART1_CK 165
-
-#define STM32H7_MAX_CLKS 166
diff --git a/include/dt-bindings/clock/stm32mp1-clks.h b/include/dt-bindings/clock/stm32mp1-clks.h
deleted file mode 100644
index 0a5324bcdbd..00000000000
--- a/include/dt-bindings/clock/stm32mp1-clks.h
+++ /dev/null
@@ -1,274 +0,0 @@
-/* SPDX-License-Identifier: GPL-2.0 OR BSD-3-Clause */
-/*
- * Copyright (C) STMicroelectronics 2018 - All Rights Reserved
- * Author: Gabriel Fernandez <gabriel.fernandez@st.com> for STMicroelectronics.
- */
-
-#ifndef _DT_BINDINGS_STM32MP1_CLKS_H_
-#define _DT_BINDINGS_STM32MP1_CLKS_H_
-
-/* OSCILLATOR clocks */
-#define CK_HSE		0
-#define CK_CSI		1
-#define CK_LSI		2
-#define CK_LSE		3
-#define CK_HSI		4
-#define CK_HSE_DIV2	5
-
-/* Bus clocks */
-#define TIM2		6
-#define TIM3		7
-#define TIM4		8
-#define TIM5		9
-#define TIM6		10
-#define TIM7		11
-#define TIM12		12
-#define TIM13		13
-#define TIM14		14
-#define LPTIM1		15
-#define SPI2		16
-#define SPI3		17
-#define USART2		18
-#define USART3		19
-#define UART4		20
-#define UART5		21
-#define UART7		22
-#define UART8		23
-#define I2C1		24
-#define I2C2		25
-#define I2C3		26
-#define I2C5		27
-#define SPDIF		28
-#define CEC		29
-#define DAC12		30
-#define MDIO		31
-#define TIM1		32
-#define TIM8		33
-#define TIM15		34
-#define TIM16		35
-#define TIM17		36
-#define SPI1		37
-#define SPI4		38
-#define SPI5		39
-#define USART6		40
-#define SAI1		41
-#define SAI2		42
-#define SAI3		43
-#define DFSDM		44
-#define FDCAN		45
-#define LPTIM2		46
-#define LPTIM3		47
-#define LPTIM4		48
-#define LPTIM5		49
-#define SAI4		50
-#define SYSCFG		51
-#define VREF		52
-#define TMPSENS		53
-#define PMBCTRL		54
-#define HDP		55
-#define LTDC		56
-#define DSI		57
-#define IWDG2		58
-#define USBPHY		59
-#define STGENRO		60
-#define SPI6		61
-#define I2C4		62
-#define I2C6		63
-#define USART1		64
-#define RTCAPB		65
-#define TZC1		66
-#define TZPC		67
-#define IWDG1		68
-#define BSEC		69
-#define STGEN		70
-#define DMA1		71
-#define DMA2		72
-#define DMAMUX		73
-#define ADC12		74
-#define USBO		75
-#define SDMMC3		76
-#define DCMI		77
-#define CRYP2		78
-#define HASH2		79
-#define RNG2		80
-#define CRC2		81
-#define HSEM		82
-#define IPCC		83
-#define GPIOA		84
-#define GPIOB		85
-#define GPIOC		86
-#define GPIOD		87
-#define GPIOE		88
-#define GPIOF		89
-#define GPIOG		90
-#define GPIOH		91
-#define GPIOI		92
-#define GPIOJ		93
-#define GPIOK		94
-#define GPIOZ		95
-#define CRYP1		96
-#define HASH1		97
-#define RNG1		98
-#define BKPSRAM		99
-#define MDMA		100
-#define GPU		101
-#define ETHCK		102
-#define ETHTX		103
-#define ETHRX		104
-#define ETHMAC		105
-#define FMC		106
-#define QSPI		107
-#define SDMMC1		108
-#define SDMMC2		109
-#define CRC1		110
-#define USBH		111
-#define ETHSTP		112
-#define TZC2		113
-
-/* Kernel clocks */
-#define SDMMC1_K	118
-#define SDMMC2_K	119
-#define SDMMC3_K	120
-#define FMC_K		121
-#define QSPI_K		122
-#define ETHCK_K		123
-#define RNG1_K		124
-#define RNG2_K		125
-#define GPU_K		126
-#define USBPHY_K	127
-#define STGEN_K		128
-#define SPDIF_K		129
-#define SPI1_K		130
-#define SPI2_K		131
-#define SPI3_K		132
-#define SPI4_K		133
-#define SPI5_K		134
-#define SPI6_K		135
-#define CEC_K		136
-#define I2C1_K		137
-#define I2C2_K		138
-#define I2C3_K		139
-#define I2C4_K		140
-#define I2C5_K		141
-#define I2C6_K		142
-#define LPTIM1_K	143
-#define LPTIM2_K	144
-#define LPTIM3_K	145
-#define LPTIM4_K	146
-#define LPTIM5_K	147
-#define USART1_K	148
-#define USART2_K	149
-#define USART3_K	150
-#define UART4_K		151
-#define UART5_K		152
-#define USART6_K	153
-#define UART7_K		154
-#define UART8_K		155
-#define DFSDM_K		156
-#define FDCAN_K		157
-#define SAI1_K		158
-#define SAI2_K		159
-#define SAI3_K		160
-#define SAI4_K		161
-#define ADC12_K		162
-#define DSI_K		163
-#define DSI_PX		164
-#define ADFSDM_K	165
-#define USBO_K		166
-#define LTDC_PX		167
-#define DAC12_K		168
-#define ETHPTP_K	169
-
-/* PLL */
-#define PLL1		176
-#define PLL2		177
-#define PLL3		178
-#define PLL4		179
-
-/* ODF */
-#define PLL1_P		180
-#define PLL1_Q		181
-#define PLL1_R		182
-#define PLL2_P		183
-#define PLL2_Q		184
-#define PLL2_R		185
-#define PLL3_P		186
-#define PLL3_Q		187
-#define PLL3_R		188
-#define PLL4_P		189
-#define PLL4_Q		190
-#define PLL4_R		191
-
-/* AUX */
-#define RTC		192
-
-/* MCLK */
-#define CK_PER		193
-#define CK_MPU		194
-#define CK_AXI		195
-#define CK_MCU		196
-
-/* Time base */
-#define TIM2_K		197
-#define TIM3_K		198
-#define TIM4_K		199
-#define TIM5_K		200
-#define TIM6_K		201
-#define TIM7_K		202
-#define TIM12_K		203
-#define TIM13_K		204
-#define TIM14_K		205
-#define TIM1_K		206
-#define TIM8_K		207
-#define TIM15_K		208
-#define TIM16_K		209
-#define TIM17_K		210
-
-/* MCO clocks */
-#define CK_MCO1		211
-#define CK_MCO2		212
-
-/* TRACE & DEBUG clocks */
-#define CK_DBG		214
-#define CK_TRACE	215
-
-/* DDR */
-#define DDRC1		220
-#define DDRC1LP		221
-#define DDRC2		222
-#define DDRC2LP		223
-#define DDRPHYC		224
-#define DDRPHYCLP	225
-#define DDRCAPB		226
-#define DDRCAPBLP	227
-#define AXIDCG		228
-#define DDRPHYCAPB	229
-#define DDRPHYCAPBLP	230
-#define DDRPERFM	231
-
-#define STM32MP1_LAST_CLK 232
-
-/* SCMI clock identifiers */
-#define CK_SCMI_HSE		0
-#define CK_SCMI_HSI		1
-#define CK_SCMI_CSI		2
-#define CK_SCMI_LSE		3
-#define CK_SCMI_LSI		4
-#define CK_SCMI_PLL2_Q		5
-#define CK_SCMI_PLL2_R		6
-#define CK_SCMI_MPU		7
-#define CK_SCMI_AXI		8
-#define CK_SCMI_BSEC		9
-#define CK_SCMI_CRYP1		10
-#define CK_SCMI_GPIOZ		11
-#define CK_SCMI_HASH1		12
-#define CK_SCMI_I2C4		13
-#define CK_SCMI_I2C6		14
-#define CK_SCMI_IWDG1		15
-#define CK_SCMI_RNG1		16
-#define CK_SCMI_RTC		17
-#define CK_SCMI_RTCAPB		18
-#define CK_SCMI_SPI6		19
-#define CK_SCMI_USART1		20
-
-#endif /* _DT_BINDINGS_STM32MP1_CLKS_H_ */
diff --git a/include/dt-bindings/clock/stm32mp13-clks.h b/include/dt-bindings/clock/stm32mp13-clks.h
deleted file mode 100644
index 0bd7b54c65f..00000000000
--- a/include/dt-bindings/clock/stm32mp13-clks.h
+++ /dev/null
@@ -1,229 +0,0 @@
-/* SPDX-License-Identifier: GPL-2.0-only OR BSD-3-Clause */
-/*
- * Copyright (C) STMicroelectronics 2020 - All Rights Reserved
- * Author: Gabriel Fernandez <gabriel.fernandez@foss.st.com> for STMicroelectronics.
- */
-
-#ifndef _DT_BINDINGS_STM32MP13_CLKS_H_
-#define _DT_BINDINGS_STM32MP13_CLKS_H_
-
-/* OSCILLATOR clocks */
-#define CK_HSE		0
-#define CK_CSI		1
-#define CK_LSI		2
-#define CK_LSE		3
-#define CK_HSI		4
-#define CK_HSE_DIV2	5
-
-/* PLL */
-#define PLL1		6
-#define PLL2		7
-#define PLL3		8
-#define PLL4		9
-
-/* ODF */
-#define PLL1_P		10
-#define PLL1_Q		11
-#define PLL1_R		12
-#define PLL2_P		13
-#define PLL2_Q		14
-#define PLL2_R		15
-#define PLL3_P		16
-#define PLL3_Q		17
-#define PLL3_R		18
-#define PLL4_P		19
-#define PLL4_Q		20
-#define PLL4_R		21
-
-#define PCLK1		22
-#define PCLK2		23
-#define PCLK3		24
-#define PCLK4		25
-#define PCLK5		26
-#define PCLK6		27
-
-/* SYSTEM CLOCK */
-#define CK_PER		28
-#define CK_MPU		29
-#define CK_AXI		30
-#define CK_MLAHB	31
-
-/* BASE TIMER */
-#define CK_TIMG1	32
-#define CK_TIMG2	33
-#define CK_TIMG3	34
-
-/* AUX */
-#define RTC		35
-
-/* TRACE & DEBUG clocks */
-#define CK_DBG		36
-#define CK_TRACE	37
-
-/* MCO clocks */
-#define CK_MCO1		38
-#define CK_MCO2		39
-
-/* IP clocks */
-#define SYSCFG		40
-#define VREF		41
-#define DTS		42
-#define PMBCTRL		43
-#define HDP		44
-#define IWDG2		45
-#define STGENRO		46
-#define USART1		47
-#define RTCAPB		48
-#define TZC		49
-#define TZPC		50
-#define IWDG1		51
-#define BSEC		52
-#define DMA1		53
-#define DMA2		54
-#define DMAMUX1		55
-#define DMAMUX2		56
-#define GPIOA		57
-#define GPIOB		58
-#define GPIOC		59
-#define GPIOD		60
-#define GPIOE		61
-#define GPIOF		62
-#define GPIOG		63
-#define GPIOH		64
-#define GPIOI		65
-#define CRYP1		66
-#define HASH1		67
-#define BKPSRAM		68
-#define MDMA		69
-#define CRC1		70
-#define USBH		71
-#define DMA3		72
-#define TSC		73
-#define PKA		74
-#define AXIMC		75
-#define MCE		76
-#define ETH1TX		77
-#define ETH2TX		78
-#define ETH1RX		79
-#define ETH2RX		80
-#define ETH1MAC		81
-#define ETH2MAC		82
-#define ETH1STP		83
-#define ETH2STP		84
-
-/* IP clocks with parents */
-#define SDMMC1_K	85
-#define SDMMC2_K	86
-#define ADC1_K		87
-#define ADC2_K		88
-#define FMC_K		89
-#define QSPI_K		90
-#define RNG1_K		91
-#define USBPHY_K	92
-#define STGEN_K		93
-#define SPDIF_K		94
-#define SPI1_K		95
-#define SPI2_K		96
-#define SPI3_K		97
-#define SPI4_K		98
-#define SPI5_K		99
-#define I2C1_K		100
-#define I2C2_K		101
-#define I2C3_K		102
-#define I2C4_K		103
-#define I2C5_K		104
-#define TIM2_K		105
-#define TIM3_K		106
-#define TIM4_K		107
-#define TIM5_K		108
-#define TIM6_K		109
-#define TIM7_K		110
-#define TIM12_K		111
-#define TIM13_K		112
-#define TIM14_K		113
-#define TIM1_K		114
-#define TIM8_K		115
-#define TIM15_K		116
-#define TIM16_K		117
-#define TIM17_K		118
-#define LPTIM1_K	119
-#define LPTIM2_K	120
-#define LPTIM3_K	121
-#define LPTIM4_K	122
-#define LPTIM5_K	123
-#define USART1_K	124
-#define USART2_K	125
-#define USART3_K	126
-#define UART4_K		127
-#define UART5_K		128
-#define USART6_K	129
-#define UART7_K		130
-#define UART8_K		131
-#define DFSDM_K		132
-#define FDCAN_K		133
-#define SAI1_K		134
-#define SAI2_K		135
-#define ADFSDM_K	136
-#define USBO_K		137
-#define LTDC_PX		138
-#define ETH1CK_K	139
-#define ETH1PTP_K	140
-#define ETH2CK_K	141
-#define ETH2PTP_K	142
-#define DCMIPP_K	143
-#define SAES_K		144
-#define DTS_K		145
-
-/* DDR */
-#define DDRC1		146
-#define DDRC1LP		147
-#define DDRC2		148
-#define DDRC2LP		149
-#define DDRPHYC		150
-#define DDRPHYCLP	151
-#define DDRCAPB		152
-#define DDRCAPBLP	153
-#define AXIDCG		154
-#define DDRPHYCAPB	155
-#define DDRPHYCAPBLP	156
-#define DDRPERFM	157
-
-#define ADC1		158
-#define ADC2		159
-#define SAI1		160
-#define SAI2		161
-
-#define STM32MP1_LAST_CLK 162
-
-/* SCMI clock identifiers */
-#define CK_SCMI_HSE		0
-#define CK_SCMI_HSI		1
-#define CK_SCMI_CSI		2
-#define CK_SCMI_LSE		3
-#define CK_SCMI_LSI		4
-#define CK_SCMI_HSE_DIV2	5
-#define CK_SCMI_PLL2_Q		6
-#define CK_SCMI_PLL2_R		7
-#define CK_SCMI_PLL3_P		8
-#define CK_SCMI_PLL3_Q		9
-#define CK_SCMI_PLL3_R		10
-#define CK_SCMI_PLL4_P		11
-#define CK_SCMI_PLL4_Q		12
-#define CK_SCMI_PLL4_R		13
-#define CK_SCMI_MPU		14
-#define CK_SCMI_AXI		15
-#define CK_SCMI_MLAHB		16
-#define CK_SCMI_CKPER		17
-#define CK_SCMI_PCLK1		18
-#define CK_SCMI_PCLK2		19
-#define CK_SCMI_PCLK3		20
-#define CK_SCMI_PCLK4		21
-#define CK_SCMI_PCLK5		22
-#define CK_SCMI_PCLK6		23
-#define CK_SCMI_CKTIMG1		24
-#define CK_SCMI_CKTIMG2		25
-#define CK_SCMI_CKTIMG3		26
-#define CK_SCMI_RTC		27
-#define CK_SCMI_RTCAPB		28
-
-#endif /* _DT_BINDINGS_STM32MP13_CLKS_H_ */