diff options
| author | Tom Rini <trini@konsulko.com> | 2024-11-20 11:55:24 -0600 |
|---|---|---|
| committer | Tom Rini <trini@konsulko.com> | 2024-11-20 11:55:24 -0600 |
| commit | 35d5ad6cf25f8c0ac39f90a8a51eb77e6e002d0d (patch) | |
| tree | 7eab0cd42a1a871e0632882f787fc9458da3906c /include/dt-bindings/phy/phy-qcom-qusb2.h | |
| parent | 7fe55182d9263a62e18b450c97bdf0b8031e5667 (diff) | |
| parent | 7aad7833323aa9260935d172744a50f56356d52a (diff) | |
Merge branch 'qcom-main' of https://source.denx.de/u-boot/custodians/u-boot-snapdragon
CI: https://source.denx.de/u-boot/custodians/u-boot-snapdragon/-/pipelines/23474
- UFS support is enabled for SC7280 and SM8150 platforms.
- Qualcomm dt-bindings headers are all dropped in favour of
dts/upstream.
- The SMMU driver now correctly handles stream ID 0 and is disabled in
EL2.
- Initial support for capsule updates (using the new dynamic UUIDs) is
added for the RB3 Gen 2 board alongside a new SCSI backend for DFU.
- CONFIG_PINCONF is enabled in qcom_defconfig.
- The vqmmc supply is now enabled for sdcard support on boards that need
it.
- A quirk is added for reading GPIOs on the PM8550 PMIC
Diffstat (limited to 'include/dt-bindings/phy/phy-qcom-qusb2.h')
| -rw-r--r-- | include/dt-bindings/phy/phy-qcom-qusb2.h | 37 |
1 files changed, 0 insertions, 37 deletions
diff --git a/include/dt-bindings/phy/phy-qcom-qusb2.h b/include/dt-bindings/phy/phy-qcom-qusb2.h deleted file mode 100644 index 5c5e4d800ca..00000000000 --- a/include/dt-bindings/phy/phy-qcom-qusb2.h +++ /dev/null @@ -1,37 +0,0 @@ -/* SPDX-License-Identifier: GPL-2.0 */ -/* - * Copyright (c) 2018, The Linux Foundation. All rights reserved. - */ - -#ifndef _DT_BINDINGS_QCOM_PHY_QUSB2_H_ -#define _DT_BINDINGS_QCOM_PHY_QUSB2_H_ - -/* PHY HSTX TRIM bit values (24mA to 15mA) */ -#define QUSB2_V2_HSTX_TRIM_24_0_MA 0x0 -#define QUSB2_V2_HSTX_TRIM_23_4_MA 0x1 -#define QUSB2_V2_HSTX_TRIM_22_8_MA 0x2 -#define QUSB2_V2_HSTX_TRIM_22_2_MA 0x3 -#define QUSB2_V2_HSTX_TRIM_21_6_MA 0x4 -#define QUSB2_V2_HSTX_TRIM_21_0_MA 0x5 -#define QUSB2_V2_HSTX_TRIM_20_4_MA 0x6 -#define QUSB2_V2_HSTX_TRIM_19_8_MA 0x7 -#define QUSB2_V2_HSTX_TRIM_19_2_MA 0x8 -#define QUSB2_V2_HSTX_TRIM_18_6_MA 0x9 -#define QUSB2_V2_HSTX_TRIM_18_0_MA 0xa -#define QUSB2_V2_HSTX_TRIM_17_4_MA 0xb -#define QUSB2_V2_HSTX_TRIM_16_8_MA 0xc -#define QUSB2_V2_HSTX_TRIM_16_2_MA 0xd -#define QUSB2_V2_HSTX_TRIM_15_6_MA 0xe -#define QUSB2_V2_HSTX_TRIM_15_0_MA 0xf - -/* PHY PREEMPHASIS bit values */ -#define QUSB2_V2_PREEMPHASIS_NONE 0 -#define QUSB2_V2_PREEMPHASIS_5_PERCENT 1 -#define QUSB2_V2_PREEMPHASIS_10_PERCENT 2 -#define QUSB2_V2_PREEMPHASIS_15_PERCENT 3 - -/* PHY PREEMPHASIS-WIDTH bit values */ -#define QUSB2_V2_PREEMPHASIS_WIDTH_FULL_BIT 0 -#define QUSB2_V2_PREEMPHASIS_WIDTH_HALF_BIT 1 - -#endif |