diff options
| author | Tom Rini <trini@ti.com> | 2014-09-09 20:01:59 -0400 |
|---|---|---|
| committer | Tom Rini <trini@ti.com> | 2014-09-09 20:01:59 -0400 |
| commit | 8c9c74e4c69b43cd50a1f04b34cfc141ed21654c (patch) | |
| tree | 180763abe35a9465d2dc4d46202ac604e7b7baac /include/fsl_ddr_sdram.h | |
| parent | 0b703dbcee7103f07804d0a4328d1593355c4324 (diff) | |
| parent | b4ecc8c6f8c85d25f72933af23531728069a5b0f (diff) | |
Merge branch 'master' of git://git.denx.de/u-boot-fsl-qoriq
Diffstat (limited to 'include/fsl_ddr_sdram.h')
| -rw-r--r-- | include/fsl_ddr_sdram.h | 2 |
1 files changed, 2 insertions, 0 deletions
diff --git a/include/fsl_ddr_sdram.h b/include/fsl_ddr_sdram.h index e8a2db91cb7..987119b014e 100644 --- a/include/fsl_ddr_sdram.h +++ b/include/fsl_ddr_sdram.h @@ -281,6 +281,7 @@ typedef struct memctl_options_partial_s { #define DDR_DATA_BUS_WIDTH_64 0 #define DDR_DATA_BUS_WIDTH_32 1 #define DDR_DATA_BUS_WIDTH_16 2 +#define DDR_CSWL_CS0 0x04000001 /* * Generalized parameters for memory controller configuration, * might be a little specific to the FSL memory controller @@ -340,6 +341,7 @@ typedef struct memctl_options_s { unsigned int cpo_override; unsigned int write_data_delay; /* DQS adjust */ + unsigned int cswl_override; unsigned int wrlvl_override; unsigned int wrlvl_sample; /* Write leveling */ unsigned int wrlvl_start; |