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authorDinesh Maniyam <dinesh.maniyam@intel.com>2025-02-27 00:18:28 +0800
committerMichael Trimarchi <michael@amarulasolutions.com>2025-03-15 10:35:01 +0100
commit597fe4098dabdd05c44ec1d68e990a61798cad38 (patch)
tree925315d042fd73acc57229309bb7d4d65bcad28a /include/linux/mtd/rawnand.h
parent7ed5c15a83ff49e6b2f15d82ef3dd139eba84718 (diff)
drivers: mtd: nand: base: Add support for Hardware ECC for check bad block
Leverage linux code to support hardware ECC interface to verify nand bad block. Signed-off-by: Dinesh Maniyam <dinesh.maniyam@intel.com>
Diffstat (limited to 'include/linux/mtd/rawnand.h')
-rw-r--r--include/linux/mtd/rawnand.h11
1 files changed, 11 insertions, 0 deletions
diff --git a/include/linux/mtd/rawnand.h b/include/linux/mtd/rawnand.h
index 3bb0a3679f9..3e80b134063 100644
--- a/include/linux/mtd/rawnand.h
+++ b/include/linux/mtd/rawnand.h
@@ -132,6 +132,17 @@ void nand_wait_ready(struct mtd_info *mtd);
#define NAND_DATA_IFACE_CHECK_ONLY -1
/*
+ * There are different places where the manufacturer stores the factory bad
+ * block markers.
+ *
+ * Position within the block: Each of these pages needs to be checked for a
+ * bad block marking pattern.
+ */
+#define NAND_BBM_FIRSTPAGE BIT(24)
+#define NAND_BBM_SECONDPAGE BIT(25)
+#define NAND_BBM_LASTPAGE BIT(26)
+
+/*
* Constants for ECC_MODES
*/
typedef enum {