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authorTom Rini <trini@konsulko.com>2019-02-02 10:11:20 -0500
committerTom Rini <trini@konsulko.com>2019-02-02 10:11:20 -0500
commite5fd39c886485e3dec77f4438a6e364c2987cf5f (patch)
tree635a4987f759207efd147ff628d683f7389ab1a1 /include/spl_gpio.h
parent544d5e98f3657e4ac1966be8971586aa42dad8c4 (diff)
parent73ced87e9af70cba35c4374055dca56e5f9c460d (diff)
Merge tag 'for-master-20190201' of git://git.denx.de/u-boot-rockchip
u-boot-rockchip changes for 2019.04-rc1: * support for Chromebook Bob * full pinctrl driver using DTS properties * documentation improvements * I2S support for some Rockchip SoCs
Diffstat (limited to 'include/spl_gpio.h')
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1 files changed, 62 insertions, 0 deletions
diff --git a/include/spl_gpio.h b/include/spl_gpio.h
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+/* SPDX-License-Identifier: GPL-2.0+ */
+/*
+ * Simple GPIO access from SPL. This only supports a single GPIO space,
+ * typically the SoC GPIO banks.
+ *
+ * Copyright 2018 Google LLC
+ */
+
+#ifndef __SPL_GPIO_H
+#define __SPL_GPIO_H
+
+#include <asm/gpio.h>
+
+/*
+ * The functions listed here should be implemented in the SoC GPIO driver.
+ * They correspond to the normal GPIO API (asm-generic/gpio.h). The GPIO
+ * number is encoded in an unsigned int by an SoC-specific means. Pull
+ * values are also SoC-specific.
+ *
+ * This API should only be used in TPL/SPL where GPIO access is needed but
+ * driver model is not available (yet) or adds too much overhead.
+ *
+ * The caller must supply the GPIO register base since this information is
+ * often specific to a particular SoC generation. This allows the GPIO
+ * code to be fairly generic.
+ *
+ * Only a single implementation of each of these functions can be provided.
+ *
+ * The 'gpio' value can include both a bank and a GPIO number, if desired. The
+ * encoding is SoC-specific.
+ */
+
+/**
+ * spl_gpio_set_pull() - Set the pull up/down state of a GPIO
+ *
+ * @regs: Pointer to GPIO registers
+ * @gpio: GPIO to adjust (SoC-specific)
+ * @pull: Pull value (SoC-specific)
+ * @return return 0 if OK, -ve on error
+ */
+int spl_gpio_set_pull(void *regs, uint gpio, int pull);
+
+/**
+ * spl_gpio_output() - Set a GPIO as an output
+ *
+ * @regs: Pointer to GPIO registers
+ * @gpio: GPIO to adjust (SoC-specific)
+ * @value: 0 to set the output low, 1 to set it high
+ * @return return 0 if OK, -ve on error
+ */
+int spl_gpio_output(void *regs, uint gpio, int value);
+
+/**
+ * spl_gpio_input() - Set a GPIO as an input
+ *
+ * @regs: Pointer to GPIO registers
+ * @gpio: GPIO to adjust (SoC-specific)
+ * @return return 0 if OK, -ve on error
+ */
+int spl_gpio_input(void *regs, uint gpio);
+
+#endif /* __SPL_GPIO_H */