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authorShengyu Qu <wiagn233@outlook.com>2023-08-25 00:25:20 +0800
committerLeo Yu-Chi Liang <ycliang@andestech.com>2023-09-05 10:53:46 +0800
commit64339bc1f2ae2c0bfcc058a5001284a9a222f15b (patch)
tree3c02771ec8c30b559261d900b070d42f6e8fefa2 /lib/display_options.c
parentc9db9a2ef5558dc1e83965e452030dbf5ce93de2 (diff)
riscv: cpu: jh7110: Imply SPL_SYS_MALLOC_CLEAR_ON_INIT
Starfive JH7110 needs to clear L2 LIM to zero before use or ECC error would be triggered. Currently, we use DDR ram for SPL malloc arena on Visionfive 2 board in defconfig, but it's also possible to use L2 LIM as SPL malloc arena. To avoid triggering ECC error in this scenario, we imply SPL_SYS_MALLOC_CLEAR_ON_INIT as default. Signed-off-by: Bo Gan <ganboing@gmail.com> Signed-off-by: Shengyu Qu <wiagn233@outlook.com> Reviewed-by: Leo Yu-Chi Liang <ycliang@andestech.com>
Diffstat (limited to 'lib/display_options.c')
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