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author | Jonas Karlman <jonas@kwiboo.se> | 2025-01-30 22:07:13 +0000 |
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committer | Kever Yang <kever.yang@rock-chips.com> | 2025-02-19 23:11:06 +0800 |
commit | d5fc369a598d0e84dbcfe08e80d676cdd0a54a78 (patch) | |
tree | d482614540de4b7d23a4b58919cedceee2db6ed0 /lib/mbedtls/pkcs7_parser.c | |
parent | 356236126da7877ab115c65f8cb21215443beb2f (diff) |
rockchip: sdram: Ensure ram_base is correct in SPL
Most Rockchip SoCs use 0x0 as DRAM base address, however some SoCs use
0x60000000 and RK3576 use 0x40000000 as DRAM base address.
CFG_SYS_SDRAM_BASE is defined with correct address for each SoC and
U-Boot proper use this to set correct gd->ram_base in setup_dest_addr().
SPL never assign any value to gd->ram_base and instead use the default,
0x0. Set correct gd->ram_base in dram_init() to ensure its correctness
in SPL.
Signed-off-by: Jonas Karlman <jonas@kwiboo.se>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
Diffstat (limited to 'lib/mbedtls/pkcs7_parser.c')
0 files changed, 0 insertions, 0 deletions