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| author | Tom Rini <trini@konsulko.com> | 2025-07-24 07:55:13 -0600 |
|---|---|---|
| committer | Tom Rini <trini@konsulko.com> | 2025-07-24 08:56:38 -0600 |
| commit | 7bf2a52b4943b5a83785d8fbd66275cb8e93c49d (patch) | |
| tree | cf598d2a730d59dce23f6b55d458339c592ef485 /scripts/multiconfig.py | |
| parent | 47b4a9b1a6d92d0b53b427880226180ffc3c8fe3 (diff) | |
| parent | 27fa1e2c1794cc589d72d485488c0bbb3b877f09 (diff) | |
Merge tag 'xilinx-for-v2025.10-rc1-v2' of https://source.denx.de/u-boot/custodians/u-boot-microblaze
AMD/Xilinx/FPGA changes for v2025.10-rc1 v2
zynqmp:
- Generate fit-dtb.blob all the time
- Simplify power-domain driver bind
zynqmp_mini:
- Remove PSCI_RESET
fpga:
- Improve user feedback in case of FPGA bitstream load failure
misc:
- Fix kernel-doc in gpio zynq and axi_mrmac
spi:
- Revert fix in STIG mode
[trini: Remove CONFIG_FPGA_VERSALPL=y from sandbox due to
sandbox+clang+asan test problem]
Signed-off-by: Tom Rini <trini@konsulko.com>
Diffstat (limited to 'scripts/multiconfig.py')
0 files changed, 0 insertions, 0 deletions