diff options
| author | Tom Rini <trini@konsulko.com> | 2019-09-02 23:21:44 -0400 |
|---|---|---|
| committer | Tom Rini <trini@konsulko.com> | 2019-09-02 23:21:44 -0400 |
| commit | 83a5df42614c566c3c642871f683e66a53d228ae (patch) | |
| tree | ea53c8fd1dd9bf65bc1d29dd9a0957d060dc1917 /test/dm/cache.c | |
| parent | d22c8be964a870f59d2fdab6c67cefa0c4799364 (diff) | |
| parent | 61ce84b2cf1a6672c8e402ce8174554b25629692 (diff) | |
Merge https://gitlab.denx.de/u-boot/custodians/u-boot-riscv
- Skip unavailable hart in the get_count().
- fu540 set serial env from otp.
- fu540 add mmc0 as a boot target device.
- Update fix_rela_dyn and add absolute reloc addend.
- Andestech PLIC driver will skip unavailable hart.
- Support Andestech V5L2 cache driver.
Diffstat (limited to 'test/dm/cache.c')
| -rw-r--r-- | test/dm/cache.c | 2 |
1 files changed, 2 insertions, 0 deletions
diff --git a/test/dm/cache.c b/test/dm/cache.c index d4144aab76f..2e244b109f3 100644 --- a/test/dm/cache.c +++ b/test/dm/cache.c @@ -14,6 +14,8 @@ static int dm_test_reset(struct unit_test_state *uts) ut_assertok(uclass_get_device(UCLASS_CACHE, 0, &dev_cache)); ut_assertok(cache_get_info(dev, &info)); + ut_assertok(cache_enable(dev)); + ut_assertok(cache_disable(dev)); return 0; } |