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| author | Hanyuan Zhao <hanyuan-z@qq.com> | 2024-08-09 16:56:57 +0800 |
|---|---|---|
| committer | Tom Rini <trini@konsulko.com> | 2024-10-27 10:15:29 -0600 |
| commit | 23edc8f6a6a1f08c1c0e84bd232dedad057d2c6d (patch) | |
| tree | 05cbcec3eeb3bc2eb9dc47a7f646cdf0b38ff7cd /test/py/conftest.py | |
| parent | 26d88de9e5be0ceffe8ac035c5089226ce8e0cb2 (diff) | |
net: dc2114x: add support for CPUs that have cache between the memory and the card
This commit adds support for the MIPS and LoongArch CPUs, which would use cache
after they jump into U-Boot. This commit requests the CPU to return the
addresses in uncached windows and flushes the cache in need, to make sure the
memory between the CPU and the network card is in consistency.
Signed-off-by: Hanyuan Zhao <zhaohy22@mails.tsinghua.edu.cn>
Diffstat (limited to 'test/py/conftest.py')
0 files changed, 0 insertions, 0 deletions