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authorEugeniy Paltsev <Eugeniy.Paltsev@synopsys.com>2018-09-05 14:27:10 +0300
committerAlexey Brodkin <abrodkin@synopsys.com>2018-09-05 18:11:45 +0300
commit13e57722fe7a96f23b09d3407f871f43aa3b096e (patch)
treeedf980f4ae51b6c7745c15609e855b1635b6e190 /test/py/tests/test_fpga.py
parent1a5da02c15684bec4576cacbaace390911638e1f (diff)
ARC: HSDK: Fix timer frequency value
CPU (and hence cpu timers) on HSDK board runs at 500MHz after preloader so fix wrong CPU frequency value in hsdk.dts Signed-off-by: Eugeniy Paltsev <Eugeniy.Paltsev@synopsys.com>
Diffstat (limited to 'test/py/tests/test_fpga.py')
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