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| author | Dinesh Maniyam <dinesh.maniyam@intel.com> | 2025-02-27 00:18:23 +0800 |
|---|---|---|
| committer | Michael Trimarchi <michael@amarulasolutions.com> | 2025-03-15 10:35:01 +0100 |
| commit | b820fa95778493f20fedc8b2f2ab0c08f57e1f4b (patch) | |
| tree | 79219d102ea7992d083fc22f085d2c69ae4e7e60 /test/py/tests/test_help.py | |
| parent | 36b2a5d676b4a13c8e66b30d8ff99a5e529fd6d2 (diff) | |
drivers: mtd: nand: cadence: Flush & invalidate dma descriptor
Ensure ddr memory is updated with the data from dcache.
This would help to ensure cdma always reading the latest dma descriptor
from ddr memory.
Signed-off-by: Dinesh Maniyam <dinesh.maniyam@intel.com>
Diffstat (limited to 'test/py/tests/test_help.py')
0 files changed, 0 insertions, 0 deletions