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author | Masahisa Kojima <masahisa.kojima@linaro.org> | 2023-05-24 16:32:46 +0900 |
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committer | Jagan Teki <jagan@edgeble.ai> | 2023-07-13 13:59:57 +0530 |
commit | 1d70101aa2a489529847231c741dff4f235cfeaa (patch) | |
tree | a90c1d7a9677bb946a1c94e8d8dbe8f78798dcd5 /test/py/u_boot_utils.py | |
parent | 55c0144bd30dbbb9a3b1cb6987040022756368f2 (diff) |
spi: synquacer: remove SPI_TX_BYTE handling
Current code expects that SPI_TX_BYTE is single bit mode
but it is wrong. It indicates byte program mode,
not single bit mode.
If SPI_TX_DUAL, SPI_TX_QUAD and SPI_TX_OCTAL bits are not set,
the default transfer bus width is single bit.
Signed-off-by: Masahisa Kojima <masahisa.kojima@linaro.org>
Reviewed-by: Ilias Apalodimas <ilias.apalodimas@linaro.org>
Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>
Diffstat (limited to 'test/py/u_boot_utils.py')
0 files changed, 0 insertions, 0 deletions