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| author | Paul Barker <paul.barker.ct@bp.renesas.com> | 2025-03-04 19:44:35 +0000 |
|---|---|---|
| committer | Marek Vasut <marek.vasut+renesas@mailbox.org> | 2025-03-11 23:06:18 +0100 |
| commit | 0648671dd3b056b8cbf725bce1a715e6a48406f2 (patch) | |
| tree | 01af4f4cf6d3a831cff81b6099d610c3ffc77796 /tools/u_boot_pylib/gitutil.py | |
| parent | 33ccfae85372285690d8bd8256d994d7cb917cbf (diff) | |
clk: rzg2l: Ignore disable for core clocks
Following on from commit 9a699a0a0d62 ("clk: rzg2l: Ignore enable for
core clocks"), we also need to ignore attempts to disable core clocks to
avoid the need for conditionals around clk_disable_bulk() calls in
drivers which support both RZ/G2L and other Renesas SoCs.
Signed-off-by: Paul Barker <paul.barker.ct@bp.renesas.com>
Reviewed-by: Marek Vasut <marek.vasut+renesas@mailbox.org>
Diffstat (limited to 'tools/u_boot_pylib/gitutil.py')
0 files changed, 0 insertions, 0 deletions