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| author | Adam Ford <aford173@gmail.com> | 2025-03-18 18:38:29 -0500 |
|---|---|---|
| committer | Fabio Estevam <festevam@gmail.com> | 2025-03-19 13:17:21 -0300 |
| commit | 4e73c627cb5e53a058b8dbc2ede32f8a473acdd1 (patch) | |
| tree | 5f95de669150a7c09cafb1fa5d143aacaab28ec3 /tools/u_boot_pylib/test_util.py | |
| parent | 8bc3542384e3a1219e5ffb62b79d16dddc1b1fb9 (diff) | |
clk: imx6q: Properly handle imx6qp ECSPI clk_sels
The ECSPI clock has the ability to select between pll3_60m and
osc on the imx6qp, where it's fixed on other variants. Fix this
by adding using a helper function to determine SoC variant and
register the clock accordingly.
Signed-off-by: Adam Ford <aford173@gmail.com>
Reviewed-by: Michael Trimarchi <michael@amarulasolutions.com>
Reviewed-by: Peng Fan <peng.fan@nxp.com>
Diffstat (limited to 'tools/u_boot_pylib/test_util.py')
0 files changed, 0 insertions, 0 deletions