diff options
250 files changed, 4202 insertions, 5231 deletions
@@ -3,7 +3,7 @@ VERSION = 2025 PATCHLEVEL = 10 SUBLEVEL = -EXTRAVERSION = -rc2 +EXTRAVERSION = -rc4 NAME = # *DOCUMENTATION* diff --git a/arch/arm/Kconfig b/arch/arm/Kconfig index 40368abc297..16db046f4b8 100644 --- a/arch/arm/Kconfig +++ b/arch/arm/Kconfig @@ -833,6 +833,7 @@ config ARCH_K3 select FIT select REGEX select FIT_SIGNATURE if ARM64 + select DMA_ADDR_T_64BIT select LTO imply TI_SECURE_DEVICE imply DM_RNG if ARM64 diff --git a/arch/arm/cpu/armv8/spl_data.c b/arch/arm/cpu/armv8/spl_data.c index 492353c93df..f4009e89a98 100644 --- a/arch/arm/cpu/armv8/spl_data.c +++ b/arch/arm/cpu/armv8/spl_data.c @@ -11,15 +11,15 @@ char __data_save_end[0] __section(".__data_save_end"); u32 cold_reboot_flag = 1; -u32 __weak reset_flag(void) +u32 __weak reset_flag(u32 flag) { - return 1; + return flag; } void spl_save_restore_data(void) { u32 data_size = __data_save_end - __data_save_start; - cold_reboot_flag = reset_flag(); + cold_reboot_flag = reset_flag(cold_reboot_flag); if (cold_reboot_flag == 1) { /* Save data section to data_save section */ diff --git a/arch/arm/dts/Makefile b/arch/arm/dts/Makefile index ff8f1ed1ac0..7c8cf3a5a1d 100644 --- a/arch/arm/dts/Makefile +++ b/arch/arm/dts/Makefile @@ -124,6 +124,8 @@ dtb-$(CONFIG_ARCH_TEGRA) += \ tegra30-wexler-qc750.dtb \ tegra114-asus-tf701t.dtb \ tegra114-dalmore.dtb \ + tegra114-microsoft-surface-2-0b.dtb \ + tegra114-microsoft-surface-2-13.dtb \ tegra114-nvidia-tegratab.dtb \ tegra124-apalis.dtb \ tegra124-jetson-tk1.dtb \ diff --git a/arch/arm/dts/k3-am62-r5-lp-sk.dts b/arch/arm/dts/k3-am62-r5-lp-sk.dts index 135e8d49b91..95cd9b707c7 100644 --- a/arch/arm/dts/k3-am62-r5-lp-sk.dts +++ b/arch/arm/dts/k3-am62-r5-lp-sk.dts @@ -64,7 +64,7 @@ &cbass_main { sysctrler: sysctrler { - compatible = "ti,am654-system-controller"; + compatible = "ti,am654-tisci-rproc-r5"; mboxes= <&secure_proxy_main 1>, <&secure_proxy_main 0>, <&secure_proxy_sa3 0>; diff --git a/arch/arm/dts/k3-am625-r5-beagleplay.dts b/arch/arm/dts/k3-am625-r5-beagleplay.dts index f4b2cd8904e..bba69871fd2 100644 --- a/arch/arm/dts/k3-am625-r5-beagleplay.dts +++ b/arch/arm/dts/k3-am625-r5-beagleplay.dts @@ -70,7 +70,7 @@ &cbass_main { sysctrler: sysctrler { - compatible = "ti,am654-system-controller"; + compatible = "ti,am654-tisci-rproc-r5"; mboxes= <&secure_proxy_main 1>, <&secure_proxy_main 0>, <&secure_proxy_sa3 0>; mbox-names = "tx", "rx", "boot_notify"; bootph-pre-ram; diff --git a/arch/arm/dts/k3-am625-r5-phycore-som-2gb.dts b/arch/arm/dts/k3-am625-r5-phycore-som-2gb.dts index 7132fae36fa..03dc81a4afa 100644 --- a/arch/arm/dts/k3-am625-r5-phycore-som-2gb.dts +++ b/arch/arm/dts/k3-am625-r5-phycore-som-2gb.dts @@ -69,7 +69,7 @@ &cbass_main { sysctrler: sysctrler { - compatible = "ti,am654-system-controller"; + compatible = "ti,am654-tisci-rproc-r5"; mboxes= <&secure_proxy_main 1>, <&secure_proxy_main 0>, <&secure_proxy_sa3 0>; mbox-names = "tx", "rx", "boot_notify"; bootph-pre-ram; diff --git a/arch/arm/dts/k3-am625-r5-sk.dts b/arch/arm/dts/k3-am625-r5-sk.dts index 34c501dd51b..67589f941ba 100644 --- a/arch/arm/dts/k3-am625-r5-sk.dts +++ b/arch/arm/dts/k3-am625-r5-sk.dts @@ -64,7 +64,7 @@ &cbass_main { sysctrler: sysctrler { - compatible = "ti,am654-system-controller"; + compatible = "ti,am654-tisci-rproc-r5"; mboxes= <&secure_proxy_main 1>, <&secure_proxy_main 0>, <&secure_proxy_sa3 0>; mbox-names = "tx", "rx", "boot_notify"; bootph-pre-ram; diff --git a/arch/arm/dts/k3-am625-verdin-r5.dts b/arch/arm/dts/k3-am625-verdin-r5.dts index 39e8ab8158e..fb431c96337 100644 --- a/arch/arm/dts/k3-am625-verdin-r5.dts +++ b/arch/arm/dts/k3-am625-verdin-r5.dts @@ -53,7 +53,7 @@ &cbass_main { sysctrler: sysctrler { - compatible = "ti,am654-system-controller"; + compatible = "ti,am654-tisci-rproc-r5"; mboxes= <&secure_proxy_main 1>, <&secure_proxy_main 0>, <&secure_proxy_sa3 0>; mbox-names = "tx", "rx", "boot_notify"; bootph-pre-ram; diff --git a/arch/arm/dts/k3-am62a7-r5-phycore-som-2gb.dts b/arch/arm/dts/k3-am62a7-r5-phycore-som-2gb.dts index 63b7864a469..96860e80e9a 100644 --- a/arch/arm/dts/k3-am62a7-r5-phycore-som-2gb.dts +++ b/arch/arm/dts/k3-am62a7-r5-phycore-som-2gb.dts @@ -70,7 +70,7 @@ }; sysctrler: sysctrler { - compatible = "ti,am654-system-controller"; + compatible = "ti,am654-tisci-rproc-r5"; mboxes= <&secure_proxy_main 1>, <&secure_proxy_main 0>, <&sa3_secproxy 0>; diff --git a/arch/arm/dts/k3-am62a7-r5-sk.dts b/arch/arm/dts/k3-am62a7-r5-sk.dts index 49e62533a95..64923c2c710 100644 --- a/arch/arm/dts/k3-am62a7-r5-sk.dts +++ b/arch/arm/dts/k3-am62a7-r5-sk.dts @@ -63,7 +63,7 @@ &cbass_main { sysctrler: sysctrler { - compatible = "ti,am654-system-controller"; + compatible = "ti,am654-tisci-rproc-r5"; mboxes= <&secure_proxy_main 1>, <&secure_proxy_main 0>, <&secure_proxy_sa3 0>; diff --git a/arch/arm/dts/k3-am62p5-r5-sk.dts b/arch/arm/dts/k3-am62p5-r5-sk.dts index b18b4ce1272..e45d2bf6a0b 100644 --- a/arch/arm/dts/k3-am62p5-r5-sk.dts +++ b/arch/arm/dts/k3-am62p5-r5-sk.dts @@ -69,7 +69,7 @@ }; sysctrler: sysctrler { - compatible = "ti,am654-system-controller"; + compatible = "ti,am654-tisci-rproc-r5"; mboxes= <&secure_proxy_main 1>, <&secure_proxy_main 0>, <&sa3_secproxy 0>; diff --git a/arch/arm/dts/k3-am62p5-verdin-r5.dts b/arch/arm/dts/k3-am62p5-verdin-r5.dts index 983a3bfe670..17739086935 100644 --- a/arch/arm/dts/k3-am62p5-verdin-r5.dts +++ b/arch/arm/dts/k3-am62p5-verdin-r5.dts @@ -57,7 +57,7 @@ }; sysctrler: sysctrler { - compatible = "ti,am654-system-controller"; + compatible = "ti,am654-tisci-rproc-r5"; mboxes= <&secure_proxy_main 1>, <&secure_proxy_main 0>, <&sa3_secproxy 0>; diff --git a/arch/arm/dts/k3-am642-r5-evm.dts b/arch/arm/dts/k3-am642-r5-evm.dts index 933f75095b1..67b8587d3b2 100644 --- a/arch/arm/dts/k3-am642-r5-evm.dts +++ b/arch/arm/dts/k3-am642-r5-evm.dts @@ -43,7 +43,7 @@ &cbass_main { sysctrler: sysctrler { - compatible = "ti,am654-system-controller"; + compatible = "ti,am654-tisci-rproc-r5"; mboxes= <&secure_proxy_main 1>, <&secure_proxy_main 0>; mbox-names = "tx", "rx"; bootph-pre-ram; diff --git a/arch/arm/dts/k3-am642-r5-phycore-som-2gb.dts b/arch/arm/dts/k3-am642-r5-phycore-som-2gb.dts index 40c25d5dbb6..32a10b24327 100644 --- a/arch/arm/dts/k3-am642-r5-phycore-som-2gb.dts +++ b/arch/arm/dts/k3-am642-r5-phycore-som-2gb.dts @@ -63,7 +63,7 @@ &cbass_main { sysctrler: sysctrler { - compatible = "ti,am654-system-controller"; + compatible = "ti,am654-tisci-rproc-r5"; mboxes= <&secure_proxy_main 1>, <&secure_proxy_main 0>; mbox-names = "tx", "rx"; bootph-pre-ram; diff --git a/arch/arm/dts/k3-am642-r5-sk.dts b/arch/arm/dts/k3-am642-r5-sk.dts index 6e31dfd97c5..cfc548a1cea 100644 --- a/arch/arm/dts/k3-am642-r5-sk.dts +++ b/arch/arm/dts/k3-am642-r5-sk.dts @@ -43,7 +43,7 @@ &cbass_main { sysctrler: sysctrler { - compatible = "ti,am654-system-controller"; + compatible = "ti,am654-tisci-rproc-r5"; mboxes= <&secure_proxy_main 1>, <&secure_proxy_main 0>; mbox-names = "tx", "rx"; bootph-pre-ram; diff --git a/arch/arm/dts/k3-am654-r5-base-board.dts b/arch/arm/dts/k3-am654-r5-base-board.dts index ab5195eb15c..99eb8a2d442 100644 --- a/arch/arm/dts/k3-am654-r5-base-board.dts +++ b/arch/arm/dts/k3-am654-r5-base-board.dts @@ -47,7 +47,7 @@ &cbass_wakeup { sysctrler: sysctrler { - compatible = "ti,am654-system-controller"; + compatible = "ti,am654-tisci-rproc-r5"; mboxes= <&secure_proxy_mcu 4>, <&secure_proxy_mcu 5>; mbox-names = "tx", "rx"; bootph-pre-ram; diff --git a/arch/arm/dts/k3-am67a-r5-beagley-ai.dts b/arch/arm/dts/k3-am67a-r5-beagley-ai.dts index 664be358a97..45d104e8e3f 100644 --- a/arch/arm/dts/k3-am67a-r5-beagley-ai.dts +++ b/arch/arm/dts/k3-am67a-r5-beagley-ai.dts @@ -69,7 +69,7 @@ }; sysctrler: sysctrler { - compatible = "ti,am654-system-controller"; + compatible = "ti,am654-tisci-rproc-r5"; mboxes= <&secure_proxy_main 1>, <&secure_proxy_main 0>, <&sa3_secproxy 0>; diff --git a/arch/arm/dts/k3-j7200-r5-common-proc-board.dts b/arch/arm/dts/k3-j7200-r5-common-proc-board.dts index 9ac29110324..e35b767a7e3 100644 --- a/arch/arm/dts/k3-j7200-r5-common-proc-board.dts +++ b/arch/arm/dts/k3-j7200-r5-common-proc-board.dts @@ -69,7 +69,7 @@ &cbass_mcu_wakeup { sysctrler: sysctrler { - compatible = "ti,am654-system-controller"; + compatible = "ti,am654-tisci-rproc-r5"; mboxes= <&secure_proxy_mcu 4>, <&secure_proxy_mcu 5>; mbox-names = "tx", "rx"; diff --git a/arch/arm/dts/k3-j721e-r5.dtsi b/arch/arm/dts/k3-j721e-r5.dtsi index 786a41c5e90..7398f9b05ec 100644 --- a/arch/arm/dts/k3-j721e-r5.dtsi +++ b/arch/arm/dts/k3-j721e-r5.dtsi @@ -66,7 +66,7 @@ &cbass_mcu_wakeup { sysctrler: sysctrler { bootph-pre-ram; - compatible = "ti,am654-system-controller"; + compatible = "ti,am654-tisci-rproc-r5"; mboxes= <&secure_proxy_mcu 4>, <&secure_proxy_mcu 5>; mbox-names = "tx", "rx"; }; diff --git a/arch/arm/dts/k3-j721s2-r5.dtsi b/arch/arm/dts/k3-j721s2-r5.dtsi index a820f516015..c1c12e217d2 100644 --- a/arch/arm/dts/k3-j721s2-r5.dtsi +++ b/arch/arm/dts/k3-j721s2-r5.dtsi @@ -63,7 +63,7 @@ &cbass_mcu_wakeup { sysctrler: sysctrler { - compatible = "ti,am654-system-controller"; + compatible = "ti,am654-tisci-rproc-r5"; mboxes= <&secure_proxy_mcu 4>, <&secure_proxy_mcu 5>, <&secure_proxy_sa3 5>; mbox-names = "tx", "rx", "boot_notify"; bootph-pre-ram; diff --git a/arch/arm/dts/k3-j722s-r5-evm.dts b/arch/arm/dts/k3-j722s-r5-evm.dts index 286ab50d3da..02a3494a877 100644 --- a/arch/arm/dts/k3-j722s-r5-evm.dts +++ b/arch/arm/dts/k3-j722s-r5-evm.dts @@ -68,7 +68,7 @@ }; sysctrler: sysctrler { - compatible = "ti,am654-system-controller"; + compatible = "ti,am654-tisci-rproc-r5"; mboxes= <&secure_proxy_main 1>, <&secure_proxy_main 0>, <&sa3_secproxy 0>; diff --git a/arch/arm/dts/k3-j784s4-r5.dtsi b/arch/arm/dts/k3-j784s4-r5.dtsi index a1394115b8b..78444dc4e14 100644 --- a/arch/arm/dts/k3-j784s4-r5.dtsi +++ b/arch/arm/dts/k3-j784s4-r5.dtsi @@ -61,7 +61,7 @@ &cbass_mcu_wakeup { sysctrler: sysctrler { - compatible = "ti,am654-system-controller"; + compatible = "ti,am654-tisci-rproc-r5"; mboxes= <&secure_proxy_mcu 4>, <&secure_proxy_mcu 5>, <&secure_proxy_sa3 5>; diff --git a/arch/arm/dts/px30-u-boot.dtsi b/arch/arm/dts/px30-u-boot.dtsi index 157d0ea6930..2f726b0aaba 100644 --- a/arch/arm/dts/px30-u-boot.dtsi +++ b/arch/arm/dts/px30-u-boot.dtsi @@ -27,6 +27,10 @@ }; }; +&otp { + bootph-some-ram; +}; + &uart2 { clock-frequency = <24000000>; bootph-all; diff --git a/arch/arm/dts/rk3328-roc-cc-u-boot.dtsi b/arch/arm/dts/rk3328-roc-cc-u-boot.dtsi index 582d6ba49b4..c47d29c59de 100644 --- a/arch/arm/dts/rk3328-roc-cc-u-boot.dtsi +++ b/arch/arm/dts/rk3328-roc-cc-u-boot.dtsi @@ -4,7 +4,7 @@ */ #include "rk3328-u-boot.dtsi" -#include "rk3328-sdram-ddr4-666.dtsi" +#include "rk3328-sdram-ddr4-1600.dtsi" / { smbios { diff --git a/arch/arm/dts/rk3328-sdram-ddr4-1600.dtsi b/arch/arm/dts/rk3328-sdram-ddr4-1600.dtsi new file mode 100644 index 00000000000..9594bb42839 --- /dev/null +++ b/arch/arm/dts/rk3328-sdram-ddr4-1600.dtsi @@ -0,0 +1,226 @@ +// SPDX-License-Identifier: (GPL-2.0+ OR MIT) +// Copyright (c) 2018 Fuzhou Rockchip Electronics Co., Ltd. + +&dmc { + rockchip,sdram-params = < + 0x1 + 0xA + 0x2 + 0x1 + 0x0 + 0x0 + 0x11 + 0x0 + 0x11 + 0x0 + 0 + + 0x94496354 + 0x00000000 + 0x0000002a + 0x000004e2 + 0x00000015 + 0x0000034a + 0x000000ff + + 800 + 0 + 1 + 0 + 0 + + 0x00000000 + 0x43041010 + 0x00000064 + 0x0061008c + 0x000000d0 + 0x000200c5 + 0x000000d4 + 0x00500000 + 0x000000d8 + 0x00000100 + 0x000000dc + 0x03140401 + 0x000000e0 + 0x00000000 + 0x000000e4 + 0x00110000 + 0x000000e8 + 0x00000420 + 0x000000ec + 0x00000400 + 0x000000f4 + 0x000f011f + 0x00000100 + 0x0c0e1b0e + 0x00000104 + 0x00030314 + 0x00000108 + 0x0506050b + 0x0000010c + 0x0040400c + 0x00000110 + 0x06030307 + 0x00000114 + 0x04040302 + 0x00000120 + 0x06060b06 + 0x00000124 + 0x00020308 + 0x00000180 + 0x01000040 + 0x00000184 + 0x00000000 + 0x00000190 + 0x07040003 + 0x00000198 + 0x05001100 + 0x000001a0 + 0xc0400003 + 0x00000240 + 0x0600060c + 0x00000244 + 0x00000201 + 0x00000250 + 0x00000f00 + 0x00000490 + 0x00000001 + 0xffffffff + 0xffffffff + 0xffffffff + 0xffffffff + 0xffffffff + 0xffffffff + 0xffffffff + 0xffffffff + 0xffffffff + 0xffffffff + 0xffffffff + 0xffffffff + 0xffffffff + 0xffffffff + + 0x00000004 + 0x0000000c + 0x00000028 + 0x0000000c + 0x0000002c + 0x00000000 + 0x00000030 + 0x00000009 + 0xffffffff + 0xffffffff + + 0x77 + 0x88 + 0x79 + 0x79 + 0x87 + 0x97 + 0x87 + 0x78 + 0x77 + 0x78 + 0x87 + 0x88 + 0x87 + 0x87 + 0x77 + + 0x78 + 0x78 + 0x78 + 0x78 + 0x78 + 0x78 + 0x78 + 0x78 + 0x78 + 0x69 + 0x9 + + 0x77 + 0x78 + 0x77 + 0x78 + 0x77 + 0x78 + 0x77 + 0x78 + 0x77 + 0x79 + 0x9 + + 0x78 + 0x78 + 0x78 + 0x78 + 0x78 + 0x78 + 0x78 + 0x78 + 0x78 + 0x69 + 0x9 + + 0x77 + 0x78 + 0x77 + 0x77 + 0x77 + 0x77 + 0x77 + 0x77 + 0x77 + 0x79 + 0x9 + + 0x78 + 0x78 + 0x78 + 0x78 + 0x78 + 0x78 + 0x78 + 0x78 + 0x78 + 0x69 + 0x9 + + 0x77 + 0x78 + 0x77 + 0x78 + 0x77 + 0x78 + 0x77 + 0x78 + 0x77 + 0x79 + 0x9 + + 0x78 + 0x78 + 0x78 + 0x78 + 0x78 + 0x78 + 0x78 + 0x78 + 0x78 + 0x69 + 0x9 + + 0x77 + 0x78 + 0x77 + 0x77 + 0x77 + 0x77 + 0x77 + 0x77 + 0x77 + 0x79 + 0x9 + >; +}; diff --git a/arch/arm/dts/rk3528-generic-u-boot.dtsi b/arch/arm/dts/rk3528-generic-u-boot.dtsi index cc830b51456..9e1fb2a7eef 100644 --- a/arch/arm/dts/rk3528-generic-u-boot.dtsi +++ b/arch/arm/dts/rk3528-generic-u-boot.dtsi @@ -1,12 +1,3 @@ // SPDX-License-Identifier: (GPL-2.0+ OR MIT) #include "rk3528-u-boot.dtsi" - -&sdmmc { - bus-width = <4>; - cap-sd-highspeed; - disable-wp; - no-mmc; - no-sdio; - status = "okay"; -}; diff --git a/arch/arm/dts/rk3528-generic.dts b/arch/arm/dts/rk3528-generic.dts index 3f6f0bed108..637ca03325e 100644 --- a/arch/arm/dts/rk3528-generic.dts +++ b/arch/arm/dts/rk3528-generic.dts @@ -1,6 +1,6 @@ // SPDX-License-Identifier: (GPL-2.0+ OR MIT) /* - * Minimal generic DT for RK3528 with eMMC enabled + * Minimal generic DT for RK3528 with eMMC and SD-card enabled */ /dts-v1/; @@ -10,6 +10,12 @@ model = "Generic RK3528"; compatible = "rockchip,rk3528"; + aliases { + mmc0 = &sdhci; + mmc1 = &sdmmc; + serial0 = &uart0; + }; + chosen { stdout-path = "serial0:1500000n8"; }; @@ -25,6 +31,15 @@ status = "okay"; }; +&sdmmc { + bus-width = <4>; + cap-sd-highspeed; + disable-wp; + no-mmc; + no-sdio; + status = "okay"; +}; + &uart0 { pinctrl-names = "default"; pinctrl-0 = <&uart0m0_xfer>; diff --git a/arch/arm/dts/rk3528-radxa-e20c-u-boot.dtsi b/arch/arm/dts/rk3528-radxa-e20c-u-boot.dtsi index 1372d8f1e38..16c47e6b9a9 100644 --- a/arch/arm/dts/rk3528-radxa-e20c-u-boot.dtsi +++ b/arch/arm/dts/rk3528-radxa-e20c-u-boot.dtsi @@ -6,11 +6,10 @@ mmc-hs200-1_8v; }; -&sdmmc { - bus-width = <4>; - cap-mmc-highspeed; - cap-sd-highspeed; - disable-wp; - vmmc-supply = <&vcc_3v3>; - status = "okay"; +&vdd_arm { + regulator-init-microvolt = <953000>; +}; + +&vdd_logic { + regulator-init-microvolt = <900000>; }; diff --git a/arch/arm/dts/rk3528-u-boot.dtsi b/arch/arm/dts/rk3528-u-boot.dtsi index eb6a55cd5c9..a18d33b3d36 100644 --- a/arch/arm/dts/rk3528-u-boot.dtsi +++ b/arch/arm/dts/rk3528-u-boot.dtsi @@ -27,24 +27,6 @@ compatible = "rockchip,rk3528-otp"; reg = <0x0 0xffce0000 0x0 0x4000>; }; - - sdmmc: mmc@ffc30000 { - compatible = "rockchip,rk3528-dw-mshc", - "rockchip,rk3288-dw-mshc"; - reg = <0x0 0xffc30000 0x0 0x4000>; - clocks = <&cru HCLK_SDMMC0>, <&cru CCLK_SRC_SDMMC0>; - clock-names = "biu", "ciu"; - fifo-depth = <0x100>; - interrupts = <GIC_SPI 133 IRQ_TYPE_LEVEL_HIGH>; - max-frequency = <150000000>; - pinctrl-names = "default"; - pinctrl-0 = <&sdmmc_bus4>, <&sdmmc_clk>, <&sdmmc_cmd>, - <&sdmmc_det>; - resets = <&cru SRST_H_SDMMC0>; - reset-names = "reset"; - rockchip,default-sample-phase = <90>; - status = "disabled"; - }; }; }; diff --git a/arch/arm/dts/rk3576-armsom-sige5-u-boot.dtsi b/arch/arm/dts/rk3576-armsom-sige5-u-boot.dtsi new file mode 100644 index 00000000000..7e0530d85d1 --- /dev/null +++ b/arch/arm/dts/rk3576-armsom-sige5-u-boot.dtsi @@ -0,0 +1,18 @@ +// SPDX-License-Identifier: (GPL-2.0+ OR MIT) + +#include "rk3576-u-boot.dtsi" + +/ { + aliases { + mmc0 = &sdhci; + mmc1 = &sdmmc; + }; +}; + +&red_led { + default-state = "on"; +}; + +&sdhci { + cap-mmc-highspeed; +}; diff --git a/arch/arm/dts/rk3576-generic-u-boot.dtsi b/arch/arm/dts/rk3576-generic-u-boot.dtsi new file mode 100644 index 00000000000..632fabb6af5 --- /dev/null +++ b/arch/arm/dts/rk3576-generic-u-boot.dtsi @@ -0,0 +1,3 @@ +// SPDX-License-Identifier: (GPL-2.0+ OR MIT) + +#include "rk3576-u-boot.dtsi" diff --git a/arch/arm/dts/rk3576-generic.dts b/arch/arm/dts/rk3576-generic.dts new file mode 100644 index 00000000000..123be5378d9 --- /dev/null +++ b/arch/arm/dts/rk3576-generic.dts @@ -0,0 +1,63 @@ +// SPDX-License-Identifier: (GPL-2.0+ OR MIT) +/* + * Minimal generic DT for RK3576 with eMMC, SD-card and USB OTG enabled + */ + +/dts-v1/; + +#include <dt-bindings/gpio/gpio.h> +#include "rk3576.dtsi" + +/ { + model = "Generic RK3576"; + compatible = "rockchip,rk3576"; + + aliases { + mmc0 = &sdhci; + mmc1 = &sdmmc; + }; + + chosen { + stdout-path = "serial0:1500000n8"; + }; +}; + +&sdhci { + bus-width = <8>; + cap-mmc-highspeed; + mmc-hs200-1_8v; + no-sd; + no-sdio; + non-removable; + status = "okay"; +}; + +&sdmmc { + bus-width = <4>; + cap-sd-highspeed; + disable-wp; + no-mmc; + no-sdio; + status = "okay"; +}; + +&u2phy0 { + status = "okay"; +}; + +&u2phy0_otg { + status = "okay"; +}; + +&uart0 { + pinctrl-0 = <&uart0m0_xfer>; + status = "okay"; +}; + +&usb_drd0_dwc3 { + dr_mode = "peripheral"; + maximum-speed = "high-speed"; + phys = <&u2phy0_otg>; + phy-names = "usb2-phy"; + status = "okay"; +}; diff --git a/arch/arm/dts/rk3576-u-boot.dtsi b/arch/arm/dts/rk3576-u-boot.dtsi index be99a48a630..fb5a107f47d 100644 --- a/arch/arm/dts/rk3576-u-boot.dtsi +++ b/arch/arm/dts/rk3576-u-boot.dtsi @@ -49,6 +49,10 @@ bootph-all; }; +&otp { + bootph-some-ram; +}; + &pcfg_pull_none { bootph-all; }; diff --git a/arch/arm/dts/rk3588-generic-u-boot.dtsi b/arch/arm/dts/rk3588-generic-u-boot.dtsi index f67301d87a6..853ed58cfe5 100644 --- a/arch/arm/dts/rk3588-generic-u-boot.dtsi +++ b/arch/arm/dts/rk3588-generic-u-boot.dtsi @@ -1,21 +1,3 @@ // SPDX-License-Identifier: (GPL-2.0+ OR MIT) #include "rk3588s-u-boot.dtsi" - -&u2phy0 { - status = "okay"; -}; - -&u2phy0_otg { - status = "okay"; -}; - -&usbdp_phy0 { - status = "okay"; -}; - -&usb_host0_xhci { - dr_mode = "peripheral"; - maximum-speed = "high-speed"; - status = "okay"; -}; diff --git a/arch/arm/dts/rk3588-generic.dts b/arch/arm/dts/rk3588-generic.dts index 95d757676f1..6740f9866f1 100644 --- a/arch/arm/dts/rk3588-generic.dts +++ b/arch/arm/dts/rk3588-generic.dts @@ -39,7 +39,23 @@ status = "okay"; }; +&u2phy0 { + status = "okay"; +}; + +&u2phy0_otg { + status = "okay"; +}; + &uart2 { pinctrl-0 = <&uart2m0_xfer>; status = "okay"; }; + +&usb_host0_xhci { + dr_mode = "peripheral"; + maximum-speed = "high-speed"; + phys = <&u2phy0_otg>; + phy-names = "usb2-phy"; + status = "okay"; +}; diff --git a/arch/arm/dts/rk3588-orangepi-5-ultra-u-boot.dtsi b/arch/arm/dts/rk3588-orangepi-5-ultra-u-boot.dtsi new file mode 100644 index 00000000000..1ab31a4ec5a --- /dev/null +++ b/arch/arm/dts/rk3588-orangepi-5-ultra-u-boot.dtsi @@ -0,0 +1,20 @@ +// SPDX-License-Identifier: (GPL-2.0+ OR MIT) + +#include "rk3588-u-boot.dtsi" + +&fspim1_pins { + bootph-pre-ram; + bootph-some-ram; +}; + +&sdhci { + cap-mmc-highspeed; + mmc-hs200-1_8v; +}; + +&sfc { + flash@0 { + bootph-pre-ram; + bootph-some-ram; + }; +}; diff --git a/arch/arm/dts/tegra114-microsoft-surface-2-0b.dts b/arch/arm/dts/tegra114-microsoft-surface-2-0b.dts new file mode 100644 index 00000000000..2007aae8737 --- /dev/null +++ b/arch/arm/dts/tegra114-microsoft-surface-2-0b.dts @@ -0,0 +1,10 @@ +// SPDX-License-Identifier: GPL-2.0 +/dts-v1/; + +#include "tegra114-microsoft-surface-2-common.dtsi" + +/ { + backlight: backlight { + enable-gpios = <&gpio TEGRA_GPIO(CC, 2) GPIO_ACTIVE_HIGH>; + }; +}; diff --git a/arch/arm/dts/tegra114-microsoft-surface-2-13.dts b/arch/arm/dts/tegra114-microsoft-surface-2-13.dts new file mode 100644 index 00000000000..da121d5a101 --- /dev/null +++ b/arch/arm/dts/tegra114-microsoft-surface-2-13.dts @@ -0,0 +1,10 @@ +// SPDX-License-Identifier: GPL-2.0 +/dts-v1/; + +#include "tegra114-microsoft-surface-2-common.dtsi" + +/ { + backlight: backlight { + enable-gpios = <&gpio TEGRA_GPIO(EE, 3) GPIO_ACTIVE_HIGH>; + }; +}; diff --git a/arch/arm/dts/tegra114-microsoft-surface-2-common.dtsi b/arch/arm/dts/tegra114-microsoft-surface-2-common.dtsi new file mode 100644 index 00000000000..f8f71262538 --- /dev/null +++ b/arch/arm/dts/tegra114-microsoft-surface-2-common.dtsi @@ -0,0 +1,905 @@ +// SPDX-License-Identifier: GPL-2.0 + +#include <dt-bindings/input/input.h> +#include "tegra114.dtsi" + +/ { + model = "Microsoft Surface 2"; + compatible = "microsoft,surface-2", "nvidia,tegra114"; + + chosen { + stdout-path = &uarta; + }; + + aliases { + i2c0 = &pwr_i2c; + + mmc0 = &sdmmc4; /* eMMC */ + mmc1 = &sdmmc3; /* uSD slot */ + + usb0 = &usb1; + }; + + memory { + device_type = "memory"; + reg = <0x80000000 0x80000000>; + }; + + host1x@50000000 { + dsia: dsi@54300000 { + status = "okay"; + + avdd-dsi-csi-supply = <&avdd_dsi_csi>; + + panel@0 { + compatible = "samsung,ltl106hl02-001"; + reg = <0>; + + vdd-supply = <&tps65090_fet4>; + + backlight = <&backlight>; + }; + }; + }; + + pinmux@70000868 { + pinctrl-names = "default"; + pinctrl-0 = <&state_default>; + + state_default: pinmux { + /* ULPI pinmux */ + ulpi-data0 { + nvidia,pins = "ulpi_data0_po1", + "ulpi_data3_po4", + "ulpi_data4_po5"; + nvidia,function = "ulpi"; + nvidia,pull = <TEGRA_PIN_PULL_DOWN>; + nvidia,tristate = <TEGRA_PIN_ENABLE>; + nvidia,enable-input = <TEGRA_PIN_DISABLE>; + }; + ulpi-data1 { + nvidia,pins = "ulpi_data1_po2"; + nvidia,function = "ulpi"; + nvidia,pull = <TEGRA_PIN_PULL_NONE>; + nvidia,tristate = <TEGRA_PIN_DISABLE>; + nvidia,enable-input = <TEGRA_PIN_ENABLE>; + }; + ulpi-data2 { + nvidia,pins = "ulpi_data2_po3"; + nvidia,function = "ulpi"; + nvidia,pull = <TEGRA_PIN_PULL_NONE>; + nvidia,tristate = <TEGRA_PIN_DISABLE>; + nvidia,enable-input = <TEGRA_PIN_DISABLE>; + }; + ulpi-data7 { + nvidia,pins = "ulpi_data7_po0", + "ulpi_data5_po6", + "ulpi_data6_po7"; + nvidia,function = "ulpi"; + nvidia,pull = <TEGRA_PIN_PULL_UP>; + nvidia,tristate = <TEGRA_PIN_DISABLE>; + nvidia,enable-input = <TEGRA_PIN_ENABLE>; + }; + + /* I2S pinmux */ + dap1-din { + nvidia,pins = "dap1_fs_pn0", + "dap1_din_pn1", + "dap1_sclk_pn3"; + nvidia,function = "i2s0"; + nvidia,pull = <TEGRA_PIN_PULL_NONE>; + nvidia,tristate = <TEGRA_PIN_DISABLE>; + nvidia,enable-input = <TEGRA_PIN_ENABLE>; + }; + dap1-dout { + nvidia,pins = "dap1_dout_pn2"; + nvidia,function = "i2s0"; + nvidia,pull = <TEGRA_PIN_PULL_NONE>; + nvidia,tristate = <TEGRA_PIN_DISABLE>; + nvidia,enable-input = <TEGRA_PIN_DISABLE>; + }; + dap2-i2s1 { + nvidia,pins = "dap2_fs_pa2", + "dap2_sclk_pa3", + "dap2_din_pa4", + "dap2_dout_pa5"; + nvidia,function = "i2s1"; + nvidia,pull = <TEGRA_PIN_PULL_NONE>; + nvidia,tristate = <TEGRA_PIN_DISABLE>; + nvidia,enable-input = <TEGRA_PIN_ENABLE>; + }; + dap3-i2s2 { + nvidia,pins = "dap3_fs_pp0", + "dap3_din_pp1", + "dap3_dout_pp2", + "dap3_sclk_pp3"; + nvidia,function = "i2s2"; + nvidia,pull = <TEGRA_PIN_PULL_DOWN>; + nvidia,tristate = <TEGRA_PIN_ENABLE>; + nvidia,enable-input = <TEGRA_PIN_DISABLE>; + }; + dap4-din { + nvidia,pins = "dap4_fs_pp4", + "dap4_din_pp5", + "dap4_sclk_pp7"; + nvidia,function = "i2s3"; + nvidia,pull = <TEGRA_PIN_PULL_NONE>; + nvidia,tristate = <TEGRA_PIN_DISABLE>; + nvidia,enable-input = <TEGRA_PIN_ENABLE>; + }; + dap4-dout { + nvidia,pins = "dap4_dout_pp6"; + nvidia,function = "i2s3"; + nvidia,pull = <TEGRA_PIN_PULL_NONE>; + nvidia,tristate = <TEGRA_PIN_DISABLE>; + nvidia,enable-input = <TEGRA_PIN_DISABLE>; + }; + + /* SDMMC1 pinmux */ + sdmmc1-wp-clk { + nvidia,pins = "sdmmc1_wp_n_pv3", + "sdmmc1_clk_pz0"; + nvidia,function = "sdmmc1"; + nvidia,pull = <TEGRA_PIN_PULL_NONE>; + nvidia,tristate = <TEGRA_PIN_DISABLE>; + nvidia,enable-input = <TEGRA_PIN_ENABLE>; + }; + sdmmc1-cmd { + nvidia,pins = "sdmmc1_cmd_pz1", + "sdmmc1_dat3_py4", + "sdmmc1_dat2_py5", + "sdmmc1_dat1_py6", + "sdmmc1_dat0_py7"; + nvidia,function = "sdmmc1"; + nvidia,pull = <TEGRA_PIN_PULL_UP>; + nvidia,tristate = <TEGRA_PIN_DISABLE>; + nvidia,enable-input = <TEGRA_PIN_ENABLE>; + }; + + /* SDMMC3 pinmux */ + sdmmc3-clk { + nvidia,pins = "sdmmc3_clk_pa6"; + nvidia,function = "sdmmc3"; + nvidia,pull = <TEGRA_PIN_PULL_NONE>; + nvidia,tristate = <TEGRA_PIN_DISABLE>; + nvidia,enable-input = <TEGRA_PIN_ENABLE>; + }; + sdmmc3-cmd { + nvidia,pins = "sdmmc3_cmd_pa7", + "sdmmc3_dat3_pb4", + "sdmmc3_dat2_pb5", + "sdmmc3_dat1_pb6", + "sdmmc3_dat0_pb7", + "sdmmc3_cd_n_pv2", + "sdmmc3_clk_lb_in_pee5"; + nvidia,function = "sdmmc3"; + nvidia,pull = <TEGRA_PIN_PULL_UP>; + nvidia,tristate = <TEGRA_PIN_DISABLE>; + nvidia,enable-input = <TEGRA_PIN_ENABLE>; + }; + sdmmc3-clk-lb-out { + nvidia,pins = "sdmmc3_clk_lb_out_pee4"; + nvidia,function = "sdmmc3"; + nvidia,pull = <TEGRA_PIN_PULL_NONE>; + nvidia,tristate = <TEGRA_PIN_DISABLE>; + nvidia,enable-input = <TEGRA_PIN_DISABLE>; + }; + + /* SDMMC4 pinmux */ + sdmmc4-clk { + nvidia,pins = "sdmmc4_clk_pcc4"; + nvidia,function = "sdmmc4"; + nvidia,pull = <TEGRA_PIN_PULL_NONE>; + nvidia,tristate = <TEGRA_PIN_DISABLE>; + nvidia,enable-input = <TEGRA_PIN_ENABLE>; + }; + sdmmc4-cmd { + nvidia,pins = "sdmmc4_cmd_pt7", + "sdmmc4_dat0_paa0", + "sdmmc4_dat1_paa1", + "sdmmc4_dat2_paa2", + "sdmmc4_dat3_paa3", + "sdmmc4_dat4_paa4", + "sdmmc4_dat5_paa5", + "sdmmc4_dat6_paa6", + "sdmmc4_dat7_paa7"; + nvidia,function = "sdmmc4"; + nvidia,pull = <TEGRA_PIN_PULL_UP>; + nvidia,tristate = <TEGRA_PIN_DISABLE>; + nvidia,enable-input = <TEGRA_PIN_ENABLE>; + }; + + /* HDMI pinmux */ + hdmi-int { + nvidia,pins = "hdmi_int_pn7"; + nvidia,function = "rsvd1"; + nvidia,pull = <TEGRA_PIN_PULL_NONE>; + nvidia,tristate = <TEGRA_PIN_DISABLE>; + nvidia,enable-input = <TEGRA_PIN_ENABLE>; + nvidia,rcv-sel = <TEGRA_PIN_DISABLE>; + }; + hdmi-cec { + nvidia,pins = "hdmi_cec_pee3"; + nvidia,function = "rsvd3"; + nvidia,pull = <TEGRA_PIN_PULL_DOWN>; + nvidia,tristate = <TEGRA_PIN_ENABLE>; + nvidia,enable-input = <TEGRA_PIN_DISABLE>; + nvidia,open-drain = <TEGRA_PIN_ENABLE>; + }; + + /* I2C pinmux */ + gen1-i2c { + nvidia,pins = "gen1_i2c_scl_pc4", + "gen1_i2c_sda_pc5"; + nvidia,function = "i2c1"; + nvidia,pull = <TEGRA_PIN_PULL_NONE>; + nvidia,tristate = <TEGRA_PIN_DISABLE>; + nvidia,enable-input = <TEGRA_PIN_ENABLE>; + nvidia,open-drain = <TEGRA_PIN_ENABLE>; + }; + gen2-i2c { + nvidia,pins = "gen2_i2c_scl_pt5", + "gen2_i2c_sda_pt6"; + nvidia,function = "i2c2"; + nvidia,pull = <TEGRA_PIN_PULL_NONE>; + nvidia,tristate = <TEGRA_PIN_DISABLE>; + nvidia,enable-input = <TEGRA_PIN_ENABLE>; + nvidia,open-drain = <TEGRA_PIN_ENABLE>; + }; + cam-i2c { + nvidia,pins = "cam_i2c_scl_pbb1", + "cam_i2c_sda_pbb2"; + nvidia,function = "i2c3"; + nvidia,pull = <TEGRA_PIN_PULL_NONE>; + nvidia,tristate = <TEGRA_PIN_DISABLE>; + nvidia,enable-input = <TEGRA_PIN_ENABLE>; + nvidia,open-drain = <TEGRA_PIN_ENABLE>; + }; + ddc-scl-pv4 { + nvidia,pins = "ddc_scl_pv4", + "ddc_sda_pv5"; + nvidia,function = "i2c4"; + nvidia,pull = <TEGRA_PIN_PULL_NONE>; + nvidia,tristate = <TEGRA_PIN_DISABLE>; + nvidia,enable-input = <TEGRA_PIN_ENABLE>; + nvidia,rcv-sel = <TEGRA_PIN_DISABLE>; + }; + pwr-i2c { + nvidia,pins = "pwr_i2c_scl_pz6", + "pwr_i2c_sda_pz7"; + nvidia,function = "i2cpwr"; + nvidia,pull = <TEGRA_PIN_PULL_NONE>; + nvidia,tristate = <TEGRA_PIN_DISABLE>; + nvidia,enable-input = <TEGRA_PIN_ENABLE>; + nvidia,open-drain = <TEGRA_PIN_ENABLE>; + }; + + /* UARTA pinmux */ + uarta-out { + nvidia,pins = "pu0", "pu3"; + nvidia,function = "uarta"; + nvidia,pull = <TEGRA_PIN_PULL_NONE>; + nvidia,tristate = <TEGRA_PIN_DISABLE>; + nvidia,enable-input = <TEGRA_PIN_DISABLE>; + }; + uarta-in { + nvidia,pins = "pu1", "pu2"; + nvidia,function = "uarta"; + nvidia,pull = <TEGRA_PIN_PULL_NONE>; + nvidia,tristate = <TEGRA_PIN_DISABLE>; + nvidia,enable-input = <TEGRA_PIN_ENABLE>; + }; + + /* UARTB pinmux */ + uart2-txd-pc2 { + nvidia,pins = "uart2_txd_pc2"; + nvidia,function = "irda"; + nvidia,pull = <TEGRA_PIN_PULL_NONE>; + nvidia,tristate = <TEGRA_PIN_DISABLE>; + nvidia,enable-input = <TEGRA_PIN_DISABLE>; + }; + uart2-rxd-pc3 { + nvidia,pins = "uart2_rxd_pc3"; + nvidia,function = "irda"; + nvidia,pull = <TEGRA_PIN_PULL_NONE>; + nvidia,tristate = <TEGRA_PIN_DISABLE>; + nvidia,enable-input = <TEGRA_PIN_ENABLE>; + }; + uart2-cts-n-pj5 { + nvidia,pins = "uart2_cts_n_pj5", + "uart2_rts_n_pj6"; + nvidia,function = "rsvd3"; + nvidia,pull = <TEGRA_PIN_PULL_DOWN>; + nvidia,tristate = <TEGRA_PIN_ENABLE>; + nvidia,enable-input = <TEGRA_PIN_DISABLE>; + }; + + /* UARTC pinmux */ + uart3-cts-rxd { + nvidia,pins = "uart3_cts_n_pa1", + "uart3_rxd_pw7"; + nvidia,function = "uartc"; + nvidia,pull = <TEGRA_PIN_PULL_NONE>; + nvidia,tristate = <TEGRA_PIN_DISABLE>; + nvidia,enable-input = <TEGRA_PIN_ENABLE>; + }; + uart3-rts-txd { + nvidia,pins = "uart3_rts_n_pc0", + "uart3_txd_pw6"; + nvidia,function = "uartc"; + nvidia,pull = <TEGRA_PIN_PULL_NONE>; + nvidia,tristate = <TEGRA_PIN_DISABLE>; + nvidia,enable-input = <TEGRA_PIN_DISABLE>; + }; + + /* UARTD pinmux */ + uartd-out { + nvidia,pins = "ulpi_clk_py0", + "ulpi_stp_py3"; + nvidia,function = "uartd"; + nvidia,pull = <TEGRA_PIN_PULL_NONE>; + nvidia,tristate = <TEGRA_PIN_DISABLE>; + nvidia,enable-input = <TEGRA_PIN_DISABLE>; + }; + uartd-in { + nvidia,pins = "ulpi_dir_py1", + "ulpi_nxt_py2"; + nvidia,function = "uartd"; + nvidia,pull = <TEGRA_PIN_PULL_NONE>; + nvidia,tristate = <TEGRA_PIN_DISABLE>; + nvidia,enable-input = <TEGRA_PIN_ENABLE>; + }; + + /* GMI section */ + gmi-a17 { + nvidia,pins = "gmi_a17_pb0", + "gmi_a18_pb1", + "gmi_iordy_pi5", + "kb_col1_pq1", + "kb_row8_ps0", + "pbb6"; + nvidia,function = "rsvd2"; + nvidia,pull = <TEGRA_PIN_PULL_NONE>; + nvidia,tristate = <TEGRA_PIN_DISABLE>; + nvidia,enable-input = <TEGRA_PIN_ENABLE>; + }; + gmi-wp-n { + nvidia,pins = "gmi_wp_n_pc7", + "gmi_cs0_n_pj0", + "gpio_x7_aud_px7"; + nvidia,function = "rsvd1"; + nvidia,pull = <TEGRA_PIN_PULL_UP>; + nvidia,tristate = <TEGRA_PIN_DISABLE>; + nvidia,enable-input = <TEGRA_PIN_ENABLE>; + }; + gmi-ad0 { + nvidia,pins = "gmi_ad0_pg0", + "gmi_ad1_pg1", + "gmi_ad2_pg2", + "gmi_ad3_pg3", + "gmi_ad4_pg4", + "gmi_ad5_pg5", + "gmi_ad6_pg6", + "gmi_ad7_pg7", + "gmi_oe_n_pi1", + "pv1"; + nvidia,function = "rsvd1"; + nvidia,pull = <TEGRA_PIN_PULL_NONE>; + nvidia,tristate = <TEGRA_PIN_DISABLE>; + nvidia,enable-input = <TEGRA_PIN_ENABLE>; + }; + gmi-ad8 { + nvidia,pins = "gmi_ad8_ph0"; + nvidia,function = "pwm0"; + nvidia,pull = <TEGRA_PIN_PULL_DOWN>; + nvidia,tristate = <TEGRA_PIN_DISABLE>; + nvidia,enable-input = <TEGRA_PIN_DISABLE>; + }; + gmi-ad9 { + nvidia,pins = "gmi_ad9_ph1", + "gmi_ad10_ph2", + "gmi_ad11_ph3", + "gmi_ad15_ph7", + "gmi_cs4_n_pk2"; + nvidia,function = "gmi"; + nvidia,pull = <TEGRA_PIN_PULL_DOWN>; + nvidia,tristate = <TEGRA_PIN_ENABLE>; + nvidia,enable-input = <TEGRA_PIN_DISABLE>; + }; + gmi-ad12 { + nvidia,pins = "gmi_ad12_ph4", + "gmi_ad13_ph5", + "gpio_x1_aud_px1", + "pcc1", + "clk3_req_pee1", + "clk1_req_pee2"; + nvidia,function = "rsvd4"; + nvidia,pull = <TEGRA_PIN_PULL_DOWN>; + nvidia,tristate = <TEGRA_PIN_ENABLE>; + nvidia,enable-input = <TEGRA_PIN_DISABLE>; + }; + gmi-ad14 { + nvidia,pins = "gmi_ad14_ph6", + "gmi_a16_pj7", + "gmi_a19_pk7"; + nvidia,function = "gmi"; + nvidia,pull = <TEGRA_PIN_PULL_NONE>; + nvidia,tristate = <TEGRA_PIN_DISABLE>; + nvidia,enable-input = <TEGRA_PIN_ENABLE>; + }; + gmi-wr-n { + nvidia,pins = "gmi_wr_n_pi0"; + nvidia,function = "spi4"; + nvidia,pull = <TEGRA_PIN_PULL_NONE>; + nvidia,tristate = <TEGRA_PIN_DISABLE>; + nvidia,enable-input = <TEGRA_PIN_ENABLE>; + }; + gmi-cs6-n { + nvidia,pins = "gmi_cs6_n_pi3", + "gmi_cs7_n_pi6"; + nvidia,function = "nand"; + nvidia,pull = <TEGRA_PIN_PULL_NONE>; + nvidia,tristate = <TEGRA_PIN_DISABLE>; + nvidia,enable-input = <TEGRA_PIN_ENABLE>; + }; + gmi-rst-n { + nvidia,pins = "gmi_rst_n_pi4", + "spdif_out_pk5", + "spdif_in_pk6", + "clk2_out_pw5", + "dvfs_pwm_px0", + "dvfs_clk_px2", + "pbb7", + "pcc2", + "clk2_req_pcc5"; + nvidia,function = "rsvd4"; + nvidia,pull = <TEGRA_PIN_PULL_NONE>; + nvidia,tristate = <TEGRA_PIN_DISABLE>; + nvidia,enable-input = <TEGRA_PIN_DISABLE>; + }; + gmi-wait { + nvidia,pins = "gmi_wait_pi7"; + nvidia,function = "nand"; + nvidia,pull = <TEGRA_PIN_PULL_DOWN>; + nvidia,tristate = <TEGRA_PIN_ENABLE>; + nvidia,enable-input = <TEGRA_PIN_DISABLE>; + }; + gmi-cs1-n { + nvidia,pins = "gmi_cs1_n_pj2"; + nvidia,function = "soc"; + nvidia,pull = <TEGRA_PIN_PULL_NONE>; + nvidia,tristate = <TEGRA_PIN_DISABLE>; + nvidia,enable-input = <TEGRA_PIN_ENABLE>; + }; + gmi-dqs-p { + nvidia,pins = "gmi_dqs_p_pj3"; + nvidia,function = "sdmmc2"; + nvidia,pull = <TEGRA_PIN_PULL_NONE>; + nvidia,tristate = <TEGRA_PIN_ENABLE>; + nvidia,enable-input = <TEGRA_PIN_ENABLE>; + }; + gmi-adv-n { + nvidia,pins = "gmi_adv_n_pk0"; + nvidia,function = "rsvd1"; + nvidia,pull = <TEGRA_PIN_PULL_NONE>; + nvidia,tristate = <TEGRA_PIN_DISABLE>; + nvidia,enable-input = <TEGRA_PIN_DISABLE>; + }; + gmi-clk { + nvidia,pins = "gmi_clk_pk1", + "gmi_cs2_n_pk3", + "gmi_cs3_n_pk4"; + nvidia,function = "gmi"; + nvidia,pull = <TEGRA_PIN_PULL_NONE>; + nvidia,tristate = <TEGRA_PIN_DISABLE>; + nvidia,enable-input = <TEGRA_PIN_DISABLE>; + }; + + jtag-rtck { + nvidia,pins = "jtag_rtck"; + nvidia,function = "rtck"; + nvidia,pull = <TEGRA_PIN_PULL_NONE>; + nvidia,tristate = <TEGRA_PIN_DISABLE>; + nvidia,enable-input = <TEGRA_PIN_DISABLE>; + }; + + /* KBC pinmux */ + kb-col0 { + nvidia,pins = "kb_col0_pq0", + "kb_col3_pq3", + "kb_col4_pq4", + "kb_row4_pr4"; + nvidia,function = "kbc"; + nvidia,pull = <TEGRA_PIN_PULL_NONE>; + nvidia,tristate = <TEGRA_PIN_DISABLE>; + nvidia,enable-input = <TEGRA_PIN_ENABLE>; + }; + kb-col2 { + nvidia,pins = "kb_col2_pq2", + "kb_col6_pq6", + "kb_col7_pq7", + "kb_row0_pr0", + "kb_row2_pr2", + "pv0", + "sys_clk_req_pz5"; + nvidia,function = "rsvd4"; + nvidia,pull = <TEGRA_PIN_PULL_NONE>; + nvidia,tristate = <TEGRA_PIN_DISABLE>; + nvidia,enable-input = <TEGRA_PIN_ENABLE>; + }; + kb-col5 { + nvidia,pins = "kb_col5_pq5", + "kb_row5_pr5"; + nvidia,function = "kbc"; + nvidia,pull = <TEGRA_PIN_PULL_UP>; + nvidia,tristate = <TEGRA_PIN_DISABLE>; + nvidia,enable-input = <TEGRA_PIN_ENABLE>; + }; + kb-row1 { + nvidia,pins = "kb_row1_pr1"; + nvidia,function = "kbc"; + nvidia,pull = <TEGRA_PIN_PULL_NONE>; + nvidia,tristate = <TEGRA_PIN_ENABLE>; + nvidia,enable-input = <TEGRA_PIN_ENABLE>; + }; + kb-row3 { + nvidia,pins = "kb_row3_pr3", + "kb_row9_ps1"; + nvidia,function = "rsvd3"; + nvidia,pull = <TEGRA_PIN_PULL_NONE>; + nvidia,tristate = <TEGRA_PIN_DISABLE>; + nvidia,enable-input = <TEGRA_PIN_DISABLE>; + }; + kb-row6 { + nvidia,pins = "kb_row6_pr6"; + nvidia,function = "kbc"; + nvidia,pull = <TEGRA_PIN_PULL_NONE>; + nvidia,tristate = <TEGRA_PIN_DISABLE>; + nvidia,enable-input = <TEGRA_PIN_DISABLE>; + }; + kb-row7 { + nvidia,pins = "kb_row7_pr7", + "pbb3", + "pbb4", + "pbb5"; + nvidia,function = "rsvd2"; + nvidia,pull = <TEGRA_PIN_PULL_NONE>; + nvidia,tristate = <TEGRA_PIN_DISABLE>; + nvidia,enable-input = <TEGRA_PIN_DISABLE>; + }; + kb-row10 { + nvidia,pins = "kb_row10_ps2"; + nvidia,function = "rsvd3"; + nvidia,pull = <TEGRA_PIN_PULL_NONE>; + nvidia,tristate = <TEGRA_PIN_DISABLE>; + nvidia,enable-input = <TEGRA_PIN_ENABLE>; + }; + + /* CORE pinmux */ + clk-32k-out { + nvidia,pins = "clk_32k_out_pa0"; + nvidia,function = "blink"; + nvidia,pull = <TEGRA_PIN_PULL_NONE>; + nvidia,tristate = <TEGRA_PIN_DISABLE>; + nvidia,enable-input = <TEGRA_PIN_DISABLE>; + }; + clk-32k-in { + nvidia,pins = "clk_32k_in"; + nvidia,function = "clk"; + nvidia,pull = <TEGRA_PIN_PULL_NONE>; + nvidia,tristate = <TEGRA_PIN_DISABLE>; + nvidia,enable-input = <TEGRA_PIN_ENABLE>; + }; + core-pwr-req { + nvidia,pins = "core_pwr_req"; + nvidia,function = "pwron"; + nvidia,pull = <TEGRA_PIN_PULL_NONE>; + nvidia,tristate = <TEGRA_PIN_DISABLE>; + nvidia,enable-input = <TEGRA_PIN_DISABLE>; + }; + cpu-pwr-req { + nvidia,pins = "cpu_pwr_req"; + nvidia,function = "cpu"; + nvidia,pull = <TEGRA_PIN_PULL_NONE>; + nvidia,tristate = <TEGRA_PIN_DISABLE>; + nvidia,enable-input = <TEGRA_PIN_DISABLE>; + }; + pwr-int-n { + nvidia,pins = "pwr_int_n"; + nvidia,function = "pmi"; + nvidia,pull = <TEGRA_PIN_PULL_NONE>; + nvidia,tristate = <TEGRA_PIN_DISABLE>; + nvidia,enable-input = <TEGRA_PIN_ENABLE>; + }; + owr { + nvidia,pins = "owr"; + nvidia,function = "rsvd4"; + nvidia,pull = <TEGRA_PIN_PULL_DOWN>; + nvidia,tristate = <TEGRA_PIN_ENABLE>; + nvidia,enable-input = <TEGRA_PIN_DISABLE>; + nvidia,rcv-sel = <TEGRA_PIN_DISABLE>; + }; + reset-out-n { + nvidia,pins = "reset_out_n"; + nvidia,function = "reset_out_n"; + nvidia,pull = <TEGRA_PIN_PULL_NONE>; + nvidia,tristate = <TEGRA_PIN_DISABLE>; + nvidia,enable-input = <TEGRA_PIN_DISABLE>; + }; + + /* AUD pinmux */ + gpio-w2-aud { + nvidia,pins = "gpio_w2_aud_pw2"; + nvidia,function = "rsvd2"; + nvidia,pull = <TEGRA_PIN_PULL_UP>; + nvidia,tristate = <TEGRA_PIN_DISABLE>; + nvidia,enable-input = <TEGRA_PIN_ENABLE>; + }; + gpio-w3-aud { + nvidia,pins = "gpio_w3_aud_pw3"; + nvidia,function = "spi6"; + nvidia,pull = <TEGRA_PIN_PULL_UP>; + nvidia,tristate = <TEGRA_PIN_DISABLE>; + nvidia,enable-input = <TEGRA_PIN_ENABLE>; + }; + gpio-x3-aud { + nvidia,pins = "gpio_x3_aud_px3"; + nvidia,function = "rsvd4"; + nvidia,pull = <TEGRA_PIN_PULL_UP>; + nvidia,tristate = <TEGRA_PIN_DISABLE>; + nvidia,enable-input = <TEGRA_PIN_ENABLE>; + }; + gpio-x4-aud { + nvidia,pins = "gpio_x4_aud_px4"; + nvidia,function = "rsvd1"; + nvidia,pull = <TEGRA_PIN_PULL_DOWN>; + nvidia,tristate = <TEGRA_PIN_ENABLE>; + nvidia,enable-input = <TEGRA_PIN_DISABLE>; + }; + gpio-x5-aud { + nvidia,pins = "gpio_x5_aud_px5"; + nvidia,function = "rsvd1"; + nvidia,pull = <TEGRA_PIN_PULL_NONE>; + nvidia,tristate = <TEGRA_PIN_ENABLE>; + nvidia,enable-input = <TEGRA_PIN_ENABLE>; + }; + gpio-x6-aud { + nvidia,pins = "gpio_x6_aud_px6"; + nvidia,function = "spi6"; + nvidia,pull = <TEGRA_PIN_PULL_NONE>; + nvidia,tristate = <TEGRA_PIN_DISABLE>; + nvidia,enable-input = <TEGRA_PIN_DISABLE>; + }; + + pu4 { + nvidia,pins = "pu4"; + nvidia,function = "pwm1"; + nvidia,pull = <TEGRA_PIN_PULL_NONE>; + nvidia,tristate = <TEGRA_PIN_DISABLE>; + nvidia,enable-input = <TEGRA_PIN_DISABLE>; + }; + pu5 { + nvidia,pins = "pu5"; + nvidia,function = "pwm2"; + nvidia,pull = <TEGRA_PIN_PULL_NONE>; + nvidia,tristate = <TEGRA_PIN_DISABLE>; + nvidia,enable-input = <TEGRA_PIN_ENABLE>; + }; + pu6 { + nvidia,pins = "pu6"; + nvidia,function = "pwm3"; + nvidia,pull = <TEGRA_PIN_PULL_NONE>; + nvidia,tristate = <TEGRA_PIN_DISABLE>; + nvidia,enable-input = <TEGRA_PIN_ENABLE>; + }; + pbb0 { + nvidia,pins = "pbb0", + "cam_mclk_pcc0"; + nvidia,function = "vi_alt1"; + nvidia,pull = <TEGRA_PIN_PULL_NONE>; + nvidia,tristate = <TEGRA_PIN_DISABLE>; + nvidia,enable-input = <TEGRA_PIN_DISABLE>; + }; + + clk1-out { + nvidia,pins = "clk1_out_pw4"; + nvidia,function = "extperiph1"; + nvidia,pull = <TEGRA_PIN_PULL_NONE>; + nvidia,tristate = <TEGRA_PIN_DISABLE>; + nvidia,enable-input = <TEGRA_PIN_ENABLE>; + }; + clk3-out { + nvidia,pins = "clk3_out_pee0"; + nvidia,function = "extperiph3"; + nvidia,pull = <TEGRA_PIN_PULL_NONE>; + nvidia,tristate = <TEGRA_PIN_DISABLE>; + nvidia,enable-input = <TEGRA_PIN_DISABLE>; + }; + + /* USB pinmux */ + usb-vbus-en0 { + nvidia,pins = "usb_vbus_en0_pn4"; + nvidia,function = "rsvd4"; + nvidia,pull = <TEGRA_PIN_PULL_NONE>; + nvidia,tristate = <TEGRA_PIN_DISABLE>; + nvidia,enable-input = <TEGRA_PIN_DISABLE>; + nvidia,open-drain = <TEGRA_PIN_ENABLE>; + }; + usb-vbus-en1 { + nvidia,pins = "usb_vbus_en1_pn5"; + nvidia,function = "rsvd4"; + nvidia,pull = <TEGRA_PIN_PULL_DOWN>; + nvidia,tristate = <TEGRA_PIN_ENABLE>; + nvidia,enable-input = <TEGRA_PIN_DISABLE>; + nvidia,open-drain = <TEGRA_PIN_ENABLE>; + }; + }; + }; + + uarta: serial@70006000 { + status = "okay"; + }; + + pwm: pwm@7000a000 { + status = "okay"; + }; + + pwr_i2c: i2c@7000d000 { + status = "okay"; + clock-frequency = <400000>; + + /* Texas Instruments TPS65090 PMIC */ + tps65090@48 { + compatible = "ti,tps65090"; + reg = <0x48>; + + regulators { + tps65090_fet1: fet1 { + regulator-name = "vcd_led"; + regulator-boot-on; + }; + + tps65090_fet4: fet4 { + regulator-name = "vdd_lcd"; + regulator-boot-on; + }; + + tps65090_fet6: fet6 { + regulator-name = "vdd_usd"; + regulator-boot-on; + }; + }; + }; + + /* Texas Instruments TPS65913 PMIC */ + pmic: tps65913@58 { + compatible = "ti,tps65913"; + reg = <0x58>; + + interrupts = <GIC_SPI 86 IRQ_TYPE_LEVEL_HIGH>; + #interrupt-cells = <2>; + interrupt-controller; + + ti,system-power-controller; + + pmic { + compatible = "ti,tps65913-pmic"; + + regulators { + vdd_1v8_vio: smps8 { + regulator-name = "vdd_1v8"; + regulator-min-microvolt = <1800000>; + regulator-max-microvolt = <1800000>; + regulator-always-on; + regulator-boot-on; + regulator-ramp-delay = <5000>; + }; + + avdd_dsi_csi: ldo3 { + regulator-name = "avdd_dsi_csi"; + regulator-min-microvolt = <1200000>; + regulator-max-microvolt = <1200000>; + regulator-boot-on; + }; + + vddio_usd: ldo9 { + regulator-name = "vddio_usd"; + regulator-min-microvolt = <2900000>; + regulator-max-microvolt = <2900000>; + regulator-always-on; + regulator-boot-on; + }; + }; + }; + }; + }; + + sdmmc3: sdhci@78000400 { + status = "okay"; + bus-width = <4>; + + cd-gpios = <&gpio TEGRA_GPIO(V, 2) GPIO_ACTIVE_LOW>; + + nvidia,default-tap = <0x3>; + nvidia,default-trim = <0x3>; + + vmmc-supply = <&tps65090_fet6>; + vqmmc-supply = <&vddio_usd>; + }; + + sdmmc4: sdhci@78000600 { + status = "okay"; + bus-width = <8>; + non-removable; + }; + + usb1: usb@7d000000 { + status = "okay"; + dr_mode = "otg"; + nvidia,vbus-gpio = <&gpio TEGRA_GPIO(K, 1) GPIO_ACTIVE_HIGH>; + }; + + usb-phy@7d000000 { + status = "okay"; + + nvidia,xcvr-setup = <7>; + nvidia,xcvr-lsfslew = <2>; + nvidia,xcvr-lsrslew = <2>; + }; + + backlight: backlight { + compatible = "pwm-backlight"; + + power-supply = <&tps65090_fet1>; + pwms = <&pwm 0 1000000>; + + brightness-levels = <1 35 70 105 140 175 210 255>; + default-brightness-level = <5>; + }; + + /* PMIC has a built-in 32KHz oscillator which is used by PMC */ + clk32k_in: clock-32k { + compatible = "fixed-clock"; + #clock-cells = <0>; + clock-frequency = <32768>; + clock-output-names = "pmic-oscillator"; + }; + + extcon-keys { + compatible = "gpio-keys"; + + switch-hall-sensor { + label = "Hall Sensor"; + gpios = <&gpio TEGRA_GPIO(R, 4) GPIO_ACTIVE_HIGH>; + linux,code = <SW_LID>; + }; + }; + + gpio-keys { + compatible = "gpio-keys"; + + key-power { + label = "Power Button"; + gpios = <&gpio TEGRA_GPIO(V, 0) GPIO_ACTIVE_HIGH>; + linux,code = <KEY_ENTER>; + }; + + key-volume-down { + label = "Volume Down"; + gpios = <&gpio TEGRA_GPIO(R, 1) GPIO_ACTIVE_LOW>; + linux,code = <KEY_DOWN>; + }; + + key-volume-up { + label = "Volume Up"; + gpios = <&gpio TEGRA_GPIO(R, 2) GPIO_ACTIVE_LOW>; + linux,code = <KEY_UP>; + }; + + key-windows { + label = "Windows Button"; + gpios = <&gpio TEGRA_GPIO(I, 5) GPIO_ACTIVE_HIGH>; + linux,code = <KEY_ENTER>; + }; + }; +}; diff --git a/arch/arm/dts/tegra20-asus-sl101.dts b/arch/arm/dts/tegra20-asus-sl101.dts index b4709c3e9a4..9f78b0febf3 100644 --- a/arch/arm/dts/tegra20-asus-sl101.dts +++ b/arch/arm/dts/tegra20-asus-sl101.dts @@ -6,4 +6,14 @@ / { model = "ASUS EeePad Slider SL101"; compatible = "asus,sl101", "nvidia,tegra20"; + + extcon-keys { + compatible = "gpio-keys"; + + switch-tablet-mode { + label = "Tablet Mode"; + gpios = <&gpio TEGRA_GPIO(S, 4) GPIO_ACTIVE_LOW>; + linux,code = <SW_TABLET_MODE>; + }; + }; }; diff --git a/arch/arm/dts/tegra20-asus-tf101.dts b/arch/arm/dts/tegra20-asus-tf101.dts index 7c734fb5b19..03ba78c5dc2 100644 --- a/arch/arm/dts/tegra20-asus-tf101.dts +++ b/arch/arm/dts/tegra20-asus-tf101.dts @@ -6,4 +6,14 @@ / { model = "ASUS EeePad Transformer TF101"; compatible = "asus,tf101", "nvidia,tegra20"; + + extcon-keys { + compatible = "gpio-keys"; + + switch-dock-hall-sensor { + label = "Lid sensor"; + gpios = <&gpio TEGRA_GPIO(S, 4) GPIO_ACTIVE_LOW>; + linux,code = <SW_LID>; + }; + }; }; diff --git a/arch/arm/dts/tegra20-asus-tf101g.dts b/arch/arm/dts/tegra20-asus-tf101g.dts index f49a358a267..44d5fdfc2b5 100644 --- a/arch/arm/dts/tegra20-asus-tf101g.dts +++ b/arch/arm/dts/tegra20-asus-tf101g.dts @@ -6,4 +6,14 @@ / { model = "ASUS EeePad Transformer TF101G"; compatible = "asus,tf101g", "nvidia,tegra20"; + + extcon-keys { + compatible = "gpio-keys"; + + switch-dock-hall-sensor { + label = "Lid sensor"; + gpios = <&gpio TEGRA_GPIO(S, 4) GPIO_ACTIVE_LOW>; + linux,code = <SW_LID>; + }; + }; }; diff --git a/arch/arm/dts/tegra20-asus-transformer.dtsi b/arch/arm/dts/tegra20-asus-transformer.dtsi index 61b1cea6e90..df078a6fcdc 100644 --- a/arch/arm/dts/tegra20-asus-transformer.dtsi +++ b/arch/arm/dts/tegra20-asus-transformer.dtsi @@ -497,12 +497,6 @@ gpios = <&gpio TEGRA_GPIO(Q, 5) GPIO_ACTIVE_LOW>; linux,code = <KEY_UP>; }; - - switch-dock-hall-sensor { - label = "Lid sensor"; - gpios = <&gpio TEGRA_GPIO(S, 4) GPIO_ACTIVE_LOW>; - linux,code = <SW_LID>; - }; }; panel: panel { diff --git a/arch/arm/dts/tegra210-p3450-0000.dts b/arch/arm/dts/tegra210-p3450-0000.dts index 9ef744ac8b0..ddeeb232de2 100644 --- a/arch/arm/dts/tegra210-p3450-0000.dts +++ b/arch/arm/dts/tegra210-p3450-0000.dts @@ -124,7 +124,14 @@ spi@70410000 { status = "okay"; - spi-max-frequency = <80000000>; + + flash@0 { + compatible = "jedec,spi-nor"; + reg = <0>; + spi-max-frequency = <104000000>; + spi-tx-bus-width = <2>; + spi-rx-bus-width = <2>; + }; }; usb@7d000000 { diff --git a/arch/arm/dts/tegra210.dtsi b/arch/arm/dts/tegra210.dtsi index 28ecd2b467a..92eb4f67bf5 100644 --- a/arch/arm/dts/tegra210.dtsi +++ b/arch/arm/dts/tegra210.dtsi @@ -762,10 +762,10 @@ interrupts = <GIC_SPI 10 IRQ_TYPE_LEVEL_HIGH>; #address-cells = <1>; #size-cells = <0>; - clocks = <&tegra_car TEGRA210_CLK_QSPI>; - clock-names = "qspi"; + clocks = <&tegra_car TEGRA210_CLK_QSPI>, + <&tegra_car TEGRA210_CLK_QSPI_PM>; + clock-names = "qspi", "qspi_out"; resets = <&tegra_car 211>; - reset-names = "qspi"; dmas = <&apbdma 5>, <&apbdma 5>; dma-names = "rx", "tx"; status = "disabled"; diff --git a/arch/arm/dts/zynqmp-sck-kr-g-revB.dtso b/arch/arm/dts/zynqmp-sck-kr-g-revB.dtso index 0d915d496ca..60ac5085f73 100644 --- a/arch/arm/dts/zynqmp-sck-kr-g-revB.dtso +++ b/arch/arm/dts/zynqmp-sck-kr-g-revB.dtso @@ -20,6 +20,11 @@ "xlnx,zynqmp-sk-kr260", "xlnx,zynqmp"; model = "ZynqMP KR260 revB"; + aliases { + ethernet0 = "/axi/ethernet@ff0b0000"; /* &gem0 */ + ethernet1 = "/axi/ethernet@ff0c0000"; /* &gem1 */ + }; + ina260-u14 { compatible = "iio-hwmon"; io-channels = <&u14 0>, <&u14 1>, <&u14 2>; diff --git a/arch/arm/lib/bootm.c b/arch/arm/lib/bootm.c index 7eb764e1f4e..ca4cec61f22 100644 --- a/arch/arm/lib/bootm.c +++ b/arch/arm/lib/bootm.c @@ -183,7 +183,7 @@ __weak void setup_board_tags(struct tag **in_params) {} static void do_nonsec_virt_switch(void) { smp_kick_all_cpus(); - dcache_disable(); /* flush cache before swtiching to EL2 */ + dcache_disable(); /* flush cache before switching to EL2 */ } #endif diff --git a/arch/arm/mach-exynos/Kconfig b/arch/arm/mach-exynos/Kconfig index 28193039cb8..2cd67d02386 100644 --- a/arch/arm/mach-exynos/Kconfig +++ b/arch/arm/mach-exynos/Kconfig @@ -88,7 +88,7 @@ config TARGET_S5PC210_UNIVERSAL select MISC_COMMON config TARGET_ORIGEN - bool "Exynos4412 Origen board" + bool "Exynos4210 Origen board" select EXYNOS4210 select SUPPORT_SPL diff --git a/arch/arm/mach-exynos/pinmux.c b/arch/arm/mach-exynos/pinmux.c index 48c325190d5..ed46ea03355 100644 --- a/arch/arm/mach-exynos/pinmux.c +++ b/arch/arm/mach-exynos/pinmux.c @@ -32,7 +32,7 @@ static void exynos5_uart_config(int peripheral) count = 2; break; default: - debug("%s: invalid peripheral %d", __func__, peripheral); + debug("%s: invalid peripheral %d\n", __func__, peripheral); return; } for (i = start; i < start + count; i++) { @@ -63,7 +63,7 @@ static void exynos5420_uart_config(int peripheral) count = 2; break; default: - debug("%s: invalid peripheral %d", __func__, peripheral); + debug("%s: invalid peripheral %d\n", __func__, peripheral); return; } @@ -97,12 +97,12 @@ static int exynos5_mmc_config(int peripheral, int flags) start_ext = 0; break; default: - debug("%s: invalid peripheral %d", __func__, peripheral); + debug("%s: invalid peripheral %d\n", __func__, peripheral); return -1; } if ((flags & PINMUX_FLAG_8BIT_MODE) && !start_ext) { - debug("SDMMC device %d does not support 8bit mode", - peripheral); + debug("SDMMC device %d does not support 8bit mode\n", + peripheral); return -1; } if (flags & PINMUX_FLAG_8BIT_MODE) { @@ -145,12 +145,12 @@ static int exynos5420_mmc_config(int peripheral, int flags) break; default: start = 0; - debug("%s: invalid peripheral %d", __func__, peripheral); + debug("%s: invalid peripheral %d\n", __func__, peripheral); return -1; } if ((flags & PINMUX_FLAG_8BIT_MODE) && !start_ext) { - debug("SDMMC device %d does not support 8bit mode", + debug("SDMMC device %d does not support 8bit mode\n", peripheral); return -1; } @@ -453,7 +453,7 @@ void exynos5420_spi_config(int peripheral) default: cfg = 0; pin = 0; - debug("%s: invalid peripheral %d", __func__, peripheral); + debug("%s: invalid peripheral %d\n", __func__, peripheral); return; } @@ -522,7 +522,7 @@ static int exynos5_pinmux_config(int peripheral, int flags) gpio_cfg_pin(EXYNOS5_GPIO_B20, S5P_GPIO_FUNC(2)); break; default: - debug("%s: invalid peripheral %d", __func__, peripheral); + debug("%s: invalid peripheral %d\n", __func__, peripheral); return -1; } @@ -570,7 +570,7 @@ static int exynos5420_pinmux_config(int peripheral, int flags) gpio_cfg_pin(EXYNOS5420_GPIO_B20, S5P_GPIO_FUNC(2)); break; default: - debug("%s: invalid peripheral %d", __func__, peripheral); + debug("%s: invalid peripheral %d\n", __func__, peripheral); return -1; } @@ -683,7 +683,7 @@ static void exynos4_uart_config(int peripheral) count = 2; break; default: - debug("%s: invalid peripheral %d", __func__, peripheral); + debug("%s: invalid peripheral %d\n", __func__, peripheral); return; } for (i = start; i < (start + count); i++) { @@ -797,7 +797,7 @@ static void exynos4x12_uart_config(int peripheral) count = 2; break; default: - debug("%s: invalid peripheral %d", __func__, peripheral); + debug("%s: invalid peripheral %d\n", __func__, peripheral); return; } for (i = start; i < (start + count); i++) { @@ -834,7 +834,7 @@ static int exynos4_pinmux_config(int peripheral, int flags) debug("SDMMC device %d not implemented\n", peripheral); return -1; default: - debug("%s: invalid peripheral %d", __func__, peripheral); + debug("%s: invalid peripheral %d\n", __func__, peripheral); return -1; } @@ -869,7 +869,7 @@ static int exynos4x12_pinmux_config(int peripheral, int flags) debug("SDMMC device %d not implemented\n", peripheral); return -1; default: - debug("%s: invalid peripheral %d", __func__, peripheral); + debug("%s: invalid peripheral %d\n", __func__, peripheral); return -1; } @@ -902,7 +902,7 @@ static int exynos4_pinmux_decode_periph_id(const void *blob, int node) u32 cell[3]; err = fdtdec_get_int_array(blob, node, "interrupts", cell, - ARRAY_SIZE(cell)); + ARRAY_SIZE(cell)); if (err) { debug(" invalid peripheral id\n"); return PERIPH_ID_NONE; @@ -917,7 +917,7 @@ static int exynos5_pinmux_decode_periph_id(const void *blob, int node) u32 cell[3]; err = fdtdec_get_int_array(blob, node, "interrupts", cell, - ARRAY_SIZE(cell)); + ARRAY_SIZE(cell)); if (err) return PERIPH_ID_NONE; diff --git a/arch/arm/mach-imx/imx9/scmi/soc.c b/arch/arm/mach-imx/imx9/scmi/soc.c index 13f13ca7d10..f973652d0cb 100644 --- a/arch/arm/mach-imx/imx9/scmi/soc.c +++ b/arch/arm/mach-imx/imx9/scmi/soc.c @@ -635,7 +635,8 @@ enum env_location env_get_location(enum env_operation op, int prio) switch (dev) { case QSPI_BOOT: - env_loc = ENVL_SPI_FLASH; + if (IS_ENABLED(CONFIG_ENV_IS_IN_SPI_FLASH)) + env_loc = ENVL_SPI_FLASH; break; case SD1_BOOT: case SD2_BOOT: @@ -643,10 +644,16 @@ enum env_location env_get_location(enum env_operation op, int prio) case MMC1_BOOT: case MMC2_BOOT: case MMC3_BOOT: - env_loc = ENVL_MMC; + if (IS_ENABLED(CONFIG_ENV_IS_IN_MMC)) + env_loc = ENVL_MMC; break; default: - env_loc = ENVL_NOWHERE; + if (IS_ENABLED(CONFIG_ENV_IS_NOWHERE)) + env_loc = ENVL_NOWHERE; + else if (IS_ENABLED(CONFIG_ENV_IS_IN_SPI_FLASH)) + env_loc = ENVL_SPI_FLASH; + else if (IS_ENABLED(CONFIG_ENV_IS_IN_MMC)) + env_loc = ENVL_MMC; break; } diff --git a/arch/arm/mach-imx/imx9/soc.c b/arch/arm/mach-imx/imx9/soc.c index 9fb82644f12..3f7dafdcce5 100644 --- a/arch/arm/mach-imx/imx9/soc.c +++ b/arch/arm/mach-imx/imx9/soc.c @@ -809,7 +809,13 @@ enum env_location env_get_location(enum env_operation op, int prio) return ENVL_FAT; return ENVL_NOWHERE; default: - return ENVL_NOWHERE; + if (IS_ENABLED(CONFIG_ENV_IS_NOWHERE)) + return ENVL_NOWHERE; + else if (IS_ENABLED(CONFIG_ENV_IS_IN_SPI_FLASH)) + return ENVL_SPI_FLASH; + else if (IS_ENABLED(CONFIG_ENV_IS_IN_MMC)) + return ENVL_MMC; + return ENVL_UNKNOWN; } } diff --git a/arch/arm/mach-rockchip/px30/px30.c b/arch/arm/mach-rockchip/px30/px30.c index 8ce9ac561f0..5a5c119328f 100644 --- a/arch/arm/mach-rockchip/px30/px30.c +++ b/arch/arm/mach-rockchip/px30/px30.c @@ -2,10 +2,14 @@ /* * Copyright (c) 2017 Rockchip Electronics Co., Ltd */ + +#define LOG_CATEGORY LOGC_ARCH + #include <clk.h> #include <dm.h> #include <fdt_support.h> #include <init.h> +#include <misc.h> #include <spl.h> #include <asm/armv8/mmu.h> #include <asm/arch-rockchip/bootrom.h> @@ -15,6 +19,7 @@ #include <asm/arch-rockchip/clock.h> #include <asm/arch-rockchip/cru_px30.h> #include <dt-bindings/clock/px30-cru.h> +#include <linux/bitfield.h> const char * const boot_devices[BROM_LAST_BOOTSOURCE + 1] = { [BROM_BOOTSOURCE_EMMC] = "/mmc@ff390000", @@ -442,3 +447,59 @@ void board_debug_uart_init(void) #endif /* CONFIG_DEBUG_UART_BASE && CONFIG_DEBUG_UART_BASE == ... */ } #endif /* CONFIG_DEBUG_UART_BOARD_INIT */ + +#define PX30_OTP_SPECIFICATION_OFFSET 0x06 + +#define DDR_GRF_BASE_ADDR 0xff630000 +#define DDR_GRF_CON(n) (0 + (n) * 4) + +int checkboard(void) +{ + struct udevice *dev; + u8 specification; + u32 base_soc; + int ret; + + if (!IS_ENABLED(CONFIG_ROCKCHIP_OTP) || !CONFIG_IS_ENABLED(MISC)) + return 0; + + ret = uclass_get_device_by_driver(UCLASS_MISC, + DM_DRIVER_GET(rockchip_otp), &dev); + if (ret) { + log_debug("Could not find otp device, ret=%d\n", ret); + return 0; + } + + /* base SoC: 0x26334b52 for RK3326; 0x30335850 for PX30 */ + ret = misc_read(dev, 0, &base_soc, 4); + if (ret < 0) { + log_debug("Could not read specification, ret=%d\n", ret); + return 0; + } + + if (base_soc != 0x26334b52 && base_soc != 0x30335850) { + log_debug("Could not identify SoC, got 0x%04x in OTP\n", base_soc); + return 0; + } + + /* SoC variant: 0x21 for PX30/PX30S/RK3326/RK3326S; 0x2b for PX30K */ + ret = misc_read(dev, PX30_OTP_SPECIFICATION_OFFSET, &specification, 1); + if (ret < 0) { + log_debug("Could not read specification, ret=%d\n", ret); + return 0; + } + + if (specification == 0x2b) { + printf("SoC: PX30K\n"); + return 0; + } + + /* From vendor kernel: drivers/soc/rockchip/rockchip-cpuinfo.c */ + specification = FIELD_GET(GENMASK(15, 14), + readl(DDR_GRF_BASE_ADDR + DDR_GRF_CON(1))); + log_debug("DDR specification is %d\n", specification); + printf("SoC: %s%s\n", base_soc == 0x26334b52 ? "RK3326" : "PX30", + specification == 0x3 ? "S" : ""); + + return 0; +} diff --git a/arch/arm/mach-rockchip/rk3528/rk3528.c b/arch/arm/mach-rockchip/rk3528/rk3528.c index 4892ff6ba9d..f9bfc445b85 100644 --- a/arch/arm/mach-rockchip/rk3528/rk3528.c +++ b/arch/arm/mach-rockchip/rk3528/rk3528.c @@ -9,6 +9,9 @@ #include <asm/arch-rockchip/bootrom.h> #include <asm/arch-rockchip/hardware.h> +#define VPU_GRF_BASE 0xff340000 +#define USB3OTG_CON1 0x44 + #define FIREWALL_DDR_BASE 0xff2e0000 #define FW_DDR_MST6_REG 0x58 #define FW_DDR_MST7_REG 0x5c @@ -69,6 +72,9 @@ int arch_cpu_init(void) val = readl(FIREWALL_DDR_BASE + FW_DDR_MST16_REG); writel(val & 0xffff0000, FIREWALL_DDR_BASE + FW_DDR_MST16_REG); + /* Disable USB3OTG U3 port, later enabled in COMBPHY driver */ + writel(0xffff0181, VPU_GRF_BASE + USB3OTG_CON1); + return 0; } diff --git a/arch/arm/mach-rockchip/rk3576/MAINTAINERS b/arch/arm/mach-rockchip/rk3576/MAINTAINERS new file mode 100644 index 00000000000..94ef74d429f --- /dev/null +++ b/arch/arm/mach-rockchip/rk3576/MAINTAINERS @@ -0,0 +1,11 @@ +GENERIC-RK3576 +M: Jonas Karlman <jonas@kwiboo.se> +S: Maintained +F: arch/arm/dts/rk3576-generic* +F: configs/generic-rk3576_defconfig + +SIGE5-RK3576 +M: Jonas Karlman <jonas@kwiboo.se> +S: Maintained +F: arch/arm/dts/rk3576-armsom-sige5* +F: configs/sige5-rk3576_defconfig diff --git a/arch/arm/mach-rockchip/rk3576/rk3576.c b/arch/arm/mach-rockchip/rk3576/rk3576.c index ba5c94b4b3d..a6c2fbdc484 100644 --- a/arch/arm/mach-rockchip/rk3576/rk3576.c +++ b/arch/arm/mach-rockchip/rk3576/rk3576.c @@ -3,6 +3,10 @@ * Copyright (c) 2024 Rockchip Electronics Co., Ltd */ +#define LOG_CATEGORY LOGC_ARCH + +#include <dm.h> +#include <misc.h> #include <asm/armv8/mmu.h> #include <asm/arch-rockchip/bootrom.h> #include <asm/arch-rockchip/hardware.h> @@ -29,6 +33,9 @@ #define SGRF_DOMAIN_CON4 0x10 #define SGRF_DOMAIN_CON5 0x14 +#define USB_GRF_BASE 0x2601E000 +#define USB3OTG0_CON1 0x0030 + const char * const boot_devices[BROM_LAST_BOOTSOURCE + 1] = { [BROM_BOOTSOURCE_EMMC] = "/soc/mmc@2a330000", [BROM_BOOTSOURCE_SD] = "/soc/mmc@2a310000", @@ -151,5 +158,52 @@ int arch_cpu_init(void) */ writel(0xffffff00, SYS_SGRF_BASE + SYS_SGRF_SOC_CON20); + /* Disable USB3OTG0 U3 port, later enabled by USBDP PHY driver */ + writel(0xffff0188, USB_GRF_BASE + USB3OTG0_CON1); + + return 0; +} + +#define RK3576_OTP_CPU_CODE_OFFSET 0x02 +#define RK3576_OTP_SPECIFICATION_OFFSET 0x08 + +int checkboard(void) +{ + u8 cpu_code[2], specification; + struct udevice *dev; + char suffix[2]; + int ret; + + if (!IS_ENABLED(CONFIG_ROCKCHIP_OTP) || !CONFIG_IS_ENABLED(MISC)) + return 0; + + ret = uclass_get_device_by_driver(UCLASS_MISC, + DM_DRIVER_GET(rockchip_otp), &dev); + if (ret) { + log_debug("Could not find otp device, ret=%d\n", ret); + return 0; + } + + /* cpu-code: SoC model, e.g. 0x35 0x76 */ + ret = misc_read(dev, RK3576_OTP_CPU_CODE_OFFSET, cpu_code, 2); + if (ret < 0) { + log_debug("Could not read cpu-code, ret=%d\n", ret); + return 0; + } + + /* specification: SoC variant, e.g. 0xA for RK3576J */ + ret = misc_read(dev, RK3576_OTP_SPECIFICATION_OFFSET, &specification, 1); + if (ret < 0) { + log_debug("Could not read specification, ret=%d\n", ret); + return 0; + } + specification &= 0x1f; + + /* for RK3576J i.e. '@' + 0xA = 'J' */ + suffix[0] = specification > 1 ? '@' + specification : '\0'; + suffix[1] = '\0'; + + printf("SoC: RK%02x%02x%s\n", cpu_code[0], cpu_code[1], suffix); + return 0; } diff --git a/arch/arm/mach-rockchip/rk3588/Kconfig b/arch/arm/mach-rockchip/rk3588/Kconfig index 4e7942ada87..9fbe3f225aa 100644 --- a/arch/arm/mach-rockchip/rk3588/Kconfig +++ b/arch/arm/mach-rockchip/rk3588/Kconfig @@ -27,6 +27,23 @@ config TARGET_CM3588_NAS_RK3588 - 3.5mm Headphone out, 2.0mm PH-2A Mic in - 5V Fan connector, PWM beeper, IR receiver, RTC battery connector +config TARGET_GAMEFORCE_ACE_RK3588S + bool "GameForce Ace" + help + The GameForce Ace is a handheld game console from GameForce with + the Rockchip RK3588S SoC. + + Hardware features: + - Rockchip RK3588S SoC + - 12GB LPDDR4x RAM + - 128GB eMMC + - MicroSD card slot + - 1x USB 3.0 Type-C with DP AltMode support + - 1x HDMI 2.1 micro-HDMI out + - 1920x1080 touchscreen MIPI-DSI panel + - Analog joysticks and L/R triggers + - 16 digital buttons + config TARGET_GENBOOK_CM5_RK3588 bool "Cool Pi CM5 GenBook" help @@ -410,6 +427,7 @@ source "board/friendlyelec/cm3588-nas-rk3588/Kconfig" source "board/friendlyelec/nanopc-t6-rk3588/Kconfig" source "board/friendlyelec/nanopi-r6c-rk3588s/Kconfig" source "board/friendlyelec/nanopi-r6s-rk3588s/Kconfig" +source "board/gameforce/ace-rk3588s/Kconfig" source "board/hardkernel/odroid_m2/Kconfig" source "board/indiedroid/nova/Kconfig" source "board/khadas/khadas-edge2-rk3588s/Kconfig" diff --git a/arch/arm/mach-rockchip/rk3588/rk3588.c b/arch/arm/mach-rockchip/rk3588/rk3588.c index e2278ff792b..c01a4002089 100644 --- a/arch/arm/mach-rockchip/rk3588/rk3588.c +++ b/arch/arm/mach-rockchip/rk3588/rk3588.c @@ -15,6 +15,10 @@ #include <asm/arch-rockchip/hardware.h> #include <asm/arch-rockchip/ioc_rk3588.h> +#define USB_GRF_BASE 0xfd5ac000 +#define USB3OTG0_CON1 0x001c +#define USB3OTG1_CON1 0x0034 + #define FIREWALL_DDR_BASE 0xfe030000 #define FW_DDR_MST5_REG 0x54 #define FW_DDR_MST13_REG 0x74 @@ -184,6 +188,10 @@ int arch_cpu_init(void) /* Disable JTAG exposed on SDMMC */ rk_clrreg(&sys_grf->soc_con[6], SYS_GRF_FORCE_JTAG); #endif + + /* Disable USB3OTG U3 ports, later enabled by USBDP PHY driver */ + writel(0xffff0188, USB_GRF_BASE + USB3OTG0_CON1); + writel(0xffff0188, USB_GRF_BASE + USB3OTG1_CON1); #endif return 0; diff --git a/arch/arm/mach-socfpga/spl_agilex.c b/arch/arm/mach-socfpga/spl_agilex.c index 351848f16e6..48f258a37b4 100644 --- a/arch/arm/mach-socfpga/spl_agilex.c +++ b/arch/arm/mach-socfpga/spl_agilex.c @@ -24,7 +24,7 @@ DECLARE_GLOBAL_DATA_PTR; -u32 reset_flag(void) +u32 reset_flag(u32 flag) { /* Check rstmgr.stat for warm reset status */ u32 status = readl(SOCFPGA_RSTMGR_ADDRESS); diff --git a/arch/arm/mach-socfpga/spl_agilex5.c b/arch/arm/mach-socfpga/spl_agilex5.c index 2e3597e97eb..1be347360f5 100644 --- a/arch/arm/mach-socfpga/spl_agilex5.c +++ b/arch/arm/mach-socfpga/spl_agilex5.c @@ -21,7 +21,7 @@ DECLARE_GLOBAL_DATA_PTR; -u32 reset_flag(void) +u32 reset_flag(u32 flag) { /* Check rstmgr.stat for warm reset status */ u32 status = readl(SOCFPGA_RSTMGR_ADDRESS); diff --git a/arch/arm/mach-tegra/tegra114/Kconfig b/arch/arm/mach-tegra/tegra114/Kconfig index 98f1d0e71c1..43dd59fb113 100644 --- a/arch/arm/mach-tegra/tegra114/Kconfig +++ b/arch/arm/mach-tegra/tegra114/Kconfig @@ -8,6 +8,10 @@ config TARGET_DALMORE bool "NVIDIA Tegra114 Dalmore evaluation board" select BOARD_LATE_INIT +config TARGET_SURFACE_2 + bool "Microsoft Surface 2" + select BOARD_LATE_INIT + config TARGET_TEGRATAB bool "NVIDIA Tegra114 TegraTab evaluation board" select BOARD_LATE_INIT @@ -22,6 +26,7 @@ config SYS_SOC default "tegra114" source "board/nvidia/dalmore/Kconfig" +source "board/microsoft/surface-2/Kconfig" source "board/nvidia/tegratab/Kconfig" source "board/asus/transformer-t114/Kconfig" diff --git a/board/asus/transformer-t20/configs/sl101.config b/board/asus/transformer-t20/configs/sl101.config index 4f639e1b412..87c6f7a216d 100644 --- a/board/asus/transformer-t20/configs/sl101.config +++ b/board/asus/transformer-t20/configs/sl101.config @@ -1 +1,2 @@ +CONFIG_ENV_SOURCE_FILE="sl101" CONFIG_DEFAULT_DEVICE_TREE="tegra20-asus-sl101" diff --git a/board/asus/transformer-t20/sl101.env b/board/asus/transformer-t20/sl101.env new file mode 100644 index 00000000000..f2bf298a997 --- /dev/null +++ b/board/asus/transformer-t20/sl101.env @@ -0,0 +1,15 @@ +#include <env/nvidia/prod_upd.env> + +button_cmd_0_name=Volume Down +button_cmd_0=bootmenu +partitions=name=emmc,start=0,size=-,uuid=${uuid_gpt_rootfs} +boot_dev=1 + +bootmenu_0=mount internal storage=usb start && ums 0 mmc 0; bootmenu +bootmenu_1=mount external storage=usb start && ums 0 mmc 1; bootmenu +bootmenu_2=fastboot=echo Starting Fastboot protocol ...; fastboot usb 0; bootmenu +bootmenu_3=update bootloader=run flash_uboot +bootmenu_4=reboot RCM=enterrcm +bootmenu_5=reboot=reset +bootmenu_6=power off=poweroff +bootmenu_delay=-1 diff --git a/board/gameforce/ace-rk3588s/Kconfig b/board/gameforce/ace-rk3588s/Kconfig new file mode 100644 index 00000000000..52f98ccf897 --- /dev/null +++ b/board/gameforce/ace-rk3588s/Kconfig @@ -0,0 +1,9 @@ +if TARGET_GAMEFORCE_ACE_RK3588S + +config SYS_BOARD + default "gameforce-ace-rk3588s" + +config SYS_VENDOR + default "GameForce" + +endif diff --git a/board/gameforce/ace-rk3588s/MAINTAINERS b/board/gameforce/ace-rk3588s/MAINTAINERS new file mode 100644 index 00000000000..dc18e7c8849 --- /dev/null +++ b/board/gameforce/ace-rk3588s/MAINTAINERS @@ -0,0 +1,5 @@ +GAMEFORCE-ACE-RK3588S +M: Chris Morgan <macromorgan@hotmail.com> +S: Maintained +F: board/gameforce/ace-rk3588s/ +F: configs/gameforce-ace-rk3588s_defconfig diff --git a/board/microsoft/surface-2/Kconfig b/board/microsoft/surface-2/Kconfig new file mode 100644 index 00000000000..8573666dc92 --- /dev/null +++ b/board/microsoft/surface-2/Kconfig @@ -0,0 +1,13 @@ +if TARGET_SURFACE_2 + +config SYS_BOARD + default "surface-2" + +config SYS_VENDOR + default "microsoft" + +config TEGRA_BOARD_STRING + string "Default Tegra board name" + default "Microsoft Surface 2" + +endif diff --git a/board/microsoft/surface-2/MAINTAINERS b/board/microsoft/surface-2/MAINTAINERS new file mode 100644 index 00000000000..57747d304cd --- /dev/null +++ b/board/microsoft/surface-2/MAINTAINERS @@ -0,0 +1,7 @@ +SURFACE_2 BOARD +M: Jonas Schwöbel <jonasschwoebel@yahoo.de> +S: Maintained +F: arch/arm/dts/tegra114-microsoft-surface-2* +F: board/microsoft/surface-2/ +F: configs/surface-2_defconfig +F: doc/board/microsoft/surface-2.rst diff --git a/board/microsoft/surface-2/Makefile b/board/microsoft/surface-2/Makefile new file mode 100644 index 00000000000..43bf6c66db2 --- /dev/null +++ b/board/microsoft/surface-2/Makefile @@ -0,0 +1,6 @@ +# SPDX-License-Identifier: GPL-2.0 +# +# Copyright (c) 2010-2013, NVIDIA CORPORATION. All rights reserved. + +obj-$(CONFIG_XPL_BUILD) += surface-2-spl.o +obj-$(CONFIG_MULTI_DTB_FIT) += board-info.o diff --git a/board/microsoft/surface-2/board-info.c b/board/microsoft/surface-2/board-info.c new file mode 100644 index 00000000000..95a4accdc90 --- /dev/null +++ b/board/microsoft/surface-2/board-info.c @@ -0,0 +1,71 @@ +// SPDX-License-Identifier: GPL-2.0+ +/* + * (C) Copyright 2025 + * Svyatoslav Ryhel <clamor95@gmail.com> + */ + +#include <stdio.h> +#include <env.h> +#include <spl_gpio.h> + +#include <asm/gpio.h> +#include <asm/arch/pinmux.h> +#include <linux/string.h> + +static int id_gpio_get_value(u32 pingrp, u32 pin) +{ + /* Configure pinmux */ + pinmux_set_func(pingrp, PMUX_FUNC_KBC); + pinmux_set_pullupdown(pingrp, PMUX_PULL_DOWN); + pinmux_tristate_enable(pingrp); + pinmux_set_io(pingrp, PMUX_PIN_INPUT); + + /* + * Since this function may be called + * during DM reload we should use SPL + * GPIO functions which do not depend + * on DM. + */ + spl_gpio_input(NULL, pin); + return spl_gpio_get_value(NULL, pin); +} + +static int get_board_id(void) +{ + u32 pcb_id0, pcb_id1, pcb_id2, pcb_id3, pcb_id4, board_id; + + pcb_id0 = id_gpio_get_value(PMUX_PINGRP_KB_COL0_PQ0, TEGRA_GPIO(Q, 0)); + pcb_id1 = id_gpio_get_value(PMUX_PINGRP_KB_COL1_PQ1, TEGRA_GPIO(Q, 1)); + pcb_id2 = id_gpio_get_value(PMUX_PINGRP_KB_COL2_PQ2, TEGRA_GPIO(Q, 2)); + pcb_id3 = id_gpio_get_value(PMUX_PINGRP_KB_COL3_PQ3, TEGRA_GPIO(Q, 3)); + pcb_id4 = id_gpio_get_value(PMUX_PINGRP_KB_COL4_PQ4, TEGRA_GPIO(Q, 4)); + + /* Construct board ID */ + board_id = pcb_id4 << 4 | pcb_id3 << 3 | pcb_id2 << 2 | pcb_id1 << 1 | pcb_id0; + + log_debug("[SURFACE-2]: Board ID %02x\n", board_id); + + return board_id & 0x1f; +} + +int board_fit_config_name_match(const char *name) +{ + char dt_name[64] = { 0 }; + + snprintf(dt_name, sizeof(dt_name), "tegra114-microsoft-surface-2-%02x.dtb", + get_board_id()); + + if (!strcmp(name, dt_name)) + return 0; + + return -1; +} + +void nvidia_board_late_init(void) +{ + char dt_path[64] = { 0 }; + + snprintf(dt_path, sizeof(dt_path), "tegra114-microsoft-surface-2-%02x.dtb", + get_board_id()); + env_set("fdtfile", dt_path); +} diff --git a/board/microsoft/surface-2/surface-2-spl.c b/board/microsoft/surface-2/surface-2-spl.c new file mode 100644 index 00000000000..16f4373c7f0 --- /dev/null +++ b/board/microsoft/surface-2/surface-2-spl.c @@ -0,0 +1,42 @@ +// SPDX-License-Identifier: GPL-2.0-or-later +/* + * Surface 2 SPL stage configuration + * + * (C) Copyright 2010-2013 + * NVIDIA Corporation <www.nvidia.com> + * + * (C) Copyright 2023 + * Svyatoslav Ryhel <clamor95@gmail.com> + */ + +#include <asm/arch/tegra.h> +#include <asm/arch-tegra/tegra_i2c.h> +#include <linux/delay.h> + +#define TPS65913_I2C_ADDR (0x58 << 1) + +#define TPS65913_SMPS12_CTRL 0x20 +#define TPS65913_SMPS12_VOLTAGE 0x23 +#define TPS65913_SMPS45_CTRL 0x28 +#define TPS65913_SMPS45_VOLTAGE 0x2B + +#define TPS65913_SMPS12_CTRL_DATA (0x5100 | TPS65913_SMPS12_CTRL) +#define TPS65913_SMPS12_VOLTAGE_DATA (0x3900 | TPS65913_SMPS12_VOLTAGE) +#define TPS65913_SMPS45_CTRL_DATA (0x5100 | TPS65913_SMPS45_CTRL) +#define TPS65913_SMPS45_VOLTAGE_DATA (0x4c00 | TPS65913_SMPS45_VOLTAGE) + +void pmic_enable_cpu_vdd(void) +{ + /* Set CORE VDD to 1.200V. */ + tegra_i2c_ll_write(TPS65913_I2C_ADDR, TPS65913_SMPS45_VOLTAGE_DATA); + udelay(1000); + tegra_i2c_ll_write(TPS65913_I2C_ADDR, TPS65913_SMPS45_CTRL_DATA); + + udelay(1000); + + /* Set CPU VDD to 1.0125V. */ + tegra_i2c_ll_write(TPS65913_I2C_ADDR, TPS65913_SMPS12_VOLTAGE_DATA); + udelay(1000); + tegra_i2c_ll_write(TPS65913_I2C_ADDR, TPS65913_SMPS12_CTRL_DATA); + udelay(10 * 1000); +} diff --git a/board/microsoft/surface-2/surface-2.env b/board/microsoft/surface-2/surface-2.env new file mode 100644 index 00000000000..a77885a7c6d --- /dev/null +++ b/board/microsoft/surface-2/surface-2.env @@ -0,0 +1,8 @@ +button_cmd_0_name=Volume Down +button_cmd_0=bootmenu + +bootmenu_0=mount internal storage=usb start && ums 0 mmc 0; bootmenu +bootmenu_1=mount external storage=usb start && ums 0 mmc 1; bootmenu +bootmenu_2=fastboot=echo Starting Fastboot protocol ...; fastboot usb 0; bootmenu +bootmenu_4=power off=reset +bootmenu_delay=-1 diff --git a/board/phytec/phycore_am62ax/phycore_am62ax.env b/board/phytec/phycore_am62ax/phycore_am62ax.env index 797904013dc..ff4ab8c87b8 100644 --- a/board/phytec/phycore_am62ax/phycore_am62ax.env +++ b/board/phytec/phycore_am62ax/phycore_am62ax.env @@ -25,5 +25,9 @@ spi_fdt_addr=0x700000 spi_image_addr=0x800000 spi_ramdisk_addr=0x2200000 +#ifdef CONFIG_BOOTMETH_RAUC +bootmeths=rauc script efi extlinux pxe +#else bootmeths=script efi extlinux pxe +#endif boot_targets=mmc1 mmc0 spi_flash dhcp diff --git a/board/phytec/phycore_am62x/phycore_am62x.env b/board/phytec/phycore_am62x/phycore_am62x.env index 797904013dc..ff4ab8c87b8 100644 --- a/board/phytec/phycore_am62x/phycore_am62x.env +++ b/board/phytec/phycore_am62x/phycore_am62x.env @@ -25,5 +25,9 @@ spi_fdt_addr=0x700000 spi_image_addr=0x800000 spi_ramdisk_addr=0x2200000 +#ifdef CONFIG_BOOTMETH_RAUC +bootmeths=rauc script efi extlinux pxe +#else bootmeths=script efi extlinux pxe +#endif boot_targets=mmc1 mmc0 spi_flash dhcp diff --git a/board/phytec/phycore_am64x/phycore_am64x.env b/board/phytec/phycore_am64x/phycore_am64x.env index 36ab16e2f7a..cbaf45b3ace 100644 --- a/board/phytec/phycore_am64x/phycore_am64x.env +++ b/board/phytec/phycore_am64x/phycore_am64x.env @@ -24,5 +24,9 @@ spi_fdt_addr=0x700000 spi_image_addr=0x800000 spi_ramdisk_addr=0x2200000 +#ifdef CONFIG_BOOTMETH_RAUC +bootmeths=rauc script efi extlinux pxe +#else bootmeths=script efi extlinux pxe +#endif boot_targets=mmc1 mmc0 spi_flash dhcp diff --git a/board/phytec/phycore_imx93/spl.c b/board/phytec/phycore_imx93/spl.c index 7b5d38d438f..beaa536c600 100644 --- a/board/phytec/phycore_imx93/spl.c +++ b/board/phytec/phycore_imx93/spl.c @@ -52,8 +52,7 @@ void spl_dram_init(void) int ret; enum phytec_imx93_ddr_eeprom_code ddr_opt = PHYTEC_IMX93_DDR_INVALID; - /* NOTE: In SPL lpi2c3 is mapped to bus 0 */ - ret = phytec_eeprom_data_setup(NULL, 0, EEPROM_ADDR); + ret = phytec_eeprom_data_setup(NULL, 2, EEPROM_ADDR); if (ret && !IS_ENABLED(CONFIG_PHYCORE_IMX93_RAM_TYPE_FIX)) goto out; diff --git a/board/rockchip/evb_rk3588/MAINTAINERS b/board/rockchip/evb_rk3588/MAINTAINERS index 1232f05a387..379c85f48a4 100644 --- a/board/rockchip/evb_rk3588/MAINTAINERS +++ b/board/rockchip/evb_rk3588/MAINTAINERS @@ -48,3 +48,9 @@ S: Maintained F: configs/orangepi-5-plus-rk3588_defconfig F: arch/arm/dts/rk3588-orangepi-5-plus.dts F: arch/arm/dts/rk3588-orangepi-5-plus-u-boot.dtsi + +ORANGEPI-5-RK3588-ULTRA +M: Niu Zhihong <zhihong@nzhnb.com> +S: Maintained +F: configs/orangepi-5-ultra-rk3588_defconfig +F: arch/arm/dts/rk3588-orangepi-5-ultra-u-boot.dtsi diff --git a/board/samsung/e850-96/Makefile b/board/samsung/e850-96/Makefile index 71d46ea3d2b..76b8d47994e 100644 --- a/board/samsung/e850-96/Makefile +++ b/board/samsung/e850-96/Makefile @@ -3,4 +3,4 @@ # Copyright (C) 2024, Linaro Limited # Sam Protsenko <semen.protsenko@linaro.org> -obj-y := e850-96.o fw.o +obj-y := e850-96.o fw.o acpm.o pmic.o diff --git a/board/samsung/e850-96/acpm.c b/board/samsung/e850-96/acpm.c new file mode 100644 index 00000000000..1cc5c6d0e4a --- /dev/null +++ b/board/samsung/e850-96/acpm.c @@ -0,0 +1,169 @@ +// SPDX-License-Identifier: GPL-2.0+ +/* + * Copyright (c) 2025 Linaro Ltd. + * Author: Sam Protsenko <semen.protsenko@linaro.org> + * + * ACPM (Active Clock and Power Management) is an IPC protocol for communicating + * with APM (Active Power Management) core. The message exchange between AP + * (Application Processor) and APM is happening by using shared memory in SRAM + * (iRAM) and generating interrupts using Mailbox block. By using this IPC + * interface it's possible to offload power management tasks to APM core, which + * acts as a supervisor for CPU. One of the main tasks of APM is controlling + * PMIC chip over I3C bus. So in order to access PMIC chip registers it's + * recommended to do so by sending corresponding commands to APM via ACPM IPC + * protocol. The IPC interaction sequence looks like this: + * + * AP (CPU) <-> ACPM IPC (Mailbox + SRAM) <-> APM <-> I3C <-> PMIC + * + * This file contains functions for accessing I3C bus via APM block using + * ACPM IPC. + */ + +#include <linux/iopoll.h> +#include <linux/time.h> +#include <asm/io.h> +#include "acpm.h" + +/* Mailbox registers */ +#define MBOX_INTGR0 0x8 /* Interrupt Generation */ +#define MBOX_INTCR1 0x20 /* Interrupt Clear */ +#define MBOX_INTSR1 0x28 /* Interrupt Status */ +#define MBOX_INTGR_OFFSET 16 +#define MBOX_TIMEOUT (1 * USEC_PER_SEC) + +/* APM shared memory registers */ +#define SHMEM_SR0 0x0 +#define SHMEM_SR1 0x4 +#define SHMEM_SR2 0x8 +#define SHMEM_SR3 0xc + +/* IPC functions */ +#define IPC_FUNC_READ 0x0 +#define IPC_FUNC_WRITE 0x1 +/* Command 0 shifts and masks */ +#define IPC_REG_SHIFT 0 +#define IPC_REG_MASK 0xff +#define IPC_TYPE_SHIFT 8 +#define IPC_TYPE_MASK 0xf +#define IPC_CHANNEL_SHIFT 12 +#define IPC_CHANNEL_MASK 0xf +/* Command 1 shifts and masks */ +#define IPC_FUNC_SHIFT 0 +#define IPC_FUNC_MASK 0xff +#define IPC_WRITE_VAL_SHIFT 8 +#define IPC_WRITE_VAL_MASK 0xff +/* Command 3 shifts and masks */ +#define IPC_DEST_SHIFT 8 +#define IPC_DEST_MASK 0xff +#define IPC_RETURN_SHIFT 24 +#define IPC_RETURN_MASK 0xff + +/** + * acpm_ipc_send_data_async() - Send data to I3C block over ACPM IPC + * @acpm: ACPM data + * @cmd0: Command 0 value to send + * @cmd1: Command 1 value to send + */ +static void acpm_ipc_send_data_async(struct acpm *acpm, u32 cmd0, u32 cmd1) +{ + u32 irq_bit = 1 << acpm->ipc_ch; + u32 intgr = irq_bit << MBOX_INTGR_OFFSET; + + /* Write data to the shared memory */ + writel(cmd0, acpm->sram_base + SHMEM_SR0); + writel(cmd1, acpm->sram_base + SHMEM_SR1); + dsb(); + + /* Generate interrupt for I3C block */ + writel(intgr, acpm->mbox_base + MBOX_INTGR0); +} + +/** + * acpm_ipc_wait_resp() - Read response data from I3C block over ACPM IPC + * @acpm: ACPM data + * @cmd2: Will contain read value for command 2 + * @cmd3: Will contain read value for command 3 + * + * Return: 0 on success or negative value on error. + */ +static int acpm_ipc_wait_resp(struct acpm *acpm, u32 *cmd2, u32 *cmd3) +{ + u32 irq_bit = 1 << acpm->ipc_ch; + u32 reg; + int ret; + + /* Wait for the interrupt from I3C block */ + ret = readl_poll_timeout(acpm->mbox_base + MBOX_INTSR1, reg, + reg & irq_bit, MBOX_TIMEOUT); + if (ret < 0) + return ret; + + /* Clear the interrupt */ + writel(irq_bit, acpm->mbox_base + MBOX_INTCR1); + + /* Read data from the shared memory */ + *cmd2 = readl(acpm->sram_base + SHMEM_SR2); + *cmd3 = readl(acpm->sram_base + SHMEM_SR3); + + return 0; +} + +/** + * acpm_i3c_read() - Read an I3C register of some I3C slave device + * @acpm: ACPM data + * @ch: I3C channel (bus) number (0-15) + * @addr: I3C address of slave device (0-15) + * @reg: Address of I3C register in the slave device to read from + * @val: Will contain the read value + * + * Return: 0 on success or non-zero code on error (may be positive). + */ +int acpm_i3c_read(struct acpm *acpm, u8 ch, u8 addr, u8 reg, u8 *val) +{ + u32 cmd[4] = { 0 }; + u8 ret; + + cmd[0] = (ch & IPC_CHANNEL_MASK) << IPC_CHANNEL_SHIFT | + (addr & IPC_TYPE_MASK) << IPC_TYPE_SHIFT | + (reg & IPC_REG_MASK) << IPC_REG_SHIFT; + cmd[1] = IPC_FUNC_READ << IPC_FUNC_SHIFT; + + acpm_ipc_send_data_async(acpm, cmd[0], cmd[1]); + ret = acpm_ipc_wait_resp(acpm, &cmd[2], &cmd[3]); + if (ret) + return ret; + + *val = (cmd[3] >> IPC_DEST_SHIFT) & IPC_DEST_MASK; + ret = (cmd[3] >> IPC_RETURN_SHIFT) & IPC_RETURN_MASK; + return ret; +} + +/** + * acpm_i3c_write() - Write an I3C register of some I3C slave device + * @acpm: ACPM data + * @ch: I3C channel (bus) number (0-15) + * @addr: I3C address of slave device (0-15) + * @reg: Address of I3C register in the slave device to write into + * @val: Value to write + * + * Return: 0 on success or non-zero code on error (may be positive). + */ +int acpm_i3c_write(struct acpm *acpm, u8 ch, u8 addr, u8 reg, u8 val) +{ + u32 cmd[4] = { 0 }; + u8 ret; + + cmd[0] = (ch & IPC_CHANNEL_MASK) << IPC_CHANNEL_SHIFT | + (addr & IPC_TYPE_MASK) << IPC_TYPE_SHIFT | + (reg & IPC_REG_MASK) << IPC_REG_SHIFT; + cmd[1] = IPC_FUNC_WRITE << IPC_FUNC_SHIFT | + (val & IPC_WRITE_VAL_MASK) << IPC_WRITE_VAL_SHIFT; + + acpm_ipc_send_data_async(acpm, cmd[0], cmd[1]); + ret = acpm_ipc_wait_resp(acpm, &cmd[2], &cmd[3]); + if (ret) + return ret; + + ret = (cmd[3] >> IPC_RETURN_SHIFT) & IPC_RETURN_MASK; + return ret; +} diff --git a/board/samsung/e850-96/acpm.h b/board/samsung/e850-96/acpm.h new file mode 100644 index 00000000000..9373969209f --- /dev/null +++ b/board/samsung/e850-96/acpm.h @@ -0,0 +1,27 @@ +/* SPDX-License-Identifier: GPL-2.0+ */ +/* + * Copyright (c) 2025 Linaro Ltd. + * Sam Protsenko <semen.protsenko@linaro.org> + */ + +#ifndef __E850_96_ACPM_H +#define __E850_96_ACPM_H + +#include <linux/types.h> + +/** + * struct acpm - Data for I3C communication over ACPM IPC protocol + * @mbox_base: Base address of APM mailbox block + * @sram_base: Base address of shared memory used for APM messages + * @ipc_ch: Mailbox channel number used for communication with I3C block (0-15) + */ +struct acpm { + void __iomem *mbox_base; + void __iomem *sram_base; + u8 ipc_ch; +}; + +int acpm_i3c_read(struct acpm *acpm, u8 ch, u8 addr, u8 reg, u8 *val); +int acpm_i3c_write(struct acpm *acpm, u8 ch, u8 addr, u8 reg, u8 val); + +#endif /* __E850_96_ACPM_H */ diff --git a/board/samsung/e850-96/e850-96.c b/board/samsung/e850-96/e850-96.c index a6c264d1248..3df241edde2 100644 --- a/board/samsung/e850-96/e850-96.c +++ b/board/samsung/e850-96/e850-96.c @@ -8,13 +8,28 @@ #include <env.h> #include <init.h> #include <mapmem.h> +#include <net.h> +#include <usb.h> #include <asm/io.h> #include "fw.h" +#include "pmic.h" /* OTP Controller base address and register offsets */ -#define EXYNOS850_OTP_BASE 0x10000000 -#define OTP_CHIPID0 0x4 -#define OTP_CHIPID1 0x8 +#define EXYNOS850_OTP_BASE 0x10000000 +#define OTP_CHIPID0 0x4 +#define OTP_CHIPID1 0x8 + +/* ACPM and PMIC definitions */ +#define EXYNOS850_MBOX_APM2AP_BASE 0x11900000 +#define EXYNOS850_APM_SRAM_BASE 0x02039000 /* in iRAM */ +#define EXYNOS850_APM_SHMEM_OFFSET 0x3200 +#define EXYNOS850_IPC_AP_I3C 10 + +/* LDFW firmware definitions */ +#define LDFW_NWD_ADDR 0x88000000 +#define EMMC_IFNAME "mmc" +#define EMMC_DEV_NUM 0 +#define EMMC_ESP_PART 1 struct efi_fw_image fw_images[] = { { @@ -55,6 +70,13 @@ struct efi_capsule_update_info update_info = { .images = fw_images, }; +static struct acpm acpm = { + .mbox_base = (void __iomem *)EXYNOS850_MBOX_APM2AP_BASE, + .sram_base = (void __iomem *)(EXYNOS850_APM_SRAM_BASE + + EXYNOS850_APM_SHMEM_OFFSET), + .ipc_ch = EXYNOS850_IPC_AP_I3C, +}; + int dram_init(void) { return fdtdec_setup_mem_size_base(); @@ -92,19 +114,74 @@ static void setup_serial(void) env_set("serial#", serial_str); } -int board_late_init(void) +static void setup_ethaddr(void) +{ + u64 serial_num; + u32 mac_hi, mac_lo; + u8 mac_addr[6]; + + if (env_get("ethaddr")) + return; + + serial_num = get_chip_id(); + mac_lo = (u32)serial_num; /* OTP_CHIPID0 */ + mac_hi = (u32)(serial_num >> 32UL); /* OTP_CHIPID1 */ + mac_addr[0] = (mac_hi >> 8) & 0xff; + mac_addr[1] = mac_hi & 0xff; + mac_addr[2] = (mac_lo >> 24) & 0xff; + mac_addr[3] = (mac_lo >> 16) & 0xff; + mac_addr[4] = (mac_lo >> 8) & 0xff; + mac_addr[5] = mac_lo & 0xff; + mac_addr[0] &= ~0x1; /* make sure it's not a multicast address */ + if (is_valid_ethaddr(mac_addr)) + eth_env_set_enetaddr("ethaddr", mac_addr); +} + +/* + * Call this in board_late_init() to avoid probing block devices before + * efi_init_early(). + */ +void load_firmware(void) { + const char *ifname; + ulong dev, part; int err; + ifname = env_get("bootdev"); + if (!ifname) + ifname = EMMC_IFNAME; + dev = env_get_ulong("bootdevnum", 10, EMMC_DEV_NUM); + part = env_get_ulong("bootdevpart", 10, EMMC_ESP_PART); + + if (!strcmp(ifname, "usb")) { + printf("Starting USB (bootdev=usb)...\n"); + err = usb_init(); + if (err) + return; + } + + printf("Loading LDFW firmware (from %s %ld)...\n", ifname, dev); + err = load_ldfw(ifname, dev, part, LDFW_NWD_ADDR); + if (err) + printf("ERROR: LDFW loading failed (%d)\n", err); +} + +int board_late_init(void) +{ setup_serial(); + setup_ethaddr(); + load_firmware(); - /* - * Do this in board_late_init() to make sure MMC is not probed before - * efi_init_early(). - */ - err = load_ldfw(); + return 0; +} + +int power_init_board(void) +{ + int err; + + err = pmic_init(&acpm); if (err) - printf("ERROR: LDFW loading failed (%d)\n", err); + printf("ERROR: Failed to configure PMIC (%d)\n", err); return 0; } diff --git a/board/samsung/e850-96/e850-96.env b/board/samsung/e850-96/e850-96.env index aed7a71046d..992318b0ab2 100644 --- a/board/samsung/e850-96/e850-96.env +++ b/board/samsung/e850-96/e850-96.env @@ -5,7 +5,7 @@ fdt_addr_r=0x8c000000 scriptaddr=0x8c100000 pxefile_addr_r=0x8c200000 ramdisk_addr_r=0x8c300000 -fdtfile=CONFIG_DEFAULT_FDT_FILE +fdtfile=exynos/exynos850-e850-96.dtb dfu_alt_info= rawemmc raw 0 0x747c000 mmcpart 1; diff --git a/board/samsung/e850-96/fw.c b/board/samsung/e850-96/fw.c index 8f64e759b43..64235c01a25 100644 --- a/board/samsung/e850-96/fw.c +++ b/board/samsung/e850-96/fw.c @@ -11,13 +11,9 @@ #include <linux/arm-smccc.h> #include "fw.h" -#define EMMC_IFACE "mmc" -#define EMMC_DEV_NUM 0 #define LDFW_RAW_PART "ldfw" -#define LDFW_FAT_PART "esp" #define LDFW_FAT_PATH "/EFI/firmware/ldfw.bin" -#define LDFW_NWD_ADDR 0x88000000 #define LDFW_MAGIC 0x10adab1e #define SMC_CMD_LOAD_LDFW -0x500 #define SDM_HW_RESET_STATUS 0x1230 @@ -39,19 +35,23 @@ struct ldfw_header { }; /* Load LDFW binary as a file from FAT partition */ -static int read_fw_from_fat(const char *part_name, const char *path, void *buf) +static int read_fw_from_fat(const char *ifname, int dev, int part, + const char *path, void *buf) { - char dev_part_str[8]; + struct blk_desc *blk_desc; loff_t len_read; int err; - snprintf(dev_part_str, sizeof(dev_part_str), "%d#%s", EMMC_DEV_NUM, - LDFW_FAT_PART); + blk_desc = blk_get_dev(ifname, dev); + if (!blk_desc) { + debug("%s: Can't get block device\n", __func__); + return -ENODEV; + } - err = fs_set_blk_dev(EMMC_IFACE, dev_part_str, FS_TYPE_FAT); + err = fs_set_blk_dev_with_part(blk_desc, part); if (err) { - debug("%s: Can't set block device\n", __func__); - return -ENODEV; + debug("%s: Can't set partition\n", __func__); + return -ENOENT; } err = fs_read(path, (ulong)buf, 0, 0, &len_read); @@ -64,16 +64,17 @@ static int read_fw_from_fat(const char *part_name, const char *path, void *buf) } /* Load LDFW binary from raw partition on block device into RAM buffer */ -static int read_fw_from_raw(const char *part_name, void *buf) +static int read_fw_from_raw(const char *ifname, int dev, const char *part_name, + void *buf) { struct blk_desc *blk_desc; struct disk_partition part; unsigned long cnt; int part_num; - blk_desc = blk_get_dev(EMMC_IFACE, EMMC_DEV_NUM); + blk_desc = blk_get_dev(ifname, dev); if (!blk_desc) { - debug("%s: Can't get eMMC device\n", __func__); + debug("%s: Can't get block device\n", __func__); return -ENODEV; } @@ -92,9 +93,17 @@ static int read_fw_from_raw(const char *part_name, void *buf) return 0; } -int load_ldfw(void) +/** + * load_ldfw - Load the loadable firmware (LDFW) + * @ifname: Interface name of the block device to load the firmware from + * @dev: Device number + * @part: Partition number + * @addr: Temporary memory (Normal World) to use for loading the firmware + * + * Return: 0 on success or a negative value on error. + */ +int load_ldfw(const char *ifname, int dev, int part, phys_addr_t addr) { - const phys_addr_t addr = (phys_addr_t)LDFW_NWD_ADDR; struct ldfw_header *hdr; struct arm_smccc_res res; void *buf = (void *)addr; @@ -102,9 +111,9 @@ int load_ldfw(void) int err, i; /* First try to read LDFW from EFI partition, then from the raw one */ - err = read_fw_from_fat(LDFW_FAT_PART, LDFW_FAT_PATH, buf); + err = read_fw_from_fat(ifname, dev, part, LDFW_FAT_PATH, buf); if (err) { - err = read_fw_from_raw(LDFW_RAW_PART, buf); + err = read_fw_from_raw(ifname, dev, LDFW_RAW_PART, buf); if (err) return err; } diff --git a/board/samsung/e850-96/fw.h b/board/samsung/e850-96/fw.h index 472664e4ed2..73d9615d4a9 100644 --- a/board/samsung/e850-96/fw.h +++ b/board/samsung/e850-96/fw.h @@ -7,6 +7,8 @@ #ifndef __E850_96_FW_H #define __E850_96_FW_H -int load_ldfw(void); +#include <asm/types.h> + +int load_ldfw(const char *ifname, int dev, int part, phys_addr_t addr); #endif /* __E850_96_FW_H */ diff --git a/board/samsung/e850-96/pmic.c b/board/samsung/e850-96/pmic.c new file mode 100644 index 00000000000..037fd4844c5 --- /dev/null +++ b/board/samsung/e850-96/pmic.c @@ -0,0 +1,144 @@ +// SPDX-License-Identifier: GPL-2.0+ +/* + * Copyright (c) 2025 Linaro Ltd. + * Author: Sam Protsenko <semen.protsenko@linaro.org> + * + * This file contains functions for S2MPU12 PMIC regulators configuration. + * + * Example of voltage calculation for LDO24 and LDO32: + * - V_min = 1800 mV + * - V_step = 25 mV + * - V_wanted = 3300 mV + * - register value: (V_wanted - V_min) / V_step = 60 = 0x3c + * + * NOTE: 0x3c value might mean different voltage for other LDOs. + */ + +#include <linux/errno.h> +#include <linux/kernel.h> +#include "pmic.h" + +/* PMIC definitions */ +#define S2MPU12_CHANNEL 0 /* I3C bus number of PMIC */ +#define S2MPU12_PM_ADDR 0x1 /* I3C slave addr of PM part */ + +/* PMIC I3C registers */ +#define S2MPU12_PM_LDO1_CTRL 0x2b +#define S2MPU12_PM_LDO_CTRL(n) (S2MPU12_PM_LDO1_CTRL + (n) - 1) + +/* LDOx_CTRL values */ +#define S2MPU12_LDO_CTRL_OUT_MASK (0x3 << 6) +#define S2MPU12_LDO_CTRL_OUT_ALWAYS_ON (0x3 << 6) + +struct pmic_ldo { + u8 num; /* LDO number */ + u8 en; /* "enable" bits value in LDOx_CTRL register */ + u8 out; /* "output voltage" bits value in LDOx_CTRL register */ +}; + +/* List of LDOs to enable only */ +static u8 pmic_ldos_en[] = { + 2, /* 1.8V/450mA: multiple lines */ + 11, /* 3.0V/150mA: AVDD33_USB20 */ + 23, /* 2.85V/800mA: VDD_EMMC_2P85 */ + 27, /* 3.0V/150mA: MIPI_SWITCH_3V3 */ + 28, /* 1.8V/150mA: HDMI_CONV_1V8 */ + 30, /* 1.8V/150mA: NPU_VDD18 */ +}; + +/* List of LDOs to enable and set output voltage */ +static struct pmic_ldo pmic_ldos_en_out[] = { + { + .num = 24, /* 3.0V/800mA: VDD_LAN (LAN9514) */ + .en = S2MPU12_LDO_CTRL_OUT_ALWAYS_ON, + .out = 0x3c, /* means 3.3V for LDO24 */ + }, { + .num = 32, /* 3.3V/300mA: CAM_VDD (RPi camera module) */ + .en = S2MPU12_LDO_CTRL_OUT_ALWAYS_ON, + .out = 0x3c, /* means 3.3V for LDO32 */ + }, +}; + +/* Enable specified LDO */ +static int pmic_ldo_set_en(struct acpm *acpm, u8 ldo) +{ + const u8 reg = S2MPU12_PM_LDO_CTRL(ldo); + u8 val; + int err; + + err = acpm_i3c_read(acpm, S2MPU12_CHANNEL, S2MPU12_PM_ADDR, reg, &val); + if (err) + return err; + + val &= ~S2MPU12_LDO_CTRL_OUT_MASK; + val |= S2MPU12_LDO_CTRL_OUT_ALWAYS_ON; + + return acpm_i3c_write(acpm, S2MPU12_CHANNEL, S2MPU12_PM_ADDR, reg, val); +} + +/* Enable specified LDO and set its voltage to 0xc0 value */ +static int pmic_ldo_set_en_out(struct acpm *acpm, struct pmic_ldo *ldo) +{ + const u8 reg = S2MPU12_PM_LDO_CTRL(ldo->num); + const u8 val = ldo->en | ldo->out; + + return acpm_i3c_write(acpm, S2MPU12_CHANNEL, S2MPU12_PM_ADDR, reg, val); +} + +#ifdef DEBUG +static void pmic_trace_ldo(struct acpm *acpm, u8 ldo) +{ + const u8 reg = S2MPU12_PM_LDO_CTRL(ldo); + u8 val; + int err; + + err = acpm_i3c_read(acpm, S2MPU12_CHANNEL, S2MPU12_PM_ADDR, reg, &val); + if (err) + printf(" S2MPU12_PM_LDO%u_CTRL: Read error!\n", ldo); + else + printf(" S2MPU12_PM_LDO%u_CTRL: 0x%x\n", ldo, val); +} + +static void pmic_trace_ldos(struct acpm *acpm) +{ + size_t i; + + printf("Tracing LDOs...\n"); + for (i = 0; i < ARRAY_SIZE(pmic_ldos_en); ++i) + pmic_trace_ldo(acpm, pmic_ldos_en[i]); + for (i = 0; i < ARRAY_SIZE(pmic_ldos_en_out); ++i) + pmic_trace_ldo(acpm, pmic_ldos_en_out[i].num); +} +#endif + +/** + * pmic_init() - Enable power regulators in S2MPU12 PMIC. + * @acpm: Data for I3C communication with PMIC over ACPM protocol + * + * Enable LDOs needed for devices used in the bootloader and kernel. + * + * Return: 0 on success or non-zero code on error. + */ +int pmic_init(struct acpm *acpm) +{ + size_t i; + int err; + + for (i = 0; i < ARRAY_SIZE(pmic_ldos_en); ++i) { + err = pmic_ldo_set_en(acpm, pmic_ldos_en[i]); + if (err) + return -EIO; + } + + for (i = 0; i < ARRAY_SIZE(pmic_ldos_en_out); ++i) { + err = pmic_ldo_set_en_out(acpm, &pmic_ldos_en_out[i]); + if (err) + return -EIO; + } + +#ifdef DEBUG + pmic_trace_ldos(acpm); +#endif + + return 0; +} diff --git a/board/samsung/e850-96/pmic.h b/board/samsung/e850-96/pmic.h new file mode 100644 index 00000000000..46624c2ebd4 --- /dev/null +++ b/board/samsung/e850-96/pmic.h @@ -0,0 +1,14 @@ +/* SPDX-License-Identifier: GPL-2.0+ */ +/* + * Copyright (c) 2025 Linaro Ltd. + * Sam Protsenko <semen.protsenko@linaro.org> + */ + +#ifndef __E850_96_PMIC_H +#define __E850_96_PMIC_H + +#include "acpm.h" + +int pmic_init(struct acpm *acpm); + +#endif /* __E850_96_PMIC_H */ diff --git a/board/starfive/visionfive2/spl.c b/board/starfive/visionfive2/spl.c index 3dfa931b655..9dfe0bea5f1 100644 --- a/board/starfive/visionfive2/spl.c +++ b/board/starfive/visionfive2/spl.c @@ -126,19 +126,11 @@ int board_fit_config_name_match(const char *name) !strncmp(get_product_id_from_eeprom(), "STAR64", 6)) { return 0; } else if (!strcmp(name, "starfive/jh7110-starfive-visionfive-2-v1.2a") && - !strncmp(get_product_id_from_eeprom(), "VF7110", 6)) { - switch (get_pcb_revision_from_eeprom()) { - case 'a': - case 'A': - return 0; - } + !strncmp(get_product_id_from_eeprom(), "VF7110A", 7)) { + return 0; } else if (!strcmp(name, "starfive/jh7110-starfive-visionfive-2-v1.3b") && - !strncmp(get_product_id_from_eeprom(), "VF7110", 6)) { - switch (get_pcb_revision_from_eeprom()) { - case 'b': - case 'B': - return 0; - } + !strncmp(get_product_id_from_eeprom(), "VF7110B", 7)) { + return 0; } return -EINVAL; diff --git a/board/starfive/visionfive2/starfive_visionfive2.c b/board/starfive/visionfive2/starfive_visionfive2.c index bfbb11a2ee7..6271974b9c7 100644 --- a/board/starfive/visionfive2/starfive_visionfive2.c +++ b/board/starfive/visionfive2/starfive_visionfive2.c @@ -59,20 +59,10 @@ static void set_fdtfile(void) fdtfile = "starfive/jh7110-milkv-mars.dtb"; } else if (!strncmp(get_product_id_from_eeprom(), "STAR64", 6)) { fdtfile = "starfive/jh7110-pine64-star64.dtb"; - } else if (!strncmp(get_product_id_from_eeprom(), "VF7110", 6)) { - switch (get_pcb_revision_from_eeprom()) { - case 'a': - case 'A': - fdtfile = "starfive/jh7110-starfive-visionfive-2-v1.2a.dtb"; - break; - case 'b': - case 'B': - fdtfile = "starfive/jh7110-starfive-visionfive-2-v1.3b.dtb"; - break; - default: - log_err("Unknown revision\n"); - return; - } + } else if (!strncmp(get_product_id_from_eeprom(), "VF7110A", 7)) { + fdtfile = "starfive/jh7110-starfive-visionfive-2-v1.2a.dtb"; + } else if (!strncmp(get_product_id_from_eeprom(), "VF7110B", 7)) { + fdtfile = "starfive/jh7110-starfive-visionfive-2-v1.3b.dtb"; } else { log_err("Unknown product\n"); return; diff --git a/board/theobroma-systems/jaguar_rk3588/jaguar_rk3588.c b/board/theobroma-systems/jaguar_rk3588/jaguar_rk3588.c index a6d44f10db3..3f484646701 100644 --- a/board/theobroma-systems/jaguar_rk3588/jaguar_rk3588.c +++ b/board/theobroma-systems/jaguar_rk3588/jaguar_rk3588.c @@ -51,3 +51,22 @@ int rockchip_early_misc_init_r(void) return 0; } + +#define GPIO0B7_PU_EN BIT(15) + +void spl_board_init(void) +{ + /* + * GPIO0_B7 is routed to CAN TX. This SoC pin has a pull-down per default. + * So on power-up, we block the CAN bus with a dominant zero. We want to keep + * this blocking time to a minimum, so we want to get this pin high in SPL. + * + * The CAN driver in Linux disables the pull-down and sets the pin to + * output high. We don't have a CAN driver in U-Boot and don't need one, + * so we just use the easiest way to get the pin high, which is setting a + * pull-up. + */ + struct rk3588_pmu2_ioc * const ioc = (void *)PMU2_IOC_BASE; + + rk_setreg(&ioc->gpio0b_p, GPIO0B7_PU_EN); +} diff --git a/board/ti/am57xx/Kconfig b/board/ti/am57xx/Kconfig index 0c566820158..b6943938391 100644 --- a/board/ti/am57xx/Kconfig +++ b/board/ti/am57xx/Kconfig @@ -9,6 +9,18 @@ config SYS_VENDOR config SYS_CONFIG_NAME default "am57xx_evm" +config ENV_SOURCE_FILE + default "am57xx" + +source "board/ti/common/Kconfig" + +endif + +if TARGET_DRA7XX_EVM + +config ENV_SOURCE_FILE + default "am57xx" + source "board/ti/common/Kconfig" endif diff --git a/board/ti/am57xx/am57xx.env b/board/ti/am57xx/am57xx.env new file mode 100644 index 00000000000..7d029a3e859 --- /dev/null +++ b/board/ti/am57xx/am57xx.env @@ -0,0 +1,162 @@ +#include <env/ti/ti_common.env> +#include <env/ti/mmc.env> +#include <env/ti/dfu.env> + +bootpart=0:2 +bootdir=/boot +get_name_kern= + if test $boot_fit -eq 1; then + setenv bootfile fitImage; + else + setenv bootfile zImage; + fi +get_fit_config=setenv name_fit_config ${fdtfile} +console=ttyS2,115200n8 +fdtfile=undefined +finduuid=part uuid mmc 0:2 uuid +usbtty=cdc_acm +vram=16M + +#if CONFIG_CMD_AVB +avb_verify=avb init 1; avb verify $slot_suffix; +#endif + +partitions=uuid_disk=${uuid_gpt_disk}; + name=bootloader,start=384K,size=1792K,uuid=${uuid_gpt_bootloader}; + name=rootfs,start=2688K,size=-,uuid=${uuid_gpt_rootfs} + partitions_android= + uuid_disk=${uuid_gpt_disk}; + name=xloader,start=128K,size=256K,uuid=${uuid_gpt_xloader}; + name=bootloader,size=2048K,uuid=${uuid_gpt_bootloader}; + name=uboot-env,start=2432K,size=256K,uuid=${uuid_gpt_reserved}; + name=misc,size=128K,uuid=${uuid_gpt_misc}; + name=boot_a,size=20M,uuid=${uuid_gpt_boot_a}; + name=boot_b,size=20M,uuid=${uuid_gpt_boot_b}; + name=dtbo_a,size=8M,uuid=${uuid_gpt_dtbo_a}; + name=dtbo_b,size=8M,uuid=${uuid_gpt_dtbo_b}; + name=vbmeta_a,size=64K,uuid=${uuid_gpt_vbmeta_a}; + name=vbmeta_b,size=64K,uuid=${uuid_gpt_vbmeta_b}; + name=recovery,size=64M,uuid=${uuid_gpt_recovery}; + name=super,size=2560M,uuid=${uuid_gpt_super}; + name=metadata,size=16M,uuid=${uuid_gpt_metadata}; + name=userdata,size=-,uuid=${uuid_gpt_userdata} +optargs= +dofastboot=0 +emmc_android_boot= + setenv mmcdev 1; + mmc dev $mmcdev; + mmc rescan; +#if CONFIG_CMD_BCB +#if CONFIG_ANDROID_AB + if part number mmc 1 misc control_part_number; then + echo "misc partition number:${control_part_number};" + bcb ab_select slot_name mmc ${mmcdev}:${control_part_number}; + else + echo "misc partition not found;" + exit; + fi; + setenv slot_suffix _${slot_name}; +#endif +#endif +if bcb load CONFIG_FASTBOOT_FLASH_MMC_DEV misc; then + setenv ardaddr -; + if bcb test command = bootonce-bootloader; then + echo "Android: Bootloader boot..."; + bcb clear command; bcb store; + fastboot 1; + exit; + elif bcb test command = boot-recovery; then + echo "Android: Recovery boot..."; + setenv ardaddr $loadaddr; + setenv apart recovery; + else + echo "Android: Normal boot..."; + setenv ardaddr $loadaddr; + setenv apart boot${slot_suffix}; + fi; +else + echo "Warning: BCB is corrupted or does not exist"; + echo "Android: Normal boot..."; +fi; +setenv eval_bootargs setenv bootargs $bootargs; +run eval_bootargs; +setenv machid fe6; +#if CONFIG_CMD_AVB +if run avb_verify; then + echo "AVB verification OK."; + set bootargs $bootargs $avb_bootargs; +else + echo "AVB verification failed."; + exit; +fi; +#endif +#if CONFIG_CMD_BCB +#if CONFIG_ANDROID_AB +setenv bootargs_ab androidboot.slot_suffix=${slot_suffix}; +echo "A/B cmdline addition: ${bootargs_ab}"; +setenv bootargs ${bootargs} ${bootargs_ab}; +#endif +#endif +if part start mmc $mmcdev $apart boot_start; then + part size mmc $mmcdev $apart boot_size; + mmc read $loadaddr $boot_start $boot_size; + echo "Preparing FDT..."; + if test $board_name = am57xx_evm_reva3; then + echo " Reading DTBO partition..."; + part start mmc ${mmcdev} dtbo${slot_suffix} p_dtbo_start; + part size mmc ${mmcdev} dtbo${slot_suffix} p_dtbo_size; + mmc read ${dtboaddr} ${p_dtbo_start} ${p_dtbo_size}; + echo " Reading DTB for AM57x EVM RevA3..."; + abootimg get dtb --index=0 dtb_start dtb_size; + cp.b $dtb_start $fdtaddr $dtb_size; + fdt addr $fdtaddr 0x80000; + echo " Applying DTBOs for AM57x EVM RevA3..."; + adtimg addr $dtboaddr; + adtimg get dt --index=0 dtbo0_addr dtbo0_size; + fdt apply $dtbo0_addr; + adtimg get dt --index=1 dtbo1_addr dtbo1_size; + fdt apply $dtbo1_addr; + elif test $board_name = beagle_x15_revc; then + echo " Reading DTB for Beagle X15 RevC..."; + abootimg get dtb --index=0 dtb_start dtb_size; + cp.b $dtb_start $fdtaddr $dtb_size; + fdt addr $fdtaddr 0x80000; + else + echo "Error: Android boot is not supported for $board_name"; + exit; + fi; + bootm $loadaddr $ardaddr $fdtaddr; +else + echo "$apart partition not found"; + exit; +fi; +get_overlay_mmc= + fdt address ${fdtaddr}; + fdt resize 0x100000; + for overlay in $name_overlays; + do; + load mmc ${bootpart} ${dtboaddr} ${bootdir}/dtb/${overlay}; + fdt apply ${dtboaddr}; + done; +#if CONFIG_CMD_NET +static_ip=${ipaddr}:${serverip}:${gatewayip}:${netmask}:${hostname}::off +nfsopts=nolock +rootpath=/export/rootfs +netloadimage=tftp ${loadaddr} ${bootfile} +netloadfdt=tftp ${fdtaddr} ${fdtfile} +netargs=setenv bootargs console=${console} ${optargs} + root=/dev/nfs + nfsroot=${serverip}:${rootpath},${nfsopts} rw + ip=dhcp +netboot=echo Booting from network ...; + setenv autoload no; + dhcp; + run netloadimage; + run netloadfdt; + run netargs; + bootz ${loadaddr} - ${fdtaddr} +#endif +#if CONFIG_MTD_RAW_NAND +#include <env/ti/nand.env> +#endif +dfu_bufsiz=0x10000 diff --git a/board/ti/am57xx/board.c b/board/ti/am57xx/board.c index fc0d87daae4..4091601d4f2 100644 --- a/board/ti/am57xx/board.c +++ b/board/ti/am57xx/board.c @@ -42,6 +42,7 @@ #include "../common/board_detect.h" #include "../common/cape_detect.h" +#include "../common/fdt_ops.h" #include "mux_data.h" #ifdef CONFIG_SUPPORT_EMMC_BOOT @@ -577,6 +578,18 @@ void do_board_detect(void) "Board: %s REV %s\n", bname, board_ti_get_rev()); } +static struct ti_fdt_map ti_omap_am57_evm_fdt_map[] = { + {"beagle_x15", "ti/omap/am57xx-beagle-x15.dtb"}, + {"beagle_x15_revb1", "ti/omap/am57xx-beagle-x15-revb1.dtb"}, + {"beagle_x15_revc", "ti/omap/am57xx-beagle-x15-revc.dtb"}, + {"am5729_beagleboneai", "ti/omap/am5729-beagleboneai.dtb"}, + {"am572x_idk", "ti/omap/am572x-idk.dtb"}, + {"am574x_idk", "ti/omap/am574x-idk.dtb"}, + {"am57xx_evm", "ti/omap/am57xx-beagle-x15.dtb"}, + {"am57xx_evm_reva3", "ti/omap/am57xx-beagle-x15.dtb"}, + {"am571x_idk", "ti/omap/am571x-idk.dtb"}, +}; + static void setup_board_eeprom_env(void) { char *name = "beagle_x15"; @@ -614,6 +627,7 @@ static void setup_board_eeprom_env(void) invalid_eeprom: set_board_info_env(name); + ti_set_fdt_env(name, ti_omap_am57_evm_fdt_map); } #endif /* CONFIG_XPL_BUILD */ diff --git a/board/ti/dra7xx/evm.c b/board/ti/dra7xx/evm.c index 98d63e14e29..0966db2bb62 100644 --- a/board/ti/dra7xx/evm.c +++ b/board/ti/dra7xx/evm.c @@ -38,6 +38,7 @@ #include "mux_data.h" #include "../common/board_detect.h" +#include "../common/fdt_ops.h" #define board_is_dra76x_evm() board_ti_is("DRA76/7x") #define board_is_dra74x_evm() board_ti_is("5777xCPU") @@ -665,6 +666,15 @@ static int device_okay(const char *path) } #endif +static struct ti_fdt_map ti_omap_dra7_evm_fdt_map[] = { + {"omap5_uevm", "ti/omap/omap5-uevm.dtb"}, + {"dra7xx", "ti/omap/dra7-evm.dtb"}, + {"dra72x-revc", "ti/omap/dra72-evm-revc.dtb"}, + {"dra72x", "ti/omap/dra72-evm.dtb"}, + {"dra71x", "ti/omap/dra71-evm.dtb"}, + {"dra76x_acd", "ti/omap/dra76-evm.dtb"}, +}; + int board_late_init(void) { #ifdef CONFIG_ENV_VARS_UBOOT_RUNTIME_CONFIG @@ -686,6 +696,7 @@ int board_late_init(void) } set_board_info_env(name); + ti_set_fdt_env(name, ti_omap_dra7_evm_fdt_map); /* * Default FIT boot on HS devices. Non FIT images are not allowed diff --git a/board/xunlong/orangepi-5-ultra-rk3588/Kconfig b/board/xunlong/orangepi-5-ultra-rk3588/Kconfig new file mode 100644 index 00000000000..43fc96b04c0 --- /dev/null +++ b/board/xunlong/orangepi-5-ultra-rk3588/Kconfig @@ -0,0 +1,12 @@ +if TARGET_ORANGEPI_5_ULTRA_RK3588 + +config SYS_BOARD + default "orangepi-5-ultra-rk3588" + +config SYS_VENDOR + default "xunlong" + +config SYS_CONFIG_NAME + default "evb_rk3588" + +endif diff --git a/board/xunlong/orangepi-5-ultra-rk3588/MAINTAINERS b/board/xunlong/orangepi-5-ultra-rk3588/MAINTAINERS new file mode 100644 index 00000000000..be9c93f6b9d --- /dev/null +++ b/board/xunlong/orangepi-5-ultra-rk3588/MAINTAINERS @@ -0,0 +1,6 @@ +ORANGEPI-5-RK3588-ULTRA +M: Niu Zhihong <zhihong@nzhnb.com> +S: Maintained +F: board/xunlong/orangepi-5-rk3588-ultra +F: configs/orangepi-5-ultra-rk3588_defconfig +F: arch/arm/dts/rk3588-orangepi-5-ultra.dts diff --git a/boot/Kconfig b/boot/Kconfig index 54ef7052c5c..2993cd7f9ba 100644 --- a/boot/Kconfig +++ b/boot/Kconfig @@ -869,7 +869,6 @@ config EXPO config BOOTMETH_RAUC bool "Bootdev support for RAUC A/B systems" depends on CMDLINE - select BOOTMETH_GLOBAL select HUSH_PARSER help Enables support for booting RAUC A/B systems from MMC devices. This diff --git a/boot/bootmeth_rauc.c b/boot/bootmeth_rauc.c index 7c1a895139e..81a73046e83 100644 --- a/boot/bootmeth_rauc.c +++ b/boot/bootmeth_rauc.c @@ -52,6 +52,18 @@ struct distro_rauc_priv { struct distro_rauc_slot **slots; }; +static void distro_rauc_priv_free(struct distro_rauc_priv *priv) +{ + int i; + + for (i = 0; priv->slots[i]; i++) { + free(priv->slots[i]->name); + free(priv->slots[i]); + } + free(priv->slots); + free(priv); +} + static struct distro_rauc_slot *get_slot(struct distro_rauc_priv *priv, const char *slot_name) { @@ -187,13 +199,8 @@ static int distro_rauc_read_bootflow(struct udevice *dev, struct bootflow *bflow ret = distro_rauc_scan_parts(bflow); if (ret < 0) { - for (i = 0; priv->slots[i]->name; i++) { - free(priv->slots[i]->name); - free(priv->slots[i]); - } - free(priv); + distro_rauc_priv_free(priv); free(boot_order_copy); - bflow->bootmeth_priv = NULL; return ret; } @@ -402,6 +409,8 @@ static int distro_rauc_boot(struct udevice *dev, struct bootflow *bflow) if (ret) return log_msg_ret("boot", ret); + distro_rauc_priv_free(priv); + return 0; } diff --git a/cmd/Kconfig b/cmd/Kconfig index 1a7dba2a27d..29de857ba7c 100644 --- a/cmd/Kconfig +++ b/cmd/Kconfig @@ -2117,7 +2117,7 @@ config CMD_DHCP config CMD_DNS bool "dns" - select PROT_DNS_LWIP if NET_LWIP + select DNS help Lookup the IP of a hostname diff --git a/cmd/lwip/dns.c b/cmd/lwip/dns.c index b5fccc7433e..3eb698b3f82 100644 --- a/cmd/lwip/dns.c +++ b/cmd/lwip/dns.c @@ -2,115 +2,7 @@ /* Copyright (C) 2024 Linaro Ltd. */ #include <command.h> -#include <console.h> -#include <env.h> -#include <lwip/dns.h> -#include <lwip/timeouts.h> #include <net.h> -#include <time.h> U_BOOT_CMD(dns, 3, 1, do_dns, "lookup the IP of a hostname", "hostname [envvar]"); - -#define DNS_RESEND_MS 1000 -#define DNS_TIMEOUT_MS 10000 - -struct dns_cb_arg { - ip_addr_t host_ipaddr; - const char *var; - bool done; -}; - -static void do_dns_tmr(void *arg) -{ - dns_tmr(); -} - -static void dns_cb(const char *name, const ip_addr_t *ipaddr, void *arg) -{ - struct dns_cb_arg *dns_cb_arg = arg; - char *ipstr = ip4addr_ntoa(ipaddr); - - dns_cb_arg->done = true; - - if (!ipaddr) { - printf("DNS: host not found\n"); - dns_cb_arg->host_ipaddr.addr = 0; - return; - } - - dns_cb_arg->host_ipaddr.addr = ipaddr->addr; - - if (dns_cb_arg->var) - env_set(dns_cb_arg->var, ipstr); -} - -static int dns_loop(struct udevice *udev, const char *name, const char *var) -{ - struct dns_cb_arg dns_cb_arg = { }; - struct netif *netif; - ip_addr_t ipaddr; - ulong start; - int ret; - - dns_cb_arg.var = var; - - netif = net_lwip_new_netif(udev); - if (!netif) - return CMD_RET_FAILURE; - - if (net_lwip_dns_init()) { - net_lwip_remove_netif(netif); - return CMD_RET_FAILURE; - } - - dns_cb_arg.done = false; - - ret = dns_gethostbyname(name, &ipaddr, dns_cb, &dns_cb_arg); - - if (ret == ERR_OK) { - dns_cb(name, &ipaddr, &dns_cb_arg); - } else if (ret == ERR_INPROGRESS) { - start = get_timer(0); - sys_timeout(DNS_RESEND_MS, do_dns_tmr, NULL); - do { - net_lwip_rx(udev, netif); - if (dns_cb_arg.done) - break; - if (ctrlc()) { - printf("\nAbort\n"); - break; - } - } while (get_timer(start) < DNS_TIMEOUT_MS); - sys_untimeout(do_dns_tmr, NULL); - } - - net_lwip_remove_netif(netif); - - if (dns_cb_arg.done && dns_cb_arg.host_ipaddr.addr != 0) { - if (!var) - printf("%s\n", ipaddr_ntoa(&ipaddr)); - return CMD_RET_SUCCESS; - } - - return CMD_RET_FAILURE; -} - -int do_dns(struct cmd_tbl *cmdtp, int flag, int argc, char *const argv[]) -{ - char *name; - char *var = NULL; - - if (argc == 1 || argc > 3) - return CMD_RET_USAGE; - - name = argv[1]; - - if (argc == 3) - var = argv[2]; - - if (net_lwip_eth_start() < 0) - return CMD_RET_FAILURE; - - return dns_loop(eth_get_dev(), name, var); -} diff --git a/cmd/lwip/ping.c b/cmd/lwip/ping.c index 87f8e958e48..6d090fc530d 100644 --- a/cmd/lwip/ping.c +++ b/cmd/lwip/ping.c @@ -170,6 +170,7 @@ int do_ping(struct cmd_tbl *cmdtp, int flag, int argc, char *const argv[]) if (net_lwip_dns_resolve(argv[1], &addr)) return CMD_RET_USAGE; + net_try_count = 1; restart: if (net_lwip_eth_start() < 0 || ping_loop(eth_get_dev(), &addr) < 0) { if (net_start_again() == 0) diff --git a/cmd/lwip/sntp.c b/cmd/lwip/sntp.c index ae02bb11040..608345c873b 100644 --- a/cmd/lwip/sntp.c +++ b/cmd/lwip/sntp.c @@ -79,7 +79,6 @@ static int sntp_loop(struct udevice *udev, ip_addr_t *srvip) sys_timeout(SNTP_TIMEOUT, no_response, NULL); while (sntp_state == NOT_DONE) { net_lwip_rx(udev, netif); - sys_check_timeouts(); if (ctrlc()) { printf("\nAbort\n"); sntp_state = ABORTED; diff --git a/cmd/mtd.c b/cmd/mtd.c index c25997cfb24..2520b89eed2 100644 --- a/cmd/mtd.c +++ b/cmd/mtd.c @@ -17,6 +17,7 @@ #include <malloc.h> #include <mapmem.h> #include <mtd.h> +#include <time.h> #include <dm/devres.h> #include <linux/err.h> @@ -466,8 +467,9 @@ static int mtd_special_write_oob(struct mtd_info *mtd, u64 off, static int do_mtd_io(struct cmd_tbl *cmdtp, int flag, int argc, char *const argv[]) { - bool dump, read, raw, woob, write_empty_pages, has_pages = false; + bool dump, read, raw, woob, benchmark, write_empty_pages, has_pages = false; u64 start_off, off, len, remaining, default_len; + unsigned long bench_start, bench_end; struct mtd_oob_ops io_op = {}; uint user_addr = 0, npages; const char *cmd = argv[0]; @@ -490,6 +492,7 @@ static int do_mtd_io(struct cmd_tbl *cmdtp, int flag, int argc, read = dump || !strncmp(cmd, "read", 4); raw = strstr(cmd, ".raw"); woob = strstr(cmd, ".oob"); + benchmark = strstr(cmd, ".benchmark"); write_empty_pages = !has_pages || strstr(cmd, ".dontskipff"); argc -= 2; @@ -559,6 +562,9 @@ static int do_mtd_io(struct cmd_tbl *cmdtp, int flag, int argc, led_activity_blink(); + if (benchmark) + bench_start = timer_get_us(); + /* Loop over the pages to do the actual read/write */ while (remaining) { /* Skip the block if it is bad */ @@ -586,6 +592,13 @@ static int do_mtd_io(struct cmd_tbl *cmdtp, int flag, int argc, io_op.oobbuf += io_op.oobretlen; } + if (benchmark && bench_start) { + bench_end = timer_get_us(); + printf("%s speed: %lukiB/s\n", + read ? "Read" : "Write", + ((io_op.len * 1000000) / (bench_end - bench_start)) / 1024); + } + led_activity_off(); if (!ret && dump) diff --git a/cmd/nand.c b/cmd/nand.c index 2f785deeb7f..b5678b0a008 100644 --- a/cmd/nand.c +++ b/cmd/nand.c @@ -37,6 +37,7 @@ #include <asm/byteorder.h> #include <jffs2/jffs2.h> #include <nand.h> +#include <display_options.h> #include "legacy-mtd-utils.h" @@ -159,7 +160,7 @@ free_memory: } static int nand_dump(struct mtd_info *mtd, ulong off, int only_oob, - int repeat) + int ecc, int repeat) { int i; u_char *datbuf, *oobbuf, *p; @@ -191,39 +192,30 @@ static int nand_dump(struct mtd_info *mtd, ulong off, int only_oob, ops.oobbuf = oobbuf; ops.len = mtd->writesize; ops.ooblen = mtd->oobsize; - ops.mode = MTD_OPS_RAW; + if (ecc) + ops.mode = MTD_OPS_PLACE_OOB; + else + ops.mode = MTD_OPS_RAW; i = mtd_read_oob(mtd, addr, &ops); if (i < 0) { - printf("Error (%d) reading page %08lx\n", i, off); + printf("Error reading page at offset %08lx, %d %s\n", + off, i, i == -EUCLEAN ? "correctable" : + "uncorrectable, dumping raw data"); ret = 1; - goto free_all; } - printf("Page %08lx dump:\n", off); + printf("\nPage at offset %08lx dump:\n", off); if (!only_oob) { - i = mtd->writesize >> 4; + i = mtd->writesize; p = datbuf; - - while (i--) { - printf("\t%02x %02x %02x %02x %02x %02x %02x %02x" - " %02x %02x %02x %02x %02x %02x %02x %02x\n", - p[0], p[1], p[2], p[3], p[4], p[5], p[6], p[7], - p[8], p[9], p[10], p[11], p[12], p[13], p[14], - p[15]); - p += 16; - } + print_buffer(off, p, 1, i, 16); } - puts("OOB:\n"); - i = mtd->oobsize >> 3; + puts("\nOOB:\n"); + i = mtd->oobsize; p = oobbuf; - while (i--) { - printf("\t%02x %02x %02x %02x %02x %02x %02x %02x\n", - p[0], p[1], p[2], p[3], p[4], p[5], p[6], p[7]); - p += 8; - } + print_buffer(0, p, 1, i, 8); -free_all: free(oobbuf); free_dat: free(datbuf); @@ -412,7 +404,7 @@ int do_nand_env_oob(struct cmd_tbl *cmdtp, int argc, char *const argv[]) } ops.datbuf = NULL; - ops.mode = MTD_OOB_AUTO; + ops.mode = MTD_OPS_AUTO_OOB; ops.ooboffs = 0; ops.ooblen = ENV_OFFSET_SIZE; ops.oobbuf = (void *) oob_buf; @@ -708,11 +700,19 @@ static int do_nand(struct cmd_tbl *cmdtp, int flag, int argc, } if (strncmp(cmd, "dump", 4) == 0) { + int only_oob, ecc; + if (argc < 3) goto usage; + only_oob = !strcmp(&cmd[4], ".oob") || !strcmp(&cmd[4], ".ecc.oob") || + !strcmp(&cmd[4], ".oob.ecc"); + + ecc = !strcmp(&cmd[4], ".ecc") || !strcmp(&cmd[4], ".ecc.oob") || + !strcmp(&cmd[4], ".oob.ecc"); + off = (int)hextoul(argv[2], NULL); - ret = nand_dump(mtd, off, !strcmp(&cmd[4], ".oob"), repeat); + ret = nand_dump(mtd, off, only_oob, ecc, repeat); return ret == 0 ? 1 : 0; } @@ -1026,8 +1026,8 @@ U_BOOT_LONGHELP(nand, "nand write - addr off|partition size\n" " read/write 'size' bytes starting at offset 'off'\n" " to/from memory address 'addr', skipping bad blocks.\n" - "nand read.raw - addr off|partition [count]\n" - "nand write.raw[.noverify] - addr off|partition [count]\n" + "nand read.raw - addr off|partition [pages]\n" + "nand write.raw[.noverify] - addr off|partition [pages]\n" " Use read.raw/write.raw to avoid ECC and access the flash as-is.\n" #ifdef CONFIG_CMD_NAND_TRIMFFS "nand write.trimffs - addr off|partition size\n" @@ -1042,7 +1042,7 @@ U_BOOT_LONGHELP(nand, "nand erase.part [clean] partition - erase entire mtd partition'\n" "nand erase.chip [clean] - erase entire chip'\n" "nand bad - show bad blocks\n" - "nand dump[.oob] off - dump page\n" + "nand dump[.oob][.ecc] off - dump raw (default) or ecc corrected page at offset\n" #ifdef CONFIG_CMD_NAND_WATCH "nand watch <off> <size> - check an area for bitflips\n" "nand watch.part <part> - check a partition for bitflips\n" diff --git a/common/spl/Kconfig b/common/spl/Kconfig index ab05536bd02..f34b96efc02 100644 --- a/common/spl/Kconfig +++ b/common/spl/Kconfig @@ -1141,7 +1141,7 @@ config SPL_DM_SPI config SPL_DM_SPI_FLASH bool "Support SPI DM FLASH drivers in SPL" - depends on SPL_DM + depends on SPL_DM_SPI help Enable support for SPI DM flash drivers in SPL. diff --git a/common/spl/spl_spi.c b/common/spl/spl_spi.c index 00dbd3011f0..c2b188371c2 100644 --- a/common/spl/spl_spi.c +++ b/common/spl/spl_spi.c @@ -80,7 +80,7 @@ static int spl_spi_load_image(struct spl_image_info *spl_image, spl_load_init(&load, spl_spi_fit_read, flash, 1); #if CONFIG_IS_ENABLED(OS_BOOT) - if (spl_start_uboot()) { + if (!spl_start_uboot()) { int err = spl_load(spl_image, bootdev, &load, 0, CONFIG_SYS_SPI_KERNEL_OFFS); diff --git a/configs/coreboot_defconfig b/configs/coreboot_defconfig index dfb97a3d302..b49fc80167b 100644 --- a/configs/coreboot_defconfig +++ b/configs/coreboot_defconfig @@ -7,6 +7,7 @@ CONFIG_DEFAULT_DEVICE_TREE="coreboot" CONFIG_PRE_CON_BUF_ADDR=0x100000 CONFIG_VENDOR_COREBOOT=y CONFIG_TARGET_COREBOOT=y +CONFIG_X86_LOAD_FROM_32_BIT=y CONFIG_SYS_MONITOR_BASE=0x01110000 CONFIG_FIT=y CONFIG_FIT_SIGNATURE=y diff --git a/configs/e850-96_defconfig b/configs/e850-96_defconfig index b4066d87460..8f9659ce050 100644 --- a/configs/e850-96_defconfig +++ b/configs/e850-96_defconfig @@ -19,7 +19,6 @@ CONFIG_EFI_RUNTIME_UPDATE_CAPSULE=y CONFIG_EFI_CAPSULE_ON_DISK=y CONFIG_EFI_CAPSULE_FIRMWARE_RAW=y CONFIG_BOOTSTD_FULL=y -CONFIG_DEFAULT_FDT_FILE="exynos850-e850-96.dtb" # CONFIG_DISPLAY_CPUINFO is not set # CONFIG_BOARD_INIT is not set CONFIG_BOARD_LATE_INIT=y @@ -30,6 +29,8 @@ CONFIG_CMD_CLK=y CONFIG_CMD_DFU=y CONFIG_CMD_GPT=y CONFIG_CMD_MMC=y +CONFIG_CMD_USB=y +CONFIG_CMD_USB_MASS_STORAGE=y CONFIG_CMD_EFIDEBUG=y # CONFIG_CMD_DATE is not set CONFIG_CMD_RTC=y @@ -41,7 +42,7 @@ CONFIG_ENV_IS_IN_MMC=y CONFIG_ENV_REDUNDANT=y CONFIG_ENV_RELOC_GD_ENV_ADDR=y CONFIG_ENV_MMC_EMMC_HW_PARTITION=2 -CONFIG_NO_NET=y +CONFIG_NET_LWIP=y CONFIG_CLK_EXYNOS850=y CONFIG_DFU_MMC=y CONFIG_USB_FUNCTION_FASTBOOT=y @@ -64,8 +65,13 @@ CONFIG_SYSRESET=y CONFIG_SYSRESET_SYSCON=y CONFIG_USB=y CONFIG_DM_USB_GADGET=y +CONFIG_USB_XHCI_HCD=y +CONFIG_USB_XHCI_DWC3=y +CONFIG_USB_XHCI_DWC3_OF_SIMPLE=y CONFIG_USB_DWC3=y CONFIG_USB_DWC3_GENERIC=y +CONFIG_USB_HOST_ETHER=y +CONFIG_USB_ETHER_SMSC95XX=y CONFIG_USB_GADGET=y CONFIG_USB_GADGET_MANUFACTURER="Samsung" CONFIG_USB_GADGET_VENDOR_NUM=0x18d1 diff --git a/configs/gameforce-ace-rk3588s_defconfig b/configs/gameforce-ace-rk3588s_defconfig new file mode 100644 index 00000000000..ec725a8df40 --- /dev/null +++ b/configs/gameforce-ace-rk3588s_defconfig @@ -0,0 +1,67 @@ +CONFIG_ARM=y +CONFIG_SKIP_LOWLEVEL_INIT=y +CONFIG_COUNTER_FREQUENCY=24000000 +CONFIG_ARCH_ROCKCHIP=y +CONFIG_DEFAULT_DEVICE_TREE="rockchip/rk3588s-gameforce-ace" +CONFIG_ROCKCHIP_RK3588=y +CONFIG_SPL_SERIAL=y +CONFIG_SYS_LOAD_ADDR=0xc00800 +CONFIG_DEBUG_UART_BASE=0xFEB50000 +CONFIG_DEBUG_UART_CLOCK=24000000 +CONFIG_DEBUG_UART=y +CONFIG_FIT=y +CONFIG_FIT_VERBOSE=y +CONFIG_SPL_FIT_SIGNATURE=y +CONFIG_SPL_LOAD_FIT=y +CONFIG_LEGACY_IMAGE_FORMAT=y +CONFIG_DEFAULT_FDT_FILE="rockchip/rk3588s-gameforce-ace.dtb" +# CONFIG_DISPLAY_CPUINFO is not set +CONFIG_DISPLAY_BOARDINFO_LATE=y +CONFIG_SPL_MAX_SIZE=0x40000 +# CONFIG_SPL_RAW_IMAGE_SUPPORT is not set +CONFIG_SPL_ATF=y +CONFIG_CMD_MMC=y +# CONFIG_CMD_SETEXPR is not set +# CONFIG_SPL_DOS_PARTITION is not set +CONFIG_SPL_OF_CONTROL=y +CONFIG_OF_LIVE=y +CONFIG_OF_SPL_REMOVE_PROPS="clock-names interrupt-parent assigned-clocks assigned-clock-rates assigned-clock-parents" +CONFIG_NO_NET=y +CONFIG_SPL_DM_SEQ_ALIAS=y +CONFIG_SPL_REGMAP=y +CONFIG_SPL_SYSCON=y +CONFIG_BUTTON=y +CONFIG_BUTTON_ADC=y +CONFIG_BUTTON_GPIO=y +CONFIG_SPL_CLK=y +CONFIG_ROCKCHIP_GPIO=y +CONFIG_SYS_I2C_ROCKCHIP=y +CONFIG_LED=y +CONFIG_LED_GPIO=y +CONFIG_MISC=y +CONFIG_MMC_DW=y +CONFIG_MMC_DW_ROCKCHIP=y +CONFIG_MMC_SDHCI=y +CONFIG_MMC_SDHCI_SDMA=y +CONFIG_MMC_SDHCI_ROCKCHIP=y +CONFIG_PHY_ROCKCHIP_INNO_USB2=y +CONFIG_PHY_ROCKCHIP_NANENG_COMBOPHY=y +CONFIG_PHY_ROCKCHIP_USBDP=y +CONFIG_SPL_PINCTRL=y +CONFIG_PWM_ROCKCHIP=y +CONFIG_SPL_RAM=y +# CONFIG_RAM_ROCKCHIP_DEBUG is not set +CONFIG_BAUDRATE=1500000 +CONFIG_DEBUG_UART_SHIFT=2 +CONFIG_SYS_NS16550_MEM32=y +CONFIG_ROCKCHIP_SPI=y +CONFIG_SYSRESET=y +CONFIG_USB=y +CONFIG_USB_XHCI_HCD=y +CONFIG_USB_EHCI_HCD=y +CONFIG_USB_EHCI_GENERIC=y +CONFIG_USB_OHCI_HCD=y +CONFIG_USB_OHCI_GENERIC=y +CONFIG_USB_DWC3=y +CONFIG_USB_DWC3_GENERIC=y +CONFIG_ERRNO_STR=y diff --git a/configs/generic-rk3576_defconfig b/configs/generic-rk3576_defconfig new file mode 100644 index 00000000000..5e25653820c --- /dev/null +++ b/configs/generic-rk3576_defconfig @@ -0,0 +1,50 @@ +CONFIG_ARM=y +CONFIG_SKIP_LOWLEVEL_INIT=y +CONFIG_COUNTER_FREQUENCY=24000000 +CONFIG_ARCH_ROCKCHIP=y +CONFIG_DEFAULT_DEVICE_TREE="rk3576-generic" +CONFIG_ROCKCHIP_RK3576=y +CONFIG_SYS_LOAD_ADDR=0x40c00800 +CONFIG_DEBUG_UART_BASE=0x2AD40000 +CONFIG_DEBUG_UART_CLOCK=24000000 +CONFIG_DEBUG_UART=y +# CONFIG_BOOTMETH_VBE is not set +CONFIG_DEFAULT_FDT_FILE="rockchip/rk3576-generic.dtb" +# CONFIG_DISPLAY_CPUINFO is not set +CONFIG_SPL_MAX_SIZE=0x40000 +# CONFIG_SPL_RAW_IMAGE_SUPPORT is not set +CONFIG_CMD_MEMINFO=y +CONFIG_CMD_MEMINFO_MAP=y +CONFIG_CMD_GPIO=y +CONFIG_CMD_GPT=y +CONFIG_CMD_MISC=y +CONFIG_CMD_MMC=y +CONFIG_CMD_ROCKUSB=y +CONFIG_CMD_USB_MASS_STORAGE=y +# CONFIG_CMD_SETEXPR is not set +CONFIG_CMD_RNG=y +# CONFIG_SPL_DOS_PARTITION is not set +# CONFIG_OF_UPSTREAM is not set +CONFIG_OF_SPL_REMOVE_PROPS="clock-names interrupt-parent assigned-clocks assigned-clock-rates assigned-clock-parents" +CONFIG_NO_NET=y +# CONFIG_ADC is not set +# CONFIG_USB_FUNCTION_FASTBOOT is not set +CONFIG_ROCKCHIP_GPIO=y +CONFIG_SUPPORT_EMMC_RPMB=y +CONFIG_MMC_DW=y +CONFIG_MMC_DW_ROCKCHIP=y +CONFIG_MMC_SDHCI=y +CONFIG_MMC_SDHCI_SDMA=y +CONFIG_MMC_SDHCI_ROCKCHIP=y +CONFIG_PHY_ROCKCHIP_INNO_USB2=y +CONFIG_BAUDRATE=1500000 +CONFIG_DEBUG_UART_SHIFT=2 +CONFIG_SYS_NS16550_MEM32=y +CONFIG_SYSRESET_PSCI=y +CONFIG_USB=y +CONFIG_USB_DWC3=y +CONFIG_USB_DWC3_GENERIC=y +CONFIG_USB_GADGET=y +CONFIG_USB_GADGET_DOWNLOAD=y +CONFIG_USB_FUNCTION_ROCKUSB=y +CONFIG_ERRNO_STR=y diff --git a/configs/generic-rk3588_defconfig b/configs/generic-rk3588_defconfig index ed2f936b324..dfa8efabe6b 100644 --- a/configs/generic-rk3588_defconfig +++ b/configs/generic-rk3588_defconfig @@ -53,7 +53,6 @@ CONFIG_MMC_SDHCI=y CONFIG_MMC_SDHCI_SDMA=y CONFIG_MMC_SDHCI_ROCKCHIP=y CONFIG_PHY_ROCKCHIP_INNO_USB2=y -CONFIG_PHY_ROCKCHIP_USBDP=y CONFIG_SPL_PINCTRL=y CONFIG_SPL_RAM=y CONFIG_BAUDRATE=1500000 diff --git a/configs/imx93-phycore_defconfig b/configs/imx93-phycore_defconfig index 6210be64672..af149128ed4 100644 --- a/configs/imx93-phycore_defconfig +++ b/configs/imx93-phycore_defconfig @@ -92,6 +92,7 @@ CONFIG_USE_ETHPRIME=y CONFIG_ETHPRIME="eth1" CONFIG_NET_RANDOM_ETHADDR=y CONFIG_SPL_DM=y +CONFIG_SPL_DM_SEQ_ALIAS=y CONFIG_SPL_CLK_IMX93=y CONFIG_CLK_IMX93=y CONFIG_DFU_MMC=y diff --git a/configs/jaguar-rk3588_defconfig b/configs/jaguar-rk3588_defconfig index 13cff7b1a02..3ed07d18e10 100644 --- a/configs/jaguar-rk3588_defconfig +++ b/configs/jaguar-rk3588_defconfig @@ -27,6 +27,7 @@ CONFIG_DEFAULT_FDT_FILE="rockchip/rk3588-jaguar.dtb" CONFIG_DISPLAY_BOARDINFO_LATE=y CONFIG_CYCLIC=y CONFIG_SPL_MAX_SIZE=0x40000 +CONFIG_SPL_BOARD_INIT=y # CONFIG_SPL_RAW_IMAGE_SUPPORT is not set CONFIG_SPL_ATF=y # CONFIG_BOOTM_NETBSD is not set @@ -34,6 +35,7 @@ CONFIG_SPL_ATF=y # CONFIG_BOOTM_RTEMS is not set # CONFIG_BOOTM_VXWORKS is not set # CONFIG_CMD_ELF is not set +CONFIG_CMD_ERASEENV=y CONFIG_CMD_ADC=y CONFIG_CMD_GPIO=y CONFIG_CMD_GPT=y diff --git a/configs/nanopi-r5s-rk3568_defconfig b/configs/nanopi-r5s-rk3568_defconfig index 8e5e7e3e1e5..1653ab8b44f 100644 --- a/configs/nanopi-r5s-rk3568_defconfig +++ b/configs/nanopi-r5s-rk3568_defconfig @@ -28,6 +28,8 @@ CONFIG_CMD_I2C=y CONFIG_CMD_MMC=y CONFIG_CMD_PCI=y CONFIG_CMD_USB=y +CONFIG_CMD_ROCKUSB=y +CONFIG_CMD_USB_MASS_STORAGE=y CONFIG_CMD_PMIC=y CONFIG_CMD_REGULATOR=y # CONFIG_SPL_DOS_PARTITION is not set @@ -38,6 +40,7 @@ CONFIG_SPL_DM_SEQ_ALIAS=y CONFIG_SPL_REGMAP=y CONFIG_SPL_SYSCON=y CONFIG_SPL_CLK=y +# CONFIG_USB_FUNCTION_FASTBOOT is not set CONFIG_ROCKCHIP_GPIO=y CONFIG_SYS_I2C_ROCKCHIP=y CONFIG_MISC=y @@ -73,4 +76,8 @@ CONFIG_USB_OHCI_HCD=y CONFIG_USB_OHCI_GENERIC=y CONFIG_USB_DWC3=y CONFIG_USB_DWC3_GENERIC=y +CONFIG_SPL_USB_DWC3_GENERIC=y +CONFIG_USB_GADGET=y +CONFIG_USB_GADGET_DOWNLOAD=y +CONFIG_USB_FUNCTION_ROCKUSB=y CONFIG_ERRNO_STR=y diff --git a/configs/orangepi-5-ultra-rk3588_defconfig b/configs/orangepi-5-ultra-rk3588_defconfig new file mode 100644 index 00000000000..f3274325922 --- /dev/null +++ b/configs/orangepi-5-ultra-rk3588_defconfig @@ -0,0 +1,88 @@ +CONFIG_ARM=y +CONFIG_SKIP_LOWLEVEL_INIT=y +CONFIG_SYS_HAS_NONCACHED_MEMORY=y +CONFIG_COUNTER_FREQUENCY=24000000 +CONFIG_ARCH_ROCKCHIP=y +CONFIG_SF_DEFAULT_SPEED=80000000 +CONFIG_SF_DEFAULT_MODE=0x2000 +CONFIG_DEFAULT_DEVICE_TREE="rockchip/rk3588-orangepi-5-ultra" +CONFIG_ROCKCHIP_RK3588=y +CONFIG_ROCKCHIP_SPI_IMAGE=y +CONFIG_SPL_SERIAL=y +CONFIG_TARGET_EVB_RK3588=y +CONFIG_SYS_LOAD_ADDR=0xc00800 +CONFIG_SF_DEFAULT_BUS=5 +CONFIG_DEBUG_UART_BASE=0xFEB50000 +CONFIG_DEBUG_UART_CLOCK=24000000 +CONFIG_SPL_SPI_FLASH_SUPPORT=y +CONFIG_SPL_SPI=y +CONFIG_PCI=y +CONFIG_DEBUG_UART=y +CONFIG_AHCI=y +CONFIG_FIT=y +CONFIG_FIT_VERBOSE=y +CONFIG_SPL_FIT_SIGNATURE=y +CONFIG_SPL_LOAD_FIT=y +CONFIG_LEGACY_IMAGE_FORMAT=y +CONFIG_DEFAULT_FDT_FILE="rockchip/rk3588-orangepi-5-ultra.dtb" +# CONFIG_DISPLAY_CPUINFO is not set +CONFIG_DISPLAY_BOARDINFO_LATE=y +CONFIG_SPL_MAX_SIZE=0x40000 +# CONFIG_SPL_RAW_IMAGE_SUPPORT is not set +CONFIG_SPL_SPI_LOAD=y +CONFIG_SYS_SPI_U_BOOT_OFFS=0x60000 +CONFIG_SPL_ATF=y +CONFIG_CMD_GPIO=y +CONFIG_CMD_GPT=y +CONFIG_CMD_I2C=y +CONFIG_CMD_MMC=y +CONFIG_CMD_PCI=y +CONFIG_CMD_USB=y +# CONFIG_CMD_SETEXPR is not set +CONFIG_CMD_REGULATOR=y +# CONFIG_SPL_DOS_PARTITION is not set +CONFIG_SPL_OF_CONTROL=y +CONFIG_OF_LIVE=y +CONFIG_OF_SPL_REMOVE_PROPS="clock-names interrupt-parent assigned-clocks assigned-clock-rates assigned-clock-parents" +CONFIG_SPL_DM_SEQ_ALIAS=y +CONFIG_SPL_REGMAP=y +CONFIG_SPL_SYSCON=y +CONFIG_AHCI_PCI=y +CONFIG_DWC_AHCI=y +CONFIG_SPL_CLK=y +CONFIG_ROCKCHIP_GPIO=y +CONFIG_SYS_I2C_ROCKCHIP=y +CONFIG_MISC=y +CONFIG_SUPPORT_EMMC_RPMB=y +CONFIG_MMC_DW=y +CONFIG_MMC_DW_ROCKCHIP=y +CONFIG_MMC_SDHCI=y +CONFIG_MMC_SDHCI_SDMA=y +CONFIG_MMC_SDHCI_ROCKCHIP=y +CONFIG_SPI_FLASH_SFDP_SUPPORT=y +CONFIG_SPI_FLASH_XMC=y +CONFIG_PHYLIB=y +CONFIG_RTL8169=y +CONFIG_NVME_PCI=y +CONFIG_PCIE_DW_ROCKCHIP=y +CONFIG_PHY_ROCKCHIP_INNO_USB2=y +CONFIG_PHY_ROCKCHIP_NANENG_COMBOPHY=y +CONFIG_PHY_ROCKCHIP_USBDP=y +CONFIG_SPL_PINCTRL=y +CONFIG_PWM_ROCKCHIP=y +CONFIG_SPL_RAM=y +CONFIG_SCSI=y +CONFIG_BAUDRATE=1500000 +CONFIG_DEBUG_UART_SHIFT=2 +CONFIG_SYS_NS16550_MEM32=y +CONFIG_ROCKCHIP_SFC=y +CONFIG_SYSRESET=y +CONFIG_USB=y +CONFIG_USB_XHCI_HCD=y +CONFIG_USB_EHCI_HCD=y +CONFIG_USB_EHCI_GENERIC=y +CONFIG_USB_OHCI_HCD=y +CONFIG_USB_OHCI_GENERIC=y +CONFIG_USB_DWC3=y +CONFIG_USB_DWC3_GENERIC=y +CONFIG_ERRNO_STR=y diff --git a/configs/p3450-0000_defconfig b/configs/p3450-0000_defconfig index a002178b7fb..2ebcf8b83fc 100644 --- a/configs/p3450-0000_defconfig +++ b/configs/p3450-0000_defconfig @@ -18,13 +18,21 @@ CONFIG_TEGRA210=y CONFIG_TARGET_P3450_0000=y CONFIG_TEGRA_GPU=y CONFIG_PCI=y +CONFIG_HAS_BOARD_SIZE_LIMIT=y +CONFIG_BOARD_SIZE_LIMIT=753664 CONFIG_OF_BOARD_SETUP=y CONFIG_OF_SYSTEM_SETUP=y CONFIG_SYS_PBSIZE=2089 CONFIG_CONSOLE_MUX=y CONFIG_SYS_STDIO_DEREGISTER=y CONFIG_SYS_PROMPT="Tegra210 (P3450-0000) # " +# CONFIG_BOOTM_PLAN9 is not set +# CONFIG_BOOTM_RTEMS is not set +# CONFIG_BOOTM_VXWORKS is not set +# CONFIG_CMD_ELF is not set +# CONFIG_CMD_GO is not set # CONFIG_CMD_IMI is not set +# CONFIG_CRC32_VERIFY is not set CONFIG_CMD_DFU=y CONFIG_CMD_GPIO=y CONFIG_CMD_I2C=y @@ -53,7 +61,6 @@ CONFIG_RTL8169=y CONFIG_NVME_PCI=y CONFIG_PCI_TEGRA=y CONFIG_SYS_NS16550=y -CONFIG_TEGRA114_SPI=y CONFIG_TEGRA210_QSPI=y CONFIG_USB=y CONFIG_USB_EHCI_HCD=y diff --git a/configs/puma-rk3399_defconfig b/configs/puma-rk3399_defconfig index 817d4fe1d64..2070d534232 100644 --- a/configs/puma-rk3399_defconfig +++ b/configs/puma-rk3399_defconfig @@ -36,6 +36,7 @@ CONFIG_TPL_GPIO=y # CONFIG_BOOTM_RTEMS is not set # CONFIG_CMD_VBE is not set # CONFIG_BOOTM_VXWORKS is not set +CONFIG_CMD_ERASEENV=y CONFIG_CMD_GPIO=y CONFIG_CMD_GPT=y CONFIG_CMD_I2C=y diff --git a/configs/r8a779g3_sparrowhawk_defconfig b/configs/r8a779g3_sparrowhawk_defconfig index 9cee4d287ef..2d1abf6f26d 100644 --- a/configs/r8a779g3_sparrowhawk_defconfig +++ b/configs/r8a779g3_sparrowhawk_defconfig @@ -18,7 +18,7 @@ CONFIG_SYS_BARGSIZE=2048 CONFIG_SYS_CBSIZE=2048 CONFIG_BAUDRATE=921600 CONFIG_BINMAN=y -CONFIG_BOOTCOMMAND="tftp 0x50000000 fitImage && bootm 0x50000000" +CONFIG_BOOTCOMMAND="tftp ${loadaddr} fitImage && bootm ${loadaddr}" CONFIG_DEFAULT_FDT_FILE="r8a779g3-sparrow-hawk.dtb" CONFIG_CMD_REMOTEPROC=y CONFIG_GPIO_HOG=y diff --git a/configs/radxa-e20c-rk3528_defconfig b/configs/radxa-e20c-rk3528_defconfig index f5e097f3edf..0941d1b9be8 100644 --- a/configs/radxa-e20c-rk3528_defconfig +++ b/configs/radxa-e20c-rk3528_defconfig @@ -20,6 +20,8 @@ CONFIG_CMD_GPT=y CONFIG_CMD_MISC=y CONFIG_CMD_MMC=y CONFIG_CMD_USB=y +CONFIG_CMD_ROCKUSB=y +CONFIG_CMD_USB_MASS_STORAGE=y # CONFIG_CMD_SETEXPR is not set CONFIG_CMD_RNG=y CONFIG_CMD_REGULATOR=y @@ -28,6 +30,7 @@ CONFIG_OF_SPL_REMOVE_PROPS="clock-names interrupt-parent assigned-clocks assigne CONFIG_BUTTON=y CONFIG_BUTTON_ADC=y CONFIG_BUTTON_GPIO=y +# CONFIG_USB_FUNCTION_FASTBOOT is not set CONFIG_ROCKCHIP_GPIO=y CONFIG_LED=y CONFIG_LED_GPIO=y @@ -43,6 +46,7 @@ CONFIG_DM_MDIO=y CONFIG_DWC_ETH_QOS=y CONFIG_DWC_ETH_QOS_ROCKCHIP=y CONFIG_PHY_ROCKCHIP_INNO_USB2=y +CONFIG_PHY_ROCKCHIP_NANENG_COMBOPHY=y CONFIG_REGULATOR_PWM=y CONFIG_DM_REGULATOR_GPIO=y CONFIG_PWM_ROCKCHIP=y @@ -50,6 +54,12 @@ CONFIG_BAUDRATE=1500000 CONFIG_DEBUG_UART_SHIFT=2 CONFIG_SYS_NS16550_MEM32=y CONFIG_USB=y +CONFIG_USB_XHCI_HCD=y CONFIG_USB_EHCI_HCD=y CONFIG_USB_EHCI_GENERIC=y +CONFIG_USB_DWC3=y +CONFIG_USB_DWC3_GENERIC=y +CONFIG_USB_GADGET=y +CONFIG_USB_GADGET_DOWNLOAD=y +CONFIG_USB_FUNCTION_ROCKUSB=y CONFIG_ERRNO_STR=y diff --git a/configs/renesas_rcar.config b/configs/renesas_rcar.config index db5846e992c..45776be62ea 100644 --- a/configs/renesas_rcar.config +++ b/configs/renesas_rcar.config @@ -18,6 +18,7 @@ CONFIG_DM_REGULATOR_GPIO=y CONFIG_DM_SPI=y CONFIG_DM_SPI_FLASH=y CONFIG_ENV_OVERWRITE=y +CONFIG_ENV_VARS_UBOOT_CONFIG=y CONFIG_FIT=y CONFIG_HUSH_PARSER=y CONFIG_MTD=y diff --git a/configs/ringneck-px30_defconfig b/configs/ringneck-px30_defconfig index ba15e386770..2240ba80e5e 100644 --- a/configs/ringneck-px30_defconfig +++ b/configs/ringneck-px30_defconfig @@ -40,6 +40,7 @@ CONFIG_SPL_ATF=y # CONFIG_CMD_VBE is not set # CONFIG_BOOTM_VXWORKS is not set # CONFIG_CMD_ELF is not set +CONFIG_CMD_ERASEENV=y # CONFIG_CMD_LZMADEC is not set # CONFIG_CMD_UNZIP is not set CONFIG_CMD_BIND=y diff --git a/configs/sandbox_defconfig b/configs/sandbox_defconfig index e9a70b26044..23651ec764d 100644 --- a/configs/sandbox_defconfig +++ b/configs/sandbox_defconfig @@ -207,9 +207,7 @@ CONFIG_ARM_FFA_TRANSPORT=y CONFIG_FPGA_ALTERA=y CONFIG_FPGA_STRATIX_II=y CONFIG_FPGA_STRATIX_V=y -CONFIG_FPGA_ACEX1K=y CONFIG_FPGA_CYCLON2=y -CONFIG_FPGA_LATTICE=y CONFIG_FPGA_XILINX=y CONFIG_FPGA_SPARTAN2=y CONFIG_FPGA_SPARTAN3=y diff --git a/configs/sige5-rk3576_defconfig b/configs/sige5-rk3576_defconfig new file mode 100644 index 00000000000..c515e145595 --- /dev/null +++ b/configs/sige5-rk3576_defconfig @@ -0,0 +1,66 @@ +CONFIG_ARM=y +CONFIG_SKIP_LOWLEVEL_INIT=y +CONFIG_COUNTER_FREQUENCY=24000000 +CONFIG_ARCH_ROCKCHIP=y +CONFIG_DEFAULT_DEVICE_TREE="rockchip/rk3576-armsom-sige5" +CONFIG_ROCKCHIP_RK3576=y +CONFIG_SYS_LOAD_ADDR=0x40c00800 +CONFIG_DEBUG_UART_BASE=0x2AD40000 +CONFIG_DEBUG_UART_CLOCK=24000000 +CONFIG_PCI=y +CONFIG_DEBUG_UART=y +CONFIG_DEFAULT_FDT_FILE="rockchip/rk3576-armsom-sige5.dtb" +# CONFIG_DISPLAY_CPUINFO is not set +CONFIG_SPL_MAX_SIZE=0x40000 +# CONFIG_SPL_RAW_IMAGE_SUPPORT is not set +CONFIG_CMD_MEMINFO=y +CONFIG_CMD_MEMINFO_MAP=y +CONFIG_CMD_ADC=y +CONFIG_CMD_GPIO=y +CONFIG_CMD_GPT=y +CONFIG_CMD_I2C=y +CONFIG_CMD_MISC=y +CONFIG_CMD_MMC=y +CONFIG_CMD_PCI=y +CONFIG_CMD_USB=y +CONFIG_CMD_ROCKUSB=y +CONFIG_CMD_USB_MASS_STORAGE=y +# CONFIG_CMD_SETEXPR is not set +CONFIG_CMD_RNG=y +CONFIG_CMD_REGULATOR=y +# CONFIG_SPL_DOS_PARTITION is not set +CONFIG_OF_SPL_REMOVE_PROPS="clock-names interrupt-parent assigned-clocks assigned-clock-rates assigned-clock-parents" +# CONFIG_USB_FUNCTION_FASTBOOT is not set +CONFIG_ROCKCHIP_GPIO=y +CONFIG_SYS_I2C_ROCKCHIP=y +CONFIG_LED=y +CONFIG_LED_GPIO=y +CONFIG_SUPPORT_EMMC_RPMB=y +CONFIG_MMC_DW=y +CONFIG_MMC_DW_ROCKCHIP=y +CONFIG_MMC_SDHCI=y +CONFIG_MMC_SDHCI_SDMA=y +CONFIG_MMC_SDHCI_ROCKCHIP=y +CONFIG_PHY_REALTEK=y +CONFIG_DWC_ETH_QOS=y +CONFIG_DWC_ETH_QOS_ROCKCHIP=y +CONFIG_NVME_PCI=y +CONFIG_PCIE_DW_ROCKCHIP=y +CONFIG_PHY_ROCKCHIP_INNO_USB2=y +CONFIG_PHY_ROCKCHIP_NANENG_COMBOPHY=y +CONFIG_PHY_ROCKCHIP_USBDP=y +CONFIG_DM_PMIC=y +CONFIG_PMIC_RK8XX=y +CONFIG_REGULATOR_RK8XX=y +CONFIG_BAUDRATE=1500000 +CONFIG_DEBUG_UART_SHIFT=2 +CONFIG_SYS_NS16550_MEM32=y +CONFIG_SYSRESET_PSCI=y +CONFIG_USB=y +CONFIG_USB_XHCI_HCD=y +CONFIG_USB_DWC3=y +CONFIG_USB_DWC3_GENERIC=y +CONFIG_USB_GADGET=y +CONFIG_USB_GADGET_DOWNLOAD=y +CONFIG_USB_FUNCTION_ROCKUSB=y +CONFIG_ERRNO_STR=y diff --git a/configs/starfive_visionfive2_defconfig b/configs/starfive_visionfive2_defconfig index 544140c03f7..bd1aacbad6a 100644 --- a/configs/starfive_visionfive2_defconfig +++ b/configs/starfive_visionfive2_defconfig @@ -85,6 +85,7 @@ CONFIG_ENV_IS_IN_SPI_FLASH=y CONFIG_ENV_SECT_SIZE_AUTO=y CONFIG_ENV_RELOC_GD_ENV_ADDR=y CONFIG_NET_LWIP=y +CONFIG_DNS=y CONFIG_SPL_DM_SEQ_ALIAS=y CONFIG_REGMAP=y CONFIG_SYSCON=y diff --git a/configs/stm32mp25_defconfig b/configs/stm32mp25_defconfig index 14619ffd96c..2b02cd86d61 100644 --- a/configs/stm32mp25_defconfig +++ b/configs/stm32mp25_defconfig @@ -41,6 +41,8 @@ CONFIG_CMD_REGULATOR=y CONFIG_CMD_LOG=y CONFIG_CMD_UBI=y CONFIG_OF_LIVE=y +CONFIG_OF_UPSTREAM_BUILD_VENDOR=y +CONFIG_OF_UPSTREAM_VENDOR="st" CONFIG_ENV_IS_NOWHERE=y CONFIG_ENV_IS_IN_MMC=y CONFIG_ENV_IS_IN_SPI_FLASH=y diff --git a/configs/surface-2_defconfig b/configs/surface-2_defconfig new file mode 100644 index 00000000000..6e287539f53 --- /dev/null +++ b/configs/surface-2_defconfig @@ -0,0 +1,80 @@ +CONFIG_ARM=y +CONFIG_ARCH_TEGRA=y +CONFIG_SUPPORT_PASSING_ATAGS=y +CONFIG_CMDLINE_TAG=y +CONFIG_INITRD_TAG=y +CONFIG_TEXT_BASE=0x80110000 +CONFIG_SYS_MALLOC_LEN=0x2500000 +CONFIG_NR_DRAM_BANKS=2 +CONFIG_ENV_SOURCE_FILE="surface-2" +CONFIG_ENV_SIZE=0x3000 +CONFIG_ENV_OFFSET=0xFFFFD000 +CONFIG_DEFAULT_DEVICE_TREE="tegra114-microsoft-surface-2-0b" +CONFIG_SPL_STACK=0x800ffffc +CONFIG_SPL_TEXT_BASE=0x80108000 +CONFIG_SYS_LOAD_ADDR=0x82000000 +CONFIG_TEGRA114=y +CONFIG_TARGET_SURFACE_2=y +CONFIG_BUTTON_CMD=y +CONFIG_BOOTDELAY=0 +CONFIG_AUTOBOOT_KEYED=y +CONFIG_AUTOBOOT_KEYED_CTRLC=y +CONFIG_OF_SYSTEM_SETUP=y +CONFIG_SYS_PBSIZE=2086 +CONFIG_SPL_FOOTPRINT_LIMIT=y +CONFIG_SPL_MAX_FOOTPRINT=0x8000 +# CONFIG_SPL_SHARES_INIT_SP_ADDR is not set +CONFIG_SPL_HAVE_INIT_STACK=y +CONFIG_SPL_SYS_MALLOC=y +CONFIG_SPL_HAS_CUSTOM_MALLOC_START=y +CONFIG_SPL_CUSTOM_SYS_MALLOC_ADDR=0x80090000 +CONFIG_SPL_SYS_MALLOC_SIZE=0x10000 +CONFIG_SYS_PROMPT="Tegra114 (Surface 2) # " +# CONFIG_CMD_BOOTEFI_BOOTMGR is not set +CONFIG_CMD_BOOTMENU=y +# CONFIG_CMD_IMI is not set +CONFIG_CMD_GPIO=y +CONFIG_CMD_I2C=y +CONFIG_CMD_MMC=y +CONFIG_CMD_POWEROFF=y +CONFIG_CMD_USB=y +CONFIG_CMD_USB_MASS_STORAGE=y +CONFIG_CMD_UMS_ABORT_KEYED=y +# CONFIG_CMD_SETEXPR is not set +CONFIG_CMD_PAUSE=y +CONFIG_CMD_REGULATOR=y +CONFIG_CMD_EXT4_WRITE=y +# CONFIG_SPL_DOS_PARTITION is not set +# CONFIG_SPL_EFI_PARTITION is not set +CONFIG_OF_LIST="tegra114-microsoft-surface-2-0b tegra114-microsoft-surface-2-13" +CONFIG_DTB_RESELECT=y +CONFIG_MULTI_DTB_FIT=y +CONFIG_ENV_OVERWRITE=y +CONFIG_ENV_IS_IN_MMC=y +CONFIG_BUTTON=y +CONFIG_USB_FUNCTION_FASTBOOT=y +CONFIG_FASTBOOT_BUF_ADDR=0x91000000 +CONFIG_FASTBOOT_BUF_SIZE=0x10000000 +CONFIG_SYS_I2C_TEGRA=y +CONFIG_BUTTON_KEYBOARD=y +CONFIG_DM_PMIC=y +CONFIG_PMIC_TPS65090=y +CONFIG_PMIC_PALMAS=y +CONFIG_DM_REGULATOR=y +CONFIG_DM_REGULATOR_FIXED=y +CONFIG_REGULATOR_TPS65090=y +CONFIG_DM_REGULATOR_PALMAS=y +CONFIG_PWM_TEGRA=y +CONFIG_SYS_NS16550=y +CONFIG_SYSRESET_PALMAS=y +CONFIG_USB=y +CONFIG_USB_EHCI_HCD=y +CONFIG_USB_EHCI_TEGRA=y +CONFIG_USB_KEYBOARD=y +CONFIG_USB_GADGET=y +CONFIG_CI_UDC=y +CONFIG_VIDEO=y +# CONFIG_VIDEO_LOGO is not set +CONFIG_VIDEO_LCD_SAMSUNG_LTL106HL02=y +CONFIG_VIDEO_BRIDGE=y +CONFIG_VIDEO_DSI_TEGRA=y diff --git a/configs/tiger-rk3588_defconfig b/configs/tiger-rk3588_defconfig index 335ea4d8de3..8ba2a996ee2 100644 --- a/configs/tiger-rk3588_defconfig +++ b/configs/tiger-rk3588_defconfig @@ -35,6 +35,7 @@ CONFIG_SPL_ATF=y # CONFIG_BOOTM_RTEMS is not set # CONFIG_BOOTM_VXWORKS is not set # CONFIG_CMD_ELF is not set +CONFIG_CMD_ERASEENV=y CONFIG_CMD_ADC=y CONFIG_CMD_GPIO=y CONFIG_CMD_GPT=y diff --git a/doc/board/microsoft/index.rst b/doc/board/microsoft/index.rst index 107f3527852..8318449a9a2 100644 --- a/doc/board/microsoft/index.rst +++ b/doc/board/microsoft/index.rst @@ -6,4 +6,5 @@ Microsoft .. toctree:: :maxdepth: 2 + surface-2 surface-rt diff --git a/doc/board/microsoft/surface-2.rst b/doc/board/microsoft/surface-2.rst new file mode 100644 index 00000000000..8185c6f5ae4 --- /dev/null +++ b/doc/board/microsoft/surface-2.rst @@ -0,0 +1,41 @@ +.. SPDX-License-Identifier: GPL-2.0+ + +U-Boot for the Microsoft Surface 2 tablet +========================================= + +Quick Start +----------- + +- Build U-Boot +- Boot + +Build U-Boot +------------ + +.. code-block:: bash + + $ export CROSS_COMPILE=arm-none-eabi- + $ make surface-2_defconfig + $ make + +After the build succeeds, you will obtain the final ``u-boot-dtb-tegra.bin`` +image, ready for loading. + +Boot +---- + +Currently, U-Boot can be preloaded into RAM via the Fusée Gelée. To enter +RCM protocol use ``power`` and ``volume up`` key combination from powered +off device. The host PC should recognize an APX device. + +Built U-Boot ``u-boot-dtb-tegra.bin`` can be loaded from fusee-tools +directory with + +.. code-block:: bash + + $ ./run_bootloader.sh -s T30 -t ./bct/surface-2.bct + +To boot Linux, U-Boot will look for an ``extlinux.conf`` on MicroSD and then on +eMMC. Additionally, if the Volume Down button is pressed while loading, the +device will enter bootmenu. Bootmenu contains entries to mount MicroSD and eMMC +as mass storage, fastboot, poweroff and enter U-Boot console. diff --git a/doc/board/rockchip/rockchip.rst b/doc/board/rockchip/rockchip.rst index b88299cbba2..de3aa79cb5c 100644 --- a/doc/board/rockchip/rockchip.rst +++ b/doc/board/rockchip/rockchip.rst @@ -134,7 +134,9 @@ List of mainline supported Rockchip boards: - Radxa ROCK 3B (rock-3b-rk3568) * rk3576 + - ArmSoM Sige5 (sige5-rk3576) - Firefly ROC-RK3576-PC (roc-pc-rk3576) + - Generic RK3576 (generic-rk3576) * rk3588 - ArmSoM Sige7 (sige7-rk3588) @@ -145,6 +147,7 @@ List of mainline supported Rockchip boards: - FriendlyElec NanoPC-T6 (nanopc-t6-rk3588) - FriendlyElec NanoPi R6C (nanopi-r6c-rk3588s) - FriendlyElec NanoPi R6S (nanopi-r6s-rk3588s) + - GameForce Ace (gameforce-ace-rk3588s) - Generic RK3588S/RK3588 (generic-rk3588) - Hardkernel ODROID-M2 (odroid-m2-rk3588s) - Indiedroid Nova (nova-rk3588s) @@ -161,6 +164,7 @@ List of mainline supported Rockchip boards: - Xunlong Orange Pi 5 (orangepi-5-rk3588s) - Xunlong Orange Pi 5 Max (orangepi-5-max-rk3588) - Xunlong Orange Pi 5 Plus (orangepi-5-plus-rk3588) + - Xunlong Orange Pi 5 Ultra (orangepi-5-ultra-rk3588) - Yanyi Tech CoolPi 4 Model B (coolpi-4b-rk3588s) - Yanyi Tech CoolPi CM5 EVB (coolpi-cm5-evb-rk3588) - Yanyi Tech CoolPi CM5 GenBook (coolpi-cm5-genbook-rk3588) diff --git a/doc/build/clang.rst b/doc/build/clang.rst index 09bb988e923..a83ecb4fdc6 100644 --- a/doc/build/clang.rst +++ b/doc/build/clang.rst @@ -46,9 +46,9 @@ It can also be used to compile sandbox: FreeBSD 11 ---------- -Since llvm 3.4 is currently in the base system, the integrated assembler as -is incapable of building U-Boot. Therefore gas from devel/arm-gnueabi-binutils -is used instead. It needs a symlink to be picked up correctly though: +Since LLVM 3.4 is currently in the base system, the integrated assembler is +incapable of building U-Boot. Therefore gas from devel/arm-gnueabi-binutils is +used instead. It needs a symbolic link to be picked up correctly though: .. code-block:: bash @@ -64,7 +64,7 @@ The following commands compile U-Boot using the Clang xdev toolchain. gmake rpi_2_defconfig gmake CC="clang -target arm-freebsd-eabi --sysroot /usr/arm-freebsd" -j8 -Given that U-Boot will default to gcc, above commands can be +Given that U-Boot will default to gcc, the commands above can be simplified with a simple wrapper script - saved as /usr/local/bin/arm-gnueabi-freebsd-gcc - listed below: diff --git a/doc/build/gen_compile_commands.rst b/doc/build/gen_compile_commands.rst index d503764f9e3..5eb9e4ccb0a 100644 --- a/doc/build/gen_compile_commands.rst +++ b/doc/build/gen_compile_commands.rst @@ -39,7 +39,7 @@ course) to have an up-to-date database. The database will be in the root of the repository. No further modifications are needed for it to be usable by the LSP, unless you set a name for the database -other than it's default one (compile_commands.json). +other than the default one (compile_commands.json). Compatible IDEs --------------- diff --git a/doc/build/reproducible.rst b/doc/build/reproducible.rst index 8b030f469d7..1512129e374 100644 --- a/doc/build/reproducible.rst +++ b/doc/build/reproducible.rst @@ -24,4 +24,4 @@ This date is shown when we launch U-Boot: ./u-boot -T U-Boot 2023.01 (Jan 01 2023 - 00:00:00 +0000) -The same effect can be obtained with buildman using the `-r` flag. +The same effect can be obtained with Buildman using the `-r` flag. diff --git a/doc/build/tools.rst b/doc/build/tools.rst index 5bfa05b2325..1cc8eb93230 100644 --- a/doc/build/tools.rst +++ b/doc/build/tools.rst @@ -8,7 +8,7 @@ Building tools for Linux ------------------------ To allow distributions to distribute all possible tools in a generic way, -avoiding the need of specific tools building for each machine, a tools only +avoiding the need of specific building tools for each machine, a tools-only defconfig file is provided. Using this, we can build the tools by doing:: @@ -30,9 +30,8 @@ installed all required packages below in order to build these host tools:: * diffutils (3.7) * openssl-devel (1.1.1.d) -Note the version numbers in these parentheses above are the package versions -at the time being when writing this document. The MSYS2 installer tested is -http://repo.msys2.org/distrib/x86_64/msys2-x86_64-20190524.exe. +Note that the version numbers in parentheses above are the package versions at +the time of writing this document. There are 3 MSYS subsystems installed: MSYS2, MinGW32 and MinGW64. Each subsystem provides an environment to build Windows applications. The MSYS2 @@ -50,7 +49,7 @@ Launch the MSYS2 shell of the MSYS2 environment, and do the following:: Building without Python ----------------------- -The tools-only builds bytes pylibfdt by default. To disable this, use the +The tools-only builds pylibfdt by default. To disable this, use the NO_PYTHON variable:: NO_PYTHON=1 make tools-only_defconfig tools-only diff --git a/doc/develop/release_cycle.rst b/doc/develop/release_cycle.rst index 354ab1b5d74..daf73e207d4 100644 --- a/doc/develop/release_cycle.rst +++ b/doc/develop/release_cycle.rst @@ -75,9 +75,9 @@ For the next scheduled release, release candidates were made on:: * U-Boot |next_ver|-rc2 was released on Mon 11 August 2025. -.. * U-Boot |next_ver|-rc3 was released on Mon 25 August 2025. +* U-Boot |next_ver|-rc3 was released on Mon 25 August 2025. -.. * U-Boot |next_ver|-rc4 was released on Mon 08 September 2025. +* U-Boot |next_ver|-rc4 was released on Mon 08 September 2025. .. * U-Boot |next_ver|-rc5 was released on Mon 22 September 2025. diff --git a/doc/device-tree-bindings/power/ti,sci-pm-domain.txt b/doc/device-tree-bindings/power/ti,sci-pm-domain.txt index 72d9fbc833c..81f6314230f 100644 --- a/doc/device-tree-bindings/power/ti,sci-pm-domain.txt +++ b/doc/device-tree-bindings/power/ti,sci-pm-domain.txt @@ -30,7 +30,7 @@ Required Properties: Example (AM65x): ---------------- sysfw: sysfw { - compatible = "ti,am654-system-controller"; + compatible = "ti,am654-tisci-rproc-r5"; ... k3_pds: power-controller { compatible = "ti,sci-pm-domain"; diff --git a/doc/device-tree-bindings/remoteproc/k3-system-controller.txt b/doc/device-tree-bindings/remoteproc/k3-system-controller.txt index 33dc46812ed..7de57ad4f00 100644 --- a/doc/device-tree-bindings/remoteproc/k3-system-controller.txt +++ b/doc/device-tree-bindings/remoteproc/k3-system-controller.txt @@ -8,7 +8,7 @@ This driver communicates with ROM for loading this firmware. Required properties: -------------------- -- compatible: Shall be: "ti,am654-system-controller" +- compatible: Shall be: "ti,am654-tisci-rproc-r5-r5" - mbox-names: "tx" for Transfer channel "rx" for Receive channel - mboxes: Corresponding phandles to mailbox channels. @@ -21,7 +21,7 @@ Example: -------- system-controller: system-controller { - compatible = "ti,am654-system-controller"; + compatible = "ti,am654-tisci-rproc-r5-r5"; mboxes= <&secproxy 4>, <&secproxy 5>; mbox-names = "tx", "rx"; }; diff --git a/doc/device-tree-bindings/reset/ti,sci-reset.txt b/doc/device-tree-bindings/reset/ti,sci-reset.txt index e7e2d13f9fb..740b2dfea64 100644 --- a/doc/device-tree-bindings/reset/ti,sci-reset.txt +++ b/doc/device-tree-bindings/reset/ti,sci-reset.txt @@ -23,7 +23,7 @@ Required Properties: Example (AM65x): ---------------- sysfw: sysfw { - compatible = "ti,am654-system-controller"; + compatible = "ti,am654-tisci-rproc-r5"; ... k3_reset: reset-controller { compatible = "ti,sci-reset"; diff --git a/doc/usage/cmd/sntp.rst b/doc/usage/cmd/sntp.rst index d97f83053f7..2046828130d 100644 --- a/doc/usage/cmd/sntp.rst +++ b/doc/usage/cmd/sntp.rst @@ -12,7 +12,7 @@ Synopsis :: sntp [serverip] - sntp [servername] # NET_LWIP=y && CMD_DNS=y only + sntp [servername] # NET_LWIP=y && DNS=y only Description @@ -27,8 +27,8 @@ The address of the NTP server does not need to be given if the DHCP server provides one. The legacy network stack (`CONFIG_NET=y`) can only use the first NTP server provided in the `ntp-servers` DHCP option. -When the network stack is lwIP (`CONFIG_NET_LWIP=y`) and the dns command -is enabled (`CONFIG_CMD_DNS=y`), then the sntp command accepts a server +When the network stack is lwIP (`CONFIG_NET_LWIP=y`) and DNS resolution +is enabled (`CONFIG_DNS=y`), then the sntp command accepts a server name as an argument. The network time is sent as UTC. So, if you want to set the RTC to any local @@ -61,7 +61,7 @@ Examples => date Date: 2025-06-16 (Monday) Time: 17:19:57 -With `CONFIG_NET_LWIP=y` and `CONFIG_CMD_DNS=y`: +With `CONFIG_NET_LWIP=y` and `CONFIG_DNS=y`: :: diff --git a/doc/usage/cmd/wget.rst b/doc/usage/cmd/wget.rst index 06df2842549..8feda0248b2 100644 --- a/doc/usage/cmd/wget.rst +++ b/doc/usage/cmd/wget.rst @@ -38,7 +38,7 @@ address memory address for the data downloaded host - IP address (or host name if `CONFIG_CMD_DNS` is enabled) of the HTTP + IP address (or host name if `CONFIG_DNS` is enabled) of the HTTP server, defaults to the value of environment variable *serverip*. path diff --git a/drivers/clk/at91/clk-main.c b/drivers/clk/at91/clk-main.c index a5186f885f0..0542b066788 100644 --- a/drivers/clk/at91/clk-main.c +++ b/drivers/clk/at91/clk-main.c @@ -315,7 +315,8 @@ static int clk_sam9x5_main_set_parent(struct clk *clk, struct clk *parent) { struct clk_main *main = to_clk_main(clk); void __iomem *reg = main->reg; - unsigned int tmp, index; + unsigned int tmp; + int index; index = at91_clk_mux_val_to_index(main->clk_mux_table, main->num_parents, AT91_CLK_ID_TO_DID(parent->id)); diff --git a/drivers/clk/at91/clk-master.c b/drivers/clk/at91/clk-master.c index cdc5271fa83..530205b8c6b 100644 --- a/drivers/clk/at91/clk-master.c +++ b/drivers/clk/at91/clk-master.c @@ -335,8 +335,8 @@ struct clk *at91_clk_sama7g5_register_master(void __iomem *base, { struct clk_master *master; struct clk *clk; - u32 val, index; - int ret; + u32 val; + int ret, index; if (!base || !name || !num_parents || !parent_names || !mux_table || !clk_mux_table || id > MASTER_MAX_ID) diff --git a/drivers/clk/at91/sckc.c b/drivers/clk/at91/sckc.c index 6d6f12578db..3fde8ea7138 100644 --- a/drivers/clk/at91/sckc.c +++ b/drivers/clk/at91/sckc.c @@ -74,8 +74,8 @@ static struct clk *at91_sam9x60_clk_register_td_slck(struct sam9x60_sckc *sckc, int num_parents) { struct clk *clk; - int ret = -ENOMEM; - u32 val, i; + int ret = -ENOMEM, i; + u32 val; if (!sckc || !name || !parent_names || num_parents != 2) return ERR_PTR(-EINVAL); @@ -99,8 +99,10 @@ static struct clk *at91_sam9x60_clk_register_td_slck(struct sam9x60_sckc *sckc, clk = &sckc->clk; ret = clk_register(clk, UBOOT_DM_CLK_AT91_SAM9X60_TD_SLCK, name, parent_names[val]); - if (ret) + if (ret) { + i--; goto free; + } return clk; diff --git a/drivers/clk/exynos/clk-exynos7420.c b/drivers/clk/exynos/clk-exynos7420.c index 3aa751bf4e4..7de4e688f03 100644 --- a/drivers/clk/exynos/clk-exynos7420.c +++ b/drivers/clk/exynos/clk-exynos7420.c @@ -192,7 +192,7 @@ static int exynos7420_clk_top0_probe(struct udevice *dev) static ulong exynos7420_peric1_get_rate(struct clk *clk) { struct clk in_clk; - unsigned int ret; + int ret; unsigned long freq = 0; switch (clk->id) { diff --git a/drivers/clk/rockchip/clk_rk3528.c b/drivers/clk/rockchip/clk_rk3528.c index 06f20895acc..d58557ff56d 100644 --- a/drivers/clk/rockchip/clk_rk3528.c +++ b/drivers/clk/rockchip/clk_rk3528.c @@ -1535,6 +1535,7 @@ static ulong rk3528_clk_set_rate(struct clk *clk, ulong rate) /* Might occur in cru assigned-clocks, can be ignored here */ case ACLK_BUS_VOPGL_ROOT: case BCLK_EMMC: + case CLK_REF_PCIE_INNER_PHY: case XIN_OSC0_DIV: ret = 0; break; diff --git a/drivers/clk/rockchip/clk_rk3576.c b/drivers/clk/rockchip/clk_rk3576.c index e84a0943a94..125b08ee832 100644 --- a/drivers/clk/rockchip/clk_rk3576.c +++ b/drivers/clk/rockchip/clk_rk3576.c @@ -2168,6 +2168,8 @@ static ulong rk3576_clk_set_rate(struct clk *clk, ulong rate) case CLK_CPLL_DIV10: case FCLK_DDR_CM0_CORE: case ACLK_PHP_ROOT: + case CLK_REF_PCIE0_PHY: + case CLK_REF_PCIE1_PHY: ret = 0; break; #ifndef CONFIG_SPL_BUILD diff --git a/drivers/dma/ti/k3-udma.c b/drivers/dma/ti/k3-udma.c index 723265ab2e5..01824310995 100644 --- a/drivers/dma/ti/k3-udma.c +++ b/drivers/dma/ti/k3-udma.c @@ -2327,7 +2327,7 @@ static int udma_send(struct dma *dma, void *src, size_t len, void *metadata) { struct udma_dev *ud = dev_get_priv(dma->dev); struct cppi5_host_desc_t *desc_tx; - dma_addr_t dma_src = (dma_addr_t)src; + dma_addr_t dma_src = (uintptr_t)src; struct ti_udma_drv_packet_data packet_data = { 0 }; dma_addr_t paddr; struct udma_chan *uc; @@ -2426,7 +2426,7 @@ static int udma_receive(struct dma *dma, void **dst, void *metadata) cppi5_desc_get_tags_ids(&desc_rx->hdr, &port_id, NULL); - *dst = (void *)buf_dma; + *dst = (void *)(uintptr_t)buf_dma; uc->num_rx_bufs--; return pkt_len; @@ -2518,7 +2518,7 @@ int udma_prepare_rcv_buf(struct dma *dma, void *dst, size_t size) desc_num = uc->desc_rx_cur % UDMA_RX_DESC_NUM; desc_rx = uc->desc_rx + (desc_num * uc->config.hdesc_size); - dma_dst = (dma_addr_t)dst; + dma_dst = (uintptr_t)dst; cppi5_hdesc_reset_hbdesc(desc_rx); diff --git a/drivers/fpga/ACEX1K.c b/drivers/fpga/ACEX1K.c deleted file mode 100644 index e1514fc56d0..00000000000 --- a/drivers/fpga/ACEX1K.c +++ /dev/null @@ -1,245 +0,0 @@ -// SPDX-License-Identifier: GPL-2.0+ -/* - * (C) Copyright 2003 - * Steven Scholz, imc Measurement & Control, steven.scholz@imc-berlin.de - * - * (C) Copyright 2002 - * Rich Ireland, Enterasys Networks, rireland@enterasys.com. - */ - -#define LOG_CATEGORY UCLASS_FPGA - -#include <config.h> /* core U-Boot definitions */ -#include <console.h> -#include <log.h> -#include <ACEX1K.h> /* ACEX device family */ -#include <linux/delay.h> -#include <time.h> - -/* Note: The assumption is that we cannot possibly run fast enough to - * overrun the device (the Slave Parallel mode can free run at 50MHz). - * If there is a need to operate slower, define CFG_FPGA_DELAY in - * the board config file to slow things down. - */ -#ifndef CFG_FPGA_DELAY -#define CFG_FPGA_DELAY() -#endif - -#ifndef CFG_SYS_FPGA_WAIT -#define CFG_SYS_FPGA_WAIT CONFIG_SYS_HZ/10 /* 100 ms */ -#endif - -static int ACEX1K_ps_load(Altera_desc *desc, const void *buf, size_t bsize); -static int ACEX1K_ps_dump(Altera_desc *desc, const void *buf, size_t bsize); -/* static int ACEX1K_ps_info(Altera_desc *desc); */ - -/* ------------------------------------------------------------------------- */ -/* ACEX1K Generic Implementation */ -int ACEX1K_load(Altera_desc *desc, const void *buf, size_t bsize) -{ - int ret_val = FPGA_FAIL; - - switch (desc->iface) { - case passive_serial: - log_debug("Launching Passive Serial Loader\n"); - ret_val = ACEX1K_ps_load (desc, buf, bsize); - break; - - /* Add new interface types here */ - - default: - printf ("%s: Unsupported interface type, %d\n", - __FUNCTION__, desc->iface); - } - - return ret_val; -} - -int ACEX1K_dump(Altera_desc *desc, const void *buf, size_t bsize) -{ - int ret_val = FPGA_FAIL; - - switch (desc->iface) { - case passive_serial: - log_debug("Launching Passive Serial Dump\n"); - ret_val = ACEX1K_ps_dump (desc, buf, bsize); - break; - - /* Add new interface types here */ - - default: - printf ("%s: Unsupported interface type, %d\n", - __FUNCTION__, desc->iface); - } - - return ret_val; -} - -int ACEX1K_info( Altera_desc *desc ) -{ - return FPGA_SUCCESS; -} - -/* ------------------------------------------------------------------------- */ -/* ACEX1K Passive Serial Generic Implementation */ - -static int ACEX1K_ps_load(Altera_desc *desc, const void *buf, size_t bsize) -{ - int ret_val = FPGA_FAIL; /* assume the worst */ - Altera_ACEX1K_Passive_Serial_fns *fn = desc->iface_fns; - int i; - - log_debug("start with interface functions @ 0x%p\n", fn); - - if (fn) { - size_t bytecount = 0; - unsigned char *data = (unsigned char *) buf; - int cookie = desc->cookie; /* make a local copy */ - unsigned long ts; /* timestamp */ - - log_debug("Function Table:\n" - "ptr:\t0x%p\n" - "struct: 0x%p\n" - "config:\t0x%p\n" - "status:\t0x%p\n" - "clk:\t0x%p\n" - "data:\t0x%p\n" - "done:\t0x%p\n\n", - &fn, fn, fn->config, fn->status, - fn->clk, fn->data, fn->done); -#ifdef CONFIG_SYS_FPGA_PROG_FEEDBACK - printf ("Loading FPGA Device %d...", cookie); -#endif - - /* - * Run the pre configuration function if there is one. - */ - if (*fn->pre) { - (*fn->pre) (cookie); - } - - /* Establish the initial state */ - (*fn->config) (true, true, cookie); /* Assert nCONFIG */ - - udelay(2); /* T_cfg > 2us */ - - /* nSTATUS should be asserted now */ - (*fn->done) (cookie); - if ( !(*fn->status) (cookie) ) { - puts ("** nSTATUS is not asserted.\n"); - (*fn->abort) (cookie); - return FPGA_FAIL; - } - - (*fn->config) (false, true, cookie); /* Deassert nCONFIG */ - udelay(2); /* T_cf2st1 < 4us */ - - /* Wait for nSTATUS to be released (i.e. deasserted) */ - ts = get_timer (0); /* get current time */ - do { - CFG_FPGA_DELAY (); - if (get_timer (ts) > CFG_SYS_FPGA_WAIT) { /* check the time */ - puts ("** Timeout waiting for STATUS to go high.\n"); - (*fn->abort) (cookie); - return FPGA_FAIL; - } - (*fn->done) (cookie); - } while ((*fn->status) (cookie)); - - /* Get ready for the burn */ - CFG_FPGA_DELAY (); - - /* Load the data */ - while (bytecount < bsize) { - unsigned char val=0; -#ifdef CONFIG_SYS_FPGA_CHECK_CTRLC - if (ctrlc ()) { - (*fn->abort) (cookie); - return FPGA_FAIL; - } -#endif - /* Altera detects an error if INIT goes low (active) - while DONE is low (inactive) */ -#if 0 /* not yet implemented */ - if ((*fn->done) (cookie) == 0 && (*fn->init) (cookie)) { - puts ("** CRC error during FPGA load.\n"); - (*fn->abort) (cookie); - return (FPGA_FAIL); - } -#endif - val = data [bytecount ++ ]; - i = 8; - do { - /* Deassert the clock */ - (*fn->clk) (false, true, cookie); - CFG_FPGA_DELAY (); - /* Write data */ - (*fn->data) ((val & 0x01), true, cookie); - CFG_FPGA_DELAY (); - /* Assert the clock */ - (*fn->clk) (true, true, cookie); - CFG_FPGA_DELAY (); - val >>= 1; - i --; - } while (i > 0); - -#ifdef CONFIG_SYS_FPGA_PROG_FEEDBACK - if (bytecount % (bsize / 40) == 0) - putc ('.'); /* let them know we are alive */ -#endif - } - - CFG_FPGA_DELAY (); - -#ifdef CONFIG_SYS_FPGA_PROG_FEEDBACK - putc (' '); /* terminate the dotted line */ -#endif - - /* - * Checking FPGA's CONF_DONE signal - correctly booted ? - */ - - if ( ! (*fn->done) (cookie) ) { - puts ("** Booting failed! CONF_DONE is still deasserted.\n"); - (*fn->abort) (cookie); - return (FPGA_FAIL); - } - - /* - * "DCLK must be clocked an additional 10 times fpr ACEX 1K..." - */ - - for (i = 0; i < 12; i++) { - CFG_FPGA_DELAY (); - (*fn->clk) (true, true, cookie); /* Assert the clock pin */ - CFG_FPGA_DELAY (); - (*fn->clk) (false, true, cookie); /* Deassert the clock pin */ - } - - ret_val = FPGA_SUCCESS; - -#ifdef CONFIG_SYS_FPGA_PROG_FEEDBACK - if (ret_val == FPGA_SUCCESS) { - puts ("Done.\n"); - } - else { - puts ("Fail.\n"); - } -#endif - (*fn->post) (cookie); - - } else { - printf ("%s: NULL Interface function table!\n", __FUNCTION__); - } - - return ret_val; -} - -static int ACEX1K_ps_dump(Altera_desc *desc, const void *buf, size_t bsize) -{ - /* Readback is only available through the Slave Parallel and */ - /* boundary-scan interfaces. */ - printf ("%s: Passive Serial Dumping is unavailable\n", - __FUNCTION__); - return FPGA_FAIL; -} diff --git a/drivers/fpga/Kconfig b/drivers/fpga/Kconfig index 9456ca3149a..e2593057fac 100644 --- a/drivers/fpga/Kconfig +++ b/drivers/fpga/Kconfig @@ -34,12 +34,6 @@ config FPGA_STRATIX_V help Say Y here to enable the Altera Stratix V FPGA specific driver. -config FPGA_ACEX1K - bool "Enable Altera ACEX 1K driver" - depends on FPGA_ALTERA - help - Say Y here to enable the Altera ACEX 1K FPGA specific driver. - config FPGA_CYCLON2 bool "Enable Altera FPGA driver for Cyclone II" depends on FPGA_ALTERA @@ -61,12 +55,6 @@ config FPGA_INTEL_SDM_MAILBOX Enable FPGA driver for writing full bitstream into Intel FPGA devices through SDM (Secure Device Manager) Mailbox. -config FPGA_LATTICE - bool "Enable Lattice FPGA driver" - help - This is used for the lattice FPGAs. Please check the source code as - there is no documentation for this at present. - config FPGA_XILINX bool "Enable Xilinx FPGA drivers" select FPGA diff --git a/drivers/fpga/Makefile b/drivers/fpga/Makefile index 610c168fc35..f22d3b3d86e 100644 --- a/drivers/fpga/Makefile +++ b/drivers/fpga/Makefile @@ -14,10 +14,8 @@ obj-$(CONFIG_FPGA_VIRTEX2) += virtex2.o obj-$(CONFIG_FPGA_ZYNQPL) += zynqpl.o obj-$(CONFIG_FPGA_ZYNQMPPL) += zynqmppl.o obj-$(CONFIG_FPGA_XILINX) += xilinx.o -obj-$(CONFIG_FPGA_LATTICE) += ivm_core.o lattice.o ifdef CONFIG_FPGA_ALTERA obj-y += altera.o -obj-$(CONFIG_FPGA_ACEX1K) += ACEX1K.o obj-$(CONFIG_FPGA_CYCLON2) += cyclon2.o obj-$(CONFIG_FPGA_INTEL_SDM_MAILBOX) += intel_sdm_mb.o obj-$(CONFIG_FPGA_STRATIX_II) += stratixII.o diff --git a/drivers/fpga/altera.c b/drivers/fpga/altera.c index 64fda3a307c..4a9aa74357e 100644 --- a/drivers/fpga/altera.c +++ b/drivers/fpga/altera.c @@ -28,10 +28,7 @@ static const struct altera_fpga { int (*dump)(Altera_desc *, const void *, size_t); int (*info)(Altera_desc *); } altera_fpga[] = { -#if defined(CONFIG_FPGA_ACEX1K) - { Altera_ACEX1K, "ACEX1K", ACEX1K_load, ACEX1K_dump, ACEX1K_info }, - { Altera_CYC2, "ACEX1K", ACEX1K_load, ACEX1K_dump, ACEX1K_info }, -#elif defined(CONFIG_FPGA_CYCLON2) +#if defined(CONFIG_FPGA_CYCLON2) { Altera_ACEX1K, "CycloneII", CYC2_load, CYC2_dump, CYC2_info }, { Altera_CYC2, "CycloneII", CYC2_load, CYC2_dump, CYC2_info }, #endif diff --git a/drivers/fpga/cyclon2.c b/drivers/fpga/cyclon2.c index 7e78d6e2d6c..1c464c1e912 100644 --- a/drivers/fpga/cyclon2.c +++ b/drivers/fpga/cyclon2.c @@ -174,10 +174,7 @@ static int CYC2_ps_load(Altera_desc *desc, const void *buf, size_t bsize) ret_val = FPGA_SUCCESS; #ifdef CONFIG_SYS_FPGA_PROG_FEEDBACK - if (ret_val == FPGA_SUCCESS) - puts("Done.\n"); - else - puts("Fail.\n"); + puts("Done.\n"); #endif /* diff --git a/drivers/fpga/fpga.c b/drivers/fpga/fpga.c index 2297fefd149..b4e3896d2e8 100644 --- a/drivers/fpga/fpga.c +++ b/drivers/fpga/fpga.c @@ -9,7 +9,6 @@ #include <log.h> #include <xilinx.h> /* xilinx specific definitions */ #include <altera.h> /* altera specific definitions */ -#include <lattice.h> #include <dm/device_compat.h> /* Local static data */ @@ -81,14 +80,6 @@ static int fpga_dev_info(int devnum) log_err("No support for Altera devices.\n"); #endif break; - case fpga_lattice: -#if defined(CONFIG_FPGA_LATTICE) - log_info("Lattice Device\nDescriptor @ 0x%p\n", desc); - ret_val = lattice_info(desc->devdesc); -#else - log_err("No support for Lattice devices.\n"); -#endif - break; default: log_err("Invalid or unsupported device type %d\n", desc->devtype); @@ -267,13 +258,6 @@ int fpga_load(int devnum, const void *buf, size_t bsize, bitstream_type bstype, log_err("No support for Altera devices.\n"); #endif break; - case fpga_lattice: -#if defined(CONFIG_FPGA_LATTICE) - ret_val = lattice_load(desc->devdesc, buf, bsize); -#else - log_err("No support for Lattice devices.\n"); -#endif - break; default: log_err("Invalid or unsupported device type %d\n", desc->devtype); @@ -312,13 +296,6 @@ int fpga_dump(int devnum, const void *buf, size_t bsize) log_err("No support for Altera devices.\n"); #endif break; - case fpga_lattice: -#if defined(CONFIG_FPGA_LATTICE) - ret_val = lattice_dump(desc->devdesc, buf, bsize); -#else - log_err("No support for Lattice devices.\n"); -#endif - break; default: log_err("Invalid or unsupported device type %d\n", desc->devtype); diff --git a/drivers/fpga/ivm_core.c b/drivers/fpga/ivm_core.c deleted file mode 100644 index 37d5c5ec9ec..00000000000 --- a/drivers/fpga/ivm_core.c +++ /dev/null @@ -1,3149 +0,0 @@ -// SPDX-License-Identifier: GPL-2.0+ -/* - * Porting to u-boot: - * - * (C) Copyright 2010 - * Stefano Babic, DENX Software Engineering, sbabic@denx.de. - * - * Lattice ispVME Embedded code to load Lattice's FPGA: - * - * Copyright 2009 Lattice Semiconductor Corp. - * - * ispVME Embedded allows programming of Lattice's suite of FPGA - * devices on embedded systems through the JTAG port. The software - * is distributed in source code form and is open to re - distribution - * and modification where applicable. - * - * Revision History of ivm_core.c module: - * 4/25/06 ht Change some variables from unsigned short or int - * to long int to make the code compiler independent. - * 5/24/06 ht Support using RESET (TRST) pin as a special purpose - * control pin such as triggering the loading of known - * state exit. - * 3/6/07 ht added functions to support output to terminals - * - * 09/11/07 NN Type cast mismatch variables - * Moved the sclock() function to hardware.c - * 08/28/08 NN Added Calculate checksum support. - * 4/1/09 Nguyen replaced the recursive function call codes on - * the ispVMLCOUNT function - */ - -#include <log.h> -#include <linux/string.h> -#include <malloc.h> -#include <lattice.h> -#include <vsprintf.h> - -#define vme_out_char(c) printf("%c", c) -#define vme_out_hex(c) printf("%x", c) -#define vme_out_string(s) printf("%s", s) - -/* - * - * Global variables used to specify the flow control and data type. - * - * g_usFlowControl: flow control register. Each bit in the - * register can potentially change the - * personality of the embedded engine. - * g_usDataType: holds the data type of the current row. - * - */ - -static unsigned short g_usFlowControl; -unsigned short g_usDataType; - -/* - * - * Global variables used to specify the ENDDR and ENDIR. - * - * g_ucEndDR: the state that the device goes to after SDR. - * g_ucEndIR: the state that the device goes to after SIR. - * - */ - -unsigned char g_ucEndDR = DRPAUSE; -unsigned char g_ucEndIR = IRPAUSE; - -/* - * - * Global variables used to support header/trailer. - * - * g_usHeadDR: the number of lead devices in bypass. - * g_usHeadIR: the sum of IR length of lead devices. - * g_usTailDR: the number of tail devices in bypass. - * g_usTailIR: the sum of IR length of tail devices. - * - */ - -static unsigned short g_usHeadDR; -static unsigned short g_usHeadIR; -static unsigned short g_usTailDR; -static unsigned short g_usTailIR; - -/* - * - * Global variable to store the number of bits of data or instruction - * to be shifted into or out from the device. - * - */ - -static unsigned short g_usiDataSize; - -/* - * - * Stores the frequency. Default to 1 MHz. - * - */ - -static int g_iFrequency = 1000; - -/* - * - * Stores the maximum amount of ram needed to hold a row of data. - * - */ - -static unsigned short g_usMaxSize; - -/* - * - * Stores the LSH or RSH value. - * - */ - -static unsigned short g_usShiftValue; - -/* - * - * Stores the current repeat loop value. - * - */ - -static unsigned short g_usRepeatLoops; - -/* - * - * Stores the current vendor. - * - */ - -static signed char g_cVendor = LATTICE; - -/* - * - * Stores the VME file CRC. - * - */ - -unsigned short g_usCalculatedCRC; - -/* - * - * Stores the Device Checksum. - * - */ -/* 08/28/08 NN Added Calculate checksum support. */ -unsigned long g_usChecksum; -static unsigned int g_uiChecksumIndex; - -/* - * - * Stores the current state of the JTAG state machine. - * - */ - -static signed char g_cCurrentJTAGState; - -/* - * - * Global variables used to support looping. - * - * g_pucHeapMemory: holds the entire repeat loop. - * g_iHeapCounter: points to the current byte in the repeat loop. - * g_iHEAPSize: the current size of the repeat in bytes. - * - */ - -unsigned char *g_pucHeapMemory; -unsigned short g_iHeapCounter; -unsigned short g_iHEAPSize; -static unsigned short previous_size; - -/* - * - * Global variables used to support intelligent programming. - * - * g_usIntelDataIndex: points to the current byte of the - * intelligent buffer. - * g_usIntelBufferSize: holds the size of the intelligent - * buffer. - * - */ - -unsigned short g_usIntelDataIndex; -unsigned short g_usIntelBufferSize; - -/* - * - * Supported VME versions. - * - */ - -const char *const g_szSupportedVersions[] = { - "__VME2.0", "__VME3.0", "____12.0", "____12.1", 0}; - -/* - * - * Holds the maximum size of each respective buffer. These variables are used - * to write the HEX files when converting VME to HEX. - * -*/ - -static unsigned short g_usTDOSize; -static unsigned short g_usMASKSize; -static unsigned short g_usTDISize; -static unsigned short g_usDMASKSize; -static unsigned short g_usLCOUNTSize; -static unsigned short g_usHDRSize; -static unsigned short g_usTDRSize; -static unsigned short g_usHIRSize; -static unsigned short g_usTIRSize; -static unsigned short g_usHeapSize; - -/* - * - * Global variables used to store data. - * - * g_pucOutMaskData: local RAM to hold one row of MASK data. - * g_pucInData: local RAM to hold one row of TDI data. - * g_pucOutData: local RAM to hold one row of TDO data. - * g_pucHIRData: local RAM to hold the current SIR header. - * g_pucTIRData: local RAM to hold the current SIR trailer. - * g_pucHDRData: local RAM to hold the current SDR header. - * g_pucTDRData: local RAM to hold the current SDR trailer. - * g_pucIntelBuffer: local RAM to hold the current intelligent buffer - * g_pucOutDMaskData: local RAM to hold one row of DMASK data. - * - */ - -unsigned char *g_pucOutMaskData = NULL, - *g_pucInData = NULL, - *g_pucOutData = NULL, - *g_pucHIRData = NULL, - *g_pucTIRData = NULL, - *g_pucHDRData = NULL, - *g_pucTDRData = NULL, - *g_pucIntelBuffer = NULL, - *g_pucOutDMaskData = NULL; - -/* - * - * JTAG state machine transition table. - * - */ - -struct { - unsigned char CurState; /* From this state */ - unsigned char NextState; /* Step to this state */ - unsigned char Pattern; /* The tragetory of TMS */ - unsigned char Pulses; /* The number of steps */ -} g_JTAGTransistions[25] = { -{ RESET, RESET, 0xFC, 6 }, /* Transitions from RESET */ -{ RESET, IDLE, 0x00, 1 }, -{ RESET, DRPAUSE, 0x50, 5 }, -{ RESET, IRPAUSE, 0x68, 6 }, -{ IDLE, RESET, 0xE0, 3 }, /* Transitions from IDLE */ -{ IDLE, DRPAUSE, 0xA0, 4 }, -{ IDLE, IRPAUSE, 0xD0, 5 }, -{ DRPAUSE, RESET, 0xF8, 5 }, /* Transitions from DRPAUSE */ -{ DRPAUSE, IDLE, 0xC0, 3 }, -{ DRPAUSE, IRPAUSE, 0xF4, 7 }, -{ DRPAUSE, DRPAUSE, 0xE8, 6 },/* 06/14/06 Support POLL STATUS LOOP*/ -{ IRPAUSE, RESET, 0xF8, 5 }, /* Transitions from IRPAUSE */ -{ IRPAUSE, IDLE, 0xC0, 3 }, -{ IRPAUSE, DRPAUSE, 0xE8, 6 }, -{ DRPAUSE, SHIFTDR, 0x80, 2 }, /* Extra transitions using SHIFTDR */ -{ IRPAUSE, SHIFTDR, 0xE0, 5 }, -{ SHIFTDR, DRPAUSE, 0x80, 2 }, -{ SHIFTDR, IDLE, 0xC0, 3 }, -{ IRPAUSE, SHIFTIR, 0x80, 2 },/* Extra transitions using SHIFTIR */ -{ SHIFTIR, IRPAUSE, 0x80, 2 }, -{ SHIFTIR, IDLE, 0xC0, 3 }, -{ DRPAUSE, DRCAPTURE, 0xE0, 4 }, /* 11/15/05 Support DRCAPTURE*/ -{ DRCAPTURE, DRPAUSE, 0x80, 2 }, -{ IDLE, DRCAPTURE, 0x80, 2 }, -{ IRPAUSE, DRCAPTURE, 0xE0, 4 } -}; - -/* - * - * List to hold all LVDS pairs. - * - */ - -LVDSPair *g_pLVDSList; -unsigned short g_usLVDSPairCount; - -/* - * - * Function prototypes. - * - */ - -static signed char ispVMDataCode(void); -static long ispVMDataSize(void); -static void ispVMData(unsigned char *Data); -static signed char ispVMShift(signed char Code); -static signed char ispVMAmble(signed char Code); -static signed char ispVMLoop(unsigned short a_usLoopCount); -static signed char ispVMBitShift(signed char mode, unsigned short bits); -static void ispVMComment(unsigned short a_usCommentSize); -static void ispVMHeader(unsigned short a_usHeaderSize); -static signed char ispVMLCOUNT(unsigned short a_usCountSize); -static void ispVMClocks(unsigned short Clocks); -static void ispVMBypass(signed char ScanType, unsigned short Bits); -static void ispVMStateMachine(signed char NextState); -static signed char ispVMSend(unsigned short int); -static signed char ispVMRead(unsigned short int); -static signed char ispVMReadandSave(unsigned short int); -static signed char ispVMProcessLVDS(unsigned short a_usLVDSCount); -static void ispVMMemManager(signed char types, unsigned short size); - -/* - * - * External variables and functions in hardware.c module - * - */ -static signed char g_cCurrentJTAGState; - -#ifdef DEBUG - -/* - * - * GetState - * - * Returns the state as a string based on the opcode. Only used - * for debugging purposes. - * - */ - -const char *GetState(unsigned char a_ucState) -{ - switch (a_ucState) { - case RESET: - return "RESET"; - case IDLE: - return "IDLE"; - case IRPAUSE: - return "IRPAUSE"; - case DRPAUSE: - return "DRPAUSE"; - case SHIFTIR: - return "SHIFTIR"; - case SHIFTDR: - return "SHIFTDR"; - case DRCAPTURE:/* 11/15/05 support DRCAPTURE*/ - return "DRCAPTURE"; - default: - break; - } - - return 0; -} - -/* - * - * PrintData - * - * Prints the data. Only used for debugging purposes. - * - */ - -void PrintData(unsigned short a_iDataSize, unsigned char *a_pucData) -{ - /* 09/11/07 NN added local variables initialization */ - unsigned short usByteSize = 0; - unsigned short usBitIndex = 0; - signed short usByteIndex = 0; - unsigned char ucByte = 0; - unsigned char ucFlipByte = 0; - - if (a_iDataSize % 8) { - /* 09/11/07 NN Type cast mismatch variables */ - usByteSize = (unsigned short)(a_iDataSize / 8 + 1); - } else { - /* 09/11/07 NN Type cast mismatch variables */ - usByteSize = (unsigned short)(a_iDataSize / 8); - } - puts("("); - /* 09/11/07 NN Type cast mismatch variables */ - for (usByteIndex = (signed short)(usByteSize - 1); - usByteIndex >= 0; usByteIndex--) { - ucByte = a_pucData[usByteIndex]; - ucFlipByte = 0x00; - - /* - * - * Flip each byte. - * - */ - - for (usBitIndex = 0; usBitIndex < 8; usBitIndex++) { - ucFlipByte <<= 1; - if (ucByte & 0x1) { - ucFlipByte |= 0x1; - } - - ucByte >>= 1; - } - - /* - * - * Print the flipped byte. - * - */ - - printf("%.02X", ucFlipByte); - if ((usByteSize - usByteIndex) % 40 == 39) { - puts("\n\t\t"); - } - if (usByteIndex < 0) - break; - } - puts(")"); -} -#endif /* DEBUG */ - -void ispVMMemManager(signed char cTarget, unsigned short usSize) -{ - switch (cTarget) { - case XTDI: - case TDI: - if (g_pucInData != NULL) { - if (previous_size == usSize) {/*memory exist*/ - break; - } else { - free(g_pucInData); - g_pucInData = NULL; - } - } - g_pucInData = (unsigned char *) malloc(usSize / 8 + 2); - previous_size = usSize; - case XTDO: - case TDO: - if (g_pucOutData != NULL) { - if (previous_size == usSize) { /*already exist*/ - break; - } else { - free(g_pucOutData); - g_pucOutData = NULL; - } - } - g_pucOutData = (unsigned char *) malloc(usSize / 8 + 2); - previous_size = usSize; - break; - case MASK: - if (g_pucOutMaskData != NULL) { - if (previous_size == usSize) {/*already allocated*/ - break; - } else { - free(g_pucOutMaskData); - g_pucOutMaskData = NULL; - } - } - g_pucOutMaskData = (unsigned char *) malloc(usSize / 8 + 2); - previous_size = usSize; - break; - case HIR: - if (g_pucHIRData != NULL) { - free(g_pucHIRData); - g_pucHIRData = NULL; - } - g_pucHIRData = (unsigned char *) malloc(usSize / 8 + 2); - break; - case TIR: - if (g_pucTIRData != NULL) { - free(g_pucTIRData); - g_pucTIRData = NULL; - } - g_pucTIRData = (unsigned char *) malloc(usSize / 8 + 2); - break; - case HDR: - if (g_pucHDRData != NULL) { - free(g_pucHDRData); - g_pucHDRData = NULL; - } - g_pucHDRData = (unsigned char *) malloc(usSize / 8 + 2); - break; - case TDR: - if (g_pucTDRData != NULL) { - free(g_pucTDRData); - g_pucTDRData = NULL; - } - g_pucTDRData = (unsigned char *) malloc(usSize / 8 + 2); - break; - case HEAP: - if (g_pucHeapMemory != NULL) { - free(g_pucHeapMemory); - g_pucHeapMemory = NULL; - } - g_pucHeapMemory = (unsigned char *) malloc(usSize + 2); - break; - case DMASK: - if (g_pucOutDMaskData != NULL) { - if (previous_size == usSize) { /*already allocated*/ - break; - } else { - free(g_pucOutDMaskData); - g_pucOutDMaskData = NULL; - } - } - g_pucOutDMaskData = (unsigned char *) malloc(usSize / 8 + 2); - previous_size = usSize; - break; - case LHEAP: - if (g_pucIntelBuffer != NULL) { - free(g_pucIntelBuffer); - g_pucIntelBuffer = NULL; - } - g_pucIntelBuffer = (unsigned char *) malloc(usSize + 2); - break; - case LVDS: - if (g_pLVDSList != NULL) { - free(g_pLVDSList); - g_pLVDSList = NULL; - } - g_pLVDSList = (LVDSPair *) malloc(usSize * sizeof(LVDSPair)); - if (g_pLVDSList) - memset(g_pLVDSList, 0, usSize * sizeof(LVDSPair)); - break; - default: - return; - } -} - -void ispVMFreeMem(void) -{ - if (g_pucHeapMemory != NULL) { - free(g_pucHeapMemory); - g_pucHeapMemory = NULL; - } - - if (g_pucOutMaskData != NULL) { - free(g_pucOutMaskData); - g_pucOutMaskData = NULL; - } - - if (g_pucInData != NULL) { - free(g_pucInData); - g_pucInData = NULL; - } - - if (g_pucOutData != NULL) { - free(g_pucOutData); - g_pucOutData = NULL; - } - - if (g_pucHIRData != NULL) { - free(g_pucHIRData); - g_pucHIRData = NULL; - } - - if (g_pucTIRData != NULL) { - free(g_pucTIRData); - g_pucTIRData = NULL; - } - - if (g_pucHDRData != NULL) { - free(g_pucHDRData); - g_pucHDRData = NULL; - } - - if (g_pucTDRData != NULL) { - free(g_pucTDRData); - g_pucTDRData = NULL; - } - - if (g_pucOutDMaskData != NULL) { - free(g_pucOutDMaskData); - g_pucOutDMaskData = NULL; - } - - if (g_pucIntelBuffer != NULL) { - free(g_pucIntelBuffer); - g_pucIntelBuffer = NULL; - } - - if (g_pLVDSList != NULL) { - free(g_pLVDSList); - g_pLVDSList = NULL; - } -} - -/* - * - * ispVMDataSize - * - * Returns a VME-encoded number, usually used to indicate the - * bit length of an SIR/SDR command. - * - */ - -long ispVMDataSize(void) -{ - /* 09/11/07 NN added local variables initialization */ - long int iSize = 0; - signed char cCurrentByte = 0; - signed char cIndex = 0; - cIndex = 0; - while ((cCurrentByte = GetByte()) & 0x80) { - iSize |= ((long int) (cCurrentByte & 0x7F)) << cIndex; - cIndex += 7; - } - iSize |= ((long int) (cCurrentByte & 0x7F)) << cIndex; - return iSize; -} - -/* - * - * ispVMCode - * - * This is the heart of the embedded engine. All the high-level opcodes - * are extracted here. Once they have been identified, then it - * will call other functions to handle the processing. - * - */ - -signed char ispVMCode(void) -{ - /* 09/11/07 NN added local variables initialization */ - unsigned short iRepeatSize = 0; - signed char cOpcode = 0; - signed char cRetCode = 0; - unsigned char ucState = 0; - unsigned short usDelay = 0; - unsigned short usToggle = 0; - unsigned char usByte = 0; - - /* - * - * Check the compression flag only if this is the first time - * this function is entered. Do not check the compression flag if - * it is being called recursively from other functions within - * the embedded engine. - * - */ - - if (!(g_usDataType & LHEAP_IN) && !(g_usDataType & HEAP_IN)) { - usByte = GetByte(); - if (usByte == 0xf1) { - g_usDataType |= COMPRESS; - } else if (usByte == 0xf2) { - g_usDataType &= ~COMPRESS; - } else { - return VME_INVALID_FILE; - } - } - - /* - * - * Begin looping through all the VME opcodes. - * - */ - - while ((cOpcode = GetByte()) >= 0) { - - switch (cOpcode) { - case STATE: - - /* - * Step the JTAG state machine. - */ - - ucState = GetByte(); - - /* - * Step the JTAG state machine to DRCAPTURE - * to support Looping. - */ - - if ((g_usDataType & LHEAP_IN) && - (ucState == DRPAUSE) && - (g_cCurrentJTAGState == ucState)) { - ispVMStateMachine(DRCAPTURE); - } - - ispVMStateMachine(ucState); - -#ifdef DEBUG - if (g_usDataType & LHEAP_IN) { - debug("LDELAY %s ", GetState(ucState)); - } else { - debug("STATE %s;\n", GetState(ucState)); - } -#endif /* DEBUG */ - break; - case SIR: - case SDR: - case XSDR: - -#ifdef DEBUG - switch (cOpcode) { - case SIR: - puts("SIR "); - break; - case SDR: - case XSDR: - if (g_usDataType & LHEAP_IN) { - puts("LSDR "); - } else { - puts("SDR "); - } - break; - } -#endif /* DEBUG */ - /* - * - * Shift in data into the device. - * - */ - - cRetCode = ispVMShift(cOpcode); - if (cRetCode != 0) { - return cRetCode; - } - break; - case WAIT: - - /* - * - * Observe delay. - * - */ - - /* 09/11/07 NN Type cast mismatch variables */ - usDelay = (unsigned short) ispVMDataSize(); - ispVMDelay(usDelay); - -#ifdef DEBUG - if (usDelay & 0x8000) { - - /* - * Since MSB is set, the delay time must be - * decoded to millisecond. The SVF2VME encodes - * the MSB to represent millisecond. - */ - - usDelay &= ~0x8000; - if (g_usDataType & LHEAP_IN) { - printf("%.2E SEC;\n", - (float) usDelay / 1000); - } else { - printf("RUNTEST %.2E SEC;\n", - (float) usDelay / 1000); - } - } else { - /* - * Since MSB is not set, the delay time - * is given as microseconds. - */ - - if (g_usDataType & LHEAP_IN) { - printf("%.2E SEC;\n", - (float) usDelay / 1000000); - } else { - printf("RUNTEST %.2E SEC;\n", - (float) usDelay / 1000000); - } - } -#endif /* DEBUG */ - break; - case TCK: - - /* - * Issue clock toggles. - */ - - /* 09/11/07 NN Type cast mismatch variables */ - usToggle = (unsigned short) ispVMDataSize(); - ispVMClocks(usToggle); - -#ifdef DEBUG - printf("RUNTEST %d TCK;\n", usToggle); -#endif /* DEBUG */ - break; - case ENDDR: - - /* - * - * Set the ENDDR. - * - */ - - g_ucEndDR = GetByte(); - -#ifdef DEBUG - printf("ENDDR %s;\n", GetState(g_ucEndDR)); -#endif /* DEBUG */ - break; - case ENDIR: - - /* - * - * Set the ENDIR. - * - */ - - g_ucEndIR = GetByte(); - -#ifdef DEBUG - printf("ENDIR %s;\n", GetState(g_ucEndIR)); -#endif /* DEBUG */ - break; - case HIR: - case TIR: - case HDR: - case TDR: - -#ifdef DEBUG - switch (cOpcode) { - case HIR: - puts("HIR "); - break; - case TIR: - puts("TIR "); - break; - case HDR: - puts("HDR "); - break; - case TDR: - puts("TDR "); - break; - } -#endif /* DEBUG */ - /* - * Set the header/trailer of the device in order - * to bypass - * successfully. - */ - - cRetCode = ispVMAmble(cOpcode); - if (cRetCode != 0) { - return cRetCode; - } - -#ifdef DEBUG - puts(";\n"); -#endif /* DEBUG */ - break; - case MEM: - - /* - * The maximum RAM required to support - * processing one row of the VME file. - */ - - /* 09/11/07 NN Type cast mismatch variables */ - g_usMaxSize = (unsigned short) ispVMDataSize(); - -#ifdef DEBUG - printf("// MEMSIZE %d\n", g_usMaxSize); -#endif /* DEBUG */ - break; - case VENDOR: - - /* - * - * Set the VENDOR type. - * - */ - - cOpcode = GetByte(); - switch (cOpcode) { - case LATTICE: -#ifdef DEBUG - puts("// VENDOR LATTICE\n"); -#endif /* DEBUG */ - g_cVendor = LATTICE; - break; - case ALTERA: -#ifdef DEBUG - puts("// VENDOR ALTERA\n"); -#endif /* DEBUG */ - g_cVendor = ALTERA; - break; - case XILINX: -#ifdef DEBUG - puts("// VENDOR XILINX\n"); -#endif /* DEBUG */ - g_cVendor = XILINX; - break; - default: - break; - } - break; - case SETFLOW: - - /* - * Set the flow control. Flow control determines - * the personality of the embedded engine. - */ - - /* 09/11/07 NN Type cast mismatch variables */ - g_usFlowControl |= (unsigned short) ispVMDataSize(); - break; - case RESETFLOW: - - /* - * - * Unset the flow control. - * - */ - - /* 09/11/07 NN Type cast mismatch variables */ - g_usFlowControl &= (unsigned short) ~(ispVMDataSize()); - break; - case HEAP: - - /* - * - * Allocate heap size to store loops. - * - */ - - cRetCode = GetByte(); - if (cRetCode != SECUREHEAP) { - return VME_INVALID_FILE; - } - /* 09/11/07 NN Type cast mismatch variables */ - g_iHEAPSize = (unsigned short) ispVMDataSize(); - - /* - * Store the maximum size of the HEAP buffer. - * Used to convert VME to HEX. - */ - - if (g_iHEAPSize > g_usHeapSize) { - g_usHeapSize = g_iHEAPSize; - } - - ispVMMemManager(HEAP, (unsigned short) g_iHEAPSize); - break; - case REPEAT: - - /* - * - * Execute loops. - * - */ - - g_usRepeatLoops = 0; - - /* 09/11/07 NN Type cast mismatch variables */ - iRepeatSize = (unsigned short) ispVMDataSize(); - - cRetCode = ispVMLoop((unsigned short) iRepeatSize); - if (cRetCode != 0) { - return cRetCode; - } - break; - case ENDLOOP: - - /* - * - * Exit point from processing loops. - * - */ - - return cRetCode; - case ENDVME: - - /* - * The only valid exit point that indicates - * end of programming. - */ - - return cRetCode; - case SHR: - - /* - * - * Right-shift address. - * - */ - - g_usFlowControl |= SHIFTRIGHT; - - /* 09/11/07 NN Type cast mismatch variables */ - g_usShiftValue = (unsigned short) (g_usRepeatLoops * - (unsigned short)GetByte()); - break; - case SHL: - - /* - * Left-shift address. - */ - - g_usFlowControl |= SHIFTLEFT; - - /* 09/11/07 NN Type cast mismatch variables */ - g_usShiftValue = (unsigned short) (g_usRepeatLoops * - (unsigned short)GetByte()); - break; - case FREQUENCY: - - /* - * - * Set the frequency. - * - */ - - /* 09/11/07 NN Type cast mismatch variables */ - g_iFrequency = (int) (ispVMDataSize() / 1000); - if (g_iFrequency == 1) - g_iFrequency = 1000; - -#ifdef DEBUG - printf("FREQUENCY %.2E HZ;\n", - (float) g_iFrequency * 1000); -#endif /* DEBUG */ - break; - case LCOUNT: - - /* - * - * Process LCOUNT command. - * - */ - - cRetCode = ispVMLCOUNT((unsigned short)ispVMDataSize()); - if (cRetCode != 0) { - return cRetCode; - } - break; - case VUES: - - /* - * - * Set the flow control to verify USERCODE. - * - */ - - g_usFlowControl |= VERIFYUES; - break; - case COMMENT: - - /* - * - * Display comment. - * - */ - - ispVMComment((unsigned short) ispVMDataSize()); - break; - case LVDS: - - /* - * - * Process LVDS command. - * - */ - - ispVMProcessLVDS((unsigned short) ispVMDataSize()); - break; - case HEADER: - - /* - * - * Discard header. - * - */ - - ispVMHeader((unsigned short) ispVMDataSize()); - break; - /* 03/14/06 Support Toggle ispENABLE signal*/ - case ispEN: - ucState = GetByte(); - if ((ucState == ON) || (ucState == 0x01)) - writePort(g_ucPinENABLE, 0x01); - else - writePort(g_ucPinENABLE, 0x00); - ispVMDelay(1); - break; - /* 05/24/06 support Toggle TRST pin*/ - case TRST: - ucState = GetByte(); - if (ucState == 0x01) - writePort(g_ucPinTRST, 0x01); - else - writePort(g_ucPinTRST, 0x00); - ispVMDelay(1); - break; - default: - - /* - * - * Invalid opcode encountered. - * - */ - -#ifdef DEBUG - printf("\nINVALID OPCODE: 0x%.2X\n", cOpcode); -#endif /* DEBUG */ - - return VME_INVALID_FILE; - } - } - - /* - * - * Invalid exit point. Processing the token 'ENDVME' is the only - * valid way to exit the embedded engine. - * - */ - - return VME_INVALID_FILE; -} - -/* - * - * ispVMDataCode - * - * Processes the TDI/TDO/MASK/DMASK etc of an SIR/SDR command. - * - */ - -signed char ispVMDataCode(void) -{ - /* 09/11/07 NN added local variables initialization */ - signed char cDataByte = 0; - signed char siDataSource = 0; /*source of data from file by default*/ - - if (g_usDataType & HEAP_IN) { - siDataSource = 1; /*the source of data from memory*/ - } - - /* - * - * Clear the data type register. - * - **/ - - g_usDataType &= ~(MASK_DATA + TDI_DATA + - TDO_DATA + DMASK_DATA + CMASK_DATA); - - /* - * Iterate through SIR/SDR command and look for TDI, - * TDO, MASK, etc. - */ - - while ((cDataByte = GetByte()) >= 0) { - ispVMMemManager(cDataByte, g_usMaxSize); - switch (cDataByte) { - case TDI: - - /* - * Store the maximum size of the TDI buffer. - * Used to convert VME to HEX. - */ - - if (g_usiDataSize > g_usTDISize) { - g_usTDISize = g_usiDataSize; - } - /* - * Updated data type register to indicate that - * TDI data is currently being used. Process the - * data in the VME file into the TDI buffer. - */ - - g_usDataType |= TDI_DATA; - ispVMData(g_pucInData); - break; - case XTDO: - - /* - * Store the maximum size of the TDO buffer. - * Used to convert VME to HEX. - */ - - if (g_usiDataSize > g_usTDOSize) { - g_usTDOSize = g_usiDataSize; - } - - /* - * Updated data type register to indicate that - * TDO data is currently being used. - */ - - g_usDataType |= TDO_DATA; - break; - case TDO: - - /* - * Store the maximum size of the TDO buffer. - * Used to convert VME to HEX. - */ - - if (g_usiDataSize > g_usTDOSize) { - g_usTDOSize = g_usiDataSize; - } - - /* - * Updated data type register to indicate - * that TDO data is currently being used. - * Process the data in the VME file into the - * TDO buffer. - */ - - g_usDataType |= TDO_DATA; - ispVMData(g_pucOutData); - break; - case MASK: - - /* - * Store the maximum size of the MASK buffer. - * Used to convert VME to HEX. - */ - - if (g_usiDataSize > g_usMASKSize) { - g_usMASKSize = g_usiDataSize; - } - - /* - * Updated data type register to indicate that - * MASK data is currently being used. Process - * the data in the VME file into the MASK buffer - */ - - g_usDataType |= MASK_DATA; - ispVMData(g_pucOutMaskData); - break; - case DMASK: - - /* - * Store the maximum size of the DMASK buffer. - * Used to convert VME to HEX. - */ - - if (g_usiDataSize > g_usDMASKSize) { - g_usDMASKSize = g_usiDataSize; - } - - /* - * Updated data type register to indicate that - * DMASK data is currently being used. Process - * the data in the VME file into the DMASK - * buffer. - */ - - g_usDataType |= DMASK_DATA; - ispVMData(g_pucOutDMaskData); - break; - case CMASK: - - /* - * Updated data type register to indicate that - * MASK data is currently being used. Process - * the data in the VME file into the MASK buffer - */ - - g_usDataType |= CMASK_DATA; - ispVMData(g_pucOutMaskData); - break; - case CONTINUE: - return 0; - default: - /* - * Encountered invalid opcode. - */ - return VME_INVALID_FILE; - } - - switch (cDataByte) { - case TDI: - - /* - * Left bit shift. Used when performing - * algorithm looping. - */ - - if (g_usFlowControl & SHIFTLEFT) { - ispVMBitShift(SHL, g_usShiftValue); - g_usFlowControl &= ~SHIFTLEFT; - } - - /* - * Right bit shift. Used when performing - * algorithm looping. - */ - - if (g_usFlowControl & SHIFTRIGHT) { - ispVMBitShift(SHR, g_usShiftValue); - g_usFlowControl &= ~SHIFTRIGHT; - } - default: - break; - } - - if (siDataSource) { - g_usDataType |= HEAP_IN; /*restore from memory*/ - } - } - - if (siDataSource) { /*fetch data from heap memory upon return*/ - g_usDataType |= HEAP_IN; - } - - if (cDataByte < 0) { - - /* - * Encountered invalid opcode. - */ - - return VME_INVALID_FILE; - } else { - return 0; - } -} - -/* - * - * ispVMData - * Extract one row of data operand from the current data type opcode. Perform - * the decompression if necessary. Extra RAM is not required for the - * decompression process. The decompression scheme employed in this module - * is on row by row basis. The format of the data stream: - * [compression code][compressed data stream] - * 0x00 --No compression - * 0x01 --Compress by 0x00. - * Example: - * Original stream: 0x000000000000000000000001 - * Compressed stream: 0x01000901 - * Detail: 0x01 is the code, 0x00 is the key, - * 0x09 is the count of 0x00 bytes, - * 0x01 is the uncompressed byte. - * 0x02 --Compress by 0xFF. - * Example: - * Original stream: 0xFFFFFFFFFFFFFFFFFFFFFF01 - * Compressed stream: 0x02FF0901 - * Detail: 0x02 is the code, 0xFF is the key, - * 0x09 is the count of 0xFF bytes, - * 0x01 is the uncompressed byte. - * 0x03 - * : : - * 0xFE -- Compress by nibble blocks. - * Example: - * Original stream: 0x84210842108421084210 - * Compressed stream: 0x0584210 - * Detail: 0x05 is the code, means 5 nibbles block. - * 0x84210 is the 5 nibble blocks. - * The whole row is 80 bits given by g_usiDataSize. - * The number of times the block repeat itself - * is found by g_usiDataSize/(4*0x05) which is 4. - * 0xFF -- Compress by the most frequently happen byte. - * Example: - * Original stream: 0x04020401030904040404 - * Compressed stream: 0xFF04(0,1,0x02,0,1,0x01,1,0x03,1,0x09,0,0,0) - * or: 0xFF044090181C240 - * Detail: 0xFF is the code, 0x04 is the key. - * a bit of 0 represent the key shall be put into - * the current bit position and a bit of 1 - * represent copying the next of 8 bits of data - * in. - * - */ - -void ispVMData(unsigned char *ByteData) -{ - /* 09/11/07 NN added local variables initialization */ - unsigned short size = 0; - unsigned short i, j, m, getData = 0; - unsigned char cDataByte = 0; - unsigned char compress = 0; - unsigned short FFcount = 0; - unsigned char compr_char = 0xFF; - unsigned short index = 0; - signed char compression = 0; - - /*convert number in bits to bytes*/ - if (g_usiDataSize % 8 > 0) { - /* 09/11/07 NN Type cast mismatch variables */ - size = (unsigned short)(g_usiDataSize / 8 + 1); - } else { - /* 09/11/07 NN Type cast mismatch variables */ - size = (unsigned short)(g_usiDataSize / 8); - } - - /* - * If there is compression, then check if compress by key - * of 0x00 or 0xFF or by other keys or by nibble blocks - */ - - if (g_usDataType & COMPRESS) { - compression = 1; - compress = GetByte(); - if ((compress == VAR) && (g_usDataType & HEAP_IN)) { - getData = 1; - g_usDataType &= ~(HEAP_IN); - compress = GetByte(); - } - - switch (compress) { - case 0x00: - /* No compression */ - compression = 0; - break; - case 0x01: - /* Compress by byte 0x00 */ - compr_char = 0x00; - break; - case 0x02: - /* Compress by byte 0xFF */ - compr_char = 0xFF; - break; - case 0xFF: - /* Huffman encoding */ - compr_char = GetByte(); - i = 8; - for (index = 0; index < size; index++) { - ByteData[index] = 0x00; - if (i > 7) { - cDataByte = GetByte(); - i = 0; - } - if ((cDataByte << i++) & 0x80) - m = 8; - else { - ByteData[index] = compr_char; - m = 0; - } - - for (j = 0; j < m; j++) { - if (i > 7) { - cDataByte = GetByte(); - i = 0; - } - ByteData[index] |= - ((cDataByte << i++) & 0x80) >> j; - } - } - size = 0; - break; - default: - for (index = 0; index < size; index++) - ByteData[index] = 0x00; - for (index = 0; index < compress; index++) { - if (index % 2 == 0) - cDataByte = GetByte(); - for (i = 0; i < size * 2 / compress; i++) { - j = (unsigned short)(index + - (i * (unsigned short)compress)); - /*clear the nibble to zero first*/ - if (j%2) { - if (index % 2) - ByteData[j/2] |= - cDataByte & 0xF; - else - ByteData[j/2] |= - cDataByte >> 4; - } else { - if (index % 2) - ByteData[j/2] |= - cDataByte << 4; - else - ByteData[j/2] |= - cDataByte & 0xF0; - } - } - } - size = 0; - break; - } - } - - FFcount = 0; - - /* Decompress by byte 0x00 or 0xFF */ - for (index = 0; index < size; index++) { - if (FFcount <= 0) { - cDataByte = GetByte(); - if ((cDataByte == VAR) && (g_usDataType&HEAP_IN) && - !getData && !(g_usDataType&COMPRESS)) { - getData = 1; - g_usDataType &= ~(HEAP_IN); - cDataByte = GetByte(); - } - ByteData[index] = cDataByte; - if ((compression) && (cDataByte == compr_char)) - /* 09/11/07 NN Type cast mismatch variables */ - FFcount = (unsigned short) ispVMDataSize(); - /*The number of 0xFF or 0x00 bytes*/ - } else { - FFcount--; /*Use up the 0xFF chain first*/ - ByteData[index] = compr_char; - } - } - - if (getData) { - g_usDataType |= HEAP_IN; - getData = 0; - } -} - -/* - * - * ispVMShift - * - * Processes the SDR/XSDR/SIR commands. - * - */ - -signed char ispVMShift(signed char a_cCode) -{ - /* 09/11/07 NN added local variables initialization */ - unsigned short iDataIndex = 0; - unsigned short iReadLoop = 0; - signed char cRetCode = 0; - - cRetCode = 0; - /* 09/11/07 NN Type cast mismatch variables */ - g_usiDataSize = (unsigned short) ispVMDataSize(); - - /*clear the flags first*/ - g_usDataType &= ~(SIR_DATA + EXPRESS + SDR_DATA); - switch (a_cCode) { - case SIR: - g_usDataType |= SIR_DATA; - /* - * 1/15/04 If performing cascading, then go directly to SHIFTIR. - * Else, go to IRPAUSE before going to SHIFTIR - */ - if (g_usFlowControl & CASCADE) { - ispVMStateMachine(SHIFTIR); - } else { - ispVMStateMachine(IRPAUSE); - ispVMStateMachine(SHIFTIR); - if (g_usHeadIR > 0) { - ispVMBypass(HIR, g_usHeadIR); - sclock(); - } - } - break; - case XSDR: - g_usDataType |= EXPRESS; /*mark simultaneous in and out*/ - case SDR: - g_usDataType |= SDR_DATA; - /* - * 1/15/04 If already in SHIFTDR, then do not move state or - * shift in header. This would imply that the previously - * shifted frame was a cascaded frame. - */ - if (g_cCurrentJTAGState != SHIFTDR) { - /* - * 1/15/04 If performing cascading, then go directly - * to SHIFTDR. Else, go to DRPAUSE before going - * to SHIFTDR - */ - if (g_usFlowControl & CASCADE) { - if (g_cCurrentJTAGState == DRPAUSE) { - ispVMStateMachine(SHIFTDR); - /* - * 1/15/04 If cascade flag has been seat - * and the current state is DRPAUSE, - * this implies that the first cascaded - * frame is about to be shifted in. The - * header must be shifted prior to - * shifting the first cascaded frame. - */ - if (g_usHeadDR > 0) { - ispVMBypass(HDR, g_usHeadDR); - sclock(); - } - } else { - ispVMStateMachine(SHIFTDR); - } - } else { - ispVMStateMachine(DRPAUSE); - ispVMStateMachine(SHIFTDR); - if (g_usHeadDR > 0) { - ispVMBypass(HDR, g_usHeadDR); - sclock(); - } - } - } - break; - default: - return VME_INVALID_FILE; - } - - cRetCode = ispVMDataCode(); - - if (cRetCode != 0) { - return VME_INVALID_FILE; - } - -#ifdef DEBUG - printf("%d ", g_usiDataSize); - - if (g_usDataType & TDI_DATA) { - puts("TDI "); - PrintData(g_usiDataSize, g_pucInData); - } - - if (g_usDataType & TDO_DATA) { - puts("\n\t\tTDO "); - PrintData(g_usiDataSize, g_pucOutData); - } - - if (g_usDataType & MASK_DATA) { - puts("\n\t\tMASK "); - PrintData(g_usiDataSize, g_pucOutMaskData); - } - - if (g_usDataType & DMASK_DATA) { - puts("\n\t\tDMASK "); - PrintData(g_usiDataSize, g_pucOutDMaskData); - } - - puts(";\n"); -#endif /* DEBUG */ - - if (g_usDataType & TDO_DATA || g_usDataType & DMASK_DATA) { - if (g_usDataType & DMASK_DATA) { - cRetCode = ispVMReadandSave(g_usiDataSize); - if (!cRetCode) { - if (g_usTailDR > 0) { - sclock(); - ispVMBypass(TDR, g_usTailDR); - } - ispVMStateMachine(DRPAUSE); - ispVMStateMachine(SHIFTDR); - if (g_usHeadDR > 0) { - ispVMBypass(HDR, g_usHeadDR); - sclock(); - } - for (iDataIndex = 0; - iDataIndex < g_usiDataSize / 8 + 1; - iDataIndex++) - g_pucInData[iDataIndex] = - g_pucOutData[iDataIndex]; - g_usDataType &= ~(TDO_DATA + DMASK_DATA); - cRetCode = ispVMSend(g_usiDataSize); - } - } else { - cRetCode = ispVMRead(g_usiDataSize); - if (cRetCode == -1 && g_cVendor == XILINX) { - for (iReadLoop = 0; iReadLoop < 30; - iReadLoop++) { - cRetCode = ispVMRead(g_usiDataSize); - if (!cRetCode) { - break; - } else { - /* Always DRPAUSE */ - ispVMStateMachine(DRPAUSE); - /* - * Bypass other devices - * when appropriate - */ - ispVMBypass(TDR, g_usTailDR); - ispVMStateMachine(g_ucEndDR); - ispVMStateMachine(IDLE); - ispVMDelay(1000); - } - } - } - } - } else { /*TDI only*/ - cRetCode = ispVMSend(g_usiDataSize); - } - - /*transfer the input data to the output buffer for the next verify*/ - if ((g_usDataType & EXPRESS) || (a_cCode == SDR)) { - if (g_pucOutData) { - for (iDataIndex = 0; iDataIndex < g_usiDataSize / 8 + 1; - iDataIndex++) - g_pucOutData[iDataIndex] = - g_pucInData[iDataIndex]; - } - } - - switch (a_cCode) { - case SIR: - /* 1/15/04 If not performing cascading, then shift ENDIR */ - if (!(g_usFlowControl & CASCADE)) { - if (g_usTailIR > 0) { - sclock(); - ispVMBypass(TIR, g_usTailIR); - } - ispVMStateMachine(g_ucEndIR); - } - break; - case XSDR: - case SDR: - /* 1/15/04 If not performing cascading, then shift ENDDR */ - if (!(g_usFlowControl & CASCADE)) { - if (g_usTailDR > 0) { - sclock(); - ispVMBypass(TDR, g_usTailDR); - } - ispVMStateMachine(g_ucEndDR); - } - break; - default: - break; - } - - return cRetCode; -} - -/* - * - * ispVMAmble - * - * This routine is to extract Header and Trailer parameter for SIR and - * SDR operations. - * - * The Header and Trailer parameter are the pre-amble and post-amble bit - * stream need to be shifted into TDI or out of TDO of the devices. Mostly - * is for the purpose of bypassing the leading or trailing devices. ispVM - * supports only shifting data into TDI to bypass the devices. - * - * For a single device, the header and trailer parameters are all set to 0 - * as default by ispVM. If it is for multiple devices, the header and trailer - * value will change as specified by the VME file. - * - */ - -signed char ispVMAmble(signed char Code) -{ - signed char compress = 0; - /* 09/11/07 NN Type cast mismatch variables */ - g_usiDataSize = (unsigned short)ispVMDataSize(); - -#ifdef DEBUG - printf("%d", g_usiDataSize); -#endif /* DEBUG */ - - if (g_usiDataSize) { - - /* - * Discard the TDI byte and set the compression bit in the data - * type register to false if compression is set because TDI data - * after HIR/HDR/TIR/TDR is not compressed. - */ - - GetByte(); - if (g_usDataType & COMPRESS) { - g_usDataType &= ~(COMPRESS); - compress = 1; - } - } - - switch (Code) { - case HIR: - - /* - * Store the maximum size of the HIR buffer. - * Used to convert VME to HEX. - */ - - if (g_usiDataSize > g_usHIRSize) { - g_usHIRSize = g_usiDataSize; - } - - /* - * Assign the HIR value and allocate memory. - */ - - g_usHeadIR = g_usiDataSize; - if (g_usHeadIR) { - ispVMMemManager(HIR, g_usHeadIR); - ispVMData(g_pucHIRData); - -#ifdef DEBUG - puts(" TDI "); - PrintData(g_usHeadIR, g_pucHIRData); -#endif /* DEBUG */ - } - break; - case TIR: - - /* - * Store the maximum size of the TIR buffer. - * Used to convert VME to HEX. - */ - - if (g_usiDataSize > g_usTIRSize) { - g_usTIRSize = g_usiDataSize; - } - - /* - * Assign the TIR value and allocate memory. - */ - - g_usTailIR = g_usiDataSize; - if (g_usTailIR) { - ispVMMemManager(TIR, g_usTailIR); - ispVMData(g_pucTIRData); - -#ifdef DEBUG - puts(" TDI "); - PrintData(g_usTailIR, g_pucTIRData); -#endif /* DEBUG */ - } - break; - case HDR: - - /* - * Store the maximum size of the HDR buffer. - * Used to convert VME to HEX. - */ - - if (g_usiDataSize > g_usHDRSize) { - g_usHDRSize = g_usiDataSize; - } - - /* - * Assign the HDR value and allocate memory. - * - */ - - g_usHeadDR = g_usiDataSize; - if (g_usHeadDR) { - ispVMMemManager(HDR, g_usHeadDR); - ispVMData(g_pucHDRData); - -#ifdef DEBUG - puts(" TDI "); - PrintData(g_usHeadDR, g_pucHDRData); -#endif /* DEBUG */ - } - break; - case TDR: - - /* - * Store the maximum size of the TDR buffer. - * Used to convert VME to HEX. - */ - - if (g_usiDataSize > g_usTDRSize) { - g_usTDRSize = g_usiDataSize; - } - - /* - * Assign the TDR value and allocate memory. - * - */ - - g_usTailDR = g_usiDataSize; - if (g_usTailDR) { - ispVMMemManager(TDR, g_usTailDR); - ispVMData(g_pucTDRData); - -#ifdef DEBUG - puts(" TDI "); - PrintData(g_usTailDR, g_pucTDRData); -#endif /* DEBUG */ - } - break; - default: - break; - } - - /* - * - * Re-enable compression if it was previously set. - * - **/ - - if (compress) { - g_usDataType |= COMPRESS; - } - - if (g_usiDataSize) { - Code = GetByte(); - if (Code == CONTINUE) { - return 0; - } else { - - /* - * Encountered invalid opcode. - */ - - return VME_INVALID_FILE; - } - } - - return 0; -} - -/* - * - * ispVMLoop - * - * Perform the function call upon by the REPEAT opcode. - * Memory is to be allocated to store the entire loop from REPEAT to ENDLOOP. - * After the loop is stored then execution begin. The REPEATLOOP flag is set - * on the g_usFlowControl register to indicate the repeat loop is in session - * and therefore fetch opcode from the memory instead of from the file. - * - */ - -signed char ispVMLoop(unsigned short a_usLoopCount) -{ - /* 09/11/07 NN added local variables initialization */ - signed char cRetCode = 0; - unsigned short iHeapIndex = 0; - unsigned short iLoopIndex = 0; - - g_usShiftValue = 0; - for (iHeapIndex = 0; iHeapIndex < g_iHEAPSize; iHeapIndex++) { - g_pucHeapMemory[iHeapIndex] = GetByte(); - } - - if (g_pucHeapMemory[iHeapIndex - 1] != ENDLOOP) { - return VME_INVALID_FILE; - } - - g_usFlowControl |= REPEATLOOP; - g_usDataType |= HEAP_IN; - - for (iLoopIndex = 0; iLoopIndex < a_usLoopCount; iLoopIndex++) { - g_iHeapCounter = 0; - cRetCode = ispVMCode(); - g_usRepeatLoops++; - if (cRetCode < 0) { - break; - } - } - - g_usDataType &= ~(HEAP_IN); - g_usFlowControl &= ~(REPEATLOOP); - return cRetCode; -} - -/* - * - * ispVMBitShift - * - * Shift the TDI stream left or right by the number of bits. The data in - * *g_pucInData is of the VME format, so the actual shifting is the reverse of - * IEEE 1532 or SVF format. - * - */ - -signed char ispVMBitShift(signed char mode, unsigned short bits) -{ - /* 09/11/07 NN added local variables initialization */ - unsigned short i = 0; - unsigned short size = 0; - unsigned short tmpbits = 0; - - if (g_usiDataSize % 8 > 0) { - /* 09/11/07 NN Type cast mismatch variables */ - size = (unsigned short)(g_usiDataSize / 8 + 1); - } else { - /* 09/11/07 NN Type cast mismatch variables */ - size = (unsigned short)(g_usiDataSize / 8); - } - - switch (mode) { - case SHR: - for (i = 0; i < size; i++) { - if (g_pucInData[i] != 0) { - tmpbits = bits; - while (tmpbits > 0) { - g_pucInData[i] <<= 1; - if (g_pucInData[i] == 0) { - i--; - g_pucInData[i] = 1; - } - tmpbits--; - } - } - } - break; - case SHL: - for (i = 0; i < size; i++) { - if (g_pucInData[i] != 0) { - tmpbits = bits; - while (tmpbits > 0) { - g_pucInData[i] >>= 1; - if (g_pucInData[i] == 0) { - i--; - g_pucInData[i] = 8; - } - tmpbits--; - } - } - } - break; - default: - return VME_INVALID_FILE; - } - - return 0; -} - -/* - * - * ispVMComment - * - * Displays the SVF comments. - * - */ - -void ispVMComment(unsigned short a_usCommentSize) -{ - char cCurByte = 0; - for (; a_usCommentSize > 0; a_usCommentSize--) { - /* - * - * Print character to the terminal. - * - **/ - cCurByte = GetByte(); - vme_out_char(cCurByte); - } - cCurByte = '\n'; - vme_out_char(cCurByte); -} - -/* - * - * ispVMHeader - * - * Iterate the length of the header and discard it. - * - */ - -void ispVMHeader(unsigned short a_usHeaderSize) -{ - for (; a_usHeaderSize > 0; a_usHeaderSize--) { - GetByte(); - } -} - -/* - * - * ispVMCalculateCRC32 - * - * Calculate the 32-bit CRC. - * - */ - -void ispVMCalculateCRC32(unsigned char a_ucData) -{ - /* 09/11/07 NN added local variables initialization */ - unsigned char ucIndex = 0; - unsigned char ucFlipData = 0; - unsigned short usCRCTableEntry = 0; - unsigned int crc_table[16] = { - 0x0000, 0xCC01, 0xD801, - 0x1400, 0xF001, 0x3C00, - 0x2800, 0xE401, 0xA001, - 0x6C00, 0x7800, 0xB401, - 0x5000, 0x9C01, 0x8801, - 0x4400 - }; - - for (ucIndex = 0; ucIndex < 8; ucIndex++) { - ucFlipData <<= 1; - if (a_ucData & 0x01) { - ucFlipData |= 0x01; - } - a_ucData >>= 1; - } - - /* 09/11/07 NN Type cast mismatch variables */ - usCRCTableEntry = (unsigned short)(crc_table[g_usCalculatedCRC & 0xF]); - g_usCalculatedCRC = (unsigned short)((g_usCalculatedCRC >> 4) & 0x0FFF); - g_usCalculatedCRC = (unsigned short)(g_usCalculatedCRC ^ - usCRCTableEntry ^ crc_table[ucFlipData & 0xF]); - usCRCTableEntry = (unsigned short)(crc_table[g_usCalculatedCRC & 0xF]); - g_usCalculatedCRC = (unsigned short)((g_usCalculatedCRC >> 4) & 0x0FFF); - g_usCalculatedCRC = (unsigned short)(g_usCalculatedCRC ^ - usCRCTableEntry ^ crc_table[(ucFlipData >> 4) & 0xF]); -} - -/* - * - * ispVMLCOUNT - * - * Process the intelligent programming loops. - * - */ - -signed char ispVMLCOUNT(unsigned short a_usCountSize) -{ - unsigned short usContinue = 1; - unsigned short usIntelBufferIndex = 0; - unsigned short usCountIndex = 0; - signed char cRetCode = 0; - signed char cRepeatHeap = 0; - signed char cOpcode = 0; - unsigned char ucState = 0; - unsigned short usDelay = 0; - unsigned short usToggle = 0; - - g_usIntelBufferSize = (unsigned short)ispVMDataSize(); - - /* - * Allocate memory for intel buffer. - * - */ - - ispVMMemManager(LHEAP, g_usIntelBufferSize); - - /* - * Store the maximum size of the intelligent buffer. - * Used to convert VME to HEX. - */ - - if (g_usIntelBufferSize > g_usLCOUNTSize) { - g_usLCOUNTSize = g_usIntelBufferSize; - } - - /* - * Copy intel data to the buffer. - */ - - for (usIntelBufferIndex = 0; usIntelBufferIndex < g_usIntelBufferSize; - usIntelBufferIndex++) { - g_pucIntelBuffer[usIntelBufferIndex] = GetByte(); - } - - /* - * Set the data type register to get data from the intelligent - * data buffer. - */ - - g_usDataType |= LHEAP_IN; - - /* - * - * If the HEAP_IN flag is set, temporarily unset the flag so data will be - * retrieved from the status buffer. - * - **/ - - if (g_usDataType & HEAP_IN) { - g_usDataType &= ~HEAP_IN; - cRepeatHeap = 1; - } - -#ifdef DEBUG - printf("LCOUNT %d;\n", a_usCountSize); -#endif /* DEBUG */ - - /* - * Iterate through the intelligent programming command. - */ - - for (usCountIndex = 0; usCountIndex < a_usCountSize; usCountIndex++) { - - /* - * - * Initialize the intel data index to 0 before each iteration. - * - **/ - - g_usIntelDataIndex = 0; - cOpcode = 0; - ucState = 0; - usDelay = 0; - usToggle = 0; - usContinue = 1; - - /* - * - * Begin looping through all the VME opcodes. - * - */ - /* - * 4/1/09 Nguyen replaced the recursive function call codes on - * the ispVMLCOUNT function - * - */ - while (usContinue) { - cOpcode = GetByte(); - switch (cOpcode) { - case HIR: - case TIR: - case HDR: - case TDR: - /* - * Set the header/trailer of the device in order - * to bypass successfully. - */ - - ispVMAmble(cOpcode); - break; - case STATE: - - /* - * Step the JTAG state machine. - */ - - ucState = GetByte(); - /* - * Step the JTAG state machine to DRCAPTURE - * to support Looping. - */ - - if ((g_usDataType & LHEAP_IN) && - (ucState == DRPAUSE) && - (g_cCurrentJTAGState == ucState)) { - ispVMStateMachine(DRCAPTURE); - } - ispVMStateMachine(ucState); -#ifdef DEBUG - printf("LDELAY %s ", GetState(ucState)); -#endif /* DEBUG */ - break; - case SIR: -#ifdef DEBUG - printf("SIR "); -#endif /* DEBUG */ - /* - * Shift in data into the device. - */ - - cRetCode = ispVMShift(cOpcode); - break; - case SDR: - -#ifdef DEBUG - printf("LSDR "); -#endif /* DEBUG */ - /* - * Shift in data into the device. - */ - - cRetCode = ispVMShift(cOpcode); - break; - case WAIT: - - /* - * - * Observe delay. - * - */ - - usDelay = (unsigned short)ispVMDataSize(); - ispVMDelay(usDelay); - -#ifdef DEBUG - if (usDelay & 0x8000) { - - /* - * Since MSB is set, the delay time must - * be decoded to millisecond. The - * SVF2VME encodes the MSB to represent - * millisecond. - */ - - usDelay &= ~0x8000; - printf("%.2E SEC;\n", - (float) usDelay / 1000); - } else { - /* - * Since MSB is not set, the delay time - * is given as microseconds. - */ - - printf("%.2E SEC;\n", - (float) usDelay / 1000000); - } -#endif /* DEBUG */ - break; - case TCK: - - /* - * Issue clock toggles. - */ - - usToggle = (unsigned short)ispVMDataSize(); - ispVMClocks(usToggle); - -#ifdef DEBUG - printf("RUNTEST %d TCK;\n", usToggle); -#endif /* DEBUG */ - break; - case ENDLOOP: - - /* - * Exit point from processing loops. - */ - usContinue = 0; - break; - - case COMMENT: - - /* - * Display comment. - */ - - ispVMComment((unsigned short) ispVMDataSize()); - break; - case ispEN: - ucState = GetByte(); - if ((ucState == ON) || (ucState == 0x01)) - writePort(g_ucPinENABLE, 0x01); - else - writePort(g_ucPinENABLE, 0x00); - ispVMDelay(1); - break; - case TRST: - if (GetByte() == 0x01) - writePort(g_ucPinTRST, 0x01); - else - writePort(g_ucPinTRST, 0x00); - ispVMDelay(1); - break; - default: - - /* - * Invalid opcode encountered. - */ - - debug("\nINVALID OPCODE: 0x%.2X\n", cOpcode); - - return VME_INVALID_FILE; - } - } - if (cRetCode >= 0) { - /* - * Break if intelligent programming is successful. - */ - - break; - } - - } - /* - * If HEAP_IN flag was temporarily disabled, - * re-enable it before exiting - */ - - if (cRepeatHeap) { - g_usDataType |= HEAP_IN; - } - - /* - * Set the data type register to not get data from the - * intelligent data buffer. - */ - - g_usDataType &= ~LHEAP_IN; - return cRetCode; -} -/* - * - * ispVMClocks - * - * Applies the specified number of pulses to TCK. - * - */ - -void ispVMClocks(unsigned short Clocks) -{ - unsigned short iClockIndex = 0; - for (iClockIndex = 0; iClockIndex < Clocks; iClockIndex++) { - sclock(); - } -} - -/* - * - * ispVMBypass - * - * This procedure takes care of the HIR, HDR, TIR, TDR for the - * purpose of putting the other devices into Bypass mode. The - * current state is checked to find out if it is at DRPAUSE or - * IRPAUSE. If it is at DRPAUSE, perform bypass register scan. - * If it is at IRPAUSE, scan into instruction registers the bypass - * instruction. - * - */ - -void ispVMBypass(signed char ScanType, unsigned short Bits) -{ - /* 09/11/07 NN added local variables initialization */ - unsigned short iIndex = 0; - unsigned short iSourceIndex = 0; - unsigned char cBitState = 0; - unsigned char cCurByte = 0; - unsigned char *pcSource = NULL; - - if (Bits <= 0) { - return; - } - - switch (ScanType) { - case HIR: - pcSource = g_pucHIRData; - break; - case TIR: - pcSource = g_pucTIRData; - break; - case HDR: - pcSource = g_pucHDRData; - break; - case TDR: - pcSource = g_pucTDRData; - break; - default: - break; - } - - iSourceIndex = 0; - cBitState = 0; - for (iIndex = 0; iIndex < Bits - 1; iIndex++) { - /* Scan instruction or bypass register */ - if (iIndex % 8 == 0) { - cCurByte = pcSource[iSourceIndex++]; - } - cBitState = (unsigned char) (((cCurByte << iIndex % 8) & 0x80) - ? 0x01 : 0x00); - writePort(g_ucPinTDI, cBitState); - sclock(); - } - - if (iIndex % 8 == 0) { - cCurByte = pcSource[iSourceIndex++]; - } - - cBitState = (unsigned char) (((cCurByte << iIndex % 8) & 0x80) - ? 0x01 : 0x00); - writePort(g_ucPinTDI, cBitState); -} - -/* - * - * ispVMStateMachine - * - * This procedure steps all devices in the daisy chain from a given - * JTAG state to the next desirable state. If the next state is TLR, - * the JTAG state machine is brute forced into TLR by driving TMS - * high and pulse TCK 6 times. - * - */ - -void ispVMStateMachine(signed char cNextJTAGState) -{ - /* 09/11/07 NN added local variables initialization */ - signed char cPathIndex = 0; - signed char cStateIndex = 0; - - if ((g_cCurrentJTAGState == cNextJTAGState) && - (cNextJTAGState != RESET)) { - return; - } - - for (cStateIndex = 0; cStateIndex < 25; cStateIndex++) { - if ((g_cCurrentJTAGState == - g_JTAGTransistions[cStateIndex].CurState) && - (cNextJTAGState == - g_JTAGTransistions[cStateIndex].NextState)) { - break; - } - } - - g_cCurrentJTAGState = cNextJTAGState; - for (cPathIndex = 0; - cPathIndex < g_JTAGTransistions[cStateIndex].Pulses; - cPathIndex++) { - if ((g_JTAGTransistions[cStateIndex].Pattern << cPathIndex) - & 0x80) { - writePort(g_ucPinTMS, (unsigned char) 0x01); - } else { - writePort(g_ucPinTMS, (unsigned char) 0x00); - } - sclock(); - } - - writePort(g_ucPinTDI, 0x00); - writePort(g_ucPinTMS, 0x00); -} - -/* - * - * ispVMStart - * - * Enable the port to the device and set the state to RESET (TLR). - * - */ - -void ispVMStart(void) -{ -#ifdef DEBUG - printf("// ISPVM EMBEDDED ADDED\n"); - printf("STATE RESET;\n"); -#endif - g_usFlowControl = 0; - g_usDataType = g_uiChecksumIndex = g_cCurrentJTAGState = 0; - g_usHeadDR = g_usHeadIR = g_usTailDR = g_usTailIR = 0; - g_usMaxSize = g_usShiftValue = g_usRepeatLoops = 0; - g_usTDOSize = g_usMASKSize = g_usTDISize = 0; - g_usDMASKSize = g_usLCOUNTSize = g_usHDRSize = 0; - g_usTDRSize = g_usHIRSize = g_usTIRSize = g_usHeapSize = 0; - g_pLVDSList = NULL; - g_usLVDSPairCount = 0; - previous_size = 0; - - ispVMStateMachine(RESET); /*step devices to RESET state*/ -} - -/* - * - * ispVMEnd - * - * Set the state of devices to RESET to enable the devices and disable - * the port. - * - */ - -void ispVMEnd(void) -{ -#ifdef DEBUG - printf("// ISPVM EMBEDDED ADDED\n"); - printf("STATE RESET;\n"); - printf("RUNTEST 1.00E-001 SEC;\n"); -#endif - - ispVMStateMachine(RESET); /*step devices to RESET state */ - ispVMDelay(1000); /*wake up devices*/ -} - -/* - * - * ispVMSend - * - * Send the TDI data stream to devices. The data stream can be - * instructions or data. - * - */ - -signed char ispVMSend(unsigned short a_usiDataSize) -{ - /* 09/11/07 NN added local variables initialization */ - unsigned short iIndex = 0; - unsigned short iInDataIndex = 0; - unsigned char cCurByte = 0; - unsigned char cBitState = 0; - - for (iIndex = 0; iIndex < a_usiDataSize - 1; iIndex++) { - if (iIndex % 8 == 0) { - cCurByte = g_pucInData[iInDataIndex++]; - } - cBitState = (unsigned char)(((cCurByte << iIndex % 8) & 0x80) - ? 0x01 : 0x00); - writePort(g_ucPinTDI, cBitState); - sclock(); - } - - if (iIndex % 8 == 0) { - /* Take care of the last bit */ - cCurByte = g_pucInData[iInDataIndex]; - } - - cBitState = (unsigned char) (((cCurByte << iIndex % 8) & 0x80) - ? 0x01 : 0x00); - - writePort(g_ucPinTDI, cBitState); - if (g_usFlowControl & CASCADE) { - /*1/15/04 Clock in last bit for the first n-1 cascaded frames */ - sclock(); - } - - return 0; -} - -/* - * - * ispVMRead - * - * Read the data stream from devices and verify. - * - */ - -signed char ispVMRead(unsigned short a_usiDataSize) -{ - /* 09/11/07 NN added local variables initialization */ - unsigned short usDataSizeIndex = 0; - unsigned short usErrorCount = 0; - unsigned short usLastBitIndex = 0; - unsigned char cDataByte = 0; - unsigned char cMaskByte = 0; - unsigned char cInDataByte = 0; - unsigned char cCurBit = 0; - unsigned char cByteIndex = 0; - unsigned short usBufferIndex = 0; - unsigned char ucDisplayByte = 0x00; - unsigned char ucDisplayFlag = 0x01; - char StrChecksum[256] = {0}; - unsigned char g_usCalculateChecksum = 0x00; - - /* 09/11/07 NN Type cast mismatch variables */ - usLastBitIndex = (unsigned short)(a_usiDataSize - 1); - -#ifndef DEBUG - /* - * If mask is not all zeros, then set the display flag to 0x00, - * otherwise it shall be set to 0x01 to indicate that data read - * from the device shall be displayed. If DEBUG is defined, - * always display data. - */ - - for (usDataSizeIndex = 0; usDataSizeIndex < (a_usiDataSize + 7) / 8; - usDataSizeIndex++) { - if (g_usDataType & MASK_DATA) { - if (g_pucOutMaskData[usDataSizeIndex] != 0x00) { - ucDisplayFlag = 0x00; - break; - } - } else if (g_usDataType & CMASK_DATA) { - g_usCalculateChecksum = 0x01; - ucDisplayFlag = 0x00; - break; - } else { - ucDisplayFlag = 0x00; - break; - } - } -#endif /* DEBUG */ - - /* - * - * Begin shifting data in and out of the device. - * - **/ - - for (usDataSizeIndex = 0; usDataSizeIndex < a_usiDataSize; - usDataSizeIndex++) { - if (cByteIndex == 0) { - - /* - * Grab byte from TDO buffer. - */ - - if (g_usDataType & TDO_DATA) { - cDataByte = g_pucOutData[usBufferIndex]; - } - - /* - * Grab byte from MASK buffer. - */ - - if (g_usDataType & MASK_DATA) { - cMaskByte = g_pucOutMaskData[usBufferIndex]; - } else { - cMaskByte = 0xFF; - } - - /* - * Grab byte from CMASK buffer. - */ - - if (g_usDataType & CMASK_DATA) { - cMaskByte = 0x00; - g_usCalculateChecksum = 0x01; - } - - /* - * Grab byte from TDI buffer. - */ - - if (g_usDataType & TDI_DATA) { - cInDataByte = g_pucInData[usBufferIndex]; - } - - usBufferIndex++; - } - - cCurBit = readPort(); - - if (ucDisplayFlag) { - ucDisplayByte <<= 1; - ucDisplayByte |= cCurBit; - } - - /* - * Check if data read from port matches with expected TDO. - */ - - if (g_usDataType & TDO_DATA) { - /* 08/28/08 NN Added Calculate checksum support. */ - if (g_usCalculateChecksum) { - if (cCurBit == 0x01) - g_usChecksum += - (1 << (g_uiChecksumIndex % 8)); - g_uiChecksumIndex++; - } else { - if ((((cMaskByte << cByteIndex) & 0x80) - ? 0x01 : 0x00)) { - if (cCurBit != (unsigned char) - (((cDataByte << cByteIndex) & 0x80) - ? 0x01 : 0x00)) { - usErrorCount++; - } - } - } - } - - /* - * Write TDI data to the port. - */ - - writePort(g_ucPinTDI, - (unsigned char)(((cInDataByte << cByteIndex) & 0x80) - ? 0x01 : 0x00)); - - if (usDataSizeIndex < usLastBitIndex) { - - /* - * Clock data out from the data shift register. - */ - - sclock(); - } else if (g_usFlowControl & CASCADE) { - - /* - * Clock in last bit for the first N - 1 cascaded frames - */ - - sclock(); - } - - /* - * Increment the byte index. If it exceeds 7, then reset it back - * to zero. - */ - - cByteIndex++; - if (cByteIndex >= 8) { - if (ucDisplayFlag) { - - /* - * Store displayed data in the TDO buffer. By reusing - * the TDO buffer to store displayed data, there is no - * need to allocate a buffer simply to hold display - * data. This will not cause any false verification - * errors because the true TDO byte has already - * been consumed. - */ - - g_pucOutData[usBufferIndex - 1] = ucDisplayByte; - ucDisplayByte = 0; - } - - cByteIndex = 0; - } - /* 09/12/07 Nguyen changed to display the 1 bit expected data */ - else if (a_usiDataSize == 1) { - if (ucDisplayFlag) { - - /* - * Store displayed data in the TDO buffer. - * By reusing the TDO buffer to store displayed - * data, there is no need to allocate - * a buffer simply to hold display data. This - * will not cause any false verification errors - * because the true TDO byte has already - * been consumed. - */ - - /* - * Flip ucDisplayByte and store it in cDataByte. - */ - cDataByte = 0x00; - for (usBufferIndex = 0; usBufferIndex < 8; - usBufferIndex++) { - cDataByte <<= 1; - if (ucDisplayByte & 0x01) { - cDataByte |= 0x01; - } - ucDisplayByte >>= 1; - } - g_pucOutData[0] = cDataByte; - ucDisplayByte = 0; - } - - cByteIndex = 0; - } - } - - if (ucDisplayFlag) { - -#ifdef DEBUG - debug("RECEIVED TDO ("); -#else - vme_out_string("Display Data: 0x"); -#endif /* DEBUG */ - - /* 09/11/07 NN Type cast mismatch variables */ - for (usDataSizeIndex = (unsigned short) - ((a_usiDataSize + 7) / 8); - usDataSizeIndex > 0 ; usDataSizeIndex--) { - cMaskByte = g_pucOutData[usDataSizeIndex - 1]; - cDataByte = 0x00; - - /* - * Flip cMaskByte and store it in cDataByte. - */ - - for (usBufferIndex = 0; usBufferIndex < 8; - usBufferIndex++) { - cDataByte <<= 1; - if (cMaskByte & 0x01) { - cDataByte |= 0x01; - } - cMaskByte >>= 1; - } -#ifdef DEBUG - printf("%.2X", cDataByte); - if ((((a_usiDataSize + 7) / 8) - usDataSizeIndex) - % 40 == 39) { - printf("\n\t\t"); - } -#else - vme_out_hex(cDataByte); -#endif /* DEBUG */ - } - -#ifdef DEBUG - printf(")\n\n"); -#else - vme_out_string("\n\n"); -#endif /* DEBUG */ - /* 09/02/08 Nguyen changed to display the data Checksum */ - if (g_usChecksum != 0) { - g_usChecksum &= 0xFFFF; - sprintf(StrChecksum, "Data Checksum: %.4lX\n\n", - g_usChecksum); - vme_out_string(StrChecksum); - g_usChecksum = 0; - } - } - - if (usErrorCount > 0) { - if (g_usFlowControl & VERIFYUES) { - vme_out_string( - "USERCODE verification failed. " - "Continue programming......\n\n"); - g_usFlowControl &= ~(VERIFYUES); - return 0; - } else { - -#ifdef DEBUG - printf("TOTAL ERRORS: %d\n", usErrorCount); -#endif /* DEBUG */ - - return VME_VERIFICATION_FAILURE; - } - } else { - if (g_usFlowControl & VERIFYUES) { - vme_out_string("USERCODE verification passed. " - "Programming aborted.\n\n"); - g_usFlowControl &= ~(VERIFYUES); - return 1; - } else { - return 0; - } - } -} - -/* - * - * ispVMReadandSave - * - * Support dynamic I/O. - * - */ - -signed char ispVMReadandSave(unsigned short int a_usiDataSize) -{ - /* 09/11/07 NN added local variables initialization */ - unsigned short int usDataSizeIndex = 0; - unsigned short int usLastBitIndex = 0; - unsigned short int usBufferIndex = 0; - unsigned short int usOutBitIndex = 0; - unsigned short int usLVDSIndex = 0; - unsigned char cDataByte = 0; - unsigned char cDMASKByte = 0; - unsigned char cInDataByte = 0; - unsigned char cCurBit = 0; - unsigned char cByteIndex = 0; - signed char cLVDSByteIndex = 0; - - /* 09/11/07 NN Type cast mismatch variables */ - usLastBitIndex = (unsigned short) (a_usiDataSize - 1); - - /* - * - * Iterate through the data bits. - * - */ - - for (usDataSizeIndex = 0; usDataSizeIndex < a_usiDataSize; - usDataSizeIndex++) { - if (cByteIndex == 0) { - - /* - * Grab byte from DMASK buffer. - */ - - if (g_usDataType & DMASK_DATA) { - cDMASKByte = g_pucOutDMaskData[usBufferIndex]; - } else { - cDMASKByte = 0x00; - } - - /* - * Grab byte from TDI buffer. - */ - - if (g_usDataType & TDI_DATA) { - cInDataByte = g_pucInData[usBufferIndex]; - } - - usBufferIndex++; - } - - cCurBit = readPort(); - cDataByte = (unsigned char)(((cInDataByte << cByteIndex) & 0x80) - ? 0x01 : 0x00); - - /* - * Initialize the byte to be zero. - */ - - if (usOutBitIndex % 8 == 0) { - g_pucOutData[usOutBitIndex / 8] = 0x00; - } - - /* - * Use TDI, DMASK, and device TDO to create new TDI (actually - * stored in g_pucOutData). - */ - - if ((((cDMASKByte << cByteIndex) & 0x80) ? 0x01 : 0x00)) { - - if (g_pLVDSList) { - for (usLVDSIndex = 0; - usLVDSIndex < g_usLVDSPairCount; - usLVDSIndex++) { - if (g_pLVDSList[usLVDSIndex]. - usNegativeIndex == - usDataSizeIndex) { - g_pLVDSList[usLVDSIndex]. - ucUpdate = 0x01; - break; - } - } - } - - /* - * DMASK bit is 1, use TDI. - */ - - g_pucOutData[usOutBitIndex / 8] |= (unsigned char) - (((cDataByte & 0x1) ? 0x01 : 0x00) << - (7 - usOutBitIndex % 8)); - } else { - - /* - * DMASK bit is 0, use device TDO. - */ - - g_pucOutData[usOutBitIndex / 8] |= (unsigned char) - (((cCurBit & 0x1) ? 0x01 : 0x00) << - (7 - usOutBitIndex % 8)); - } - - /* - * Shift in TDI in order to get TDO out. - */ - - usOutBitIndex++; - writePort(g_ucPinTDI, cDataByte); - if (usDataSizeIndex < usLastBitIndex) { - sclock(); - } - - /* - * Increment the byte index. If it exceeds 7, then reset it back - * to zero. - */ - - cByteIndex++; - if (cByteIndex >= 8) { - cByteIndex = 0; - } - } - - /* - * If g_pLVDSList exists and pairs need updating, then update - * the negative-pair to receive the flipped positive-pair value. - */ - - if (g_pLVDSList) { - for (usLVDSIndex = 0; usLVDSIndex < g_usLVDSPairCount; - usLVDSIndex++) { - if (g_pLVDSList[usLVDSIndex].ucUpdate) { - - /* - * Read the positive value and flip it. - */ - - cDataByte = (unsigned char) - (((g_pucOutData[g_pLVDSList[usLVDSIndex]. - usPositiveIndex / 8] - << (g_pLVDSList[usLVDSIndex]. - usPositiveIndex % 8)) & 0x80) ? - 0x01 : 0x00); - /* 09/11/07 NN Type cast mismatch variables */ - cDataByte = (unsigned char) (!cDataByte); - - /* - * Get the byte that needs modification. - */ - - cInDataByte = - g_pucOutData[g_pLVDSList[usLVDSIndex]. - usNegativeIndex / 8]; - - if (cDataByte) { - - /* - * Copy over the current byte and - * set the negative bit to 1. - */ - - cDataByte = 0x00; - for (cLVDSByteIndex = 7; - cLVDSByteIndex >= 0; - cLVDSByteIndex--) { - cDataByte <<= 1; - if (7 - - (g_pLVDSList[usLVDSIndex]. - usNegativeIndex % 8) == - cLVDSByteIndex) { - - /* - * Set negative bit to 1 - */ - - cDataByte |= 0x01; - } else if (cInDataByte & 0x80) { - cDataByte |= 0x01; - } - - cInDataByte <<= 1; - } - - /* - * Store the modified byte. - */ - - g_pucOutData[g_pLVDSList[usLVDSIndex]. - usNegativeIndex / 8] = cDataByte; - } else { - - /* - * Copy over the current byte and set - * the negative bit to 0. - */ - - cDataByte = 0x00; - for (cLVDSByteIndex = 7; - cLVDSByteIndex >= 0; - cLVDSByteIndex--) { - cDataByte <<= 1; - if (7 - - (g_pLVDSList[usLVDSIndex]. - usNegativeIndex % 8) == - cLVDSByteIndex) { - - /* - * Set negative bit to 0 - */ - - cDataByte |= 0x00; - } else if (cInDataByte & 0x80) { - cDataByte |= 0x01; - } - - cInDataByte <<= 1; - } - - /* - * Store the modified byte. - */ - - g_pucOutData[g_pLVDSList[usLVDSIndex]. - usNegativeIndex / 8] = cDataByte; - } - - break; - } - } - } - - return 0; -} - -signed char ispVMProcessLVDS(unsigned short a_usLVDSCount) -{ - unsigned short usLVDSIndex = 0; - - /* - * Allocate memory to hold LVDS pairs. - */ - - ispVMMemManager(LVDS, a_usLVDSCount); - g_usLVDSPairCount = a_usLVDSCount; - -#ifdef DEBUG - printf("LVDS %d (", a_usLVDSCount); -#endif /* DEBUG */ - - /* - * Iterate through each given LVDS pair. - */ - - for (usLVDSIndex = 0; usLVDSIndex < g_usLVDSPairCount; usLVDSIndex++) { - - /* - * Assign the positive and negative indices of the LVDS pair. - */ - - /* 09/11/07 NN Type cast mismatch variables */ - g_pLVDSList[usLVDSIndex].usPositiveIndex = - (unsigned short) ispVMDataSize(); - /* 09/11/07 NN Type cast mismatch variables */ - g_pLVDSList[usLVDSIndex].usNegativeIndex = - (unsigned short)ispVMDataSize(); - -#ifdef DEBUG - if (usLVDSIndex < g_usLVDSPairCount - 1) { - printf("%d:%d, ", - g_pLVDSList[usLVDSIndex].usPositiveIndex, - g_pLVDSList[usLVDSIndex].usNegativeIndex); - } else { - printf("%d:%d", - g_pLVDSList[usLVDSIndex].usPositiveIndex, - g_pLVDSList[usLVDSIndex].usNegativeIndex); - } -#endif /* DEBUG */ - - } - -#ifdef DEBUG - printf(");\n"); -#endif /* DEBUG */ - - return 0; -} diff --git a/drivers/fpga/lattice.c b/drivers/fpga/lattice.c deleted file mode 100644 index 29cf2f60974..00000000000 --- a/drivers/fpga/lattice.c +++ /dev/null @@ -1,379 +0,0 @@ -// SPDX-License-Identifier: GPL-2.0+ -/* - * (C) Copyright 2010 - * Stefano Babic, DENX Software Engineering, sbabic@denx.de. - * - * (C) Copyright 2002 - * Rich Ireland, Enterasys Networks, rireland@enterasys.com. - * - * ispVM functions adapted from Lattice's ispmVMEmbedded code: - * Copyright 2009 Lattice Semiconductor Corp. - */ - -#include <log.h> -#include <malloc.h> -#include <fpga.h> -#include <lattice.h> -#include <linux/delay.h> - -static lattice_board_specific_func *pfns; -static const char *fpga_image; -static unsigned long read_bytes; -static unsigned long bufsize; -static unsigned short expectedCRC; - -/* - * External variables and functions declared in ivm_core.c module. - */ -extern unsigned short g_usCalculatedCRC; -extern unsigned short g_usDataType; -extern unsigned char *g_pucIntelBuffer; -extern unsigned char *g_pucHeapMemory; -extern unsigned short g_iHeapCounter; -extern unsigned short g_iHEAPSize; -extern unsigned short g_usIntelDataIndex; -extern unsigned short g_usIntelBufferSize; -extern char *const g_szSupportedVersions[]; - -/* - * ispVMDelay - * - * Users must implement a delay to observe a_usTimeDelay, where - * bit 15 of the a_usTimeDelay defines the unit. - * 1 = milliseconds - * 0 = microseconds - * Example: - * a_usTimeDelay = 0x0001 = 1 microsecond delay. - * a_usTimeDelay = 0x8001 = 1 millisecond delay. - * - * This subroutine is called upon to provide a delay from 1 millisecond to a few - * hundreds milliseconds each time. - * It is understood that due to a_usTimeDelay is defined as unsigned short, a 16 - * bits integer, this function is restricted to produce a delay to 64000 - * micro-seconds or 32000 milli-second maximum. The VME file will never pass on - * to this function a delay time > those maximum number. If it needs more than - * those maximum, the VME file will launch the delay function several times to - * realize a larger delay time cummulatively. - * It is perfectly alright to provide a longer delay than required. It is not - * acceptable if the delay is shorter. - */ -void ispVMDelay(unsigned short delay) -{ - if (delay & 0x8000) - delay = (delay & ~0x8000) * 1000; - udelay(delay); -} - -void writePort(unsigned char a_ucPins, unsigned char a_ucValue) -{ - a_ucValue = a_ucValue ? 1 : 0; - - switch (a_ucPins) { - case g_ucPinTDI: - pfns->jtag_set_tdi(a_ucValue); - break; - case g_ucPinTCK: - pfns->jtag_set_tck(a_ucValue); - break; - case g_ucPinTMS: - pfns->jtag_set_tms(a_ucValue); - break; - default: - printf("%s: requested unknown pin\n", __func__); - } -} - -unsigned char readPort(void) -{ - return pfns->jtag_get_tdo(); -} - -void sclock(void) -{ - writePort(g_ucPinTCK, 0x01); - writePort(g_ucPinTCK, 0x00); -} - -void calibration(void) -{ - /* Apply 2 pulses to TCK. */ - writePort(g_ucPinTCK, 0x00); - writePort(g_ucPinTCK, 0x01); - writePort(g_ucPinTCK, 0x00); - writePort(g_ucPinTCK, 0x01); - writePort(g_ucPinTCK, 0x00); - - ispVMDelay(0x8001); - - /* Apply 2 pulses to TCK. */ - writePort(g_ucPinTCK, 0x01); - writePort(g_ucPinTCK, 0x00); - writePort(g_ucPinTCK, 0x01); - writePort(g_ucPinTCK, 0x00); -} - -/* - * GetByte - * - * Returns a byte to the caller. The returned byte depends on the - * g_usDataType register. If the HEAP_IN bit is set, then the byte - * is returned from the HEAP. If the LHEAP_IN bit is set, then - * the byte is returned from the intelligent buffer. Otherwise, - * the byte is returned directly from the VME file. - */ -unsigned char GetByte(void) -{ - unsigned char ucData; - unsigned int block_size = 4 * 1024; - - if (g_usDataType & HEAP_IN) { - - /* - * Get data from repeat buffer. - */ - - if (g_iHeapCounter > g_iHEAPSize) { - - /* - * Data over-run. - */ - - return 0xFF; - } - - ucData = g_pucHeapMemory[g_iHeapCounter++]; - } else if (g_usDataType & LHEAP_IN) { - - /* - * Get data from intel buffer. - */ - - if (g_usIntelDataIndex >= g_usIntelBufferSize) { - return 0xFF; - } - - ucData = g_pucIntelBuffer[g_usIntelDataIndex++]; - } else { - if (read_bytes == bufsize) { - return 0xFF; - } - ucData = *fpga_image++; - read_bytes++; - - if (!(read_bytes % block_size)) { - printf("Downloading FPGA %ld/%ld completed\r", - read_bytes, - bufsize); - } - - if (expectedCRC != 0) { - ispVMCalculateCRC32(ucData); - } - } - - return ucData; -} - -signed char ispVM(void) -{ - char szFileVersion[9] = { 0 }; - signed char cRetCode = 0; - signed char cIndex = 0; - signed char cVersionIndex = 0; - unsigned char ucReadByte = 0; - unsigned short crc; - - g_pucHeapMemory = NULL; - g_iHeapCounter = 0; - g_iHEAPSize = 0; - g_usIntelDataIndex = 0; - g_usIntelBufferSize = 0; - g_usCalculatedCRC = 0; - expectedCRC = 0; - ucReadByte = GetByte(); - switch (ucReadByte) { - case FILE_CRC: - crc = (unsigned char)GetByte(); - crc <<= 8; - crc |= GetByte(); - expectedCRC = crc; - - for (cIndex = 0; cIndex < 8; cIndex++) - szFileVersion[cIndex] = GetByte(); - - break; - default: - szFileVersion[0] = (signed char) ucReadByte; - for (cIndex = 1; cIndex < 8; cIndex++) - szFileVersion[cIndex] = GetByte(); - - break; - } - - /* - * - * Compare the VME file version against the supported version. - * - */ - - for (cVersionIndex = 0; g_szSupportedVersions[cVersionIndex] != 0; - cVersionIndex++) { - for (cIndex = 0; cIndex < 8; cIndex++) { - if (szFileVersion[cIndex] != - g_szSupportedVersions[cVersionIndex][cIndex]) { - cRetCode = VME_VERSION_FAILURE; - break; - } - cRetCode = 0; - } - - if (cRetCode == 0) { - break; - } - } - - if (cRetCode < 0) { - return VME_VERSION_FAILURE; - } - - printf("VME file checked: starting downloading to FPGA\n"); - - ispVMStart(); - - cRetCode = ispVMCode(); - - ispVMEnd(); - ispVMFreeMem(); - puts("\n"); - - if (cRetCode == 0 && expectedCRC != 0 && - (expectedCRC != g_usCalculatedCRC)) { - printf("Expected CRC: 0x%.4X\n", expectedCRC); - printf("Calculated CRC: 0x%.4X\n", g_usCalculatedCRC); - return VME_CRC_FAILURE; - } - return cRetCode; -} - -static int lattice_validate(Lattice_desc *desc, const char *fn) -{ - int ret_val = false; - - if (desc) { - if ((desc->family > min_lattice_type) && - (desc->family < max_lattice_type)) { - if ((desc->iface > min_lattice_iface_type) && - (desc->iface < max_lattice_iface_type)) { - if (desc->size) { - ret_val = true; - } else { - printf("%s: NULL part size\n", fn); - } - } else { - printf("%s: Invalid Interface type, %d\n", - fn, desc->iface); - } - } else { - printf("%s: Invalid family type, %d\n", - fn, desc->family); - } - } else { - printf("%s: NULL descriptor!\n", fn); - } - - return ret_val; -} - -int lattice_load(Lattice_desc *desc, const void *buf, size_t bsize) -{ - int ret_val = FPGA_FAIL; - - if (!lattice_validate(desc, (char *)__func__)) { - printf("%s: Invalid device descriptor\n", __func__); - } else { - pfns = desc->iface_fns; - - switch (desc->family) { - case Lattice_XP2: - fpga_image = buf; - read_bytes = 0; - bufsize = bsize; - debug("%s: Launching the Lattice ISPVME Loader:" - " addr %p size 0x%lx...\n", - __func__, fpga_image, bufsize); - ret_val = ispVM(); - if (ret_val) - printf("%s: error %d downloading FPGA image\n", - __func__, ret_val); - else - puts("FPGA downloaded successfully\n"); - break; - default: - printf("%s: Unsupported family type, %d\n", - __func__, desc->family); - } - } - - return ret_val; -} - -int lattice_dump(Lattice_desc *desc, const void *buf, size_t bsize) -{ - puts("Dump not supported for Lattice FPGA\n"); - - return FPGA_FAIL; - -} - -int lattice_info(Lattice_desc *desc) -{ - int ret_val = FPGA_FAIL; - - if (lattice_validate(desc, (char *)__func__)) { - printf("Family: \t"); - switch (desc->family) { - case Lattice_XP2: - puts("XP2\n"); - break; - /* Add new family types here */ - default: - printf("Unknown family type, %d\n", desc->family); - } - - puts("Interface type:\t"); - switch (desc->iface) { - case lattice_jtag_mode: - puts("JTAG Mode\n"); - break; - /* Add new interface types here */ - default: - printf("Unsupported interface type, %d\n", desc->iface); - } - - printf("Device Size: \t%zu bytes\n", - desc->size); - - if (desc->iface_fns) { - printf("Device Function Table @ 0x%p\n", - desc->iface_fns); - switch (desc->family) { - case Lattice_XP2: - break; - /* Add new family types here */ - default: - break; - } - } else { - puts("No Device Function Table.\n"); - } - - if (desc->desc) - printf("Model: \t%s\n", desc->desc); - - ret_val = FPGA_SUCCESS; - } else { - printf("%s: Invalid device descriptor\n", __func__); - } - - return ret_val; -} diff --git a/drivers/fpga/xilinx.c b/drivers/fpga/xilinx.c index 28c68faba55..25b348648ef 100644 --- a/drivers/fpga/xilinx.c +++ b/drivers/fpga/xilinx.c @@ -50,6 +50,9 @@ int fpga_loadbitstream(int devnum, char *fpgadata, size_t size, dataptr = (unsigned char *)fpgadata; /* Find out fpga_description */ desc = fpga_validate(devnum, dataptr, 0); + if (!desc) + return FPGA_FAIL; + /* Assign xilinx device description */ xdesc = desc->devdesc; diff --git a/drivers/mailbox/zynqmp-ipi.c b/drivers/mailbox/zynqmp-ipi.c index 851aa737c03..f62277385fb 100644 --- a/drivers/mailbox/zynqmp-ipi.c +++ b/drivers/mailbox/zynqmp-ipi.c @@ -188,7 +188,7 @@ static int zynqmp_ipi_dest_probe(struct udevice *dev) return -EINVAL; }; zynqmp->local_req_regs = devm_ioremap(dev, res.start, - (res.start - res.end)); + resource_size(&res)); if (!zynqmp->local_req_regs) return -EINVAL; @@ -197,7 +197,7 @@ static int zynqmp_ipi_dest_probe(struct udevice *dev) return -EINVAL; }; zynqmp->local_res_regs = devm_ioremap(dev, res.start, - (res.start - res.end)); + resource_size(&res)); if (!zynqmp->local_res_regs) return -EINVAL; @@ -206,7 +206,7 @@ static int zynqmp_ipi_dest_probe(struct udevice *dev) return -EINVAL; }; zynqmp->remote_req_regs = devm_ioremap(dev, res.start, - (res.start - res.end)); + resource_size(&res)); if (!zynqmp->remote_req_regs) return -EINVAL; @@ -215,7 +215,7 @@ static int zynqmp_ipi_dest_probe(struct udevice *dev) return -EINVAL; }; zynqmp->remote_res_regs = devm_ioremap(dev, res.start, - (res.start - res.end)); + resource_size(&res)); if (!zynqmp->remote_res_regs) return -EINVAL; diff --git a/drivers/mfd/atmel-smc.c b/drivers/mfd/atmel-smc.c index 15296f71a16..94e5e7b67a0 100644 --- a/drivers/mfd/atmel-smc.c +++ b/drivers/mfd/atmel-smc.c @@ -347,7 +347,7 @@ const struct atmel_hsmc_reg_layout * atmel_hsmc_get_reg_layout(ofnode np) { int i; - const struct udevice_id *match; + const struct udevice_id *match = NULL; const char *name; int len; diff --git a/drivers/mmc/gen_atmel_mci.c b/drivers/mmc/gen_atmel_mci.c index 6a531fa0961..838b4f4a65a 100644 --- a/drivers/mmc/gen_atmel_mci.c +++ b/drivers/mmc/gen_atmel_mci.c @@ -206,10 +206,9 @@ static u32 mci_data_read(atmel_mci_t *mci, u32* data, u32 error_flags) goto io_fail; } while (!(status & MMCI_BIT(RXRDY))); - if (status & MMCI_BIT(RXRDY)) { - *data = readl(&mci->rdr); - status = 0; - } + *data = readl(&mci->rdr); + status = 0; + io_fail: return status; } @@ -225,10 +224,9 @@ static u32 mci_data_write(atmel_mci_t *mci, u32* data, u32 error_flags) goto io_fail; } while (!(status & MMCI_BIT(TXRDY))); - if (status & MMCI_BIT(TXRDY)) { - writel(*data, &mci->tdr); - status = 0; - } + writel(*data, &mci->tdr); + status = 0; + io_fail: return status; } @@ -265,13 +263,15 @@ mci_send_cmd(struct mmc *mmc, struct mmc_cmd *cmd, struct mmc_data *data) /* Figure out the transfer arguments */ cmdr = mci_encode_cmd(cmd, data, &error_flags); - mci_set_blklen(mci, data->blocksize); + if (data) { + mci_set_blklen(mci, data->blocksize); - /* For multi blocks read/write, set the block register */ - if ((cmd->cmdidx == MMC_CMD_READ_MULTIPLE_BLOCK) - || (cmd->cmdidx == MMC_CMD_WRITE_MULTIPLE_BLOCK)) - writel(data->blocks | MMCI_BF(BLKLEN, data->blocksize), - &mci->blkr); + /* For multi blocks read/write, set the block register */ + if (cmd->cmdidx == MMC_CMD_READ_MULTIPLE_BLOCK || + cmd->cmdidx == MMC_CMD_WRITE_MULTIPLE_BLOCK) + writel(data->blocks | MMCI_BF(BLKLEN, data->blocksize), + &mci->blkr); + } /* Send the command */ writel(cmd->cmdarg, &mci->argr); diff --git a/drivers/mmc/rockchip_sdhci.c b/drivers/mmc/rockchip_sdhci.c index 761e3619329..5e025d76a82 100644 --- a/drivers/mmc/rockchip_sdhci.c +++ b/drivers/mmc/rockchip_sdhci.c @@ -500,7 +500,7 @@ static int rockchip_sdhci_execute_tuning(struct mmc *mmc, u8 opcode) { struct rockchip_sdhc *priv = dev_get_priv(mmc->dev); struct sdhci_host *host = &priv->host; - char tuning_loop_counter = SDHCI_TUNING_LOOP_COUNT; + s8 tuning_loop_counter = SDHCI_TUNING_LOOP_COUNT; struct mmc_cmd cmd; u32 ctrl, blk_size; int ret; diff --git a/drivers/mmc/stm32_sdmmc2.c b/drivers/mmc/stm32_sdmmc2.c index 9483fb57daf..122690aef3e 100644 --- a/drivers/mmc/stm32_sdmmc2.c +++ b/drivers/mmc/stm32_sdmmc2.c @@ -385,15 +385,29 @@ static int stm32_sdmmc2_end_data(struct udevice *dev, u32 mask = SDMMC_STA_DCRCFAIL | SDMMC_STA_DTIMEOUT | SDMMC_STA_IDMATE | SDMMC_STA_DATAEND; u32 status; + unsigned long timeout_msecs = ctx->data_length >> 8; + unsigned long start_timeout; + + /* At least, a timeout of 2 seconds is set */ + if (timeout_msecs < 2000) + timeout_msecs = 2000; if (data->flags & MMC_DATA_READ) mask |= SDMMC_STA_RXOVERR; else mask |= SDMMC_STA_TXUNDERR; + start_timeout = get_timer(0); status = readl(plat->base + SDMMC_STA); - while (!(status & mask)) + while (!(status & mask)) { + if (get_timer(start_timeout) > timeout_msecs) { + ctx->dpsm_abort = true; + return -ETIMEDOUT; + } + + schedule(); status = readl(plat->base + SDMMC_STA); + } /* * Need invalidate the dcache again to avoid any diff --git a/drivers/mtd/nand/core.c b/drivers/mtd/nand/core.c index 472ad0bdefb..01ff6e3befa 100644 --- a/drivers/mtd/nand/core.c +++ b/drivers/mtd/nand/core.c @@ -201,8 +201,8 @@ EXPORT_SYMBOL_GPL(nanddev_mtd_erase); int nanddev_init(struct nand_device *nand, const struct nand_ops *ops, struct module *owner) { - struct mtd_info *mtd = nanddev_to_mtd(nand); - struct nand_memory_organization *memorg = nanddev_get_memorg(nand); + struct mtd_info *mtd; + struct nand_memory_organization *memorg; if (!nand || !ops) return -EINVAL; @@ -210,6 +210,9 @@ int nanddev_init(struct nand_device *nand, const struct nand_ops *ops, if (!ops->erase || !ops->markbad || !ops->isbad) return -EINVAL; + mtd = nanddev_to_mtd(nand); + memorg = nanddev_get_memorg(nand); + if (!memorg->bits_per_cell || !memorg->pagesize || !memorg->pages_per_eraseblock || !memorg->eraseblocks_per_lun || !memorg->planes_per_lun || !memorg->luns_per_target || diff --git a/drivers/mtd/nand/raw/cadence_nand.c b/drivers/mtd/nand/raw/cadence_nand.c index 27aa7f97a45..4771440d1de 100644 --- a/drivers/mtd/nand/raw/cadence_nand.c +++ b/drivers/mtd/nand/raw/cadence_nand.c @@ -2196,7 +2196,7 @@ static int cadence_nand_chip_init(struct cadence_nand_info *cadence, ofnode node chip->controller = &cadence->controller; nand_set_flash_node(chip, node); mtd = nand_to_mtd(chip); - mtd->dev->parent = cadence->dev; + mtd->dev = cadence->dev; chip->options |= NAND_BUSWIDTH_AUTO; chip->select_chip = cadence_nand_select_chip; diff --git a/drivers/mtd/nand/raw/stm32_fmc2_nand.c b/drivers/mtd/nand/raw/stm32_fmc2_nand.c index d1c88643c98..21e3c88a55a 100644 --- a/drivers/mtd/nand/raw/stm32_fmc2_nand.c +++ b/drivers/mtd/nand/raw/stm32_fmc2_nand.c @@ -1034,6 +1034,7 @@ static int stm32_fmc2_nfc_probe(struct udevice *dev) ecclayout->eccpos[i] = oob_index; ecclayout->oobfree->offset = oob_index; ecclayout->oobfree->length = mtd->oobsize - ecclayout->oobfree->offset; + ecclayout->oobavail = ecclayout->oobfree->length; chip->ecc.layout = ecclayout; if (chip->options & NAND_BUSWIDTH_16) diff --git a/drivers/net/MAINTAINERS b/drivers/net/MAINTAINERS new file mode 100644 index 00000000000..fd002295d0c --- /dev/null +++ b/drivers/net/MAINTAINERS @@ -0,0 +1,6 @@ +NETWORK DW XGMAC +M: Boon Khai Ng <boon.khai.ng@altera.com> +S: Supported +F: drivers/net/dwc_eth_xgmac.c +F: drivers/net/dwc_eth_xgmac.h +F: drivers/net/dwc_eth_xgmac_socfpga.c diff --git a/drivers/net/cortina_ni.c b/drivers/net/cortina_ni.c index 79026882800..21b7089176c 100644 --- a/drivers/net/cortina_ni.c +++ b/drivers/net/cortina_ni.c @@ -499,7 +499,7 @@ static int ca_phy_probe(struct udevice *dev) dev, priv->phy_interface); if (ext_phydev) { ext_phydev->supported &= PHY_GBIT_FEATURES; - ext_phydev->advertising = int_phydev->supported; + ext_phydev->advertising = ext_phydev->supported; phy_config(ext_phydev); } else { printf("CA NI %s: There is no external phy device\n", __func__); diff --git a/drivers/net/designware.c b/drivers/net/designware.c index fce3ef910cb..7ecedc3d7f0 100644 --- a/drivers/net/designware.c +++ b/drivers/net/designware.c @@ -486,7 +486,7 @@ static int dw_adjust_link(struct dw_eth_dev *priv, struct eth_mac_regs *mac_p, #ifdef CONFIG_ARCH_NPCM8XX if (phydev->interface == PHY_INTERFACE_MODE_SGMII) { - unsigned int start; + ulong start; /* Indirect access to VR_MII_MMD registers */ writew((VR_MII_MMD >> 9), PCS_BA + PCS_IND_AC); @@ -532,7 +532,7 @@ int designware_eth_init(struct dw_eth_dev *priv, u8 *enetaddr) { struct eth_mac_regs *mac_p = priv->mac_regs_p; struct eth_dma_regs *dma_p = priv->dma_regs_p; - unsigned int start; + ulong start; int ret; writel(readl(&dma_p->busmode) | DMAMAC_SRST, &dma_p->busmode); diff --git a/drivers/net/ks8851_mll.c b/drivers/net/ks8851_mll.c index cc2e826257a..2c956154d09 100644 --- a/drivers/net/ks8851_mll.c +++ b/drivers/net/ks8851_mll.c @@ -347,11 +347,6 @@ static int ks8851_mll_detect_chip(struct ks_net *ks) debug("Read back KS8851 id 0x%x\n", val); - if ((val & 0xfff0) != CIDER_ID) { - printf(DRIVERNAME ": Unknown chip ID %04x\n", val); - return -1; - } - return 0; } diff --git a/drivers/net/ldpaa_eth/ldpaa_eth.c b/drivers/net/ldpaa_eth/ldpaa_eth.c index b72198ca530..94e62748239 100644 --- a/drivers/net/ldpaa_eth/ldpaa_eth.c +++ b/drivers/net/ldpaa_eth/ldpaa_eth.c @@ -458,7 +458,7 @@ static int ldpaa_eth_open(struct udevice *dev) link_state.up == 1 ? printf("up\n") : printf("error state\n"); #endif - memset(&d_queue, 0, sizeof(struct dpni_queue)); + memset(&d_queue, 0, sizeof(struct dpni_queue_id)); err = dpni_get_queue(dflt_mc_io, MC_CMD_NO_FLAGS, dflt_dpni->dpni_handle, DPNI_QUEUE_RX, 0, 0, &d_queue_cfg, &d_queue); diff --git a/drivers/net/mtk_eth/mtk_eth.c b/drivers/net/mtk_eth/mtk_eth.c index 5d6a42bceb4..b172838ba3a 100644 --- a/drivers/net/mtk_eth/mtk_eth.c +++ b/drivers/net/mtk_eth/mtk_eth.c @@ -1461,7 +1461,7 @@ static int mtk_eth_of_to_plat(struct udevice *dev) priv->phy_addr = ofnode_read_s32_default(args.node, "reg", -1); if (priv->phy_addr < 0) { printf("error: phy address is not specified\n"); - return ret; + return priv->phy_addr; } } diff --git a/drivers/net/mv88e6xxx.c b/drivers/net/mv88e6xxx.c index 557b6b2c8f6..f06c73c20f8 100644 --- a/drivers/net/mv88e6xxx.c +++ b/drivers/net/mv88e6xxx.c @@ -631,7 +631,7 @@ static int mv88e6xxx_port_enable(struct udevice *dev, int port, struct phy_devic dev_dbg(dev, "configure internal RGMII delays\n"); /* RGMII delays */ - val &= ~(PORT_REG_PHYS_CTRL_RGMII_DELAY_RXCLK || + val &= ~(PORT_REG_PHYS_CTRL_RGMII_DELAY_RXCLK | PORT_REG_PHYS_CTRL_RGMII_DELAY_TXCLK); if (phy->interface == PHY_INTERFACE_MODE_RGMII_ID || phy->interface == PHY_INTERFACE_MODE_RGMII_RXID) diff --git a/drivers/net/mvpp2.c b/drivers/net/mvpp2.c index 184c1f9a46a..f9e979c4d58 100644 --- a/drivers/net/mvpp2.c +++ b/drivers/net/mvpp2.c @@ -1722,8 +1722,7 @@ static struct mvpp2_prs_entry *mvpp2_prs_flow_find(struct mvpp2 *priv, int flow) } /* Return first free tcam index, seeking from start to end */ -static int mvpp2_prs_tcam_first_free(struct mvpp2 *priv, unsigned char start, - unsigned char end) +static int mvpp2_prs_tcam_first_free(struct mvpp2 *priv, int start, int end) { int tid; @@ -2330,7 +2329,7 @@ static int mvpp2_prs_mac_da_accept(struct mvpp2 *priv, int port, pe = kzalloc(sizeof(*pe), GFP_KERNEL); if (!pe) - return -1; + return -ENOMEM; mvpp2_prs_tcam_lu_set(pe, MVPP2_PRS_LU_MAC); pe->index = tid; @@ -4735,7 +4734,7 @@ static int phy_info_parse(struct udevice *dev, struct mvpp2_port *port) int port_node = dev_of_offset(dev); int phy_node; u32 id; - u32 phyaddr = 0; + int phyaddr = 0; int fixed_link = 0; int ret; @@ -5354,7 +5353,7 @@ static int mvpp2_probe(struct udevice *dev) } else { port->gop_id = fdtdec_get_int(gd->fdt_blob, dev_of_offset(dev), "gop-port-id", -1); - if (port->id == -1) { + if (port->gop_id == -1) { dev_err(dev, "missing gop-port-id value\n"); return -EINVAL; } diff --git a/drivers/net/octeontx/nicvf_main.c b/drivers/net/octeontx/nicvf_main.c index 27d0327c88a..94e5d827614 100644 --- a/drivers/net/octeontx/nicvf_main.c +++ b/drivers/net/octeontx/nicvf_main.c @@ -232,7 +232,7 @@ static int nicvf_rcv_pkt_handler(struct nicvf *nic, size_t pkt_len; struct cqe_rx_t *cqe_rx = (struct cqe_rx_t *)cq_desc; - int err = 0; + int err; /* Check for errors */ err = nicvf_check_cqe_rx_errs(nic, cq, cq_desc); @@ -245,8 +245,7 @@ static int nicvf_rcv_pkt_handler(struct nicvf *nic, return -1; } - if (pkt) - *ppkt = pkt; + *ppkt = pkt; return pkt_len; } @@ -274,31 +273,29 @@ int nicvf_cq_handler(struct nicvf *nic, void **ppkt, int *pkt_len) cqe_head >>= 9; cqe_head &= 0xFFFF; - if (cqe_count) { - /* Get the CQ descriptor */ - cq_desc = (struct cqe_rx_t *)GET_CQ_DESC(cq, cqe_head); - cqe_head++; - cqe_head &= (cq->dmem.q_len - 1); - - switch (cq_desc->cqe_type) { - case CQE_TYPE_RX: - debug("%s: Got Rx CQE\n", nic->dev->name); - *pkt_len = nicvf_rcv_pkt_handler(nic, cq, cq_desc, - ppkt, CQE_TYPE_RX); - processed_rq_cqe++; - break; - case CQE_TYPE_SEND: - debug("%s: Got Tx CQE\n", nic->dev->name); - nicvf_snd_pkt_handler(nic, cq, cq_desc, CQE_TYPE_SEND); - processed_sq_cqe++; - break; - default: - debug("%s: Got CQ type %u\n", nic->dev->name, - cq_desc->cqe_type); - break; - } - processed_cqe++; + /* Get the CQ descriptor */ + cq_desc = (struct cqe_rx_t *)GET_CQ_DESC(cq, cqe_head); + cqe_head++; + cqe_head &= (cq->dmem.q_len - 1); + + switch (cq_desc->cqe_type) { + case CQE_TYPE_RX: + debug("%s: Got Rx CQE\n", nic->dev->name); + *pkt_len = nicvf_rcv_pkt_handler(nic, cq, cq_desc, + ppkt, CQE_TYPE_RX); + processed_rq_cqe++; + break; + case CQE_TYPE_SEND: + debug("%s: Got Tx CQE\n", nic->dev->name); + nicvf_snd_pkt_handler(nic, cq, cq_desc, CQE_TYPE_SEND); + processed_sq_cqe++; + break; + default: + debug("%s: Got CQ type %u\n", nic->dev->name, + cq_desc->cqe_type); + break; } + processed_cqe++; /* Dequeue CQE */ nicvf_queue_reg_write(nic, NIC_QSET_CQ_0_7_DOOR, diff --git a/drivers/net/octeontx/smi.c b/drivers/net/octeontx/smi.c index 233c26f7319..217bcac2ce2 100644 --- a/drivers/net/octeontx/smi.c +++ b/drivers/net/octeontx/smi.c @@ -338,7 +338,8 @@ int octeontx_smi_probe(struct udevice *dev) if (!bus || !priv) { printf("Failed to allocate OcteonTX MDIO bus # %u\n", dev_seq(dev)); - return -1; + ret = -ENOMEM; + goto error_ret; } bus->read = octeontx_phy_read; @@ -355,9 +356,16 @@ int octeontx_smi_probe(struct udevice *dev) ret = mdio_register(bus); if (ret) - return ret; + goto error_ret; } return 0; + +error_ret: + if (bus) + free(bus); + if (priv) + free(priv); + return ret; } static const struct udevice_id octeontx_smi_ids[] = { diff --git a/drivers/net/octeontx2/nix.c b/drivers/net/octeontx2/nix.c index f596b6bca87..87d1f7a5dbf 100644 --- a/drivers/net/octeontx2/nix.c +++ b/drivers/net/octeontx2/nix.c @@ -298,6 +298,8 @@ int nix_lf_setup(struct nix *nix) goto error; } + err = -1; + /* Alloc memory for Qints HW contexts */ nix->qint_base = nix_memalloc(nix_af->qints, nix_af->qint_ctx_sz, "Qint CTX"); diff --git a/drivers/net/octeontx2/rvu_af.c b/drivers/net/octeontx2/rvu_af.c index 0d3a9ffe9ee..7bdfbc52e3b 100644 --- a/drivers/net/octeontx2/rvu_af.c +++ b/drivers/net/octeontx2/rvu_af.c @@ -114,7 +114,7 @@ struct nix_af *rvu_af_init(struct rvu_af *rvu_af) return nix_af; error: - if (nix_af->npa_af) { + if (nix_af && nix_af->npa_af) { free(nix_af->npa_af); memset(nix_af, 0, sizeof(*nix_af)); } diff --git a/drivers/net/phy/broadcom.c b/drivers/net/phy/broadcom.c index 0a49015eb89..1c02e3efedc 100644 --- a/drivers/net/phy/broadcom.c +++ b/drivers/net/phy/broadcom.c @@ -134,6 +134,33 @@ static void bcm_phy_write_misc(struct phy_device *phydev, phy_write(phydev, MDIO_DEVAD_NONE, MIIM_BCM54XX_EXP_DATA, value); } +/* Broadcom BCM54612E */ +static int bcm54612e_config(struct phy_device *phydev) +{ + u32 reg = 0; + + genphy_config_aneg(phydev); + + phy_reset(phydev); + + /* 125Mhz Clock Output Enable */ + reg = phy_read(phydev, MDIO_DEVAD_NONE, MIIM_BCM54XX_EXP_SEL); + reg |= 0xD34; + phy_write(phydev, MDIO_DEVAD_NONE, MIIM_BCM54XX_EXP_SEL, reg); + + reg = phy_read(phydev, MDIO_DEVAD_NONE, MIIM_BCM54XX_EXP_DATA); + reg |= (1 << 1); + phy_write(phydev, MDIO_DEVAD_NONE, MIIM_BCM54XX_EXP_DATA, reg); + + reg = phy_read(phydev, MDIO_DEVAD_NONE, MIIM_BCM54XX_EXP_SEL); + reg &= 0xfffff000; + phy_write(phydev, MDIO_DEVAD_NONE, MIIM_BCM54XX_EXP_SEL, reg); + + genphy_restart_aneg(phydev); + + return 0; +} + /* Broadcom BCM5461S */ static int bcm5461_config(struct phy_device *phydev) { @@ -434,6 +461,16 @@ U_BOOT_PHY_DRIVER(bcm5461s) = { .shutdown = &genphy_shutdown, }; +U_BOOT_PHY_DRIVER(bcm54612e) = { + .name = "Broadcom BCM54612E", + .uid = 0x03625e6a, + .mask = 0xfffff0, + .features = PHY_GBIT_FEATURES, + .config = &bcm54612e_config, + .startup = &bcm54xx_startup, + .shutdown = &genphy_shutdown, +}; + U_BOOT_PHY_DRIVER(bcm5464s) = { .name = "Broadcom BCM5464S", .uid = 0x2060b0, diff --git a/drivers/net/phy/vitesse.c b/drivers/net/phy/vitesse.c index 4867d1931b4..821d3878236 100644 --- a/drivers/net/phy/vitesse.c +++ b/drivers/net/phy/vitesse.c @@ -239,7 +239,7 @@ static int vsc8514_config(struct phy_device *phydev) while ((val & MIIM_VSC8514_18G_CMDSTAT) && timeout--) val = phy_read(phydev, MDIO_DEVAD_NONE, MIIM_VSC8514_GENERAL18); - if (0 == timeout) { + if (timeout == -1) { printf("PHY 8514 config failed\n"); return -1; } diff --git a/drivers/net/xilinx_axi_emac.c b/drivers/net/xilinx_axi_emac.c index c8038ddef1b..22e119370c8 100644 --- a/drivers/net/xilinx_axi_emac.c +++ b/drivers/net/xilinx_axi_emac.c @@ -558,7 +558,7 @@ static int axiemac_write_hwaddr(struct udevice *dev) /* Reset DMA engine */ static void axi_dma_init(struct axidma_priv *priv) { - u32 timeout = 500; + int timeout = 500; /* Reset the engine so the hardware starts from a known state */ writel(XAXIDMA_CR_RESET_MASK, &priv->dmatx->control); @@ -571,11 +571,11 @@ static void axi_dma_init(struct axidma_priv *priv) if (!((readl(&priv->dmatx->control) | readl(&priv->dmarx->control)) & XAXIDMA_CR_RESET_MASK)) { - break; + return; } } - if (!timeout) - printf("%s: Timeout\n", __func__); + + printf("%s: Timeout\n", __func__); } static int axiemac_start(struct udevice *dev) diff --git a/drivers/phy/Kconfig b/drivers/phy/Kconfig index c297fa03ea7..d36a5f00ef8 100644 --- a/drivers/phy/Kconfig +++ b/drivers/phy/Kconfig @@ -289,11 +289,11 @@ config PHY_NPCM_USB Support the USB PHY in NPCM SoCs config PHY_IMX8MQ_USB - bool "NXP i.MX8MQ/i.MX8MP USB PHY Driver" + bool "NXP i.MX8MQ/i.MX8MP/i.MX95 USB PHY Driver" depends on PHY - depends on IMX8MQ || IMX8MP + depends on IMX8MQ || IMX8MP || IMX95 help - Support the USB3.0 PHY in NXP i.MX8MQ or i.MX8MP SoC + Support the USB3.0 PHY in NXP i.MX8MQ, i.MX8MP, and i.MX95 SoC config PHY_IMX8M_PCIE bool "NXP i.MX8MM/i.MX8MP PCIe PHY Driver" diff --git a/drivers/phy/cadence/phy-cadence-sierra.c b/drivers/phy/cadence/phy-cadence-sierra.c index 2c9d5a12127..bd7ab9d1b77 100644 --- a/drivers/phy/cadence/phy-cadence-sierra.c +++ b/drivers/phy/cadence/phy-cadence-sierra.c @@ -225,11 +225,6 @@ static const struct reg_field pllctrl_lock = static const struct reg_field phy_iso_link_ctrl_1 = REG_FIELD(SIERRA_PHY_ISO_LINK_CTRL, 1, 1); -static const char * const clk_names[] = { - [CDNS_SIERRA_PLL_CMNLC] = "pll_cmnlc", - [CDNS_SIERRA_PLL_CMNLC1] = "pll_cmnlc1", -}; - enum cdns_sierra_cmn_plllc { CMN_PLLLC, CMN_PLLLC1, @@ -602,7 +597,7 @@ static int cdns_sierra_pll_bind_of_clocks(struct cdns_sierra_phy *sp) struct udevice *dev = sp->dev; struct driver *cdns_sierra_clk_drv; struct cdns_sierra_pll_mux_sel *data = pll_clk_mux_sel; - int i, rc; + int rc; cdns_sierra_clk_drv = lists_driver_lookup_name("cdns_sierra_mux_clk"); if (!cdns_sierra_clk_drv) { @@ -612,10 +607,8 @@ static int cdns_sierra_pll_bind_of_clocks(struct cdns_sierra_phy *sp) rc = device_bind(dev, cdns_sierra_clk_drv, "pll_mux_clk", data, dev_ofnode(dev), NULL); - if (rc) { - dev_err(dev, "cannot bind driver for clock %s\n", - clk_names[i]); - } + if (rc) + dev_err(dev, "cannot bind driver for clock pll_mux_clk\n"); return 0; } diff --git a/drivers/phy/cadence/phy-cadence-torrent.c b/drivers/phy/cadence/phy-cadence-torrent.c index 1f566d082f9..28fe026223c 100644 --- a/drivers/phy/cadence/phy-cadence-torrent.c +++ b/drivers/phy/cadence/phy-cadence-torrent.c @@ -719,6 +719,7 @@ static int cdns_torrent_phy_probe(struct udevice *dev) if (total_num_lanes > MAX_NUM_LANES) { dev_err(dev, "Invalid lane configuration\n"); + ret = -EINVAL; goto put_lnk_rst; } diff --git a/drivers/phy/marvell/comphy_core.c b/drivers/phy/marvell/comphy_core.c index a666a4e794e..a4121423873 100644 --- a/drivers/phy/marvell/comphy_core.c +++ b/drivers/phy/marvell/comphy_core.c @@ -28,7 +28,7 @@ static const char *get_speed_string(u32 speed) "10.3125 Gbps" }; - if (speed < 0 || speed > COMPHY_SPEED_MAX) + if (speed < 0 || speed >= COMPHY_SPEED_MAX) return "invalid"; return speed_strings[speed]; @@ -44,7 +44,7 @@ static const char *get_type_string(u32 type) "IGNORE" }; - if (type < 0 || type > COMPHY_TYPE_MAX) + if (type < 0 || type >= COMPHY_TYPE_MAX) return "invalid"; return type_strings[type]; diff --git a/drivers/phy/marvell/comphy_core.h b/drivers/phy/marvell/comphy_core.h index f3d04939387..086a4d82f26 100644 --- a/drivers/phy/marvell/comphy_core.h +++ b/drivers/phy/marvell/comphy_core.h @@ -47,8 +47,8 @@ struct chip_serdes_phy_config { int (*rx_training)(struct chip_serdes_phy_config *, u32); void __iomem *comphy_base_addr; void __iomem *hpipe3_base_addr; - u32 comphy_lanes_count; - u32 comphy_mux_bitcount; + int comphy_lanes_count; + int comphy_mux_bitcount; const fdt32_t *comphy_mux_lane_order; u32 cp_index; struct comphy_map comphy_map_data[MAX_LANE_OPTIONS]; diff --git a/drivers/phy/phy-imx8mq-usb.c b/drivers/phy/phy-imx8mq-usb.c index 75763046adc..387db843c50 100644 --- a/drivers/phy/phy-imx8mq-usb.c +++ b/drivers/phy/phy-imx8mq-usb.c @@ -71,9 +71,57 @@ #define PHY_STS0_FSVPLUS BIT(3) #define PHY_STS0_FSVMINUS BIT(2) +#define TCA_CLK_RST 0x00 +#define TCA_CLK_RST_SW BIT(9) +#define TCA_CLK_RST_REF_CLK_EN BIT(1) +#define TCA_CLK_RST_SUSPEND_CLK_EN BIT(0) + +#define TCA_INTR_EN 0x04 +#define TCA_INTR_STS 0x08 + +#define TCA_GCFG 0x10 +#define TCA_GCFG_ROLE_HSTDEV BIT(4) +#define TCA_GCFG_OP_MODE GENMASK(1, 0) +#define TCA_GCFG_OP_MODE_SYSMODE 0 +#define TCA_GCFG_OP_MODE_SYNCMODE 1 + +#define TCA_TCPC 0x14 +#define TCA_TCPC_VALID BIT(4) +#define TCA_TCPC_LOW_POWER_EN BIT(3) +#define TCA_TCPC_ORIENTATION_NORMAL BIT(2) +#define TCA_TCPC_MUX_CONTRL GENMASK(1, 0) +#define TCA_TCPC_MUX_CONTRL_NO_CONN 0 +#define TCA_TCPC_MUX_CONTRL_USB_CONN 1 + +#define TCA_SYSMODE_CFG 0x18 +#define TCA_SYSMODE_TCPC_DISABLE BIT(3) +#define TCA_SYSMODE_TCPC_FLIP BIT(2) + +#define TCA_CTRLSYNCMODE_CFG0 0x20 +#define TCA_CTRLSYNCMODE_CFG1 0x20 + +#define TCA_PSTATE 0x30 +#define TCA_PSTATE_CM_STS BIT(4) +#define TCA_PSTATE_TX_STS BIT(3) +#define TCA_PSTATE_RX_PLL_STS BIT(2) +#define TCA_PSTATE_PIPE0_POWER_DOWN GENMASK(1, 0) + +#define TCA_GEN_STATUS 0x34 +#define TCA_GEN_DEV_POR BIT(12) +#define TCA_GEN_REF_CLK_SEL BIT(8) +#define TCA_GEN_TYPEC_FLIP_INVERT BIT(4) +#define TCA_GEN_PHY_TYPEC_DISABLE BIT(3) +#define TCA_GEN_PHY_TYPEC_FLIP BIT(2) + +#define TCA_VBUS_CTRL 0x40 +#define TCA_VBUS_STATUS 0x44 + +#define TCA_INFO 0xfc + enum imx8mpq_phy_type { IMX8MQ_PHY, IMX8MP_PHY, + IMX95_PHY, }; struct imx8mq_usb_phy { @@ -81,14 +129,49 @@ struct imx8mq_usb_phy { void __iomem *base; enum imx8mpq_phy_type type; struct udevice *vbus_supply; + void __iomem *tca_base; }; static const struct udevice_id imx8mq_usb_phy_of_match[] = { { .compatible = "fsl,imx8mq-usb-phy", .data = IMX8MQ_PHY }, { .compatible = "fsl,imx8mp-usb-phy", .data = IMX8MP_PHY }, + { .compatible = "fsl,imx95-usb-phy", .data = IMX95_PHY }, {}, }; +static void tca_blk_init(struct phy *usb_phy) +{ + struct udevice *dev = usb_phy->dev; + struct imx8mq_usb_phy *imx_phy = dev_get_priv(dev); + void __iomem *base = imx_phy->tca_base; + u32 val; + + /* reset XBar block */ + val = readl(base + TCA_CLK_RST); + val &= ~TCA_CLK_RST_SW; + writel(val, base + TCA_CLK_RST); + + udelay(100); + + /* clear reset */ + val |= TCA_CLK_RST_SW; + writel(val, base + TCA_CLK_RST); + + /* + * use Controller Synced Mode for TCA low power enable and + * put PHY to USB safe state. + */ + val = FIELD_PREP(TCA_GCFG_OP_MODE, TCA_GCFG_OP_MODE_SYNCMODE); + writel(val, base + TCA_GCFG); + + val = TCA_TCPC_VALID | TCA_TCPC_LOW_POWER_EN; + writel(val, base + TCA_TCPC); + + /* use System Configuration Mode for TCA mux control. */ + val = FIELD_PREP(TCA_GCFG_OP_MODE, TCA_GCFG_OP_MODE_SYSMODE); + writel(val, base + TCA_GCFG); +} + static int imx8mq_usb_phy_init(struct phy *usb_phy) { struct udevice *dev = usb_phy->dev; @@ -154,6 +237,9 @@ static int imx8mp_usb_phy_init(struct phy *usb_phy) value &= ~(PHY_CTRL1_RESET | PHY_CTRL1_ATERESET); writel(value, imx_phy->base + PHY_CTRL1); + if (imx_phy->tca_base) + tca_blk_init(usb_phy); + return 0; } @@ -162,7 +248,7 @@ static int imx8mpq_usb_phy_init(struct phy *usb_phy) struct udevice *dev = usb_phy->dev; struct imx8mq_usb_phy *imx_phy = dev_get_priv(dev); - if (imx_phy->type == IMX8MP_PHY) + if (imx_phy->type == IMX8MP_PHY || imx_phy->type == IMX95_PHY) return imx8mp_usb_phy_init(usb_phy); else return imx8mq_usb_phy_init(usb_phy); @@ -264,6 +350,9 @@ int imx8mq_usb_phy_probe(struct udevice *dev) } } + if (priv->type == IMX95_PHY) + priv->tca_base = dev_read_addr_index_ptr(dev, 1); + return 0; } diff --git a/drivers/phy/rockchip/phy-rockchip-inno-usb2.c b/drivers/phy/rockchip/phy-rockchip-inno-usb2.c index 88b33de1b2a..4ea6600ce7f 100644 --- a/drivers/phy/rockchip/phy-rockchip-inno-usb2.c +++ b/drivers/phy/rockchip/phy-rockchip-inno-usb2.c @@ -167,20 +167,27 @@ static struct phy_ops rockchip_usb2phy_ops = { .of_xlate = rockchip_usb2phy_of_xlate, }; -static void rockchip_usb2phy_clkout_ctl(struct clk *clk, struct regmap **base, - const struct usb2phy_reg **clkout_ctl) +static int rockchip_usb2phy_clkout_ctl(struct clk *clk, struct regmap **base, + const struct usb2phy_reg **clkout_ctl) { struct udevice *parent = dev_get_parent(clk->dev); struct rockchip_usb2phy *priv = dev_get_priv(parent); const struct rockchip_usb2phy_cfg *phy_cfg = priv->phy_cfg; - if (priv->phy_cfg->clkout_ctl_phy.enable) { + // phy_cfg can be NULL if this function called before probe (when parent + // clocks are enabled) + if (!phy_cfg) + return -EINVAL; + + if (phy_cfg->clkout_ctl_phy.enable) { *base = priv->phy_base; *clkout_ctl = &phy_cfg->clkout_ctl_phy; } else { *base = priv->reg_base; *clkout_ctl = &phy_cfg->clkout_ctl; } + + return 0; } /** @@ -206,7 +213,8 @@ int rockchip_usb2phy_clk_enable(struct clk *clk) const struct usb2phy_reg *clkout_ctl; struct regmap *base; - rockchip_usb2phy_clkout_ctl(clk, &base, &clkout_ctl); + if (rockchip_usb2phy_clkout_ctl(clk, &base, &clkout_ctl)) + return -ENOSYS; /* turn on 480m clk output if it is off */ if (!property_enabled(base, clkout_ctl)) { @@ -230,7 +238,8 @@ int rockchip_usb2phy_clk_disable(struct clk *clk) const struct usb2phy_reg *clkout_ctl; struct regmap *base; - rockchip_usb2phy_clkout_ctl(clk, &base, &clkout_ctl); + if (rockchip_usb2phy_clkout_ctl(clk, &base, &clkout_ctl)) + return -ENOSYS; /* turn off 480m clk output */ property_enable(base, clkout_ctl, false); @@ -456,6 +465,28 @@ static const struct rockchip_usb2phy_cfg rk3568_phy_cfgs[] = { { /* sentinel */ } }; +static const struct rockchip_usb2phy_cfg rk3576_phy_cfgs[] = { + { + .reg = 0x0000, + .clkout_ctl = { 0x0008, 0, 0, 1, 0 }, + .port_cfgs = { + [USB2PHY_PORT_OTG] = { + .phy_sus = { 0x0000, 1, 0, 2, 1 }, + } + }, + }, + { + .reg = 0x2000, + .clkout_ctl = { 0x2008, 0, 0, 1, 0 }, + .port_cfgs = { + [USB2PHY_PORT_OTG] = { + .phy_sus = { 0x2000, 1, 0, 2, 1 }, + } + }, + }, + { /* sentinel */ } +}; + static const struct rockchip_usb2phy_cfg rk3588_phy_cfgs[] = { { .reg = 0x0000, @@ -518,6 +549,10 @@ static const struct udevice_id rockchip_usb2phy_ids[] = { .data = (ulong)&rk3568_phy_cfgs, }, { + .compatible = "rockchip,rk3576-usb2phy", + .data = (ulong)&rk3576_phy_cfgs, + }, + { .compatible = "rockchip,rk3588-usb2phy", .data = (ulong)&rk3588_phy_cfgs, }, @@ -538,7 +573,7 @@ U_BOOT_DRIVER(rockchip_usb2phy_clock) = { U_BOOT_DRIVER(rockchip_usb2phy) = { .name = "rockchip_usb2phy", - .id = UCLASS_PHY, + .id = UCLASS_NOP, .of_match = rockchip_usb2phy_ids, .probe = rockchip_usb2phy_probe, .bind = rockchip_usb2phy_bind, diff --git a/drivers/phy/rockchip/phy-rockchip-naneng-combphy.c b/drivers/phy/rockchip/phy-rockchip-naneng-combphy.c index 5145b517aa4..d602f965d6a 100644 --- a/drivers/phy/rockchip/phy-rockchip-naneng-combphy.c +++ b/drivers/phy/rockchip/phy-rockchip-naneng-combphy.c @@ -37,6 +37,7 @@ struct rockchip_combphy_grfcfg { struct combphy_reg pipe_rxterm_set; struct combphy_reg pipe_txelec_set; struct combphy_reg pipe_txcomp_set; + struct combphy_reg pipe_clk_24m; struct combphy_reg pipe_clk_25m; struct combphy_reg pipe_clk_100m; struct combphy_reg pipe_phymode_sel; @@ -98,104 +99,41 @@ static int param_write(struct regmap *base, return regmap_write(base, reg->offset, val); } -static int rockchip_combphy_pcie_init(struct rockchip_combphy_priv *priv) -{ - int ret = 0; - - if (priv->cfg->combphy_cfg) { - ret = priv->cfg->combphy_cfg(priv); - if (ret) { - dev_err(priv->dev, "failed to init phy for pcie\n"); - return ret; - } - } - - return ret; -} - -static int rockchip_combphy_usb3_init(struct rockchip_combphy_priv *priv) -{ - int ret = 0; - - if (priv->cfg->combphy_cfg) { - ret = priv->cfg->combphy_cfg(priv); - if (ret) { - dev_err(priv->dev, "failed to init phy for usb3\n"); - return ret; - } - } - - return ret; -} - -static int rockchip_combphy_sata_init(struct rockchip_combphy_priv *priv) -{ - int ret = 0; - - if (priv->cfg->combphy_cfg) { - ret = priv->cfg->combphy_cfg(priv); - if (ret) { - dev_err(priv->dev, "failed to init phy for sata\n"); - return ret; - } - } - - return ret; -} - -static int rockchip_combphy_sgmii_init(struct rockchip_combphy_priv *priv) +static int rockchip_combphy_init(struct phy *phy) { - int ret = 0; - - if (priv->cfg->combphy_cfg) { - ret = priv->cfg->combphy_cfg(priv); - if (ret) { - dev_err(priv->dev, "failed to init phy for sgmii\n"); - return ret; - } - } + struct rockchip_combphy_priv *priv = dev_get_priv(phy->dev); + int ret; - return ret; -} + ret = clk_enable(&priv->ref_clk); + if (ret < 0 && ret != -ENOSYS) + return ret; -static int rockchip_combphy_set_mode(struct rockchip_combphy_priv *priv) -{ switch (priv->mode) { case PHY_TYPE_PCIE: - rockchip_combphy_pcie_init(priv); - break; case PHY_TYPE_USB3: - rockchip_combphy_usb3_init(priv); - break; case PHY_TYPE_SATA: - rockchip_combphy_sata_init(priv); - break; case PHY_TYPE_SGMII: case PHY_TYPE_QSGMII: - return rockchip_combphy_sgmii_init(priv); + if (priv->cfg->combphy_cfg) + ret = priv->cfg->combphy_cfg(priv); + else + ret = 0; + break; default: dev_err(priv->dev, "incompatible PHY type\n"); - return -EINVAL; + ret = -EINVAL; + break; } - return 0; -} - -static int rockchip_combphy_init(struct phy *phy) -{ - struct rockchip_combphy_priv *priv = dev_get_priv(phy->dev); - int ret; - - ret = clk_enable(&priv->ref_clk); - if (ret < 0 && ret != -ENOSYS) - return ret; + if (ret) { + dev_err(priv->dev, "failed to init phy for phy type %x\n", priv->mode); + goto err_clk; + } - ret = rockchip_combphy_set_mode(priv); + ret = reset_deassert_bulk(&priv->phy_rsts); if (ret) goto err_clk; - reset_deassert_bulk(&priv->phy_rsts); - return 0; err_clk: @@ -223,6 +161,7 @@ static int rockchip_combphy_xlate(struct phy *phy, struct ofnode_phandle_args *a return -EINVAL; } + phy->id = priv->id; priv->mode = args->args[0]; return 0; @@ -237,22 +176,19 @@ static const struct phy_ops rockchip_combphy_ops = { static int rockchip_combphy_parse_dt(struct udevice *dev, struct rockchip_combphy_priv *priv) { - struct udevice *syscon; int ret; - ret = uclass_get_device_by_phandle(UCLASS_SYSCON, dev, "rockchip,pipe-grf", &syscon); - if (ret) { - dev_err(dev, "failed to find peri_ctrl pipe-grf regmap"); - return ret; + priv->pipe_grf = syscon_regmap_lookup_by_phandle(dev, "rockchip,pipe-grf"); + if (IS_ERR(priv->pipe_grf)) { + dev_err(dev, "failed to find peri_ctrl pipe-grf regmap\n"); + return PTR_ERR(priv->pipe_grf); } - priv->pipe_grf = syscon_get_regmap(syscon); - ret = uclass_get_device_by_phandle(UCLASS_SYSCON, dev, "rockchip,pipe-phy-grf", &syscon); - if (ret) { + priv->phy_grf = syscon_regmap_lookup_by_phandle(dev, "rockchip,pipe-phy-grf"); + if (IS_ERR(priv->phy_grf)) { dev_err(dev, "failed to find peri_ctrl pipe-phy-grf regmap\n"); - return ret; + return PTR_ERR(priv->phy_grf); } - priv->phy_grf = syscon_get_regmap(syscon); ret = clk_get_by_index(dev, 0, &priv->ref_clk); if (ret) { @@ -304,12 +240,109 @@ static int rockchip_combphy_probe(struct udevice *udev) } priv->dev = udev; - priv->mode = PHY_TYPE_SATA; + priv->mode = PHY_NONE; priv->cfg = phy_cfg; return rockchip_combphy_parse_dt(udev, priv); } +static int rk3528_combphy_cfg(struct rockchip_combphy_priv *priv) +{ + const struct rockchip_combphy_grfcfg *cfg = priv->cfg->grfcfg; + u32 val; + + switch (priv->mode) { + case PHY_TYPE_PCIE: + /* Set SSC downward spread spectrum */ + val = readl(priv->mmio + 0x18); + val &= ~GENMASK(5, 4); + val |= 0x01 << 4; + writel(val, priv->mmio + 0x18); + + param_write(priv->phy_grf, &cfg->con0_for_pcie, true); + param_write(priv->phy_grf, &cfg->con1_for_pcie, true); + param_write(priv->phy_grf, &cfg->con2_for_pcie, true); + param_write(priv->phy_grf, &cfg->con3_for_pcie, true); + break; + case PHY_TYPE_USB3: + /* Set SSC downward spread spectrum */ + val = readl(priv->mmio + 0x18); + val &= ~GENMASK(5, 4); + val |= 0x01 << 4; + writel(val, priv->mmio + 0x18); + + /* Enable adaptive CTLE for USB3.0 Rx */ + val = readl(priv->mmio + 0x200); + val &= ~GENMASK(17, 17); + val |= 0x01 << 17; + writel(val, priv->mmio + 0x200); + + /* Set Rx squelch input filler bandwidth */ + val = readl(priv->mmio + 0x20c); + val &= ~GENMASK(2, 0); + val |= 0x06; + writel(val, priv->mmio + 0x20c); + + param_write(priv->phy_grf, &cfg->pipe_txcomp_sel, false); + param_write(priv->phy_grf, &cfg->pipe_txelec_sel, false); + param_write(priv->phy_grf, &cfg->usb_mode_set, true); + param_write(priv->pipe_grf, &cfg->u3otg0_port_en, true); + break; + default: + dev_err(priv->dev, "incompatible PHY type\n"); + return -EINVAL; + } + + param_write(priv->phy_grf, &cfg->pipe_clk_100m, true); + + if (priv->mode == PHY_TYPE_PCIE) { + /* PLL KVCO tuning fine */ + val = readl(priv->mmio + 0x18); + val &= ~(0x7 << 10); + val |= 0x2 << 10; + writel(val, priv->mmio + 0x18); + + /* su_trim[6:4]=111, [10:7]=1001, [2:0]=000 */ + val = readl(priv->mmio + 0x108); + val &= ~(0x7f7); + val |= 0x4f0; + writel(val, priv->mmio + 0x108); + } + + return 0; +} + +static const struct rockchip_combphy_grfcfg rk3528_combphy_grfcfgs = { + /* pipe-phy-grf */ + .pcie_mode_set = { 0x0000, 5, 0, 0x00, 0x11 }, + .usb_mode_set = { 0x0000, 5, 0, 0x00, 0x04 }, + .pipe_rxterm_set = { 0x0000, 12, 12, 0x00, 0x01 }, + .pipe_txelec_set = { 0x0004, 1, 1, 0x00, 0x01 }, + .pipe_txcomp_set = { 0x0004, 4, 4, 0x00, 0x01 }, + .pipe_clk_24m = { 0x0004, 14, 13, 0x00, 0x00 }, + .pipe_clk_100m = { 0x0004, 14, 13, 0x00, 0x02 }, + .pipe_rxterm_sel = { 0x0008, 8, 8, 0x00, 0x01 }, + .pipe_txelec_sel = { 0x0008, 12, 12, 0x00, 0x01 }, + .pipe_txcomp_sel = { 0x0008, 15, 15, 0x00, 0x01 }, + .pipe_clk_ext = { 0x000c, 9, 8, 0x02, 0x01 }, + .pipe_phy_status = { 0x0034, 6, 6, 0x01, 0x00 }, + .con0_for_pcie = { 0x0000, 15, 0, 0x00, 0x110 }, + .con1_for_pcie = { 0x0004, 15, 0, 0x00, 0x00 }, + .con2_for_pcie = { 0x0008, 15, 0, 0x00, 0x101 }, + .con3_for_pcie = { 0x000c, 15, 0, 0x00, 0x0200 }, + /* pipe-grf */ + .u3otg0_port_en = { 0x0044, 15, 0, 0x0181, 0x1100 }, +}; + +static const struct rockchip_combphy_cfg rk3528_combphy_cfgs = { + .num_phys = 1, + .phy_ids = { + 0xffdc0000, + }, + .grfcfg = &rk3528_combphy_grfcfgs, + .combphy_cfg = rk3528_combphy_cfg, +}; + static int rk3568_combphy_cfg(struct rockchip_combphy_priv *priv) { const struct rockchip_combphy_grfcfg *cfg = priv->cfg->grfcfg; @@ -453,6 +486,149 @@ static const struct rockchip_combphy_cfg rk3568_combphy_cfgs = { .combphy_cfg = rk3568_combphy_cfg, }; +static int rk3576_combphy_cfg(struct rockchip_combphy_priv *priv) +{ + const struct rockchip_combphy_grfcfg *cfg = priv->cfg->grfcfg; + u32 val; + + switch (priv->mode) { + case PHY_TYPE_PCIE: + param_write(priv->phy_grf, &cfg->con0_for_pcie, true); + param_write(priv->phy_grf, &cfg->con1_for_pcie, true); + param_write(priv->phy_grf, &cfg->con2_for_pcie, true); + param_write(priv->phy_grf, &cfg->con3_for_pcie, true); + break; + case PHY_TYPE_USB3: + /* Set SSC downward spread spectrum */ + val = readl(priv->mmio + (0x1f << 2)); + val &= ~GENMASK(5, 4); + val |= 0x01 << 4; + writel(val, priv->mmio + 0x7c); + + /* Enable adaptive CTLE for USB3.0 Rx */ + val = readl(priv->mmio + (0x0e << 2)); + val &= ~GENMASK(0, 0); + val |= 0x01; + writel(val, priv->mmio + (0x0e << 2)); + + /* Set PLL KVCO fine tuning signals */ + val = readl(priv->mmio + (0x20 << 2)); + val &= ~(0x7 << 2); + val |= 0x2 << 2; + writel(val, priv->mmio + (0x20 << 2)); + + /* Set PLL LPF R1 to su_trim[10:7]=1001 */ + writel(0x4, priv->mmio + (0xb << 2)); + + /* Set PLL input clock divider 1/2 */ + val = readl(priv->mmio + (0x5 << 2)); + val &= ~(0x3 << 6); + val |= 0x1 << 6; + writel(val, priv->mmio + (0x5 << 2)); + + /* Set PLL loop divider */ + writel(0x32, priv->mmio + (0x11 << 2)); + + /* Set PLL KVCO to min and set PLL charge pump current to max */ + writel(0xf0, priv->mmio + (0xa << 2)); + + /* Set Rx squelch input filler bandwidth */ + writel(0x0d, priv->mmio + (0x14 << 2)); + + param_write(priv->phy_grf, &cfg->pipe_txcomp_sel, false); + param_write(priv->phy_grf, &cfg->pipe_txelec_sel, false); + param_write(priv->phy_grf, &cfg->usb_mode_set, true); + param_write(priv->pipe_grf, &cfg->u3otg1_port_en, true); + break; + case PHY_TYPE_SATA: + /* Enable adaptive CTLE for SATA Rx */ + val = readl(priv->mmio + (0x0e << 2)); + val &= ~GENMASK(0, 0); + val |= 0x01; + writel(val, priv->mmio + (0x0e << 2)); + /* Set tx_rterm = 50 ohm and rx_rterm = 43.5 ohm */ + writel(0x8F, priv->mmio + (0x06 << 2)); + + param_write(priv->phy_grf, &cfg->con0_for_sata, true); + param_write(priv->phy_grf, &cfg->con1_for_sata, true); + param_write(priv->phy_grf, &cfg->con2_for_sata, true); + param_write(priv->phy_grf, &cfg->con3_for_sata, true); + param_write(priv->pipe_grf, &cfg->pipe_con0_for_sata, true); + param_write(priv->pipe_grf, &cfg->pipe_con1_for_sata, true); + break; + case PHY_TYPE_SGMII: + case PHY_TYPE_QSGMII: + default: + dev_err(priv->dev, "incompatible PHY type\n"); + return -EINVAL; + } + + /* 100MHz refclock signal is good */ + clk_set_rate(&priv->ref_clk, 100000000); + param_write(priv->phy_grf, &cfg->pipe_clk_100m, true); + if (priv->mode == PHY_TYPE_PCIE) { + /* gate_tx_pck_sel length select work for L1SS */ + writel(0xc0, priv->mmio + 0x74); + + /* PLL KVCO tuning fine */ + val = readl(priv->mmio + (0x20 << 2)); + val &= ~(0x7 << 2); + val |= 0x2 << 2; + writel(val, priv->mmio + (0x20 << 2)); + + /* Set up rx_trim: PLL LPF C1 85pf R1 1.25kohm */ + writel(0x4c, priv->mmio + (0x1b << 2)); + + /* Set up su_trim: T3_P1 650mv */ + writel(0x90, priv->mmio + (0xa << 2)); + writel(0x43, priv->mmio + (0xb << 2)); + writel(0x88, priv->mmio + (0xc << 2)); + writel(0x56, priv->mmio + (0xd << 2)); + } + + return 0; +} + +static const struct rockchip_combphy_grfcfg rk3576_combphy_grfcfgs = { + /* pipe-phy-grf */ + .pcie_mode_set = { 0x0000, 5, 0, 0x00, 0x11 }, + .usb_mode_set = { 0x0000, 5, 0, 0x00, 0x04 }, + .pipe_rxterm_set = { 0x0000, 12, 12, 0x00, 0x01 }, + .pipe_txelec_set = { 0x0004, 1, 1, 0x00, 0x01 }, + .pipe_txcomp_set = { 0x0004, 4, 4, 0x00, 0x01 }, + .pipe_clk_25m = { 0x0004, 14, 13, 0x00, 0x01 }, + .pipe_clk_100m = { 0x0004, 14, 13, 0x00, 0x02 }, + .pipe_phymode_sel = { 0x0008, 1, 1, 0x00, 0x01 }, + .pipe_rate_sel = { 0x0008, 2, 2, 0x00, 0x01 }, + .pipe_rxterm_sel = { 0x0008, 8, 8, 0x00, 0x01 }, + .pipe_txelec_sel = { 0x0008, 12, 12, 0x00, 0x01 }, + .pipe_txcomp_sel = { 0x0008, 15, 15, 0x00, 0x01 }, + .pipe_clk_ext = { 0x000c, 9, 8, 0x02, 0x01 }, + .pipe_phy_status = { 0x0034, 6, 6, 0x01, 0x00 }, + .con0_for_pcie = { 0x0000, 15, 0, 0x00, 0x1000 }, + .con1_for_pcie = { 0x0004, 15, 0, 0x00, 0x0000 }, + .con2_for_pcie = { 0x0008, 15, 0, 0x00, 0x0101 }, + .con3_for_pcie = { 0x000c, 15, 0, 0x00, 0x0200 }, + .con0_for_sata = { 0x0000, 15, 0, 0x00, 0x0129 }, + .con1_for_sata = { 0x0004, 15, 0, 0x00, 0x0000 }, + .con2_for_sata = { 0x0008, 15, 0, 0x00, 0x80c1 }, + .con3_for_sata = { 0x000c, 15, 0, 0x00, 0x0407 }, + /* php-grf */ + .pipe_con0_for_sata = { 0x001C, 2, 0, 0x00, 0x2 }, + .pipe_con1_for_sata = { 0x0020, 2, 0, 0x00, 0x2 }, + .u3otg1_port_en = { 0x0038, 15, 0, 0x0181, 0x1100 }, +}; + +static const struct rockchip_combphy_cfg rk3576_combphy_cfgs = { + .num_phys = 2, + .phy_ids = { + 0x2b050000, + 0x2b060000, + }, + .grfcfg = &rk3576_combphy_grfcfgs, + .combphy_cfg = rk3576_combphy_cfg, +}; + static int rk3588_combphy_cfg(struct rockchip_combphy_priv *priv) { const struct rockchip_combphy_grfcfg *cfg = priv->cfg->grfcfg; @@ -561,10 +737,18 @@ static const struct rockchip_combphy_cfg rk3588_combphy_cfgs = { static const struct udevice_id rockchip_combphy_ids[] = { { + .compatible = "rockchip,rk3528-naneng-combphy", + .data = (ulong)&rk3528_combphy_cfgs + }, + { .compatible = "rockchip,rk3568-naneng-combphy", .data = (ulong)&rk3568_combphy_cfgs }, { + .compatible = "rockchip,rk3576-naneng-combphy", + .data = (ulong)&rk3576_combphy_cfgs + }, + { .compatible = "rockchip,rk3588-naneng-combphy", .data = (ulong)&rk3588_combphy_cfgs }, diff --git a/drivers/phy/rockchip/phy-rockchip-typec.c b/drivers/phy/rockchip/phy-rockchip-typec.c index c48a5cd5267..66d1d32d25c 100644 --- a/drivers/phy/rockchip/phy-rockchip-typec.c +++ b/drivers/phy/rockchip/phy-rockchip-typec.c @@ -788,7 +788,7 @@ U_BOOT_DRIVER(rockchip_tcphy_usb3_port) = { U_BOOT_DRIVER(rockchip_typec_phy) = { .name = "rockchip_typec_phy", - .id = UCLASS_PHY, + .id = UCLASS_NOP, .of_match = rockchip_typec_phy_ids, .probe = rockchip_tcphy_probe, .bind = rockchip_tcphy_bind, diff --git a/drivers/phy/rockchip/phy-rockchip-usbdp.c b/drivers/phy/rockchip/phy-rockchip-usbdp.c index 9deec47ae46..cca67dd3611 100644 --- a/drivers/phy/rockchip/phy-rockchip-usbdp.c +++ b/drivers/phy/rockchip/phy-rockchip-usbdp.c @@ -96,9 +96,7 @@ struct rockchip_udphy { /* PHY status management */ bool flip; - bool mode_change; u8 mode; - u8 status; /* utilized for USB */ bool hs; /* flag for high-speed */ @@ -525,80 +523,26 @@ static int udphy_parse_dt(struct rockchip_udphy *udphy, struct udevice *dev) return 0; } -static int udphy_power_on(struct rockchip_udphy *udphy, u8 mode) -{ - int ret; - - if (!(udphy->mode & mode)) { - dev_info(udphy->dev, "mode 0x%02x is not support\n", mode); - return 0; - } - - if (udphy->status == UDPHY_MODE_NONE) { - udphy->mode_change = false; - ret = udphy_setup(udphy); - if (ret) - return ret; - - if (udphy->mode & UDPHY_MODE_USB) - udphy_u3_port_disable(udphy, false); - } else if (udphy->mode_change) { - udphy->mode_change = false; - udphy->status = UDPHY_MODE_NONE; - if (udphy->mode == UDPHY_MODE_DP) - udphy_u3_port_disable(udphy, true); - - ret = udphy_disable(udphy); - if (ret) - return ret; - ret = udphy_setup(udphy); - if (ret) - return ret; - } - - udphy->status |= mode; - - return 0; -} - -static int udphy_power_off(struct rockchip_udphy *udphy, u8 mode) -{ - int ret; - - if (!(udphy->mode & mode)) { - dev_info(udphy->dev, "mode 0x%02x is not supported\n", mode); - return 0; - } - - if (!udphy->status) - return 0; - - udphy->status &= ~mode; - - if (udphy->status == UDPHY_MODE_NONE) { - ret = udphy_disable(udphy); - if (ret) - return ret; - } - - return 0; -} - static int rockchip_u3phy_of_xlate(struct phy *phy, struct ofnode_phandle_args *args) { + struct rockchip_udphy *udphy = dev_get_priv(phy->dev); + if (args->args_count == 0) return -EINVAL; if (args->args[0] != PHY_TYPE_USB3) return -EINVAL; + phy->id = udphy->id; + return 0; } static int rockchip_u3phy_init(struct phy *phy) { struct rockchip_udphy *udphy = dev_get_priv(phy->dev); + int ret; /* DP only or high-speed, disable U3 port */ if (!(udphy->mode & UDPHY_MODE_USB) || udphy->hs) { @@ -606,7 +550,12 @@ static int rockchip_u3phy_init(struct phy *phy) return 0; } - return udphy_power_on(udphy, UDPHY_MODE_USB); + ret = udphy_setup(udphy); + if (ret) + return ret; + + udphy_u3_port_disable(udphy, false); + return 0; } static int rockchip_u3phy_exit(struct phy *phy) @@ -617,7 +566,7 @@ static int rockchip_u3phy_exit(struct phy *phy) if (!(udphy->mode & UDPHY_MODE_USB) || udphy->hs) return 0; - return udphy_power_off(udphy, UDPHY_MODE_USB); + return udphy_disable(udphy); } static const struct phy_ops rockchip_u3phy_ops = { @@ -813,6 +762,28 @@ static const char * const rk3588_udphy_rst_l[] = { "init", "cmn", "lane", "pcs_apb", "pma_apb" }; +static const struct rockchip_udphy_cfg rk3576_udphy_cfgs = { + .num_phys = 1, + .phy_ids = { + 0x2b010000, + }, + .num_rsts = ARRAY_SIZE(rk3588_udphy_rst_l), + .rst_list = rk3588_udphy_rst_l, + .grfcfg = { + /* u2phy-grf */ + .bvalid_phy_con = { 0x0010, 1, 0, 0x2, 0x3 }, + .bvalid_grf_con = { 0x0000, 15, 14, 0x1, 0x3 }, + + /* usb-grf */ + .usb3otg0_cfg = { 0x0030, 15, 0, 0x1100, 0x0188 }, + + /* usbdpphy-grf */ + .low_pwrn = { 0x0004, 13, 13, 0, 1 }, + .rx_lfps = { 0x0004, 14, 14, 0, 1 }, + }, + .combophy_init = rk3588_udphy_init, +}; + static const struct rockchip_udphy_cfg rk3588_udphy_cfgs = { .num_phys = 2, .phy_ids = { @@ -839,6 +810,10 @@ static const struct rockchip_udphy_cfg rk3588_udphy_cfgs = { static const struct udevice_id rockchip_udphy_dt_match[] = { { + .compatible = "rockchip,rk3576-usbdp-phy", + .data = (ulong)&rk3576_udphy_cfgs + }, + { .compatible = "rockchip,rk3588-usbdp-phy", .data = (ulong)&rk3588_udphy_cfgs }, diff --git a/drivers/pinctrl/pinctrl-zynqmp.c b/drivers/pinctrl/pinctrl-zynqmp.c index 6fa203a3b86..665b76a7d4d 100644 --- a/drivers/pinctrl/pinctrl-zynqmp.c +++ b/drivers/pinctrl/pinctrl-zynqmp.c @@ -204,7 +204,7 @@ static int zynqmp_pinctrl_prepare_func_groups(u32 fid, const char **fgroups; char name[MAX_GROUP_NAME_LEN]; u16 resp[NUM_GROUPS_PER_RESP] = {0}; - int ret, index, i; + int ret = 0, index, i; fgroups = kcalloc(func->ngroups, sizeof(*fgroups), GFP_KERNEL); if (!fgroups) @@ -460,14 +460,14 @@ static int zynqmp_pinconf_set(struct udevice *dev, unsigned int pin, case PIN_CFG_IOSTANDARD: param = PM_PINCTRL_CONFIG_VOLTAGE_STATUS; ret = zynqmp_pm_pinctrl_get_config(pin, param, &value); - if (arg != value) + if (!ret && arg != value) dev_warn(dev, "Invalid IO Standard requested for pin %d\n", pin); break; case PIN_CONFIG_POWER_SOURCE: param = PM_PINCTRL_CONFIG_VOLTAGE_STATUS; ret = zynqmp_pm_pinctrl_get_config(pin, param, &value); - if (arg != value) + if (!ret && arg != value) dev_warn(dev, "Invalid IO Standard requested for pin %d\n", pin); break; diff --git a/drivers/pinctrl/renesas/rzg2l-pfc.c b/drivers/pinctrl/renesas/rzg2l-pfc.c index 3c751e9473a..4a75e0b2372 100644 --- a/drivers/pinctrl/renesas/rzg2l-pfc.c +++ b/drivers/pinctrl/renesas/rzg2l-pfc.c @@ -353,7 +353,7 @@ static int rzg2l_pinconf_set(struct udevice *dev, unsigned int pin_selector, /* The pin selector refers to a multiplexed pin */ int port = rzg2l_selector_decode(data, pin_selector, &pin); if (port < 0) { - dev_err(dev, "Invalid pin selector %u:%u\n", port, pin); + dev_err(dev, "Invalid pin selector %u\n", pin_selector); return port; } @@ -550,7 +550,7 @@ static int rzg2l_get_pin_muxing(struct udevice *dev, unsigned int selector, port = rzg2l_selector_decode(data, selector, &pin); if (port < 0) { - dev_err(dev, "Invalid pin selector %u:%u\n", port, pin); + dev_err(dev, "Invalid pin selector %u\n", selector); return port; } diff --git a/drivers/power/pmic/rk8xx.c b/drivers/power/pmic/rk8xx.c index 3bc696d4caa..d11f7a7886e 100644 --- a/drivers/power/pmic/rk8xx.c +++ b/drivers/power/pmic/rk8xx.c @@ -89,11 +89,6 @@ void rk8xx_off_for_plugin(struct udevice *dev) } } -static struct reg_data rk806_init_reg[] = { - /* RST_FUN */ - { RK806_REG_SYS_CFG3, BIT(7), GENMASK(7, 6)}, -}; - static struct reg_data rk817_init_reg[] = { /* enable the under-voltage protection, * the under-voltage protection will shutdown the LDO3 and reset the PMIC @@ -306,12 +301,20 @@ static int rk8xx_probe(struct udevice *dev) value = (power_en2 & 0x0f) | ((power_en3 & 0x0f) << 4); pmic_reg_write(dev, RK817_POWER_EN_SAVE1, value); break; - case RK806_ID: + case RK806_ID: { + u32 rst_fun = 2; + on_source = RK806_ON_SOURCE; off_source = RK806_OFF_SOURCE; - init_data = rk806_init_reg; - init_data_num = ARRAY_SIZE(rk806_init_reg); - break; + + ret = dev_read_u32(dev, "rockchip,reset-mode", &rst_fun); + if (ret) + debug("rockchip,reset-mode property missing, defaulting to %d\n", + rst_fun); + + pmic_clrsetbits(dev, RK806_REG_SYS_CFG3, RK806_RST_FUN_MSK, + FIELD_PREP(RK806_RST_FUN_MSK, rst_fun)); + break; } default: printf("Unknown PMIC: RK%x!!\n", show_variant); return -EINVAL; diff --git a/drivers/ram/renesas/dbsc5/dram.c b/drivers/ram/renesas/dbsc5/dram.c index ca8a7fb4783..3ed02e11f9e 100644 --- a/drivers/ram/renesas/dbsc5/dram.c +++ b/drivers/ram/renesas/dbsc5/dram.c @@ -3735,7 +3735,7 @@ static u32 dbsc5_read_vref_training(struct udevice *dev) if (vref_stop_index > 0x80) return 0; - for (i = 0; i <= vref_stop_index; i++) { + for (i = 0; i < vref_stop_index; i++) { r_foreach_vch(dev, ch) { reg = dbsc5_ddr_getval_slice(dev, ch, 0, PHY_PAD_VREF_CTRL_DQ); reg &= 0xF << 10; @@ -3819,7 +3819,7 @@ static u32 dbsc5_read_vref_training(struct udevice *dev) best_vref_byte0_index = 0; best_dvw_min_byte0 = dvw_min_byte0_table[ch][0]; - for (i = 0; i <= vref_stop_index; i++) { + for (i = 0; i < vref_stop_index; i++) { if (best_dvw_min_byte0 >= dvw_min_byte0_table[ch][i]) continue; @@ -3858,7 +3858,7 @@ static u32 dbsc5_read_vref_training(struct udevice *dev) vref_outlier = dbsc5_ddr_getval_slice(dev, ch, 0, PHY_RDLVL_VREF_OUTLIER); best_upper_vref = best_vref_byte0; outlier_cnt = vref_outlier; - for (i = best_vref_byte0_index; i <= vref_stop_index; i++) { + for (i = best_vref_byte0_index; i < vref_stop_index; i++) { if (dvw_min_byte0_table[ch][i] <= 0) break; @@ -3879,7 +3879,7 @@ static u32 dbsc5_read_vref_training(struct udevice *dev) best_vref_byte1 = vref_start; best_vref_byte1_index = 0; best_dvw_min_byte1 = dvw_min_byte1_table[ch][0]; - for (i = 0; i <= vref_stop_index; i++) { + for (i = 0; i < vref_stop_index; i++) { if (best_dvw_min_byte1 >= dvw_min_byte1_table[ch][i]) continue; @@ -3918,7 +3918,7 @@ static u32 dbsc5_read_vref_training(struct udevice *dev) vref_outlier = dbsc5_ddr_getval_slice(dev, ch, 1, PHY_RDLVL_VREF_OUTLIER); best_upper_vref = best_vref_byte1; outlier_cnt = vref_outlier; - for (i = best_vref_byte1_index; i <= vref_stop_index; i++) { + for (i = best_vref_byte1_index; i < vref_stop_index; i++) { if (dvw_min_byte1_table[ch][i] <= 0) break; diff --git a/drivers/remoteproc/k3_system_controller.c b/drivers/remoteproc/k3_system_controller.c index 71238a6058a..e59c010de7e 100644 --- a/drivers/remoteproc/k3_system_controller.c +++ b/drivers/remoteproc/k3_system_controller.c @@ -327,7 +327,7 @@ static const struct k3_sysctrler_desc k3_sysctrler_am654_desc = { static const struct udevice_id k3_sysctrler_ids[] = { { - .compatible = "ti,am654-system-controller", + .compatible = "ti,am654-tisci-rproc-r5", .data = (ulong)&k3_sysctrler_am654_desc, }, {} diff --git a/drivers/rng/rockchip_rng.c b/drivers/rng/rockchip_rng.c index d854ea90044..8cf750e043c 100644 --- a/drivers/rng/rockchip_rng.c +++ b/drivers/rng/rockchip_rng.c @@ -394,6 +394,10 @@ static const struct udevice_id rockchip_rng_match[] = { .data = (ulong)&rk_trngv1_soc_data, }, { + .compatible = "rockchip,rk3576-rng", + .data = (ulong)&rkrng_soc_data, + }, + { .compatible = "rockchip,rkrng", .data = (ulong)&rkrng_soc_data, }, diff --git a/drivers/serial/serial_efi.c b/drivers/serial/serial_efi.c index 5733eaaf9d4..d3cd4de34a2 100644 --- a/drivers/serial/serial_efi.c +++ b/drivers/serial/serial_efi.c @@ -33,7 +33,7 @@ int serial_efi_setbrg(struct udevice *dev, int baudrate) static int serial_efi_get_key(struct serial_efi_priv *priv) { - int ret; + efi_status_t ret; if (priv->have_key) return 0; diff --git a/drivers/soc/soc_xilinx_zynqmp.c b/drivers/soc/soc_xilinx_zynqmp.c index 0c45c781fef..4b69ff3de13 100644 --- a/drivers/soc/soc_xilinx_zynqmp.c +++ b/drivers/soc/soc_xilinx_zynqmp.c @@ -63,7 +63,7 @@ static const struct zynqmp_device zynqmp_devices[] = { { .id = 0x04688093, .device = 1, - .variants = ZYNQMP_VARIANT_EG, + .variants = ZYNQMP_VARIANT_EG | ZYNQMP_VARIANT_CG, }, { .id = 0x04689093, diff --git a/drivers/spi/atmel-quadspi.c b/drivers/spi/atmel-quadspi.c index 8aa7a83aef4..b2b96e1c4b9 100644 --- a/drivers/spi/atmel-quadspi.c +++ b/drivers/spi/atmel-quadspi.c @@ -615,7 +615,8 @@ static int atmel_qspi_set_cfg(struct atmel_qspi *aq, static int atmel_qspi_transfer(struct atmel_qspi *aq, const struct spi_mem_op *op, u32 offset) { - u32 sr, imr; + u32 imr, val = 0; + unsigned long timeout; /* Skip to the final steps if there is no data */ if (op->data.nbytes) { @@ -636,8 +637,16 @@ static int atmel_qspi_transfer(struct atmel_qspi *aq, /* Poll INSTruction End and Chip Select Rise flags. */ imr = QSPI_SR_INSTRE | QSPI_SR_CSR; - return readl_poll_timeout(aq->regs + QSPI_SR, sr, (sr & imr) == imr, - ATMEL_QSPI_TIMEOUT); + + timeout = timer_get_us() + ATMEL_QSPI_TIMEOUT; + while (1) { + val |= readl(aq->regs + QSPI_SR) & imr; + if ((val & imr) == imr) + return 0; + + if (time_after(timer_get_us(), timeout)) + return -ETIMEDOUT; + } } static int atmel_qspi_sama7g5_set_cfg(struct atmel_qspi *aq, diff --git a/drivers/spi/exynos_spi.c b/drivers/spi/exynos_spi.c index 1b9bf004b7c..7f2965f8321 100644 --- a/drivers/spi/exynos_spi.c +++ b/drivers/spi/exynos_spi.c @@ -105,14 +105,10 @@ static int spi_rx_tx(struct exynos_spi_priv *priv, int todo, uint out_bytes, in_bytes; int toread; unsigned start = get_timer(0); - int stopping; int step; out_bytes = in_bytes = todo; - stopping = priv->skip_preamble && (flags & SPI_XFER_END) && - !(priv->mode & SPI_SLAVE); - /* * Try to transfer words if we can. This helps read performance at * SPI clock speeds above about 20MHz. @@ -161,12 +157,10 @@ static int spi_rx_tx(struct exynos_spi_priv *priv, int todo, while (rx_lvl >= step) { temp = readl(®s->rx_data); if (priv->skip_preamble) { - if (temp == SPI_PREAMBLE_END_BYTE) { + if (temp == SPI_PREAMBLE_END_BYTE) priv->skip_preamble = 0; - stopping = 0; - } } else { - if (rxp || stopping) { + if (rxp) { if (step == 4) *(uint32_t *)rxp = temp; else diff --git a/drivers/usb/cdns3/gadget.c b/drivers/usb/cdns3/gadget.c index a30c40ef80e..9eaf7e40ab6 100644 --- a/drivers/usb/cdns3/gadget.c +++ b/drivers/usb/cdns3/gadget.c @@ -557,10 +557,10 @@ static void cdns3_wa2_remove_old_request(struct cdns3_endpoint *priv_ep) trace_cdns3_wa2(priv_ep, "removes eldest request"); + list_del_init(&priv_req->list); kfree(priv_req->request.buf); cdns3_gadget_ep_free_request(&priv_ep->endpoint, &priv_req->request); - list_del_init(&priv_req->list); --priv_ep->wa2_counter; if (!chain) @@ -1959,10 +1959,10 @@ static int cdns3_gadget_ep_disable(struct usb_ep *ep) while (!list_empty(&priv_ep->wa2_descmiss_req_list)) { priv_req = cdns3_next_priv_request(&priv_ep->wa2_descmiss_req_list); + list_del_init(&priv_req->list); kfree(priv_req->request.buf); cdns3_gadget_ep_free_request(&priv_ep->endpoint, &priv_req->request); - list_del_init(&priv_req->list); --priv_ep->wa2_counter; } diff --git a/drivers/usb/common/dwc2_core.c b/drivers/usb/common/dwc2_core.c index 63062d5cc94..37007134e5b 100644 --- a/drivers/usb/common/dwc2_core.c +++ b/drivers/usb/common/dwc2_core.c @@ -17,7 +17,7 @@ int dwc2_core_reset(struct dwc2_core_regs *regs) bool host_mode = false; if (!(readl(®s->global_regs.gotgctl) & GOTGCTL_CONID_B) || - (readl(®s->global_regs.gusbcfg) & GUSBCFG_FORCEDEVMODE)) + (readl(®s->global_regs.gusbcfg) & GUSBCFG_FORCEHOSTMODE)) host_mode = true; /* Core Soft Reset */ diff --git a/drivers/usb/dwc3/dwc3-generic.c b/drivers/usb/dwc3/dwc3-generic.c index 3cda2b74b7e..c09014aec60 100644 --- a/drivers/usb/dwc3/dwc3-generic.c +++ b/drivers/usb/dwc3/dwc3-generic.c @@ -698,7 +698,9 @@ static const struct udevice_id dwc3_glue_ids[] = { { .compatible = "ti,am654-dwc3" }, { .compatible = "rockchip,rk3328-dwc3", .data = (ulong)&rk_ops }, { .compatible = "rockchip,rk3399-dwc3" }, + { .compatible = "rockchip,rk3528-dwc3", .data = (ulong)&rk_ops }, { .compatible = "rockchip,rk3568-dwc3", .data = (ulong)&rk_ops }, + { .compatible = "rockchip,rk3576-dwc3", .data = (ulong)&rk_ops }, { .compatible = "rockchip,rk3588-dwc3", .data = (ulong)&rk_ops }, { .compatible = "qcom,dwc3", .data = (ulong)&qcom_ops }, { .compatible = "fsl,imx8mp-dwc3", .data = (ulong)&imx8mp_ops }, diff --git a/drivers/usb/dwc3/ep0.c b/drivers/usb/dwc3/ep0.c index 531f0b522af..c656cbe25ce 100644 --- a/drivers/usb/dwc3/ep0.c +++ b/drivers/usb/dwc3/ep0.c @@ -380,7 +380,7 @@ static int dwc3_ep0_handle_status(struct dwc3 *dwc, dep = dwc->eps[0]; dwc->ep0_usb_req.dep = dep; dwc->ep0_usb_req.request.length = sizeof(*response_pkt); - dwc->ep0_usb_req.request.buf = (void *)dwc->setup_buf_addr; + dwc->ep0_usb_req.request.buf = (void *)(uintptr_t)dwc->setup_buf_addr; dwc->ep0_usb_req.request.complete = dwc3_ep0_status_cmpl; return __dwc3_gadget_ep0_queue(dep, &dwc->ep0_usb_req); @@ -662,7 +662,7 @@ static int dwc3_ep0_set_sel(struct dwc3 *dwc, struct usb_ctrlrequest *ctrl) dep = dwc->eps[0]; dwc->ep0_usb_req.dep = dep; dwc->ep0_usb_req.request.length = dep->endpoint.maxpacket; - dwc->ep0_usb_req.request.buf = (void *)dwc->setup_buf_addr; + dwc->ep0_usb_req.request.buf = (void *)(uintptr_t)dwc->setup_buf_addr; dwc->ep0_usb_req.request.complete = dwc3_ep0_set_sel_cmpl; return __dwc3_gadget_ep0_queue(dep, &dwc->ep0_usb_req); diff --git a/drivers/usb/gadget/Kconfig b/drivers/usb/gadget/Kconfig index 46a83141481..0121f9872ae 100644 --- a/drivers/usb/gadget/Kconfig +++ b/drivers/usb/gadget/Kconfig @@ -86,6 +86,7 @@ config USB_GADGET_PRODUCT_NUM default 0x350a if ROCKCHIP_RK3568 default 0x350b if ROCKCHIP_RK3588 default 0x350c if ROCKCHIP_RK3528 + default 0x350e if ROCKCHIP_RK3576 default 0x0 help Product ID of the USB device emulated, reported to the host device. @@ -201,12 +202,13 @@ config USB_FUNCTION_MASS_STORAGE the eMMC/SD card content to HOST PC so it can be mounted. config USB_FUNCTION_ROCKUSB - bool "Enable USB rockusb gadget" - help - Rockusb protocol is widely used by Rockchip SoC based devices. It can - read/write info, image to/from devices. This enables the USB part of - the rockusb gadget.for more detail about Rockusb protocol, please see - doc/README.rockusb + bool "Enable USB rockusb gadget" + depends on ARCH_ROCKCHIP + help + Rockusb protocol is widely used by Rockchip SoC based devices. It can + read/write info, image to/from devices. This enables the USB part of + the rockusb gadget.for more detail about Rockusb protocol, please see + doc/README.rockusb config USB_FUNCTION_SDP bool "Enable USB SDP (Serial Download Protocol)" diff --git a/drivers/usb/host/dwc3-of-simple.c b/drivers/usb/host/dwc3-of-simple.c index d52e7d22d1a..362178b7900 100644 --- a/drivers/usb/host/dwc3-of-simple.c +++ b/drivers/usb/host/dwc3-of-simple.c @@ -91,6 +91,7 @@ static int dwc3_of_simple_remove(struct udevice *dev) static const struct udevice_id dwc3_of_simple_ids[] = { { .compatible = "amlogic,meson-gxl-dwc3" }, { .compatible = "rockchip,rk3399-dwc3" }, + { .compatible = "samsung,exynos850-dwusb3" }, { .compatible = "ti,dwc3" }, { } }; diff --git a/drivers/usb/host/ehci-mx6.c b/drivers/usb/host/ehci-mx6.c index a8748cef7ad..25907f22612 100644 --- a/drivers/usb/host/ehci-mx6.c +++ b/drivers/usb/host/ehci-mx6.c @@ -537,7 +537,7 @@ static int ehci_usb_phy_mode(struct udevice *dev) plat->init_type = USB_INIT_DEVICE; else plat->init_type = USB_INIT_HOST; - } else if (is_mx7() || is_imx8mm() || is_imx8mn() || is_imx93()) { + } else if (is_mx7() || is_imx8mm() || is_imx8mn() || is_imx9()) { phy_status = (void __iomem *)(addr + USBNC_PHY_STATUS_OFFSET); val = readl(phy_status); diff --git a/dts/upstream/Bindings/mfd/rockchip,rk806.yaml b/dts/upstream/Bindings/mfd/rockchip,rk806.yaml index 3c2b06629b7..eb5bca31948 100644 --- a/dts/upstream/Bindings/mfd/rockchip,rk806.yaml +++ b/dts/upstream/Bindings/mfd/rockchip,rk806.yaml @@ -31,6 +31,27 @@ properties: system-power-controller: true + rockchip,reset-mode: + $ref: /schemas/types.yaml#/definitions/uint32 + enum: [0, 1, 2] + description: + Mode to use when a reset of the PMIC is triggered. + + The reset can be triggered either programmatically, via one of + the PWRCTRL pins (provided additional configuration) or + asserting RESETB pin low. + + The following modes are supported + + - 0; restart PMU, + - 1; reset all power off reset registers and force state to + switch to ACTIVE mode, + - 2; same as mode 1 and also pull RESETB pin down for 5ms, + + For example, some hardware may require a full restart (mode 0) + in order to function properly as regulators are shortly + interrupted in this mode. + vcc1-supply: description: The input supply for dcdc-reg1. diff --git a/dts/upstream/src/arm64/rockchip/rk3588-jaguar.dts b/dts/upstream/src/arm64/rockchip/rk3588-jaguar.dts index ebe77cdd24e..176925d0a1a 100644 --- a/dts/upstream/src/arm64/rockchip/rk3588-jaguar.dts +++ b/dts/upstream/src/arm64/rockchip/rk3588-jaguar.dts @@ -10,6 +10,7 @@ #include <dt-bindings/pinctrl/rockchip.h> #include <dt-bindings/soc/rockchip,vop2.h> #include <dt-bindings/usb/pd.h> +#include "rk8xx.h" #include "rk3588.dtsi" / { @@ -693,6 +694,7 @@ vcc13-supply = <&vcc_1v1_nldo_s3>; vcc14-supply = <&vcc_1v1_nldo_s3>; vcca-supply = <&vcc5v0_sys>; + rockchip,reset-mode = <RK806_RESTART>; rk806_dvs1_null: dvs1-null-pins { pins = "gpio_pwrctrl1"; diff --git a/dts/upstream/src/arm64/rockchip/rk3588-tiger.dtsi b/dts/upstream/src/arm64/rockchip/rk3588-tiger.dtsi index c4933a08dd1..b44e89e1bb1 100644 --- a/dts/upstream/src/arm64/rockchip/rk3588-tiger.dtsi +++ b/dts/upstream/src/arm64/rockchip/rk3588-tiger.dtsi @@ -6,6 +6,7 @@ #include <dt-bindings/gpio/gpio.h> #include <dt-bindings/leds/common.h> #include <dt-bindings/pinctrl/rockchip.h> +#include "rk8xx.h" #include "rk3588.dtsi" / { @@ -440,6 +441,7 @@ vcc13-supply = <&vcc_1v1_nldo_s3>; vcc14-supply = <&vcc_1v1_nldo_s3>; vcca-supply = <&vcc5v0_sys>; + rockchip,reset-mode = <RK806_RESTART>; rk806_dvs1_null: dvs1-null-pins { pins = "gpio_pwrctrl1"; diff --git a/dts/upstream/src/arm64/rockchip/rk8xx.h b/dts/upstream/src/arm64/rockchip/rk8xx.h new file mode 100644 index 00000000000..a6fbef71c06 --- /dev/null +++ b/dts/upstream/src/arm64/rockchip/rk8xx.h @@ -0,0 +1,18 @@ +/* SPDX-License-Identifier: (GPL-2.0-or-later OR MIT) */ +/* + * Device Tree defines for Rockchip RK8xx PMICs + * + * Copyright 2025 Cherry Embedded Solutions GmbH + * + * Author: Quentin Schulz <quentin.schulz@cherry.de> + */ + +#ifndef _DT_MFD_ROCKCHIP_RK8XX_H +#define _DT_MFD_ROCKCHIP_RK8XX_H + +/* For use with rockchip,reset-mode property */ +#define RK806_RESTART 0 +#define RK806_RESET 1 +#define RK806_RESET_NOTIFY 2 + +#endif diff --git a/env/Kconfig b/env/Kconfig index 03c189b7266..adea277470f 100644 --- a/env/Kconfig +++ b/env/Kconfig @@ -635,7 +635,7 @@ config ENV_OFFSET_REDUND config ENV_OFFSET_REDUND_RELATIVE_END bool "Offset is relative to the end of the partition" - depends on SYS_REDUNDAND_ENVIRONMENT + depends on ENV_REDUNDANT depends on ENV_IS_IN_MMC help Treat the redundant environment offset as relative to the end of the diff --git a/env/nand.c b/env/nand.c index fdaa903cd61..709f8411eb6 100644 --- a/env/nand.c +++ b/env/nand.c @@ -275,7 +275,7 @@ int get_nand_env_oob(struct mtd_info *mtd, unsigned long *result) int ret; ops.datbuf = NULL; - ops.mode = MTD_OOB_AUTO; + ops.mode = MTD_OPS_AUTO_OOB; ops.ooboffs = 0; ops.ooblen = ENV_OFFSET_SIZE; ops.oobbuf = (void *)oob_buf; diff --git a/include/ACEX1K.h b/include/ACEX1K.h index 7c5253c66cc..4d24545df2c 100644 --- a/include/ACEX1K.h +++ b/include/ACEX1K.h @@ -12,10 +12,6 @@ #include <altera.h> -extern int ACEX1K_load(Altera_desc *desc, const void *image, size_t size); -extern int ACEX1K_dump(Altera_desc *desc, const void *buf, size_t bsize); -extern int ACEX1K_info(Altera_desc *desc); - extern int CYC2_load(Altera_desc *desc, const void *image, size_t size); extern int CYC2_dump(Altera_desc *desc, const void *buf, size_t bsize); extern int CYC2_info(Altera_desc *desc); @@ -24,18 +20,6 @@ extern int CYC2_info(Altera_desc *desc); typedef struct { Altera_pre_fn pre; Altera_config_fn config; - Altera_clk_fn clk; - Altera_status_fn status; - Altera_done_fn done; - Altera_data_fn data; - Altera_abort_fn abort; - Altera_post_fn post; -} Altera_ACEX1K_Passive_Serial_fns; - -/* Slave Serial Implementation function table */ -typedef struct { - Altera_pre_fn pre; - Altera_config_fn config; Altera_status_fn status; Altera_done_fn done; Altera_write_fn write; @@ -45,16 +29,6 @@ typedef struct { /* Device Image Sizes *********************************************************************/ -/* ACEX1K */ -/* FIXME: Which size do we mean? - * Datasheet says 1337000/8=167125Bytes, - * Filesize of an *.rbf file is 166965 Bytes - */ -#if 0 -#define Altera_EP1K100_SIZE 1337000/8 /* 167125 Bytes */ -#endif -#define Altera_EP1K100_SIZE (166965*8) - #define Altera_EP2C8_SIZE 247942 #define Altera_EP2C20_SIZE 586562 #define Altera_EP2C35_SIZE 883905 @@ -70,10 +44,4 @@ typedef struct { #define ALTERA_EP4CE75_SIZE 2495719 /* 19965752 Bits */ #define ALTERA_EP4CE115_SIZE 3571462 /* 28571696 Bits */ -/* Descriptor Macros - *********************************************************************/ -/* ACEX1K devices */ -#define Altera_EP1K100_DESC(iface, fn_table, cookie) \ -{ Altera_ACEX1K, iface, Altera_EP1K100_SIZE, fn_table, cookie } - #endif /* _ACEX1K_H_ */ diff --git a/include/configs/am57xx_evm.h b/include/configs/am57xx_evm.h index 266b77fbf68..8c29c940478 100644 --- a/include/configs/am57xx_evm.h +++ b/include/configs/am57xx_evm.h @@ -11,30 +11,13 @@ #ifndef __CONFIG_AM57XX_EVM_H #define __CONFIG_AM57XX_EVM_H -#include <env/ti/dfu.h> #include <linux/sizes.h> #define CFG_SYS_NS16550_COM1 UART1_BASE /* Base EVM has UART0 */ #define CFG_SYS_NS16550_COM2 UART2_BASE /* UART2 */ #define CFG_SYS_NS16550_COM3 UART3_BASE /* UART3 */ -#ifndef CONFIG_XPL_BUILD -#define DFUARGS \ - "dfu_bufsiz=0x10000\0" \ - DFU_ALT_INFO_MMC \ - DFU_ALT_INFO_EMMC \ - DFU_ALT_INFO_RAM \ - DFU_ALT_INFO_QSPI -#else -#ifdef CONFIG_SPL_DFU -#define DFUARGS \ - "dfu_bufsiz=0x10000\0" \ - DFU_ALT_INFO_RAM -#endif -#endif - -#include <configs/ti_omap5_common.h> - /* CPSW Ethernet */ +#include <configs/ti_omap5_common.h> #endif /* __CONFIG_AM57XX_EVM_H */ diff --git a/include/configs/amd_versal2.h b/include/configs/amd_versal2.h index 1ade6adfa0b..f1c432aa391 100644 --- a/include/configs/amd_versal2.h +++ b/include/configs/amd_versal2.h @@ -145,12 +145,14 @@ #else /* CONFIG_DISTRO_DEFAULTS */ # define BOOTENV +# define BOOTENV_DEV_SHARED_XSPI #endif /* CONFIG_DISTRO_DEFAULTS */ /* Initial environment variables */ #ifndef CFG_EXTRA_ENV_SETTINGS #define CFG_EXTRA_ENV_SETTINGS \ ENV_MEM_LAYOUT_SETTINGS \ + "usb_pgood_delay=2000\0" \ BOOTENV \ BOOTENV_DEV_SHARED_XSPI \ DFU_ALT_INFO diff --git a/include/configs/dra7xx_evm.h b/include/configs/dra7xx_evm.h index 3c960ca2ce2..9df7ef055bf 100644 --- a/include/configs/dra7xx_evm.h +++ b/include/configs/dra7xx_evm.h @@ -11,40 +11,16 @@ #ifndef __CONFIG_DRA7XX_EVM_H #define __CONFIG_DRA7XX_EVM_H -#include <env/ti/dfu.h> - #define CFG_MAX_MEM_MAPPED 0x80000000 #ifndef CONFIG_QSPI_BOOT /* MMC ENV related defines */ #endif -#if (CONFIG_CONS_INDEX == 1) -#define CONSOLEDEV "ttyS0" -#elif (CONFIG_CONS_INDEX == 3) -#define CONSOLEDEV "ttyS2" -#endif #define CFG_SYS_NS16550_COM1 UART1_BASE /* Base EVM has UART0 */ #define CFG_SYS_NS16550_COM2 UART2_BASE /* UART2 */ #define CFG_SYS_NS16550_COM3 UART3_BASE /* UART3 */ -#ifndef CONFIG_XPL_BUILD -#define DFUARGS \ - "dfu_bufsiz=0x10000\0" \ - DFU_ALT_INFO_MMC \ - DFU_ALT_INFO_EMMC \ - DFU_ALT_INFO_RAM \ - DFU_ALT_INFO_QSPI -#endif - -#ifdef CONFIG_XPL_BUILD -#ifdef CONFIG_SPL_DFU -#define DFUARGS \ - "dfu_bufsiz=0x10000\0" \ - DFU_ALT_INFO_RAM -#endif -#endif - #include <configs/ti_omap5_common.h> /* NAND support */ diff --git a/include/configs/imx93_evk.h b/include/configs/imx93_evk.h index e7db0161126..ffd72a38bcb 100644 --- a/include/configs/imx93_evk.h +++ b/include/configs/imx93_evk.h @@ -11,10 +11,6 @@ #define CFG_SYS_UBOOT_BASE \ (QSPI0_AMBA_BASE + CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR * 512) -#ifdef CONFIG_XPL_BUILD -#define CFG_MALLOC_F_ADDR 0x204D0000 -#endif - #ifdef CONFIG_ENV_MMC_DEVICE_INDEX #define IMX93_EVK_MMC_ENV_DEV CONFIG_ENV_MMC_DEVICE_INDEX #else diff --git a/include/configs/imx93_frdm.h b/include/configs/imx93_frdm.h index 987fcacb999..c98c10774cb 100644 --- a/include/configs/imx93_frdm.h +++ b/include/configs/imx93_frdm.h @@ -11,10 +11,6 @@ #define CFG_SYS_UBOOT_BASE \ (QSPI0_AMBA_BASE + CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR * 512) -#ifdef CONFIG_XPL_BUILD -#define CFG_MALLOC_F_ADDR 0x204D0000 -#endif - /* Link Definitions */ #define CFG_SYS_INIT_RAM_ADDR 0x80000000 diff --git a/include/configs/imx93_qsb.h b/include/configs/imx93_qsb.h index 5ddc191d17c..a7b94f7ab57 100644 --- a/include/configs/imx93_qsb.h +++ b/include/configs/imx93_qsb.h @@ -9,10 +9,6 @@ #define CFG_SYS_UBOOT_BASE \ (QSPI0_AMBA_BASE + CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR * 512) -#ifdef CONFIG_SPL_BUILD -#define CFG_MALLOC_F_ADDR 0x204D0000 -#endif - #define CFG_SYS_INIT_RAM_ADDR 0x80000000 #define CFG_SYS_INIT_RAM_SIZE 0x200000 diff --git a/include/configs/rk3288_common.h b/include/configs/rk3288_common.h index 0c449e31099..52c3695ff8e 100644 --- a/include/configs/rk3288_common.h +++ b/include/configs/rk3288_common.h @@ -18,7 +18,8 @@ #define ENV_MEM_LAYOUT_SETTINGS \ "scriptaddr=0x00000000\0" \ "pxefile_addr_r=0x00100000\0" \ - "fdt_addr_r=0x01f00000\0" \ + "fdt_addr_r=0x01e00000\0" \ + "fdtoverlay_addr_r=0x01f00000\0" \ "kernel_addr_r=0x02000000\0" \ "ramdisk_addr_r=0x04000000\0" diff --git a/include/configs/ti_omap5_common.h b/include/configs/ti_omap5_common.h index 39102f15eb9..9e02b0d0040 100644 --- a/include/configs/ti_omap5_common.h +++ b/include/configs/ti_omap5_common.h @@ -39,216 +39,6 @@ #define DFUARGS #endif -#include <env/ti/mmc.h> -#include <env/ti/nand.h> - -#ifndef CONSOLEDEV -#define CONSOLEDEV "ttyS2" -#endif - -#ifndef PARTS_DEFAULT -/* - * Default GPT tables for eMMC (Linux and Android). Notes: - * 1. Keep partitions aligned to erase group size (512 KiB) when possible - * 2. Keep partitions in sync with DFU_ALT_INFO_EMMC (see dfu.h) - * 3. Keep 'bootloader' partition (U-Boot proper) start address in sync with - * CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR (see common/spl/Kconfig) - */ -#define PARTS_DEFAULT \ - /* Linux partitions */ \ - "uuid_disk=${uuid_gpt_disk};" \ - "name=bootloader,start=384K,size=1792K,uuid=${uuid_gpt_bootloader};" \ - "name=rootfs,start=2688K,size=-,uuid=${uuid_gpt_rootfs}\0" \ - /* Android partitions */ \ - "partitions_android=" \ - "uuid_disk=${uuid_gpt_disk};" \ - "name=xloader,start=128K,size=256K,uuid=${uuid_gpt_xloader};" \ - "name=bootloader,size=2048K,uuid=${uuid_gpt_bootloader};" \ - "name=uboot-env,start=2432K,size=256K,uuid=${uuid_gpt_reserved};" \ - "name=misc,size=128K,uuid=${uuid_gpt_misc};" \ - "name=boot_a,size=20M,uuid=${uuid_gpt_boot_a};" \ - "name=boot_b,size=20M,uuid=${uuid_gpt_boot_b};" \ - "name=dtbo_a,size=8M,uuid=${uuid_gpt_dtbo_a};" \ - "name=dtbo_b,size=8M,uuid=${uuid_gpt_dtbo_b};" \ - "name=vbmeta_a,size=64K,uuid=${uuid_gpt_vbmeta_a};" \ - "name=vbmeta_b,size=64K,uuid=${uuid_gpt_vbmeta_b};" \ - "name=recovery,size=64M,uuid=${uuid_gpt_recovery};" \ - "name=super,size=2560M,uuid=${uuid_gpt_super};" \ - "name=metadata,size=16M,uuid=${uuid_gpt_metadata};" \ - "name=userdata,size=-,uuid=${uuid_gpt_userdata}" -#endif /* PARTS_DEFAULT */ - -#if defined(CONFIG_CMD_AVB) -#define AVB_VERIFY_CHECK "if run avb_verify; then " \ - "echo AVB verification OK.;" \ - "set bootargs $bootargs $avb_bootargs;" \ - "else " \ - "echo AVB verification failed.;" \ - "exit; fi;" -#define AVB_VERIFY_CMD "avb_verify=avb init 1; avb verify $slot_suffix;\0" -#else -#define AVB_VERIFY_CHECK "" -#define AVB_VERIFY_CMD "" -#endif - -#define CONTROL_PARTITION "misc" - -#if defined(CONFIG_CMD_BCB) && defined(CONFIG_ANDROID_AB) -#define AB_SELECT_SLOT \ - "if part number mmc 1 " CONTROL_PARTITION " control_part_number; " \ - "then " \ - "echo " CONTROL_PARTITION \ - " partition number:${control_part_number};" \ - "bcb ab_select slot_name mmc ${mmcdev}:${control_part_number};" \ - "else " \ - "echo " CONTROL_PARTITION " partition not found;" \ - "exit;" \ - "fi;" \ - "setenv slot_suffix _${slot_name};" -#define AB_SELECT_ARGS \ - "setenv bootargs_ab androidboot.slot_suffix=${slot_suffix}; " \ - "echo A/B cmdline addition: ${bootargs_ab};" \ - "setenv bootargs ${bootargs} ${bootargs_ab};" -#else -#define AB_SELECT_SLOT "" -#define AB_SELECT_ARGS "" -#endif - -/* - * Prepares complete device tree blob for current board (for Android boot). - * - * Boot image or recovery image should be loaded into $loadaddr prior to running - * these commands. The logic of these commnads is next: - * - * 1. Read correct DTB for current SoC/board from boot image in $loadaddr - * to $fdtaddr - * 2. Merge all needed DTBO for current board from 'dtbo' partition into read - * DTB - * 3. User should provide $fdtaddr as 3rd argument to 'bootm' - */ -#define PREPARE_FDT \ - "echo Preparing FDT...; " \ - "if test $board_name = am57xx_evm_reva3; then " \ - "echo \" Reading DTBO partition...\"; " \ - "part start mmc ${mmcdev} dtbo${slot_suffix} p_dtbo_start; " \ - "part size mmc ${mmcdev} dtbo${slot_suffix} p_dtbo_size; " \ - "mmc read ${dtboaddr} ${p_dtbo_start} ${p_dtbo_size}; " \ - "echo \" Reading DTB for AM57x EVM RevA3...\"; " \ - "abootimg get dtb --index=0 dtb_start dtb_size; " \ - "cp.b $dtb_start $fdtaddr $dtb_size; " \ - "fdt addr $fdtaddr 0x80000; " \ - "echo \" Applying DTBOs for AM57x EVM RevA3...\"; " \ - "adtimg addr $dtboaddr; " \ - "adtimg get dt --index=0 dtbo0_addr dtbo0_size; " \ - "fdt apply $dtbo0_addr; " \ - "adtimg get dt --index=1 dtbo1_addr dtbo1_size; " \ - "fdt apply $dtbo1_addr; " \ - "elif test $board_name = beagle_x15_revc; then " \ - "echo \" Reading DTB for Beagle X15 RevC...\"; " \ - "abootimg get dtb --index=0 dtb_start dtb_size; " \ - "cp.b $dtb_start $fdtaddr $dtb_size; " \ - "fdt addr $fdtaddr 0x80000; " \ - "else " \ - "echo Error: Android boot is not supported for $board_name; " \ - "exit; " \ - "fi; " \ - -#define DEFAULT_COMMON_BOOT_TI_ARGS \ - "console=" CONSOLEDEV ",115200n8\0" \ - "fdtfile=undefined\0" \ - "finduuid=part uuid mmc 0:2 uuid\0" \ - "usbtty=cdc_acm\0" \ - "vram=16M\0" \ - AVB_VERIFY_CMD \ - "partitions=" PARTS_DEFAULT "\0" \ - "optargs=\0" \ - "dofastboot=0\0" \ - "emmc_android_boot=" \ - "setenv mmcdev 1; " \ - "mmc dev $mmcdev; " \ - "mmc rescan; " \ - AB_SELECT_SLOT \ - "if bcb load " __stringify(CONFIG_FASTBOOT_FLASH_MMC_DEV) " " \ - CONTROL_PARTITION "; then " \ - "setenv ardaddr -; " \ - "if bcb test command = bootonce-bootloader; then " \ - "echo Android: Bootloader boot...; " \ - "bcb clear command; bcb store; " \ - "fastboot 1; " \ - "exit; " \ - "elif bcb test command = boot-recovery; then " \ - "echo Android: Recovery boot...; " \ - "setenv ardaddr $loadaddr;" \ - "setenv apart recovery; " \ - "else " \ - "echo Android: Normal boot...; " \ - "setenv ardaddr $loadaddr; " \ - "setenv apart boot${slot_suffix}; " \ - "fi; " \ - "else " \ - "echo Warning: BCB is corrupted or does not exist; " \ - "echo Android: Normal boot...; " \ - "fi; " \ - "setenv eval_bootargs setenv bootargs $bootargs; " \ - "run eval_bootargs; " \ - "setenv machid fe6; " \ - AVB_VERIFY_CHECK \ - AB_SELECT_ARGS \ - "if part start mmc $mmcdev $apart boot_start; then " \ - "part size mmc $mmcdev $apart boot_size; " \ - "mmc read $loadaddr $boot_start $boot_size; " \ - PREPARE_FDT \ - "bootm $loadaddr $ardaddr $fdtaddr; " \ - "else " \ - "echo $apart partition not found; " \ - "exit; " \ - "fi;\0" - -#define DEFAULT_FDT_TI_ARGS \ - "findfdt="\ - "if test $board_name = omap5_uevm; then " \ - "setenv fdtfile omap5-uevm.dtb; fi; " \ - "if test $board_name = dra7xx; then " \ - "setenv fdtfile dra7-evm.dtb; fi;" \ - "if test $board_name = dra72x-revc; then " \ - "setenv fdtfile dra72-evm-revc.dtb; fi;" \ - "if test $board_name = dra72x; then " \ - "setenv fdtfile dra72-evm.dtb; fi;" \ - "if test $board_name = dra71x; then " \ - "setenv fdtfile dra71-evm.dtb; fi;" \ - "if test $board_name = dra76x_acd; then " \ - "setenv fdtfile dra76-evm.dtb; fi;" \ - "if test $board_name = beagle_x15; then " \ - "setenv fdtfile am57xx-beagle-x15.dtb; fi;" \ - "if test $board_name = beagle_x15_revb1; then " \ - "setenv fdtfile am57xx-beagle-x15-revb1.dtb; fi;" \ - "if test $board_name = beagle_x15_revc; then " \ - "setenv fdtfile am57xx-beagle-x15-revc.dtb; fi;" \ - "if test $board_name = am5729_beagleboneai; then " \ - "setenv fdtfile am5729-beagleboneai.dtb; fi;" \ - "if test $board_name = am572x_idk; then " \ - "setenv fdtfile am572x-idk.dtb; fi;" \ - "if test $board_name = am574x_idk; then " \ - "setenv fdtfile am574x-idk.dtb; fi;" \ - "if test $board_name = am57xx_evm; then " \ - "setenv fdtfile am57xx-beagle-x15.dtb; fi;" \ - "if test $board_name = am57xx_evm_reva3; then " \ - "setenv fdtfile am57xx-beagle-x15.dtb; fi;" \ - "if test $board_name = am571x_idk; then " \ - "setenv fdtfile am571x-idk.dtb; fi;" \ - "if test $fdtfile = undefined; then " \ - "echo WARNING: Could not determine device tree to use; fi; \0" - -#define GET_OVERLAY_MMC_TI_ARGS \ - "get_overlay_mmc=" \ - "fdt address ${fdtaddr};" \ - "fdt resize 0x100000;" \ - "for overlay in $name_overlays;" \ - "do;" \ - "load mmc ${bootpart} ${dtboaddr} ${bootdir}/dtb/${overlay} &&" \ - "fdt apply ${dtboaddr};" \ - "done;\0" \ - #define BOOT_TARGET_DEVICES(func) \ func(TI_MMC, ti_mmc, na) \ func(MMC, mmc, 0) \ @@ -265,24 +55,6 @@ #include <config_distro_bootcmd.h> #define CFG_EXTRA_ENV_SETTINGS \ - DEFAULT_LINUX_BOOT_ENV \ - DEFAULT_MMC_TI_ARGS \ - "bootpart=0:2\0" \ - "bootdir=/boot\0" \ - "get_name_kern=" \ - "if test $boot_fit -eq 1; then " \ - "setenv bootfile fitImage; " \ - "else " \ - "setenv bootfile zImage; " \ - "fi\0" \ - DEFAULT_FIT_TI_ARGS \ - "get_fit_config=setenv name_fit_config ${fdtfile}\0" \ - DEFAULT_COMMON_BOOT_TI_ARGS \ - DEFAULT_FDT_TI_ARGS \ - GET_OVERLAY_MMC_TI_ARGS \ - DFUARGS \ - NETARGS \ - NANDARGS \ BOOTENV /* diff --git a/include/env/ti/dfu.env b/include/env/ti/dfu.env new file mode 100644 index 00000000000..b925730c6f5 --- /dev/null +++ b/include/env/ti/dfu.env @@ -0,0 +1,53 @@ +dfu_alt_info_mmc= + boot part 0 1; + rootfs part 0 2; + MLO fat 0 1; + MLO.raw raw 0x100 0x200; + u-boot.img.raw raw 0x300 0x1000; + u-env.raw raw 0x1300 0x200; + spl-os-args.raw raw 0x1500 0x200; + spl-os-image.raw raw 0x1700 0x6900; + spl-os-args fat 0 1; + spl-os-image fat 0 1; + u-boot.img fat 0 1; + uEnv.txt fat 0 1 + +dfu_alt_info_emmc= + rawemmc raw 0 3751936; + boot part 1 1; + rootfs part 1 2; + MLO fat 1 1; + MLO.raw raw 0x100 0x200; + u-boot.img.raw raw 0x300 0x1000; + u-env.raw raw 0x1300 0x200; + spl-os-args.raw raw 0x1500 0x200; + spl-os-image.raw raw 0x1700 0x6900; + spl-os-args fat 1 1; + spl-os-image fat 1 1; + u-boot.img fat 1 1; + uEnv.txt fat 1 1 + +#if CONFIG_MTD_RAW_NAND +dfu_alt_info_nand= + SPL part 0 1; + SPL.backup1 part 0 2; + SPL.backup2 part 0 3; + SPL.backup3 part 0 4; + u-boot part 0 5; + u-boot-spl-os part 0 6; + kernel part 0 8; + rootfs part 0 9 +#endif + +dfu_alt_info_ram= + kernel ram 0x80200000 0x4000000; + fdt ram 0x80f80000 0x80000; + ramdisk ram 0x81000000 0x4000000 + +dfu_alt_info_qspi= + MLO raw 0x0 0x040000; + u-boot.img raw 0x040000 0x0100000; + u-boot-spl-os raw 0x140000 0x080000; + u-boot-env raw 0x1C0000 0x010000; + u-boot-env.backup raw 0x1D0000 0x010000; + kernel raw 0x1E0000 0x800000 diff --git a/include/fpga.h b/include/fpga.h index a144238e66a..20153b2082a 100644 --- a/include/fpga.h +++ b/include/fpga.h @@ -25,7 +25,6 @@ typedef enum { /* typedef fpga_type */ fpga_min_type, /* range check value */ fpga_xilinx, /* Xilinx Family) */ fpga_altera, /* unimplemented */ - fpga_lattice, /* Lattice family */ fpga_undefined /* invalid range check value */ } fpga_type; /* end, typedef fpga_type */ diff --git a/include/lattice.h b/include/lattice.h deleted file mode 100644 index 80fafc00dcb..00000000000 --- a/include/lattice.h +++ /dev/null @@ -1,298 +0,0 @@ -/* SPDX-License-Identifier: GPL-2.0+ */ -/* - * Porting to U-Boot: - * - * (C) Copyright 2010 - * Stefano Babic, DENX Software Engineering, sbabic@denx.de. - * - * Lattice's ispVME Embedded Tool to load Lattice's FPGA: - * - * Lattice Semiconductor Corp. Copyright 2009 - */ - -#ifndef _VME_OPCODE_H -#define _VME_OPCODE_H - -#define VME_VERSION_NUMBER "12.1" - -/* Maximum declarations. */ - -#define VMEHEXMAX 60000L /* The hex file is split 60K per file. */ -#define SCANMAX 64000L /* The maximum SDR/SIR burst. */ - -/* - * - * Supported JTAG state transitions. - * - */ - -#define RESET 0x00 -#define IDLE 0x01 -#define IRPAUSE 0x02 -#define DRPAUSE 0x03 -#define SHIFTIR 0x04 -#define SHIFTDR 0x05 -/* 11/15/05 Nguyen changed to support DRCAPTURE*/ -#define DRCAPTURE 0x06 - -/* - * Flow control register bit definitions. A set bit indicates - * that the register currently exhibits the corresponding mode. - */ - -#define INTEL_PRGM 0x0001 /* Intelligent programming is in effect. */ -#define CASCADE 0x0002 /* Currently splitting large SDR. */ -#define REPEATLOOP 0x0008 /* Currently executing a repeat loop. */ -#define SHIFTRIGHT 0x0080 /* The next data stream needs a right shift. */ -#define SHIFTLEFT 0x0100 /* The next data stream needs a left shift. */ -#define VERIFYUES 0x0200 /* Continue if fail is in effect. */ - -/* - * DataType register bit definitions. A set bit indicates - * that the register currently holds the corresponding type of data. - */ - -#define EXPRESS 0x0001 /* Simultaneous program and verify. */ -#define SIR_DATA 0x0002 /* SIR is the active SVF command. */ -#define SDR_DATA 0x0004 /* SDR is the active SVF command. */ -#define COMPRESS 0x0008 /* Data is compressed. */ -#define TDI_DATA 0x0010 /* TDI data is present. */ -#define TDO_DATA 0x0020 /* TDO data is present. */ -#define MASK_DATA 0x0040 /* MASK data is present. */ -#define HEAP_IN 0x0080 /* Data is from the heap. */ -#define LHEAP_IN 0x0200 /* Data is from intel data buffer. */ -#define VARIABLE 0x0400 /* Data is from a declared variable. */ -#define CRC_DATA 0x0800 /* CRC data is pressent. */ -#define CMASK_DATA 0x1000 /* CMASK data is pressent. */ -#define RMASK_DATA 0x2000 /* RMASK data is pressent. */ -#define READ_DATA 0x4000 /* READ data is pressent. */ -#define DMASK_DATA 0x8000 /* DMASK data is pressent. */ - -/* - * - * Pin opcodes. - * - */ - -#define signalENABLE 0x1C /* ispENABLE pin. */ -#define signalTMS 0x1D /* TMS pin. */ -#define signalTCK 0x1E /* TCK pin. */ -#define signalTDI 0x1F /* TDI pin. */ -#define signalTRST 0x20 /* TRST pin. */ - -/* - * - * Supported vendors. - * - */ - -#define VENDOR 0x56 -#define LATTICE 0x01 -#define ALTERA 0x02 -#define XILINX 0x03 - -/* - * Opcode definitions. - * - * Note: opcodes must be unique. - */ - -#define ENDDATA 0x00 /* The end of the current SDR data stream. */ -#define RUNTEST 0x01 /* The duration to stay at the stable state. */ -#define ENDDR 0x02 /* The stable state after SDR. */ -#define ENDIR 0x03 /* The stable state after SIR. */ -#define ENDSTATE 0x04 /* The stable state after RUNTEST. */ -#define TRST 0x05 /* Assert the TRST pin. */ -#define HIR 0x06 /* - * The sum of the IR bits of the - * leading devices. - */ -#define TIR 0x07 /* - * The sum of the IR bits of the trailing - * devices. - */ -#define HDR 0x08 /* The number of leading devices. */ -#define TDR 0x09 /* The number of trailing devices. */ -#define ispEN 0x0A /* Assert the ispEN pin. */ -#define FREQUENCY 0x0B /* - * The maximum clock rate to run the JTAG state - * machine. - */ -#define STATE 0x10 /* Move to the next stable state. */ -#define SIR 0x11 /* The instruction stream follows. */ -#define SDR 0x12 /* The data stream follows. */ -#define TDI 0x13 /* The following data stream feeds into - the device. */ -#define TDO 0x14 /* - * The following data stream is compared against - * the device. - */ -#define MASK 0x15 /* The following data stream is used as mask. */ -#define XSDR 0x16 /* - * The following data stream is for simultaneous - * program and verify. - */ -#define XTDI 0x17 /* The following data stream is for shift in - * only. It must be stored for the next - * XSDR. - */ -#define XTDO 0x18 /* - * There is not data stream. The data stream - * was stored from the previous XTDI. - */ -#define MEM 0x19 /* - * The maximum memory needed to allocate in - * order hold one row of data. - */ -#define WAIT 0x1A /* The duration of delay to observe. */ -#define TCK 0x1B /* The number of TCK pulses. */ -#define SHR 0x23 /* - * Set the flow control register for - * right shift - */ -#define SHL 0x24 /* - * Set the flow control register for left shift. - */ -#define HEAP 0x32 /* The memory size needed to hold one loop. */ -#define REPEAT 0x33 /* The beginning of the loop. */ -#define LEFTPAREN 0x35 /* The beginning of data following the loop. */ -#define VAR 0x55 /* Plac holder for loop data. */ -#define SEC 0x1C /* - * The delay time in seconds that must be - * observed. - */ -#define SMASK 0x1D /* The mask for TDI data. */ -#define MAX_WAIT 0x1E /* The absolute maximum wait time. */ -#define ON 0x1F /* Assert the targeted pin. */ -#define OFF 0x20 /* Dis-assert the targeted pin. */ -#define SETFLOW 0x30 /* Change the flow control register. */ -#define RESETFLOW 0x31 /* Clear the flow control register. */ - -#define CRC 0x47 /* - * The following data stream is used for CRC - * calculation. - */ -#define CMASK 0x48 /* - * The following data stream is used as mask - * for CRC calculation. - */ -#define RMASK 0x49 /* - * The following data stream is used as mask - * for read and save. - */ -#define READ 0x50 /* - * The following data stream is used for read - * and save. - */ -#define ENDLOOP 0x59 /* The end of the repeat loop. */ -#define SECUREHEAP 0x60 /* Used to secure the HEAP opcode. */ -#define VUES 0x61 /* Support continue if fail. */ -#define DMASK 0x62 /* - * The following data stream is used for dynamic - * I/O. - */ -#define COMMENT 0x63 /* Support SVF comments in the VME file. */ -#define HEADER 0x64 /* Support header in VME file. */ -#define FILE_CRC 0x65 /* Support crc-protected VME file. */ -#define LCOUNT 0x66 /* Support intelligent programming. */ -#define LDELAY 0x67 /* Support intelligent programming. */ -#define LSDR 0x68 /* Support intelligent programming. */ -#define LHEAP 0x69 /* - * Memory needed to hold intelligent data - * buffer - */ -#define CONTINUE 0x70 /* Allow continuation. */ -#define LVDS 0x71 /* Support LVDS. */ -#define ENDVME 0x7F /* End of the VME file. */ -#define ENDFILE 0xFF /* End of file. */ - -/* - * - * ispVM Embedded Return Codes. - * - */ - -#define VME_VERIFICATION_FAILURE -1 -#define VME_FILE_READ_FAILURE -2 -#define VME_VERSION_FAILURE -3 -#define VME_INVALID_FILE -4 -#define VME_ARGUMENT_FAILURE -5 -#define VME_CRC_FAILURE -6 - -#define g_ucPinTDI 0x01 -#define g_ucPinTCK 0x02 -#define g_ucPinTMS 0x04 -#define g_ucPinENABLE 0x08 -#define g_ucPinTRST 0x10 - -/* - * - * Type definitions. - * - */ - -/* Support LVDS */ -typedef struct { - unsigned short usPositiveIndex; - unsigned short usNegativeIndex; - unsigned char ucUpdate; -} LVDSPair; - -typedef enum { - min_lattice_iface_type, /* insert all new types after this */ - lattice_jtag_mode, /* jtag/tap */ - max_lattice_iface_type /* insert all new types before this */ -} Lattice_iface; - -typedef enum { - min_lattice_type, - Lattice_XP2, /* Lattice XP2 Family */ - max_lattice_type /* insert all new types before this */ -} Lattice_Family; - -typedef struct { - Lattice_Family family; /* part type */ - Lattice_iface iface; /* interface type */ - size_t size; /* bytes of data part can accept */ - void *iface_fns; /* interface function table */ - void *base; /* base interface address */ - int cookie; /* implementation specific cookie */ - char *desc; /* description string */ -} Lattice_desc; /* end, typedef Altera_desc */ - -/* Board specific implementation specific function types */ -typedef void (*Lattice_jtag_init)(void); -typedef void (*Lattice_jtag_set_tdi)(int v); -typedef void (*Lattice_jtag_set_tms)(int v); -typedef void (*Lattice_jtag_set_tck)(int v); -typedef int (*Lattice_jtag_get_tdo)(void); - -typedef struct { - Lattice_jtag_init jtag_init; - Lattice_jtag_set_tdi jtag_set_tdi; - Lattice_jtag_set_tms jtag_set_tms; - Lattice_jtag_set_tck jtag_set_tck; - Lattice_jtag_get_tdo jtag_get_tdo; -} lattice_board_specific_func; - -void writePort(unsigned char pins, unsigned char value); -unsigned char readPort(void); -void sclock(void); -void ispVMDelay(unsigned short int a_usMicroSecondDelay); -void calibration(void); - -int lattice_load(Lattice_desc *desc, const void *buf, size_t bsize); -int lattice_dump(Lattice_desc *desc, const void *buf, size_t bsize); -int lattice_info(Lattice_desc *desc); - -void ispVMStart(void); -void ispVMEnd(void); -extern void ispVMFreeMem(void); -signed char ispVMCode(void); -void ispVMDelay(unsigned short int a_usMicroSecondDelay); -void ispVMCalculateCRC32(unsigned char a_ucData); -unsigned char GetByte(void); -void writePort(unsigned char pins, unsigned char value); -unsigned char readPort(void); -void sclock(void); -#endif diff --git a/include/net-legacy.h b/include/net-legacy.h index a7dbcec1506..9564e97d238 100644 --- a/include/net-legacy.h +++ b/include/net-legacy.h @@ -1,9 +1,8 @@ -/* SPDX-License-Identifier: GPL-2.0 */ +/* SPDX-License-Identifier: GPL-2.0-only */ /* * LiMon Monitor (LiMon) - Network. * * Copyright 1994 - 2000 Neil Russell. - * (See License) * * History * 9/16/00 bor adapted to TQM823L/STK8xxL board, RARP/TFTP boot added @@ -316,7 +315,7 @@ extern u32 net_boot_file_size; /* Boot file size in blocks as reported by the DHCP server */ extern u32 net_boot_file_expected_size_in_blocks; -#if defined(CONFIG_CMD_DNS) +#if defined(CONFIG_DNS) extern char *net_dns_resolve; /* The host to resolve */ extern char *net_dns_env_var; /* the env var to put the ip into */ #endif diff --git a/include/net-lwip.h b/include/net-lwip.h index f54f23471f1..e88e2186635 100644 --- a/include/net-lwip.h +++ b/include/net-lwip.h @@ -18,6 +18,8 @@ extern size_t cacert_size; extern enum auth_mode cacert_auth_mode; extern bool cacert_initialized; +extern int net_try_count; + int set_cacert_builtin(void); enum proto_t { diff --git a/include/net/tftp.h b/include/net/tftp.h index c411c9b2e65..c7e14817280 100644 --- a/include/net/tftp.h +++ b/include/net/tftp.h @@ -1,10 +1,10 @@ +/* SPDX-License-Identifier: GPL-2.0-only */ /* * LiMon - BOOTP/TFTP. * * Copyright 1994, 1995, 2000 Neil Russell. * Copyright 2011 Comelit Group SpA * Luca Ceresoli <luca.ceresoli@comelit.it> - * (See License) */ #ifndef __TFTP_H__ diff --git a/include/power/rk8xx_pmic.h b/include/power/rk8xx_pmic.h index 31221aa46b6..913b6ebe6d9 100644 --- a/include/power/rk8xx_pmic.h +++ b/include/power/rk8xx_pmic.h @@ -212,6 +212,8 @@ enum { #define RK817_POWER_EN_SAVE0 0x99 #define RK817_POWER_EN_SAVE1 0xa4 +#define RK806_RST_FUN_MSK GENMASK(7, 6) + #define RK806_POWER_EN(x) (0x00 + (x)) /* POWER_ENx register lower 4 bits are write-protected unless the associated top bit is set */ #define RK806_POWER_EN_CLRSETBITS(bit, val) (((val) << (bit)) | (1 << ((bit) + 4))) diff --git a/lib/efi_loader/Kconfig b/lib/efi_loader/Kconfig index c2aa88f59fb..900113ca3e9 100644 --- a/lib/efi_loader/Kconfig +++ b/lib/efi_loader/Kconfig @@ -195,6 +195,7 @@ endchoice config EFI_VARIABLES_PRESEED bool "Initial values for UEFI variables" + depends on !COMPILE_TEST depends on !EFI_MM_COMM_TEE help Include a file with the initial values for non-volatile UEFI variables @@ -564,6 +565,7 @@ config EFI_HTTP_BOOT bool "EFI HTTP Boot support" depends on NET || NET_LWIP select CMD_NET + select CMD_DHCP select CMD_DNS select CMD_WGET select BLKMAP diff --git a/lib/lwip/lwip/src/apps/tftp/tftp.c b/lib/lwip/lwip/src/apps/tftp/tftp.c index 63b1e0e0e20..ecb6c55ae11 100644 --- a/lib/lwip/lwip/src/apps/tftp/tftp.c +++ b/lib/lwip/lwip/src/apps/tftp/tftp.c @@ -79,6 +79,14 @@ enum tftp_error { #include <string.h> +struct tftp_req { + ip_addr_t addr; + u16_t port; + u16_t opcode; + enum tftp_transfer_mode mode; + char* fname; +}; + struct tftp_state { const struct tftp_context *ctx; void *handle; @@ -97,14 +105,33 @@ struct tftp_state { }; static struct tftp_state tftp_state; +static struct tftp_req tftp_req; static void tftp_tmr(void *arg); +static void tftp_req_tmr(void *arg); +static const char *mode_to_string(enum tftp_transfer_mode mode); + +static void +clear_req(void) +{ + ip_addr_set_any(0, &tftp_req.addr); + tftp_req.port = 0; + tftp_req.opcode = 0; + free(tftp_req.fname); + tftp_req.fname = NULL; + tftp_req.mode = 0; + + sys_untimeout(tftp_req_tmr, NULL); +} static void close_handle(void) { + clear_req(); + tftp_state.port = 0; ip_addr_set_any(0, &tftp_state.addr); + tftp_state.retries = 0; if (tftp_state.last_data != NULL) { pbuf_free(tftp_state.last_data); @@ -210,6 +237,12 @@ send_ack(const ip_addr_t *addr, u16_t port, u16_t blknum) } static err_t +resend_request(void) +{ + return send_request(&tftp_req.addr, tftp_req.port, tftp_req.opcode, tftp_req.fname, mode_to_string(tftp_req.mode)); +} + +static err_t resend_data(const ip_addr_t *addr, u16_t port) { err_t ret; @@ -336,6 +369,9 @@ tftp_recv(void *arg, struct udp_pcb *upcb, struct pbuf *p, const ip_addr_t *addr tftp_state.last_pkt = tftp_state.timer; tftp_state.retries = 0; + if (tftp_req.fname) + clear_req(); + switch (opcode) { case PP_HTONS(TFTP_RRQ): /* fall through */ case PP_HTONS(TFTP_WRQ): { @@ -542,6 +578,26 @@ tftp_tmr(void *arg) } } +static void +tftp_req_tmr(void *arg) +{ + if (tftp_state.handle == NULL) { + return; + } + + sys_timeout(TFTP_TIMER_MSECS, tftp_req_tmr, NULL); + + if (tftp_state.retries < TFTP_MAX_RETRIES) { + LWIP_DEBUGF(TFTP_DEBUG | LWIP_DBG_STATE, ("tftp: req timeout, retrying\n")); + resend_request(); + tftp_state.retries++; + } else { + LWIP_DEBUGF(TFTP_DEBUG | LWIP_DBG_STATE, ("tftp: req timeout\n")); + tftp_state.ctx->error(tftp_state.handle, -1, "Request timeout", strlen("Request timeout")); + close_handle(); + } +} + /** * Initialize TFTP client/server. * @param mode TFTP mode (client/server) @@ -638,6 +694,20 @@ mode_to_string(enum tftp_transfer_mode mode) } err_t +start_send_requests(const ip_addr_t *addr, u16_t port, u16_t opcode, const char* fname, enum tftp_transfer_mode mode) +{ + tftp_req.addr = *addr; + tftp_req.port = port; + tftp_req.opcode = opcode; + tftp_req.fname = strdup(fname); + tftp_req.mode = mode; + if (!tftp_req.fname) + return ERR_MEM; + sys_timeout(TFTP_TIMER_MSECS, tftp_req_tmr, NULL); + return resend_request(); +} + +err_t tftp_get(void* handle, const ip_addr_t *addr, u16_t port, const char* fname, enum tftp_transfer_mode mode) { LWIP_ERROR("TFTP client is not enabled (tftp_init)", (tftp_state.tftp_mode & LWIP_TFTP_MODE_CLIENT) != 0, return ERR_VAL); @@ -647,7 +717,7 @@ tftp_get(void* handle, const ip_addr_t *addr, u16_t port, const char* fname, enu tftp_state.handle = handle; tftp_state.blknum = 1; tftp_state.mode_write = 1; /* We want to receive data */ - return send_request(addr, port, TFTP_RRQ, fname, mode_to_string(mode)); + return start_send_requests(addr, port, TFTP_RRQ, fname, mode); } err_t @@ -660,7 +730,7 @@ tftp_put(void* handle, const ip_addr_t *addr, u16_t port, const char* fname, enu tftp_state.handle = handle; tftp_state.blknum = 1; tftp_state.mode_write = 0; /* We want to send data */ - return send_request(addr, port, TFTP_WRQ, fname, mode_to_string(mode)); + return start_send_requests(addr, port, TFTP_WRQ, fname, mode); } #endif /* LWIP_UDP */ diff --git a/lib/lwip/lwip/src/core/ipv4/icmp.c b/lib/lwip/lwip/src/core/ipv4/icmp.c index 9a82a67aa93..6d588349c4a 100644 --- a/lib/lwip/lwip/src/core/ipv4/icmp.c +++ b/lib/lwip/lwip/src/core/ipv4/icmp.c @@ -80,9 +80,9 @@ void icmp_input(struct pbuf *p, struct netif *inp) { u8_t type; -#ifdef LWIP_DEBUG +#if defined(LWIP_DEBUG) || defined(ICMP_DEST_UNREACH_CB) u8_t code; -#endif /* LWIP_DEBUG */ +#endif struct icmp_echo_hdr *iecho; const struct ip_hdr *iphdr_in; u16_t hlen; @@ -103,11 +103,11 @@ icmp_input(struct pbuf *p, struct netif *inp) } type = *((u8_t *)p->payload); -#ifdef LWIP_DEBUG +#if defined(LWIP_DEBUG) || defined(ICMP_DEST_UNREACH_CB) code = *(((u8_t *)p->payload) + 1); /* if debug is enabled but debug statement below is somehow disabled: */ LWIP_UNUSED_ARG(code); -#endif /* LWIP_DEBUG */ +#endif switch (type) { case ICMP_ER: /* This is OK, echo reply might have been parsed by a raw PCB @@ -257,6 +257,15 @@ icmp_input(struct pbuf *p, struct netif *inp) default: if (type == ICMP_DUR) { MIB2_STATS_INC(mib2.icmpindestunreachs); +#ifdef ICMP_DEST_UNREACH_CB + /* + * The callback receives the IP packet (not the ICMP message) so that + * it can extract the source address for example + */ + pbuf_add_header(p, IP_HLEN); + ICMP_DEST_UNREACH_CB(code, p); + pbuf_remove_header(p, IP_HLEN); +#endif } else if (type == ICMP_TE) { MIB2_STATS_INC(mib2.icmpintimeexcds); } else if (type == ICMP_PP) { diff --git a/lib/lwip/u-boot/arch/cc.h b/lib/lwip/u-boot/arch/cc.h index 04ab94d6b70..849c79c5a8d 100644 --- a/lib/lwip/u-boot/arch/cc.h +++ b/lib/lwip/u-boot/arch/cc.h @@ -56,4 +56,11 @@ static inline const char *sntp_format_time(time_t t) } #define sntp_format_time sntp_format_time + +#ifdef CONFIG_LWIP_ICMP_SHOW_UNREACH +struct pbuf; +void net_lwip_icmp_dest_unreach(int code, struct pbuf *p); + +#define ICMP_DEST_UNREACH_CB(_c, _p) net_lwip_icmp_dest_unreach(_c, _p) +#endif #endif /* LWIP_ARCH_CC_H */ diff --git a/lib/lwip/u-boot/lwipopts.h b/lib/lwip/u-boot/lwipopts.h index 46af91f9410..80b93ea172d 100644 --- a/lib/lwip/u-boot/lwipopts.h +++ b/lib/lwip/u-boot/lwipopts.h @@ -80,7 +80,11 @@ #define IP_DEFAULT_TTL 255 +#if defined(CONFIG_PROT_ICMP_LWIP) +#define LWIP_ICMP 1 +#else #define LWIP_ICMP 0 +#endif #if defined(CONFIG_PROT_RAW_LWIP) #define LWIP_RAW 1 diff --git a/net/Kconfig b/net/Kconfig index 24508026200..40ec6bbce76 100644 --- a/net/Kconfig +++ b/net/Kconfig @@ -244,11 +244,17 @@ config NET_RANDOM_ETHADDR generated. It will be saved to the appropriate environment variable, too. +config DNS + bool "Enable DNS resolutions" + select PROT_DNS_LWIP if NET_LWIP + help + Selecting this will allow the network stack to use server names + in addition to IP addresses. + config WGET bool "Enable wget" select PROT_TCP if NET select PROT_TCP_LWIP if NET_LWIP - select PROT_DNS_LWIP if NET_LWIP help Selecting this will enable wget, an interface to send HTTP requests via the network stack. diff --git a/net/Makefile b/net/Makefile index d63f62b7c8a..468820186cf 100644 --- a/net/Makefile +++ b/net/Makefile @@ -10,7 +10,7 @@ ifeq ($(CONFIG_NET),y) obj-$(CONFIG_NET) += arp.o obj-$(CONFIG_CMD_BOOTP) += bootp.o obj-$(CONFIG_CMD_CDP) += cdp.o -obj-$(CONFIG_CMD_DNS) += dns.o +obj-$(CONFIG_DNS) += dns.o obj-$(CONFIG_CMD_LINK_LOCAL) += link_local.o obj-$(CONFIG_IPV6) += ndisc.o obj-$(CONFIG_$(PHASE_)DM_ETH) += net.o diff --git a/net/arp.c b/net/arp.c index bc1e25f941f..4801dca6213 100644 --- a/net/arp.c +++ b/net/arp.c @@ -1,9 +1,8 @@ -// SPDX-License-Identifier: GPL-2.0 +// SPDX-License-Identifier: GPL-2.0-only /* * Copied from Linux Monitor (LiMon) - Networking. * * Copyright 1994 - 2000 Neil Russell. - * (See License) * Copyright 2000 Roland Borde * Copyright 2000 Paolo Scaffardi * Copyright 2000-2002 Wolfgang Denk, wd@denx.de diff --git a/net/arp.h b/net/arp.h index c50885fb9a5..882f3ec31fc 100644 --- a/net/arp.h +++ b/net/arp.h @@ -1,9 +1,8 @@ -/* SPDX-License-Identifier: GPL-2.0 */ +/* SPDX-License-Identifier: GPL-2.0-only */ /* * Copied from Linux Monitor (LiMon) - Networking. * * Copyright 1994 - 2000 Neil Russell. - * (See License) * Copyright 2000 Roland Borde * Copyright 2000 Paolo Scaffardi * Copyright 2000-2002 Wolfgang Denk, wd@denx.de diff --git a/net/bootp.c b/net/bootp.c index 95d906e3b2d..19e7453daed 100644 --- a/net/bootp.c +++ b/net/bootp.c @@ -1,8 +1,8 @@ +/* SPDX-License-Identifier: GPL-2.0-only */ /* * Based on LiMon - BOOTP. * * Copyright 1994, 1995, 2000 Neil Russell. - * (See License) * Copyright 2000 Roland Borde * Copyright 2000 Paolo Scaffardi * Copyright 2000-2004 Wolfgang Denk, wd@denx.de diff --git a/net/bootp.h b/net/bootp.h index 68320bf66cf..47c743479e7 100644 --- a/net/bootp.h +++ b/net/bootp.h @@ -1,8 +1,8 @@ +/* SPDX-License-Identifier: GPL-2.0-only */ /* * Copied from LiMon - BOOTP. * * Copyright 1994, 1995, 2000 Neil Russell. - * (See License) * Copyright 2000 Paolo Scaffardi */ diff --git a/net/cdp.c b/net/cdp.c index d4cfc587ee3..6e404981d4a 100644 --- a/net/cdp.c +++ b/net/cdp.c @@ -1,9 +1,8 @@ -// SPDX-License-Identifier: GPL-2.0 +// SPDX-License-Identifier: GPL-2.0-only /* * Copied from Linux Monitor (LiMon) - Networking. * * Copyright 1994 - 2000 Neil Russell. - * (See License) * Copyright 2000 Roland Borde * Copyright 2000 Paolo Scaffardi * Copyright 2000-2002 Wolfgang Denk, wd@denx.de diff --git a/net/cdp.h b/net/cdp.h index 16ccbf4b59e..606fabba957 100644 --- a/net/cdp.h +++ b/net/cdp.h @@ -1,9 +1,8 @@ -/* SPDX-License-Identifier: GPL-2.0 */ +/* SPDX-License-Identifier: GPL-2.0-only */ /* * Copied from Linux Monitor (LiMon) - Networking. * * Copyright 1994 - 2000 Neil Russell. - * (See License) * Copyright 2000 Roland Borde * Copyright 2000 Paolo Scaffardi * Copyright 2000-2002 Wolfgang Denk, wd@denx.de diff --git a/net/lwip/Kconfig b/net/lwip/Kconfig index d28a8a7df94..5789766fe62 100644 --- a/net/lwip/Kconfig +++ b/net/lwip/Kconfig @@ -4,6 +4,16 @@ if NET_LWIP +config LWIP_ICMP_SHOW_UNREACH + bool "Print ICMP Destination Unreachable messages" + default y + depends on CMD_TFTPBOOT || CMD_SNTP + select PROT_ICMP_LWIP + help + Prints a message whenever an ICMP Destination Unreachable message is + received while running a network command that sends requests via UDP. + Enabling this can make troubleshooting easier. + config LWIP_DEBUG bool "Enable debug traces in the lwIP library" help @@ -31,6 +41,9 @@ config PROT_DNS_LWIP bool select PROT_UDP_LWIP +config PROT_ICMP_LWIP + bool + config PROT_RAW_LWIP bool diff --git a/net/lwip/Makefile b/net/lwip/Makefile index 97299d9b542..1b48ae4d508 100644 --- a/net/lwip/Makefile +++ b/net/lwip/Makefile @@ -2,6 +2,8 @@ ccflags-y += -I$(srctree)/lib/lwip/lwip/src/include -I$(srctree)/lib/lwip/u-boot obj-$(CONFIG_$(PHASE_)DM_ETH) += net-lwip.o obj-$(CONFIG_CMD_DHCP) += dhcp.o +obj-$(CONFIG_DNS) += dns.o +obj-$(CONFIG_LWIP_ICMP_SHOW_UNREACH) += icmp_unreach.o obj-$(CONFIG_CMD_TFTPBOOT) += tftp.o obj-$(CONFIG_WGET) += wget.o diff --git a/net/lwip/dns.c b/net/lwip/dns.c new file mode 100644 index 00000000000..9964003195f --- /dev/null +++ b/net/lwip/dns.c @@ -0,0 +1,113 @@ +// SPDX-License-Identifier: GPL-2.0+ +/* Copyright (C) 2024 Linaro Ltd. */ + +#include <command.h> +#include <console.h> +#include <env.h> +#include <lwip/dns.h> +#include <lwip/timeouts.h> +#include <net.h> +#include <time.h> + +#define DNS_RESEND_MS 1000 +#define DNS_TIMEOUT_MS 10000 + +struct dns_cb_arg { + ip_addr_t host_ipaddr; + const char *var; + bool done; +}; + +static void do_dns_tmr(void *arg) +{ + dns_tmr(); +} + +static void dns_cb(const char *name, const ip_addr_t *ipaddr, void *arg) +{ + struct dns_cb_arg *dns_cb_arg = arg; + char *ipstr = ip4addr_ntoa(ipaddr); + + dns_cb_arg->done = true; + + if (!ipaddr) { + printf("DNS: host not found\n"); + dns_cb_arg->host_ipaddr.addr = 0; + return; + } + + dns_cb_arg->host_ipaddr.addr = ipaddr->addr; + + if (dns_cb_arg->var) + env_set(dns_cb_arg->var, ipstr); +} + +static int dns_loop(struct udevice *udev, const char *name, const char *var) +{ + struct dns_cb_arg dns_cb_arg = { }; + struct netif *netif; + ip_addr_t ipaddr; + ulong start; + int ret; + + dns_cb_arg.var = var; + + netif = net_lwip_new_netif(udev); + if (!netif) + return CMD_RET_FAILURE; + + if (net_lwip_dns_init()) { + net_lwip_remove_netif(netif); + return CMD_RET_FAILURE; + } + + dns_cb_arg.done = false; + + ret = dns_gethostbyname(name, &ipaddr, dns_cb, &dns_cb_arg); + + if (ret == ERR_OK) { + dns_cb(name, &ipaddr, &dns_cb_arg); + } else if (ret == ERR_INPROGRESS) { + start = get_timer(0); + sys_timeout(DNS_RESEND_MS, do_dns_tmr, NULL); + do { + net_lwip_rx(udev, netif); + if (dns_cb_arg.done) + break; + if (ctrlc()) { + printf("\nAbort\n"); + break; + } + } while (get_timer(start) < DNS_TIMEOUT_MS); + sys_untimeout(do_dns_tmr, NULL); + } + + net_lwip_remove_netif(netif); + + if (dns_cb_arg.done && dns_cb_arg.host_ipaddr.addr != 0) { + if (!var) + printf("%s\n", ipaddr_ntoa(&ipaddr)); + return CMD_RET_SUCCESS; + } + + return CMD_RET_FAILURE; +} + +int do_dns(struct cmd_tbl *cmdtp, int flag, int argc, char *const argv[]) +{ + char *name; + char *var = NULL; + + if (argc == 1 || argc > 3) + return CMD_RET_USAGE; + + name = argv[1]; + + if (argc == 3) + var = argv[2]; + + if (net_lwip_eth_start() < 0) + return CMD_RET_FAILURE; + + return dns_loop(eth_get_dev(), name, var); +} diff --git a/net/lwip/icmp_unreach.c b/net/lwip/icmp_unreach.c new file mode 100644 index 00000000000..9e8a05f5717 --- /dev/null +++ b/net/lwip/icmp_unreach.c @@ -0,0 +1,38 @@ +// SPDX-License-Identifier: GPL-2.0+ +/* Copyright (C) 2025 Linaro Ltd. */ + +#include <lwip/icmp.h> +#include <lwip/ip4_addr.h> +#include <lwip/pbuf.h> +#include <lwip/prot/ip4.h> + +static const char *code_to_str(int code) +{ + switch (code) { + case ICMP_DUR_NET: + return "network unreachable"; + case ICMP_DUR_HOST: + return "host unreachable"; + case ICMP_DUR_PROTO: + return "protocol unreachable"; + case ICMP_DUR_PORT: + return "port unreachable"; + case ICMP_DUR_FRAG: + return "fragmentation needed and DF set"; + case ICMP_DUR_SR: + return "source route failed"; + default: + break; + } + return "unknown cause"; +} + +void net_lwip_icmp_dest_unreach(int code, struct pbuf *p) +{ + struct ip_hdr *iphdr = (struct ip_hdr *)p->payload; + ip4_addr_t src; + + ip4_addr_copy(src, iphdr->src); + printf("ICMP destination unreachable (%s) from %s\n", + code_to_str(code), ip4addr_ntoa(&src)); +} diff --git a/net/lwip/net-lwip.c b/net/lwip/net-lwip.c index 660ceb10cbe..1a70cedfb58 100644 --- a/net/lwip/net-lwip.c +++ b/net/lwip/net-lwip.c @@ -27,7 +27,7 @@ #if defined(CONFIG_API) || defined(CONFIG_EFI_LOADER) void (*push_packet)(void *, int len) = 0; #endif -static int net_try_count; +int net_try_count; static int net_restarted; int net_restart_wrap; static uchar net_pkt_buf[(PKTBUFSRX) * PKTSIZE_ALIGN + PKTALIGN]; @@ -147,7 +147,7 @@ static int get_udev_ipv4_info(struct udevice *dev, ip4_addr_t *ip, */ int net_lwip_dns_init(void) { -#if CONFIG_IS_ENABLED(CMD_DNS) +#if CONFIG_IS_ENABLED(DNS) bool has_server = false; ip_addr_t ns; char *nsenv; @@ -364,7 +364,7 @@ int net_lwip_rx(struct udevice *udev, struct netif *netif) */ int net_lwip_dns_resolve(char *name_or_ip, ip_addr_t *ip) { -#if defined(CONFIG_CMD_DNS) +#if defined(CONFIG_DNS) char *var = "_dnsres"; char *argv[] = { "dns", name_or_ip, var, NULL }; int argc = ARRAY_SIZE(argv) - 1; @@ -373,7 +373,7 @@ int net_lwip_dns_resolve(char *name_or_ip, ip_addr_t *ip) if (ipaddr_aton(name_or_ip, ip)) return 0; -#if defined(CONFIG_CMD_DNS) +#if defined(CONFIG_DNS) if (do_dns(NULL, 0, argc, argv) != CMD_RET_SUCCESS) return -1; diff --git a/net/net.c b/net/net.c index 5219367e391..f579f6ac5bc 100644 --- a/net/net.c +++ b/net/net.c @@ -1,9 +1,8 @@ -// SPDX-License-Identifier: GPL-2.0 +// SPDX-License-Identifier: GPL-2.0-only /* * Copied from Linux Monitor (LiMon) - Networking. * * Copyright 1994 - 2000 Neil Russell. - * (See License) * Copyright 2000 Roland Borde * Copyright 2000 Paolo Scaffardi * Copyright 2000-2002 Wolfgang Denk, wd@denx.de @@ -115,7 +114,7 @@ #include "bootp.h" #include "cdp.h" #include "dhcpv6.h" -#if defined(CONFIG_CMD_DNS) +#if defined(CONFIG_DNS) #include "dns.h" #endif #include "link_local.h" @@ -288,7 +287,7 @@ static int on_vlan(const char *name, const char *value, enum env_op op, } U_BOOT_ENV_CALLBACK(vlan, on_vlan); -#if defined(CONFIG_CMD_DNS) +#if defined(CONFIG_DNS) static int on_dnsip(const char *name, const char *value, enum env_op op, int flags) { @@ -582,7 +581,7 @@ restart: nc_start(); break; #endif -#if defined(CONFIG_CMD_DNS) +#if defined(CONFIG_DNS) case DNS: dns_start(); break; @@ -1507,7 +1506,7 @@ static int net_check_prereq(enum proto_t protocol) } goto common; #endif -#if defined(CONFIG_CMD_DNS) +#if defined(CONFIG_DNS) case DNS: if (net_dns_server.s_addr == 0) { puts("*** ERROR: DNS server address not given\n"); @@ -1540,7 +1539,7 @@ static int net_check_prereq(enum proto_t protocol) return 1; } #if defined(CONFIG_CMD_PING) || \ - defined(CONFIG_CMD_DNS) || defined(CONFIG_PROT_UDP) + defined(CONFIG_DNS) || defined(CONFIG_PROT_UDP) common: #endif /* Fall through */ diff --git a/net/net_rand.h b/net/net_rand.h index 686e85f2b53..e21dff8569b 100644 --- a/net/net_rand.h +++ b/net/net_rand.h @@ -1,8 +1,8 @@ +/* SPDX-License-Identifier: GPL-2.0-only */ /* * Copied from LiMon - BOOTP. * * Copyright 1994, 1995, 2000 Neil Russell. - * (See License) * Copyright 2000 Paolo Scaffardi */ diff --git a/net/ping.c b/net/ping.c index 075df3663fe..fb981f62084 100644 --- a/net/ping.c +++ b/net/ping.c @@ -1,9 +1,8 @@ -// SPDX-License-Identifier: GPL-2.0 +// SPDX-License-Identifier: GPL-2.0-only /* * Copied from Linux Monitor (LiMon) - Networking. * * Copyright 1994 - 2000 Neil Russell. - * (See License) * Copyright 2000 Roland Borde * Copyright 2000 Paolo Scaffardi * Copyright 2000-2002 Wolfgang Denk, wd@denx.de diff --git a/net/ping.h b/net/ping.h index 76ac225fc07..739f128408e 100644 --- a/net/ping.h +++ b/net/ping.h @@ -1,9 +1,8 @@ -/* SPDX-License-Identifier: GPL-2.0 */ +/* SPDX-License-Identifier: GPL-2.0-only */ /* * Copied from Linux Monitor (LiMon) - Networking. * * Copyright 1994 - 2000 Neil Russell. - * (See License) * Copyright 2000 Roland Borde * Copyright 2000 Paolo Scaffardi * Copyright 2000-2002 Wolfgang Denk, wd@denx.de diff --git a/net/wget.c b/net/wget.c index 428ee072330..d3642958bf0 100644 --- a/net/wget.c +++ b/net/wget.c @@ -393,7 +393,7 @@ int wget_do_request(ulong dst_addr, char *uri) if (string_to_ip(host_name).s_addr) { s = host_name; } else { -#if IS_ENABLED(CONFIG_CMD_DNS) +#if IS_ENABLED(CONFIG_DNS) net_dns_resolve = host_name; net_dns_env_var = "httpserverip"; if (net_loop(DNS) < 0) { diff --git a/tools/buildman/buildman.rst b/tools/buildman/buildman.rst index 8c45a841024..9e850b26ec0 100644 --- a/tools/buildman/buildman.rst +++ b/tools/buildman/buildman.rst @@ -6,7 +6,7 @@ Buildman build tool Quick-start ----------- -If you just want to quickly set up buildman so you can build something (for +If you just want to quickly set up Buildman so you can build something (for example Raspberry Pi 2): .. code-block:: bash @@ -22,12 +22,12 @@ example Raspberry Pi 2): What is this? ------------- -This tool handles building U-Boot to check that you have not broken it -with your patch series. It can build each individual commit and report -which boards fail on which commits, and which errors come up. It aims -to make full use of multi-processor machines. +This tool builds U-Boot to check that you have not broken it with your +patch series. It can build each individual commit and report which boards +fail on which commits, and which errors come up. It aims to make full use +of multi-processor machines. -A key feature of buildman is its output summary, which allows warnings, +A key feature of Buildman is its output summary, which allows warnings, errors or image size increases in a particular commit or board to be quickly identified and the offending commit pinpointed. This can be a big help for anyone working with >10 patches at a time. @@ -63,7 +63,7 @@ can be run repeatedly on the same branch after making changes to commits on that branch. In this case it will automatically rebuild commits which have changed (and remove its old results for that commit). It is possible to build a branch for one board, then later build it for another board. This adds to -the output, so now you have results for two boards. If you want buildman to +the output, so now you have results for two boards. If you want Buildman to re-build a commit it has already built (e.g. because of a toolchain update), use the -f flag. @@ -81,9 +81,9 @@ a time. A thread starts at the first commit, configures the source for your board and builds it. Then it checks out the next commit and does an incremental build (i.e. not using 'make xxx_defconfig' unless you use -C). Eventually the thread reaches the last commit and stops. If a commit causes -an error or warning, buildman will try it again after reconfiguring (but see +an error or warning, Buildman will try it again after reconfiguring (but see -Q). Thus some commits may be built twice, with the first result silently -discarded. Lots of errors and warnings will causes lots of reconfigures and your +discarded. Lots of errors and warnings will cause lots of reconfigures and your build will be very slow. This is because a file that produces just a warning would not normally be rebuilt in an incremental build. Once a thread finishes building all the commits for a board, it starts on the commits for another @@ -100,14 +100,14 @@ threads do not affect the state of your git repository. Any checkouts done by the thread affect only the working directory for that thread. Buildman automatically selects the correct tool chain for each board. You -must supply suitable tool chains (see --fetch-arch), but buildman takes care -of selecting the right one. +must supply suitable tool chains (see ``--fetch-arch``), but Buildman takes +care of selecting the right one. Buildman generally builds a branch (with the -b flag), and in this case builds the upstream commit as well, for comparison. So even if you have one commit in your branch, two commits will be built. Put all your commits in a branch, set the branch's upstream to a valid value, and all will be well. -Otherwise buildman will perform random actions. Use -n to check what the +Otherwise Buildman will perform random actions. Use -n to check what the random actions might be. Buildman effectively has two modes: without -s it builds, with -s it @@ -115,7 +115,7 @@ summarises the results of previous (or active) builds. If you just want to build the current source tree, leave off the -b flag. This will display results and errors as they happen. You can still look at -them later using -se. Note that buildman will assume that the source has +them later using -se. Note that Buildman will assume that the source has changed, and will build all specified boards in this case. Buildman is optimised for building many commits at once, for many boards. @@ -153,9 +153,9 @@ You can also use -x to specifically exclude some boards. For example: means to build all arm boards except nvidia, freescale and anything ending with 'ball'. -For building specific boards you can use the --boards (or --bo) option, which -takes a comma-separated list of board target names and be used multiple times -on the command line: +For building specific boards you can use the ``--boards`` (or ``--bo``) option, +which takes a comma-separated list of board target names and can be used +multiple times on the command line: .. code-block:: bash @@ -183,7 +183,7 @@ Setting up git checkout -b my-branch origin/master # Add some commits to the branch, reading for testing -#. Create ~/.buildman to tell buildman where to find tool chains (see +#. Create ~/.buildman to tell Buildman where to find tool chains (see buildman_settings_ for details). As an example:: # Buildman settings file @@ -212,7 +212,7 @@ Setting up The toolchain-alias section indicates that the i386 toolchain should be used to build x86 commits. - Note that you can also specific exactly toolchain prefixes if you like:: + Note that you can also specify toolchain prefixes if you like:: [toolchain-prefix] arm: /opt/arm-eabi-4.6/bin/arm-eabi- @@ -222,18 +222,18 @@ Setting up [toolchain-prefix] arm: /opt/arm-eabi-4.6/bin/arm-eabi-gcc - This tells buildman that you want to use this exact toolchain for the arm + This tells Buildman that you want to use this exact toolchain for the arm architecture. This will override any toolchains found by searching using the [toolchain] settings. - Since the toolchain prefix is an explicit request, buildman will report an + Since the toolchain prefix is an explicit request, Buildman will report an error if a toolchain is not found with that prefix. The current PATH will be searched, so it is possible to use:: [toolchain-prefix] arm: arm-none-eabi- - and buildman will find arm-none-eabi-gcc in /usr/bin if you have it + and Buildman will find arm-none-eabi-gcc in /usr/bin if you have it installed. Another example:: @@ -241,11 +241,11 @@ Setting up [toolchain-wrapper] wrapper: ccache - This tells buildman to use a compiler wrapper in front of CROSS_COMPILE. In + This tells Buildman to use a compiler wrapper in front of CROSS_COMPILE. In this example, ccache. It doesn't affect the toolchain scan. The wrapper is - added when CROSS_COMPILE environtal variable is set. The name in this - section is ignored. If more than one line is provided, only the last one - is taken. + added when the CROSS_COMPILE environment variable is set. The tag name in + this section is not important. If more than one line is provided, only the + last one is used. #. Make sure you have the required Python pre-requisites @@ -440,7 +440,7 @@ Setting up You can download toolchains and update the [toolchain] section of the settings file to find them. - To make this easier, buildman can automatically download and install + To make this easier, Buildman can automatically download and install toolchains from kernel.org. First list the available architectures:: $ ./tools/buildman/buildman --fetch-arch list @@ -476,15 +476,28 @@ Setting up Buildman should now be set up to use your new toolchain. - At the time of writing, U-Boot has these architectures: + At the time of writing, U-Boot supports these architectures: - arc, arm, m68k, microblaze, mips, nios2, powerpc, sandbox, sh, x86, xtensa + - ARC (arc) + - ARM (arm) + - Motorola 68k (m68k) + - MicroBlaze (microblaze) + - MIPS (mips) + - Nios II (nios2) + - PowerPC (powerpc) + - RISC-V (riscv) + - Sandbox (sandbox) + - SuperH (sh) + - x86 (x86) + - Xtensa (xtensa) + + Each entry list the architecture's name, followed by its code name in U-Boot. How to run it ------------- -First do a dry run using the -n flag: (replace <branch> with a real, local +First do a dry run using the -n flag (replace <branch> with a real, local branch with a valid upstream): .. code-block:: bash @@ -492,7 +505,7 @@ branch with a valid upstream): ./tools/buildman/buildman -b <branch> -n If it can't detect the upstream branch, try checking out the branch, and -doing something like 'git branch --set-upstream-to upstream/master' +doing something like ``git branch --set-upstream-to upstream/master`` or something similar. Buildman will try to guess a suitable upstream branch if it can't find one (you will see a message like "Guessing upstream as ..."). You can also use the -c option to manually specify the number of commits to @@ -528,7 +541,7 @@ As an example:: This shows that it will build all 1059 boards, using 4 threads (because we have a 4-core CPU). Each thread will run with -j1, meaning that each make job will use a single CPU. The list of commits to be built helps you -confirm that things look about right. Notice that buildman has chosen a +confirm that things look about right. Notice that Buildman has chosen a 'base' directory for you, immediately above your source tree. Buildman works entirely inside the base directory, here ../lcd9b, @@ -640,7 +653,7 @@ But if you did want to see just the errors for lubbock, use: If you see error lines marked with '-', that means that the errors were fixed by that commit. Sometimes commits can be in the wrong order, so that a breakage is introduced for a few commits and fixed by later commits. This -shows up clearly with buildman. You can then reorder the commits and try +shows up clearly with Buildman. You can then reorder the commits and try again. At commit 16, the error moves: you can see that the old error at line 120 @@ -670,7 +683,7 @@ err Output from stderr, if any. Errors and warnings appear here. log - Output from stdout. Normally there isn't any since buildman runs in silent + Output from stdout. Normally there isn't any since Buildman runs in silent mode. Use -V to force a verbose build (this passes V=1 to 'make') toolchain @@ -731,17 +744,17 @@ Note that the 'text' region and 'rodata' are split out. You should add the two together to get the total read-only size (reported as the first column in the output from binutil's 'size' utility). -A useful option is --step which lets you skip some commits. For example ---step 2 will show the image sizes for only every 2nd commit (so it will +A useful option is ``--step`` which lets you skip some commits. For example +``--step 2`` will show the image sizes for only every 2nd commit (so it will compare the image sizes of the 1st, 3rd, 5th... commits). You can also use ---step 0 which will compare only the first and last commits. This is useful +``--step 0`` which will compare only the first and last commits. This is useful for an overview of how your entire series affects code size. It will build only the upstream commit and your final branch commit. You can also use -d to see a detailed size breakdown for each board. This list is sorted in order from largest growth to largest reduction. -It is even possible to go a little further with the -B option (--bloat). This +It is even possible to go a little further with the -B option (``--bloat``). This shows where U-Boot has bloated, breaking the size change down to the function level. Example output is below:: @@ -898,7 +911,7 @@ The .buildman settings file The .buildman file provides information about the available toolchains and also allows build flags to be passed to 'make'. It consists of several -sections, with the section name in square brackets. Within each section are +sections, with the section name in square brackets. Within each section there are a set of (tag, value) pairs. '[global]' section @@ -924,8 +937,8 @@ a set of (tag, value) pairs. This lists the available toolchains. The tag here doesn't matter, but make sure it is unique. The value is the path to the toolchain. Buildman will look in that path for a file ending in 'gcc'. It will then execute - it to check that it is a C compiler, passing only the --version flag to - it. If the return code is 0, buildman assumes that it is a valid C + it to check that it is a C compiler, passing only the ``--version`` flag to + it. If the return code is 0, Buildman assumes that it is a valid C compiler. It uses the first part of the name as the architecture and strips off the last part when setting the CROSS_COMPILE environment variable (parts are delimited with a hyphen). @@ -939,8 +952,7 @@ a set of (tag, value) pairs. '[toolchain-prefix]' section This can be used to provide the full toolchain-prefix for one or more architectures. The full CROSS_COMPILE prefix must be provided. These - typically have a higher priority than matches in the '[toolchain]', due to - this prefix. + typically have a higher priority than matches in the '[toolchain]'. The tilde character ``~`` is supported in paths, to represent the home directory. @@ -949,12 +961,12 @@ a set of (tag, value) pairs. This converts toolchain architecture names to U-Boot names. For example, if an x86 toolchains is called i386-linux-gcc it will not normally be used for architecture 'x86'. Adding 'x86: i386 x86_64' to this section - will tell buildman that the i386 and x86_64 toolchains can be used for + will tell Buildman that the i386 and x86_64 toolchains can be used for the x86 architecture. '[make-flags]' section U-Boot's build system supports a few flags (such as BUILD_TAG) which - affect the build product. These flags can be specified in the buildman + affect the build product. These flags can be specified in the Buildman settings file. They can also be useful when building U-Boot against other open source software. @@ -983,7 +995,7 @@ Quick Sanity Check ------------------ If you have made changes and want to do a quick sanity check of the -currently checked-out source, run buildman without the -b flag. This will +currently checked-out source, run Buildman without the -b flag. This will build the selected boards and display build status as it runs (i.e. -v is enabled automatically). Use -e to see errors/warnings as well. @@ -1002,29 +1014,29 @@ will build commits in us-buildman that are not in upstream/master. Building Faster --------------- -By default, buildman doesn't execute 'make mrproper' prior to building the +By default, Buildman doesn't execute 'make mrproper' prior to building the first commit for each board. This reduces the amount of work 'make' does, and hence speeds up the build. To force use of 'make mrproper', use -the -m flag. -This flag will slow down any buildman invocation, since it increases the amount -of work done on any build. An alternative is to use the --fallback-mrproper +This flag will slow down any Buildman invocation, since it increases the amount +of work done on any build. An alternative is to use the ``--fallback-mrproper`` flag, which retries the build with 'make mrproper' only after a build failure. -One possible application of buildman is as part of a continual edit, build, -edit, build, ... cycle; repeatedly applying buildman to the same change or +One possible application of Buildman is as part of a continual edit, build, +edit, build, ... cycle; repeatedly applying Buildman to the same change or series of changes while making small incremental modifications to the source each time. This provides quick feedback regarding the correctness of recent -modifications. In this scenario, buildman's default choice of build directory +modifications. In this scenario, Buildman's default choice of build directory causes more build work to be performed than strictly necessary. -By default, each buildman thread uses a single directory for all builds. When a +By default, each Buildman thread uses a single directory for all builds. When a thread builds multiple boards, the configuration built in this directory will cycle through various different configurations, one per board built by the thread. Variations in the configuration will force a rebuild of affected source -files when a thread switches between boards. Ideally, such buildman-induced +files when a thread switches between boards. Ideally, such Buildman-induced rebuilds would not happen, thus allowing the build to operate as efficiently as -the build system and source changes allow. buildman's -P flag may be used to +the build system and source changes allow. Buildman's -P flag may be used to enable this; -P causes each board to be built in a separate (board-specific) -directory, thus avoiding any buildman-induced configuration changes in any +directory, thus avoiding any Buildman-induced configuration changes in any build directory. U-Boot's build system embeds information such as a build timestamp into the @@ -1041,9 +1053,9 @@ of the source tree, thus allowing rapid tested evolution of the code:: ./tools/buildman/buildman -Pr tegra -Note also the `--dtc-skip` option which uses the system device-tree compiler to +Note also the ``--dtc-skip`` option which uses the system device-tree compiler to avoid needing to build it for each board. This can save 10-20% of build time. -An alternative is to set DTC=/path/to/dtc when running buildman. +An alternative is to set DTC=/path/to/dtc when running Buildman. Checking configuration ---------------------- @@ -1062,7 +1074,7 @@ For example:: + u-boot.cfg: CONFIG_SPL_ENV_SUPPORT=1 CONFIG_SPL_NET=1 + u-boot-spl.cfg: CONFIG_SPL_MMC=1 CONFIG_SPL_NAND_SUPPORT=1 + all: CONFIG_SPL_ENV_SUPPORT=1 CONFIG_SPL_MMC=1 CONFIG_SPL_NAND_SUPPORT=1 CONFIG_SPL_NET=1 - am335x_evm_usbspl : + am335x_evm_usbspl: + u-boot.cfg: CONFIG_SPL_ENV_SUPPORT=1 CONFIG_SPL_NET=1 + u-boot-spl.cfg: CONFIG_SPL_MMC=1 CONFIG_SPL_NAND_SUPPORT=1 + all: CONFIG_SPL_ENV_SUPPORT=1 CONFIG_SPL_MMC=1 CONFIG_SPL_NAND_SUPPORT=1 CONFIG_SPL_NET=1 @@ -1073,15 +1085,15 @@ This shows that commit 44 enabled three new options for the board am335x_evm_usbspl which were not enabled in commit 43. There is also a summary for 'arm' showing all the changes detected for that architecture. In this case there is only one board with changes, so 'arm' output is the -same as 'am335x_evm_usbspl'/ +same as 'am335x_evm_usbspl'. The -K option uses the u-boot.cfg, spl/u-boot-spl.cfg and tpl/u-boot-tpl.cfg files which are produced by a build. If all you want is to check the -configuration you can in fact avoid doing a full build, using --config-only. -This tells buildman to configuration U-Boot and create the .cfg files, but not +configuration you can in fact avoid doing a full build, using ``--config-only``. +This tells Buildman to configure U-Boot and create the .cfg files, but not actually build the source. This is 5-10 times faster than doing a full build. -By default buildman considers the follow two configuration methods +By default Buildman considers the following two configuration methods equivalent:: #define CONFIG_SOME_OPTION @@ -1089,9 +1101,9 @@ equivalent:: CONFIG_SOME_OPTION=y The former would appear in a header filer and the latter in a defconfig -file. The achieve this, buildman considers 'y' to be '1' in configuration +file. To achieve this, Buildman considers 'y' to be '1' in configuration variables. This avoids lots of useless output when converting a CONFIG -option to Kconfig. To disable this behaviour, use --squash-config-y. +option to Kconfig. To disable this behaviour, use ``--squash-config-y``. Checking the environment @@ -1120,7 +1132,7 @@ and 'brppt1_spi', removing a trailing semicolon. 'brppt1_nand' gained an a value for 'altbootcmd', but lost one for ' altbootcmd'. The -U option uses the u-boot.env files which are produced by a build. -Internally, buildman writes out an out-env file into the build directory for +Internally, Buildman writes out an out-env file into the build directory for later comparison. defconfig fragments @@ -1166,7 +1178,7 @@ Link-time optimisation (LTO) is designed to reduce code size by globally optimising the U-Boot build. Unfortunately this can dramatically slow down builds. This is particularly noticeable when running a lot of builds. -Use the -L (--no-lto) flag to disable LTO. +Use the -L (``--no-lto``) flag to disable LTO. .. code-block:: bash @@ -1176,7 +1188,7 @@ Use the -L (--no-lto) flag to disable LTO. Doing a simple build -------------------- -In some cases you just want to build a single board and get the full output, use +In case you want to build a single board and get the full output, use the -w option, for example: .. code-block:: bash @@ -1190,13 +1202,13 @@ specify the output directory with -o when using -w. Support for IDEs (Integrated Development Environments) ------------------------------------------------------ -Normally buildman summarises the output and shows information indicating the +Normally Buildman summarises the output and shows information indicating the meaning of each line of output. For example a '+' symbol appears at the start of -each error line. Also, buildman prints information about what it is about to do, +each error line. Also, Buildman prints information about what it is about to do, along with a summary at the end. -When using buildman from an IDE, it is helpful to drop this behaviour. Use the --I/--ide option for that. You might find -W helpful also so that warnings do +When using Buildman from an IDE, it is helpful to drop this behaviour. Use the +``-I/--ide`` option for that. You might also find -W helpful so that warnings do not cause the build to fail: .. code-block:: bash @@ -1215,12 +1227,12 @@ Typically a missing external blob causes a build failure. For build testing of a lot of boards, or boards for which you do not have the blobs, you can use the -M flag to allow missing blobs. This marks the build as if it succeeded, although with warnings shown, including 'Some images are invalid'. If any boards -fail in this way, buildman exits with status 101. +fail in this way, Buildman exits with status 101. -To convert warnings to errors, use -E. To make buildman return success with +To convert warnings to errors, use -E. To make Buildman return success with these warnings, use -W. -It is generally safe to default to enabling -M for all runs of buildman, so long +It is generally safe to default to enabling -M for all runs of Buildman, so long as you check the exit code. To do this, add:: allow-missing = "always" @@ -1261,11 +1273,12 @@ Some options have values, in which case you can change them: buildman -a 'BOOTCOMMAND="echo hello"' CONFIG_SYS_LOAD_ADDR=0x1000 -Note that you must put quotes around string options and the whole thing must be -in single quotes, to make sure the shell leave it alone. +Note that you must put quotes around string options and the whole argument must +be in single quotes to ensure that the shell recognizes it as a single +argument. If you try to set an option that does not exist, or that cannot be changed for -some other reason (e.g. it is 'selected' by another option), then buildman +some other reason (e.g. it is 'selected' by another option), then Buildman shows an error:: $ buildman --board sandbox -a FRED @@ -1279,18 +1292,18 @@ shows an error:: FRED Missing expected line: CONFIG_FRED=y -One major caveat with this feature with branches (-b) is that buildman does not +One major caveat with this feature with branches (-b) is that Buildman does not name the output directories differently when you change the configuration, so -doing the same build again with different configuration will not trigger a -rebuild. You can use -f to work around that. +re-launching Buildman with an updated configuration will not trigger a rebuild. +You can use -f to work around that. Other options ------------- -Buildman has various other command-line options. Try --help to see them. +Buildman has various other command-line options. Try ``--help`` to see them. -To find out what toolchain prefix buildman will use for a build, use the -A +To find out what toolchain prefix Buildman will use for a build, use the -A option. To request that compiler warnings be promoted to errors, use -E. This passes the @@ -1313,29 +1326,29 @@ warnings are found. Note that it can be useful to combine -E and -W. This means that all compiler warnings will produce failures (code 100) and all other warnings will produce success (since 101 is changed to 0). -If there are both warnings and errors, errors win, so buildman returns 100. +If there are both warnings and errors, errors win, so Buildman returns 100. The -y option is provided (for use with -s) to ignore the bountiful device-tree -warnings. Similarly, -Y tells buildman to ignore the migration warnings. +warnings. Similarly, -Y tells Buildman to ignore the migration warnings. -Sometimes you might get an error in a thread that is not handled by buildman, +Sometimes you might get an error in a thread that is not handled by Buildman, perhaps due to a failure of a tool that it calls. You might see the output, but -then buildman hangs. Failing to handle any eventuality is a bug in buildman and +then Buildman hangs. Failing to handle any eventuality is a bug in Buildman and should be reported. But you can use -T0 to disable threading and hopefully figure out the root cause of the build failure. -For situations where buildman is invoked from multiple running processes, it is -sometimes useful to have buildman wait until the others have finished. Use the ---process-limit option for this: --process-limit 1 will allow only one buildman -to process jobs at a time. +For situations where Buildman is invoked from multiple running processes, it is +sometimes useful to have Buildman wait until the others have finished. Use the +``--process-limit`` option for this: ``--process-limit 1`` will allow only one +Buildman to process jobs at a time. To build a particular target, rather than the default U-Boot target, use the -`--target` option. This is unlikely to be useful unless you are building a +``--target`` option. This is unlikely to be useful unless you are building a single board. Buildman normally builds out-of-tree, meaning that the source directory is not disturbed by the build. Use `-i` to do an in-tree build instead. Note that this -does not affect the source directory, since buildman creates a separate git +does not affect the source directory, since Buildman creates a separate git 'worktree' for each board. This means that it is possible to do an in-tree build of an entire branch, or even a 'current source' build for multiple boards. As a special case, you can use `-wi` to do an in-tree build in the current @@ -1344,7 +1357,7 @@ directory. Build summary ------------- -When buildman finishes it shows a summary, something like this:: +When Buildman finishes, it displays a summary, similar to the following: Completed: 5 total built, duration 0:00:21, rate 0.24 @@ -1357,14 +1370,14 @@ U-Boot build. Using boards.cfg ---------------- -This file is no-longer needed by buildman but it is still generated in the +This file is no-longer needed by Buildman but it is still generated in the working directory. This helps avoid a delay on every build, since scanning all -the Kconfig files takes a few seconds. Use the `-R <filename>` flag to force -regeneration of the file - in that case buildman exits after writing the file +the Kconfig files takes a few seconds. Use the ``-R <filename>`` flag to force +regeneration of the file - in that case Buildman exits after writing the file with exit code 2 if there was an error in the maintainer files. To use the default filename, use a hyphen, i.e. `-R -`. -You should use 'buildman -nv <criteria>' instead of greoing the boards.cfg file, +You should use 'buildman -nv <criteria>' instead of greping the boards.cfg file, since it may be dropped altogether in future. @@ -1372,16 +1385,16 @@ Checking maintainers -------------------- Sometimes a board is added without a corresponding entry in a MAINTAINERS file. -Use the `--maintainer-check` option to check this:: +Use the ``--maintainer-check`` option to check this:: $ buildman --maintainer-check WARNING: board/mikrotik/crs3xx-98dx3236/MAINTAINERS: missing defconfig ending at line 7 WARNING: no maintainers for 'clearfog_spi' -Buildman returns with an exit code of 2 if there area any warnings. +Buildman returns with an exit code of 2 if there are any warnings. -An experimental `--full-check option` also checks for boards which don't have a -CONFIG_TARGET_xxx where xxx corresponds to their defconfig filename. This is +An experimental ``--full-check option`` also checks for boards which don't have +a CONFIG_TARGET_xxx where xxx corresponds to their defconfig filename. This is not strictly necessary, but may be useful information. |