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-rw-r--r--.gitignore6
-rw-r--r--.gitlab-ci.yml56
-rw-r--r--Makefile1
-rw-r--r--arch/arm/cpu/armv7/Kconfig2
-rw-r--r--arch/arm/mach-imx/imx9/scmi/clock_scmi.c2
-rw-r--r--common/qfw.c2
-rw-r--r--configs/omap3_evm_defconfig1
-rw-r--r--doc/build/docker.rst2
-rw-r--r--doc/develop/pytest/usage.rst21
-rw-r--r--drivers/clk/clk_scmi.c160
-rw-r--r--drivers/firmware/scmi/sandbox-scmi_agent.c4
-rw-r--r--drivers/firmware/scmi/smt.c14
-rw-r--r--drivers/gpio/Kconfig1
-rw-r--r--drivers/i2c/muxes/i2c-mux-uclass.c4
-rw-r--r--drivers/pinctrl/renesas/pfc-r8a779g0.c100
-rw-r--r--drivers/pinctrl/renesas/pfc-r8a779h0.c6
-rw-r--r--drivers/scsi/scsi.c7
-rw-r--r--drivers/usb/Kconfig2
-rw-r--r--drivers/usb/gadget/Kconfig3
-rw-r--r--drivers/usb/host/xhci-brcm.c2
-rw-r--r--drivers/usb/host/xhci-exynos5.c2
-rw-r--r--drivers/usb/host/xhci-generic.c2
-rw-r--r--drivers/usb/host/xhci-mtk.c2
-rw-r--r--drivers/usb/host/xhci-mvebu.c2
-rw-r--r--drivers/usb/host/xhci-rcar.c2
-rw-r--r--drivers/usb/musb/Kconfig20
-rw-r--r--drivers/usb/musb/Makefile9
-rw-r--r--drivers/usb/musb/am35x.c138
-rw-r--r--drivers/usb/musb/am35x.h81
-rw-r--r--drivers/usb/musb/musb_core.c150
-rw-r--r--drivers/usb/musb/musb_core.h343
-rw-r--r--drivers/usb/musb/musb_debug.h191
-rw-r--r--drivers/usb/musb/musb_hcd.c1161
-rw-r--r--drivers/usb/musb/musb_hcd.h93
-rw-r--r--drivers/usb/musb/musb_udc.c953
-rw-r--r--drivers/usb/musb/omap3.c129
-rw-r--r--drivers/usb/musb/omap3.h38
-rw-r--r--include/dm/root.h2
-rw-r--r--include/scmi_protocols.h37
-rw-r--r--lib/efi_client/efi_app.c1
-rw-r--r--lib/efi_client/efi_stub.c2
-rw-r--r--lib/efi_loader/efi_firmware.c16
-rw-r--r--lib/efi_loader/efi_ipconfig.c4
-rw-r--r--lib/efi_selftest/efi_selftest_console.c44
-rw-r--r--lib/efi_selftest/efi_selftest_snp.c2
-rw-r--r--tools/docker/Dockerfile2
46 files changed, 265 insertions, 3557 deletions
diff --git a/.gitignore b/.gitignore
index 1ac737d2718..2bf86a6b5d6 100644
--- a/.gitignore
+++ b/.gitignore
@@ -73,15 +73,15 @@ fit-dtb.blob*
/defconfig
/generated_defconfig
/Test*
-/capsule.*.efi-capsule
+/capsule*.efi-capsule
/capsule*.map
/keep-syms-lto.*
/*imx8mimage*
/*imx8mcst*
/*rcar4-sa0*
/drivers/video/u_boot_logo.S
-/test/overlay/test-fdt-overlay.dtbo.S
-/test/overlay/test-fdt-overlay-stacked.dtbo.S
+/test/fdt_overlay/test-fdt-overlay-stacked.dtbo.S
+/test/fdt_overlay/test-fdt-overlay.dtbo.S
capsule_esl_file
#
diff --git a/.gitlab-ci.yml b/.gitlab-ci.yml
index a5d7f4dc738..434945ce350 100644
--- a/.gitlab-ci.yml
+++ b/.gitlab-ci.yml
@@ -142,6 +142,7 @@ stages:
build all platforms in a single job:
stage: world build
dependencies: []
+ needs: [ "sandbox test.py" ]
tags:
- ${DEFAULT_FAST_TAG}
script:
@@ -587,7 +588,7 @@ coreboot test.py:
TEST_PY_ID: "--id qemu"
<<: *buildman_and_testpy_dfn
-.lab_template: &lab_dfn
+.sjg_lab_template: &sjg_lab_dfn
stage: sjg-lab
rules:
- if: $SJG_LAB == "1"
@@ -596,6 +597,7 @@ coreboot test.py:
when: manual
allow_failure: true
dependencies: []
+ needs: [ "sandbox test.py" ]
tags: [ 'lab' ]
script:
# Environment:
@@ -633,131 +635,131 @@ coreboot test.py:
rpi3:
variables:
ROLE: rpi3
- <<: *lab_dfn
+ <<: *sjg_lab_dfn
opi_pc:
variables:
ROLE: opi_pc
- <<: *lab_dfn
+ <<: *sjg_lab_dfn
pcduino3_nano:
variables:
ROLE: pcduino3_nano
- <<: *lab_dfn
+ <<: *sjg_lab_dfn
samus:
variables:
ROLE: samus
- <<: *lab_dfn
+ <<: *sjg_lab_dfn
link:
variables:
ROLE: link
- <<: *lab_dfn
+ <<: *sjg_lab_dfn
jerry:
variables:
ROLE: jerry
- <<: *lab_dfn
+ <<: *sjg_lab_dfn
minnowmax:
variables:
ROLE: minnowmax
- <<: *lab_dfn
+ <<: *sjg_lab_dfn
opi_pc2:
variables:
ROLE: opi_pc2
- <<: *lab_dfn
+ <<: *sjg_lab_dfn
bpi:
variables:
ROLE: bpi
- <<: *lab_dfn
+ <<: *sjg_lab_dfn
rpi2:
variables:
ROLE: rpi2
- <<: *lab_dfn
+ <<: *sjg_lab_dfn
bob:
variables:
ROLE: bob
- <<: *lab_dfn
+ <<: *sjg_lab_dfn
ff3399:
variables:
ROLE: ff3399
- <<: *lab_dfn
+ <<: *sjg_lab_dfn
coral:
variables:
ROLE: coral
- <<: *lab_dfn
+ <<: *sjg_lab_dfn
rpi3z:
variables:
ROLE: rpi3z
- <<: *lab_dfn
+ <<: *sjg_lab_dfn
bbb:
variables:
ROLE: bbb
- <<: *lab_dfn
+ <<: *sjg_lab_dfn
kevin:
variables:
ROLE: kevin
- <<: *lab_dfn
+ <<: *sjg_lab_dfn
pine64:
variables:
ROLE: pine64
- <<: *lab_dfn
+ <<: *sjg_lab_dfn
c4:
variables:
ROLE: c4
- <<: *lab_dfn
+ <<: *sjg_lab_dfn
rpi4:
variables:
ROLE: rpi4
- <<: *lab_dfn
+ <<: *sjg_lab_dfn
rpi0:
variables:
ROLE: rpi0
- <<: *lab_dfn
+ <<: *sjg_lab_dfn
snow:
variables:
ROLE: snow
- <<: *lab_dfn
+ <<: *sjg_lab_dfn
pcduino3:
variables:
ROLE: pcduino3
- <<: *lab_dfn
+ <<: *sjg_lab_dfn
nyan-big:
variables:
ROLE: nyan-big
- <<: *lab_dfn
+ <<: *sjg_lab_dfn
rpi:
variables:
ROLE: rpi
- <<: *lab_dfn
+ <<: *sjg_lab_dfn
# StarFive VisionFive 2
vf2:
variables:
ROLE: vf2
- <<: *lab_dfn
+ <<: *sjg_lab_dfn
qemu-x86_64:
variables:
ROLE: qemu-x86_64
TEST_PY_TEST_SPEC: "and not sleep"
- <<: *lab_dfn
+ <<: *sjg_lab_dfn
diff --git a/Makefile b/Makefile
index 4f8829931cb..476bbfd8c03 100644
--- a/Makefile
+++ b/Makefile
@@ -1041,7 +1041,6 @@ libs-$(CONFIG_USB_GADGET) += drivers/usb/gadget/
libs-$(CONFIG_USB_GADGET) += drivers/usb/gadget/udc/
libs-y += drivers/usb/host/
libs-y += drivers/usb/mtu3/
-libs-y += drivers/usb/musb/
libs-y += drivers/usb/musb-new/
libs-y += drivers/usb/isp1760/
libs-y += drivers/usb/phy/
diff --git a/arch/arm/cpu/armv7/Kconfig b/arch/arm/cpu/armv7/Kconfig
index ab86d642eee..3a3c1784e18 100644
--- a/arch/arm/cpu/armv7/Kconfig
+++ b/arch/arm/cpu/armv7/Kconfig
@@ -28,7 +28,7 @@ config ARMV7_BOOT_SEC_DEFAULT
variable to "sec" or "nonsec".
config HAS_ARMV7_SECURE_BASE
- bool "Enable support for a ahardware secure memory area"
+ bool "Enable support for a hardware secure memory area"
default y if ARCH_LS1021A || ARCH_MX7 || ARCH_MX7ULP || ARCH_STM32MP \
|| MACH_SUN6I || MACH_SUN7I || MACH_SUN8I || TEGRA124
diff --git a/arch/arm/mach-imx/imx9/scmi/clock_scmi.c b/arch/arm/mach-imx/imx9/scmi/clock_scmi.c
index b6be20ec674..9030dbf600d 100644
--- a/arch/arm/mach-imx/imx9/scmi/clock_scmi.c
+++ b/arch/arm/mach-imx/imx9/scmi/clock_scmi.c
@@ -10,7 +10,7 @@
int imx_clk_scmi_enable(u32 clock_id, bool enable)
{
- struct scmi_clk_state_in in = {
+ struct scmi_clk_state_in_v1 in = {
.clock_id = clock_id,
.attributes = !!enable,
};
diff --git a/common/qfw.c b/common/qfw.c
index 45e87d3ae28..14d48952427 100644
--- a/common/qfw.c
+++ b/common/qfw.c
@@ -109,7 +109,7 @@ int qemu_fwcfg_setup_kernel(struct udevice *qfw_dev, ulong load_addr,
ulong initrd_addr)
{
char *data_addr;
- u32 setup_size, kernel_size, cmdline_size, initrd_size;
+ u32 setup_size = 0, kernel_size = 0, cmdline_size = 0, initrd_size = 0;
qfw_read_entry(qfw_dev, FW_CFG_SETUP_SIZE, 4, &setup_size);
qfw_read_entry(qfw_dev, FW_CFG_KERNEL_SIZE, 4, &kernel_size);
diff --git a/configs/omap3_evm_defconfig b/configs/omap3_evm_defconfig
index a813d216787..f99798ac1a5 100644
--- a/configs/omap3_evm_defconfig
+++ b/configs/omap3_evm_defconfig
@@ -78,7 +78,6 @@ CONFIG_OMAP3_SPI=y
CONFIG_USB=y
# CONFIG_SPL_DM_USB is not set
CONFIG_USB_EHCI_HCD=y
-CONFIG_USB_OMAP3=y
CONFIG_USB_MUSB_GADGET=y
CONFIG_USB_MUSB_OMAP2PLUS=y
CONFIG_USB_HOST_ETHER=y
diff --git a/doc/build/docker.rst b/doc/build/docker.rst
index 4974a98d4af..791eb215617 100644
--- a/doc/build/docker.rst
+++ b/doc/build/docker.rst
@@ -36,7 +36,7 @@ To build the image yourself:
.. code-block:: bash
- sudo docker buildx build --platform linux/arm64/v8,linux/amd64 -t your-namespace:your-tag .
+ sudo docker buildx build --platform linux/arm64,linux/amd64 -t your-namespace:your-tag .
Or to use an existing container
diff --git a/doc/develop/pytest/usage.rst b/doc/develop/pytest/usage.rst
index 596b0397379..800a0323d0a 100644
--- a/doc/develop/pytest/usage.rst
+++ b/doc/develop/pytest/usage.rst
@@ -35,21 +35,26 @@ can be installed via the command
pip install -r requirements.txt
In order to execute certain tests on their supported platforms other tools
-will be required. The following is an incomplete list:
+will be required. The following packages may be needed:
-* gdisk
-* dfu-util
-* dtc
-* openssl
-* e2fsprogs
-* util-linux
+* cgpt
* coreutils
+* device-tree-compiler
+* dfu-util
* dosfstools
+* e2fsprogs
* efitools
+* fdisk
+* gdisk
+* libgnutls28-dev / gnutls-devel
* mount
* mtools
+* openssl
* sbsigntool
+* swig
* udisks2
+* util-linux
+* vboot-kernel-utils / vboot-utils
Please use the appropriate commands for your distribution to match these tools
up with the package that provides them.
@@ -63,7 +68,7 @@ The test script supports either:
Further details are described later.
The usage of the command ``sudo`` is not allowed in tests. Using elevated
-priviledges can lead to security concerns. Furthermore not all users may have
+privileges can lead to security concerns. Furthermore not all users may have
administrator rights. Therefore the command ``sudo`` must not be used in tests.
To create disk images we have helper functions located in
``test/py/tests/fs_helper.py`` which shall be used in any tests that require
diff --git a/drivers/clk/clk_scmi.c b/drivers/clk/clk_scmi.c
index a7d89f32cd7..683ac822a01 100644
--- a/drivers/clk/clk_scmi.c
+++ b/drivers/clk/clk_scmi.c
@@ -8,6 +8,7 @@
#include <clk-uclass.h>
#include <dm.h>
#include <dm/device_compat.h>
+#include <dm/device-internal.h>
#include <scmi_agent.h>
#include <scmi_agent-uclass.h>
#include <scmi_protocols.h>
@@ -16,7 +17,9 @@
struct clk_scmi {
struct clk clk;
+ char name[SCMI_CLOCK_NAME_LENGTH_MAX];
u32 ctrl_flags;
+ bool attrs_resolved;
};
struct scmi_clock_priv {
@@ -84,7 +87,7 @@ static int scmi_clk_get_num_clock(struct udevice *dev, size_t *num_clocks)
return 0;
}
-static int scmi_clk_get_attibute(struct udevice *dev, int clkid, char **name,
+static int scmi_clk_get_attibute(struct udevice *dev, int clkid, char *name,
u32 *attr)
{
struct scmi_clock_priv *priv = dev_get_priv(dev);
@@ -108,7 +111,7 @@ static int scmi_clk_get_attibute(struct udevice *dev, int clkid, char **name,
if (ret)
return ret;
- *name = strdup(out.clock_name);
+ strncpy(name, out.clock_name, SCMI_CLOCK_NAME_LENGTH_MAX);
*attr = out.attributes;
} else {
struct scmi_clk_attribute_out out;
@@ -125,7 +128,7 @@ static int scmi_clk_get_attibute(struct udevice *dev, int clkid, char **name,
if (ret)
return ret;
- *name = strdup(out.clock_name);
+ strncpy(name, out.clock_name, SCMI_CLOCK_NAME_LENGTH_MAX);
*attr = out.attributes;
}
@@ -134,39 +137,93 @@ static int scmi_clk_get_attibute(struct udevice *dev, int clkid, char **name,
static int scmi_clk_gate(struct clk *clk, int enable)
{
- struct scmi_clk_state_in in = {
+ struct scmi_clock_priv *priv = dev_get_parent_priv(clk->dev);
+ struct scmi_clk_state_in_v1 in_v1 = {
+ .clock_id = clk_get_id(clk),
+ .attributes = enable,
+ };
+ /* Valid only from SCMI clock v2.1 */
+ struct scmi_clk_state_in_v2 in_v2 = {
.clock_id = clk_get_id(clk),
.attributes = enable,
};
struct scmi_clk_state_out out;
- struct scmi_msg msg = SCMI_MSG_IN(SCMI_PROTOCOL_ID_CLOCK,
- SCMI_CLOCK_CONFIG_SET,
- in, out);
+ struct scmi_msg msg_v1 = SCMI_MSG_IN(SCMI_PROTOCOL_ID_CLOCK,
+ SCMI_CLOCK_CONFIG_SET,
+ in_v1, out);
+ struct scmi_msg msg_v2 = SCMI_MSG_IN(SCMI_PROTOCOL_ID_CLOCK,
+ SCMI_CLOCK_CONFIG_SET,
+ in_v2, out);
int ret;
- ret = devm_scmi_process_msg(clk->dev, &msg);
+ ret = devm_scmi_process_msg(clk->dev,
+ (priv->version < CLOCK_PROTOCOL_VERSION_2_1) ?
+ &msg_v1 : &msg_v2);
if (ret)
return ret;
return scmi_to_linux_errno(out.status);
}
-static int scmi_clk_enable(struct clk *clk)
+static int scmi_clk_get_ctrl_flags(struct clk *clk, u32 *ctrl_flags)
{
struct clk_scmi *clkscmi;
+ struct udevice *dev;
+ u32 attributes;
struct clk *c;
int ret;
- if (!CONFIG_IS_ENABLED(CLK_CCF))
- return scmi_clk_gate(clk, 1);
-
ret = clk_get_by_id(clk->id, &c);
if (ret)
return ret;
+ dev = c->dev->parent;
+
clkscmi = container_of(c, struct clk_scmi, clk);
- if (clkscmi->ctrl_flags & SUPPORT_CLK_STAT_CONTROL)
+ if (!clkscmi->attrs_resolved) {
+ char name[SCMI_CLOCK_NAME_LENGTH_MAX];
+ ret = scmi_clk_get_attibute(dev, clk->id & CLK_ID_MSK,
+ name, &attributes);
+ if (ret)
+ return ret;
+
+ strncpy(clkscmi->name, name, SCMI_CLOCK_NAME_LENGTH_MAX);
+ if (CLK_HAS_RESTRICTIONS(attributes)) {
+ u32 perm;
+
+ ret = scmi_clk_get_permissions(dev, clk->id & CLK_ID_MSK, &perm);
+ if (ret < 0)
+ clkscmi->ctrl_flags = 0;
+ else
+ clkscmi->ctrl_flags = perm;
+ } else {
+ clkscmi->ctrl_flags = SUPPORT_CLK_STAT_CONTROL |
+ SUPPORT_CLK_PARENT_CONTROL |
+ SUPPORT_CLK_RATE_CONTROL;
+ }
+
+ clkscmi->attrs_resolved = true;
+ }
+
+ *ctrl_flags = clkscmi->ctrl_flags;
+
+ return 0;
+}
+
+static int scmi_clk_enable(struct clk *clk)
+{
+ u32 ctrl_flags;
+ int ret;
+
+ if (!CONFIG_IS_ENABLED(CLK_CCF))
+ return scmi_clk_gate(clk, 1);
+
+ ret = scmi_clk_get_ctrl_flags(clk, &ctrl_flags);
+ if (ret)
+ return ret;
+
+ if (ctrl_flags & SUPPORT_CLK_STAT_CONTROL)
return scmi_clk_gate(clk, 1);
/* Following Linux drivers/clk/clk-scmi.c, directly return 0 if agent has no permission. */
@@ -176,20 +233,17 @@ static int scmi_clk_enable(struct clk *clk)
static int scmi_clk_disable(struct clk *clk)
{
- struct clk_scmi *clkscmi;
- struct clk *c;
+ u32 ctrl_flags;
int ret;
if (!CONFIG_IS_ENABLED(CLK_CCF))
return scmi_clk_gate(clk, 0);
- ret = clk_get_by_id(clk->id, &c);
+ ret = scmi_clk_get_ctrl_flags(clk, &ctrl_flags);
if (ret)
return ret;
- clkscmi = container_of(c, struct clk_scmi, clk);
-
- if (clkscmi->ctrl_flags & SUPPORT_CLK_STAT_CONTROL)
+ if (ctrl_flags & SUPPORT_CLK_STAT_CONTROL)
return scmi_clk_gate(clk, 0);
/* Following Linux drivers/clk/clk-scmi.c, directly return 0 if agent has no permission. */
@@ -247,20 +301,17 @@ static ulong __scmi_clk_set_rate(struct clk *clk, ulong rate)
static ulong scmi_clk_set_rate(struct clk *clk, ulong rate)
{
- struct clk_scmi *clkscmi;
- struct clk *c;
+ u32 ctrl_flags;
int ret;
if (!CONFIG_IS_ENABLED(CLK_CCF))
return __scmi_clk_set_rate(clk, rate);
- ret = clk_get_by_id(clk->id, &c);
+ ret = scmi_clk_get_ctrl_flags(clk, &ctrl_flags);
if (ret)
return ret;
- clkscmi = container_of(c, struct clk_scmi, clk);
-
- if (clkscmi->ctrl_flags & SUPPORT_CLK_RATE_CONTROL)
+ if (ctrl_flags & SUPPORT_CLK_RATE_CONTROL)
return __scmi_clk_set_rate(clk, rate);
/* Following Linux drivers/clk/clk-scmi.c, directly return 0 if agent has no permission. */
@@ -271,7 +322,7 @@ static ulong scmi_clk_set_rate(struct clk *clk, ulong rate)
static int scmi_clk_probe(struct udevice *dev)
{
- struct clk_scmi *clk_scmi;
+ struct clk_scmi *clk_scmi_bulk, *clk_scmi;
struct scmi_clock_priv *priv = dev_get_priv(dev);
size_t num_clocks, i;
int ret;
@@ -300,39 +351,23 @@ static int scmi_clk_probe(struct udevice *dev)
return ret;
}
+ clk_scmi_bulk = kzalloc(num_clocks * sizeof(*clk_scmi), GFP_KERNEL);
+ if (!clk_scmi_bulk)
+ return -ENOMEM;
+
for (i = 0; i < num_clocks; i++) {
- char *clock_name;
- u32 attributes;
+ clk_scmi = clk_scmi_bulk + i;
+ char *clock_name = clk_scmi->name;
- if (!scmi_clk_get_attibute(dev, i, &clock_name, &attributes)) {
- clk_scmi = kzalloc(sizeof(*clk_scmi), GFP_KERNEL);
- if (!clk_scmi || !clock_name)
- ret = -ENOMEM;
- else
- ret = clk_register(&clk_scmi->clk, dev->driver->name,
- clock_name, dev->name);
-
- if (ret) {
- free(clk_scmi);
- free(clock_name);
- return ret;
- }
-
- dev_clk_dm(dev, i, &clk_scmi->clk);
-
- if (CLK_HAS_RESTRICTIONS(attributes)) {
- u32 perm;
-
- ret = scmi_clk_get_permissions(dev, i, &perm);
- if (ret < 0)
- clk_scmi->ctrl_flags = 0;
- else
- clk_scmi->ctrl_flags = perm;
- } else {
- clk_scmi->ctrl_flags = SUPPORT_CLK_STAT_CONTROL | SUPPORT_CLK_PARENT_CONTROL |
- SUPPORT_CLK_RATE_CONTROL;
- }
- }
+ snprintf(clock_name, SCMI_CLOCK_NAME_LENGTH_MAX, "scmi-%zu", i);
+
+ ret = clk_register(&clk_scmi->clk, dev->driver->name,
+ clock_name, dev->name);
+ if (ret)
+ return ret;
+
+ dev_clk_dm(dev, i, &clk_scmi->clk);
+ dev_set_parent_priv(clk_scmi->clk.dev, priv);
}
return 0;
@@ -359,20 +394,17 @@ static int __scmi_clk_set_parent(struct clk *clk, struct clk *parent)
static int scmi_clk_set_parent(struct clk *clk, struct clk *parent)
{
- struct clk_scmi *clkscmi;
- struct clk *c;
+ u32 ctrl_flags;
int ret;
if (!CONFIG_IS_ENABLED(CLK_CCF))
- return -ENOTSUPP;
+ return __scmi_clk_set_parent(clk, parent);
- ret = clk_get_by_id(clk->id, &c);
+ ret = scmi_clk_get_ctrl_flags(clk, &ctrl_flags);
if (ret)
return ret;
- clkscmi = container_of(c, struct clk_scmi, clk);
-
- if (clkscmi->ctrl_flags & SUPPORT_CLK_PARENT_CONTROL)
+ if (ctrl_flags & SUPPORT_CLK_PARENT_CONTROL)
return __scmi_clk_set_parent(clk, parent);
/* Following Linux drivers/clk/clk-scmi.c, directly return 0 if agent has no permission. */
diff --git a/drivers/firmware/scmi/sandbox-scmi_agent.c b/drivers/firmware/scmi/sandbox-scmi_agent.c
index 74a87832dcb..5b242a039c2 100644
--- a/drivers/firmware/scmi/sandbox-scmi_agent.c
+++ b/drivers/firmware/scmi/sandbox-scmi_agent.c
@@ -828,7 +828,7 @@ static int sandbox_scmi_clock_rate_get(struct udevice *dev,
static int sandbox_scmi_clock_gate(struct udevice *dev, struct scmi_msg *msg)
{
- struct scmi_clk_state_in *in = NULL;
+ struct scmi_clk_state_in_v1 *in = NULL;
struct scmi_clk_state_out *out = NULL;
struct sandbox_scmi_clk *clk_state = NULL;
@@ -836,7 +836,7 @@ static int sandbox_scmi_clock_gate(struct udevice *dev, struct scmi_msg *msg)
!msg->out_msg || msg->out_msg_sz < sizeof(*out))
return -EINVAL;
- in = (struct scmi_clk_state_in *)msg->in_msg;
+ in = (struct scmi_clk_state_in_v1 *)msg->in_msg;
out = (struct scmi_clk_state_out *)msg->out_msg;
clk_state = get_scmi_clk_state(in->clock_id);
diff --git a/drivers/firmware/scmi/smt.c b/drivers/firmware/scmi/smt.c
index 237871559f0..cd1c0801f72 100644
--- a/drivers/firmware/scmi/smt.c
+++ b/drivers/firmware/scmi/smt.c
@@ -61,20 +61,6 @@ int scmi_dt_get_smt_buffer(struct udevice *dev, struct scmi_smt *smt)
if (device_is_compatible(dev, "arm,scmi") && ofnode_has_property(dev_ofnode(dev), "mboxes"))
scmi_smt_enable_intr(smt, true);
-#ifdef CONFIG_ARM
- if (dcache_status()) {
- u32 align_size;
-
- if (IS_ENABLED(CONFIG_ARM64))
- align_size = PAGE_SIZE;
- else
- align_size = MMU_SECTION_SIZE;
-
- mmu_set_region_dcache_behaviour(ALIGN_DOWN((uintptr_t)smt->buf, align_size),
- ALIGN(smt->size, align_size), DCACHE_OFF);
- }
-#endif
-
return 0;
}
diff --git a/drivers/gpio/Kconfig b/drivers/gpio/Kconfig
index db077e472a8..b5729a39774 100644
--- a/drivers/gpio/Kconfig
+++ b/drivers/gpio/Kconfig
@@ -340,6 +340,7 @@ config NPCM_SGPIO
config OMAP_GPIO
bool "TI OMAP GPIO driver"
depends on ARCH_OMAP2PLUS
+ select TI_SYSC if OF_CONTROL
default y
help
Support GPIO controllers on the TI OMAP3/4/5 and related (such as
diff --git a/drivers/i2c/muxes/i2c-mux-uclass.c b/drivers/i2c/muxes/i2c-mux-uclass.c
index 012881de05b..7f4eb914af2 100644
--- a/drivers/i2c/muxes/i2c-mux-uclass.c
+++ b/drivers/i2c/muxes/i2c-mux-uclass.c
@@ -130,7 +130,7 @@ static int i2c_mux_post_probe(struct udevice *mux)
return 0;
}
-int i2c_mux_select(struct udevice *dev)
+static int i2c_mux_select(struct udevice *dev)
{
struct i2c_mux_bus *plat = dev_get_parent_plat(dev);
struct udevice *mux = dev->parent;
@@ -142,7 +142,7 @@ int i2c_mux_select(struct udevice *dev)
return ops->select(mux, dev, plat->channel);
}
-int i2c_mux_deselect(struct udevice *dev)
+static int i2c_mux_deselect(struct udevice *dev)
{
struct i2c_mux_bus *plat = dev_get_parent_plat(dev);
struct udevice *mux = dev->parent;
diff --git a/drivers/pinctrl/renesas/pfc-r8a779g0.c b/drivers/pinctrl/renesas/pfc-r8a779g0.c
index ad113cd3e5d..c63adedd297 100644
--- a/drivers/pinctrl/renesas/pfc-r8a779g0.c
+++ b/drivers/pinctrl/renesas/pfc-r8a779g0.c
@@ -354,7 +354,7 @@
#define IP1SR2_3_0 FM(TPU0TO0_A) FM(CANFD6_RX) F_(0, 0) FM(TCLK1_B) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0)
#define IP1SR2_7_4 FM(CAN_CLK) FM(FXR_TXENA_N_B) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0)
#define IP1SR2_11_8 FM(CANFD0_TX) FM(FXR_TXENB_N_B) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0)
-#define IP1SR2_15_12 FM(CANFD0_RX) FM(STPWT_EXTFXR) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0)
+#define IP1SR2_15_12 FM(CANFD0_RX) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0)
#define IP1SR2_19_16 FM(CANFD2_TX) FM(TPU0TO2_A) F_(0, 0) FM(TCLK3_C) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0)
#define IP1SR2_23_20 FM(CANFD2_RX) FM(TPU0TO3_A) FM(PWM1_B) FM(TCLK4_C) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0)
#define IP1SR2_27_24 FM(CANFD3_TX) F_(0, 0) FM(PWM2) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0)
@@ -473,55 +473,55 @@
#define IP0SR6_7_4 FM(AVB1_MAGIC) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0)
#define IP0SR6_11_8 FM(AVB1_MDC) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0)
#define IP0SR6_15_12 FM(AVB1_PHY_INT) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0)
-#define IP0SR6_19_16 FM(AVB1_LINK) FM(AVB1_MII_TX_ER) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0)
-#define IP0SR6_23_20 FM(AVB1_AVTP_MATCH) FM(AVB1_MII_RX_ER) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0)
-#define IP0SR6_27_24 FM(AVB1_TXC) FM(AVB1_MII_TXC) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0)
-#define IP0SR6_31_28 FM(AVB1_TX_CTL) FM(AVB1_MII_TX_EN) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0)
+#define IP0SR6_19_16 FM(AVB1_LINK) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0)
+#define IP0SR6_23_20 FM(AVB1_AVTP_MATCH) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0)
+#define IP0SR6_27_24 FM(AVB1_TXC) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0)
+#define IP0SR6_31_28 FM(AVB1_TX_CTL) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0)
/* IP1SR6 */ /* 0 */ /* 1 */ /* 2 */ /* 3 4 5 6 7 8 9 A B C D E F */
-#define IP1SR6_3_0 FM(AVB1_RXC) FM(AVB1_MII_RXC) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0)
-#define IP1SR6_7_4 FM(AVB1_RX_CTL) FM(AVB1_MII_RX_DV) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0)
-#define IP1SR6_11_8 FM(AVB1_AVTP_PPS) FM(AVB1_MII_COL) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0)
-#define IP1SR6_15_12 FM(AVB1_AVTP_CAPTURE) FM(AVB1_MII_CRS) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0)
-#define IP1SR6_19_16 FM(AVB1_TD1) FM(AVB1_MII_TD1) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0)
-#define IP1SR6_23_20 FM(AVB1_TD0) FM(AVB1_MII_TD0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0)
-#define IP1SR6_27_24 FM(AVB1_RD1) FM(AVB1_MII_RD1) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0)
-#define IP1SR6_31_28 FM(AVB1_RD0) FM(AVB1_MII_RD0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0)
+#define IP1SR6_3_0 FM(AVB1_RXC) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0)
+#define IP1SR6_7_4 FM(AVB1_RX_CTL) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0)
+#define IP1SR6_11_8 FM(AVB1_AVTP_PPS) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0)
+#define IP1SR6_15_12 FM(AVB1_AVTP_CAPTURE) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0)
+#define IP1SR6_19_16 FM(AVB1_TD1) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0)
+#define IP1SR6_23_20 FM(AVB1_TD0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0)
+#define IP1SR6_27_24 FM(AVB1_RD1) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0)
+#define IP1SR6_31_28 FM(AVB1_RD0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0)
/* IP2SR6 */ /* 0 */ /* 1 */ /* 2 */ /* 3 4 5 6 7 8 9 A B C D E F */
-#define IP2SR6_3_0 FM(AVB1_TD2) FM(AVB1_MII_TD2) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0)
-#define IP2SR6_7_4 FM(AVB1_RD2) FM(AVB1_MII_RD2) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0)
-#define IP2SR6_11_8 FM(AVB1_TD3) FM(AVB1_MII_TD3) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0)
-#define IP2SR6_15_12 FM(AVB1_RD3) FM(AVB1_MII_RD3) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0)
+#define IP2SR6_3_0 FM(AVB1_TD2) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0)
+#define IP2SR6_7_4 FM(AVB1_RD2) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0)
+#define IP2SR6_11_8 FM(AVB1_TD3) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0)
+#define IP2SR6_15_12 FM(AVB1_RD3) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0)
#define IP2SR6_19_16 FM(AVB1_TXCREFCLK) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0)
/* SR7 */
/* IP0SR7 */ /* 0 */ /* 1 */ /* 2 */ /* 3 4 5 6 7 8 9 A B C D E F */
-#define IP0SR7_3_0 FM(AVB0_AVTP_PPS) FM(AVB0_MII_COL) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0)
-#define IP0SR7_7_4 FM(AVB0_AVTP_CAPTURE) FM(AVB0_MII_CRS) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0)
-#define IP0SR7_11_8 FM(AVB0_AVTP_MATCH) FM(AVB0_MII_RX_ER) FM(CC5_OSCOUT) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0)
-#define IP0SR7_15_12 FM(AVB0_TD3) FM(AVB0_MII_TD3) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0)
-#define IP0SR7_19_16 FM(AVB0_LINK) FM(AVB0_MII_TX_ER) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0)
+#define IP0SR7_3_0 FM(AVB0_AVTP_PPS) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0)
+#define IP0SR7_7_4 FM(AVB0_AVTP_CAPTURE) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0)
+#define IP0SR7_11_8 FM(AVB0_AVTP_MATCH) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0)
+#define IP0SR7_15_12 FM(AVB0_TD3) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0)
+#define IP0SR7_19_16 FM(AVB0_LINK) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0)
#define IP0SR7_23_20 FM(AVB0_PHY_INT) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0)
-#define IP0SR7_27_24 FM(AVB0_TD2) FM(AVB0_MII_TD2) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0)
-#define IP0SR7_31_28 FM(AVB0_TD1) FM(AVB0_MII_TD1) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0)
+#define IP0SR7_27_24 FM(AVB0_TD2) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0)
+#define IP0SR7_31_28 FM(AVB0_TD1) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0)
/* IP1SR7 */ /* 0 */ /* 1 */ /* 2 */ /* 3 4 5 6 7 8 9 A B C D E F */
-#define IP1SR7_3_0 FM(AVB0_RD3) FM(AVB0_MII_RD3) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0)
+#define IP1SR7_3_0 FM(AVB0_RD3) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0)
#define IP1SR7_7_4 FM(AVB0_TXCREFCLK) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0)
#define IP1SR7_11_8 FM(AVB0_MAGIC) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0)
-#define IP1SR7_15_12 FM(AVB0_TD0) FM(AVB0_MII_TD0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0)
-#define IP1SR7_19_16 FM(AVB0_RD2) FM(AVB0_MII_RD2) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0)
+#define IP1SR7_15_12 FM(AVB0_TD0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0)
+#define IP1SR7_19_16 FM(AVB0_RD2) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0)
#define IP1SR7_23_20 FM(AVB0_MDC) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0)
#define IP1SR7_27_24 FM(AVB0_MDIO) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0)
-#define IP1SR7_31_28 FM(AVB0_TXC) FM(AVB0_MII_TXC) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0)
+#define IP1SR7_31_28 FM(AVB0_TXC) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0)
/* IP2SR7 */ /* 0 */ /* 1 */ /* 2 */ /* 3 4 5 6 7 8 9 A B C D E F */
-#define IP2SR7_3_0 FM(AVB0_TX_CTL) FM(AVB0_MII_TX_EN) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0)
-#define IP2SR7_7_4 FM(AVB0_RD1) FM(AVB0_MII_RD1) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0)
-#define IP2SR7_11_8 FM(AVB0_RD0) FM(AVB0_MII_RD0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0)
-#define IP2SR7_15_12 FM(AVB0_RXC) FM(AVB0_MII_RXC) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0)
-#define IP2SR7_19_16 FM(AVB0_RX_CTL) FM(AVB0_MII_RX_DV) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0)
+#define IP2SR7_3_0 FM(AVB0_TX_CTL) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0)
+#define IP2SR7_7_4 FM(AVB0_RD1) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0)
+#define IP2SR7_11_8 FM(AVB0_RD0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0)
+#define IP2SR7_15_12 FM(AVB0_RXC) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0)
+#define IP2SR7_19_16 FM(AVB0_RX_CTL) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0)
/* SR8 */
/* IP0SR8 */ /* 0 */ /* 1 */ /* 2 */ /* 3 4 5 6 7 8 9 A B C D E F */
@@ -927,7 +927,6 @@ static const u16 pinmux_data[] = {
PINMUX_IPSR_GPSR(IP1SR2_11_8, FXR_TXENB_N_B),
PINMUX_IPSR_GPSR(IP1SR2_15_12, CANFD0_RX),
- PINMUX_IPSR_GPSR(IP1SR2_15_12, STPWT_EXTFXR),
PINMUX_IPSR_GPSR(IP1SR2_19_16, CANFD2_TX),
PINMUX_IPSR_GPSR(IP1SR2_19_16, TPU0TO2_A),
@@ -1078,118 +1077,85 @@ static const u16 pinmux_data[] = {
PINMUX_IPSR_GPSR(IP0SR6_15_12, AVB1_PHY_INT),
PINMUX_IPSR_GPSR(IP0SR6_19_16, AVB1_LINK),
- PINMUX_IPSR_GPSR(IP0SR6_19_16, AVB1_MII_TX_ER),
PINMUX_IPSR_GPSR(IP0SR6_23_20, AVB1_AVTP_MATCH),
- PINMUX_IPSR_GPSR(IP0SR6_23_20, AVB1_MII_RX_ER),
PINMUX_IPSR_GPSR(IP0SR6_27_24, AVB1_TXC),
- PINMUX_IPSR_GPSR(IP0SR6_27_24, AVB1_MII_TXC),
PINMUX_IPSR_GPSR(IP0SR6_31_28, AVB1_TX_CTL),
- PINMUX_IPSR_GPSR(IP0SR6_31_28, AVB1_MII_TX_EN),
/* IP1SR6 */
PINMUX_IPSR_GPSR(IP1SR6_3_0, AVB1_RXC),
- PINMUX_IPSR_GPSR(IP1SR6_3_0, AVB1_MII_RXC),
PINMUX_IPSR_GPSR(IP1SR6_7_4, AVB1_RX_CTL),
- PINMUX_IPSR_GPSR(IP1SR6_7_4, AVB1_MII_RX_DV),
PINMUX_IPSR_GPSR(IP1SR6_11_8, AVB1_AVTP_PPS),
- PINMUX_IPSR_GPSR(IP1SR6_11_8, AVB1_MII_COL),
PINMUX_IPSR_GPSR(IP1SR6_15_12, AVB1_AVTP_CAPTURE),
- PINMUX_IPSR_GPSR(IP1SR6_15_12, AVB1_MII_CRS),
PINMUX_IPSR_GPSR(IP1SR6_19_16, AVB1_TD1),
- PINMUX_IPSR_GPSR(IP1SR6_19_16, AVB1_MII_TD1),
PINMUX_IPSR_GPSR(IP1SR6_23_20, AVB1_TD0),
- PINMUX_IPSR_GPSR(IP1SR6_23_20, AVB1_MII_TD0),
PINMUX_IPSR_GPSR(IP1SR6_27_24, AVB1_RD1),
- PINMUX_IPSR_GPSR(IP1SR6_27_24, AVB1_MII_RD1),
PINMUX_IPSR_GPSR(IP1SR6_31_28, AVB1_RD0),
- PINMUX_IPSR_GPSR(IP1SR6_31_28, AVB1_MII_RD0),
/* IP2SR6 */
PINMUX_IPSR_GPSR(IP2SR6_3_0, AVB1_TD2),
- PINMUX_IPSR_GPSR(IP2SR6_3_0, AVB1_MII_TD2),
PINMUX_IPSR_GPSR(IP2SR6_7_4, AVB1_RD2),
- PINMUX_IPSR_GPSR(IP2SR6_7_4, AVB1_MII_RD2),
PINMUX_IPSR_GPSR(IP2SR6_11_8, AVB1_TD3),
- PINMUX_IPSR_GPSR(IP2SR6_11_8, AVB1_MII_TD3),
PINMUX_IPSR_GPSR(IP2SR6_15_12, AVB1_RD3),
- PINMUX_IPSR_GPSR(IP2SR6_15_12, AVB1_MII_RD3),
PINMUX_IPSR_GPSR(IP2SR6_19_16, AVB1_TXCREFCLK),
/* IP0SR7 */
PINMUX_IPSR_GPSR(IP0SR7_3_0, AVB0_AVTP_PPS),
- PINMUX_IPSR_GPSR(IP0SR7_3_0, AVB0_MII_COL),
PINMUX_IPSR_GPSR(IP0SR7_7_4, AVB0_AVTP_CAPTURE),
- PINMUX_IPSR_GPSR(IP0SR7_7_4, AVB0_MII_CRS),
PINMUX_IPSR_GPSR(IP0SR7_11_8, AVB0_AVTP_MATCH),
- PINMUX_IPSR_GPSR(IP0SR7_11_8, AVB0_MII_RX_ER),
- PINMUX_IPSR_GPSR(IP0SR7_11_8, CC5_OSCOUT),
PINMUX_IPSR_GPSR(IP0SR7_15_12, AVB0_TD3),
- PINMUX_IPSR_GPSR(IP0SR7_15_12, AVB0_MII_TD3),
PINMUX_IPSR_GPSR(IP0SR7_19_16, AVB0_LINK),
- PINMUX_IPSR_GPSR(IP0SR7_19_16, AVB0_MII_TX_ER),
PINMUX_IPSR_GPSR(IP0SR7_23_20, AVB0_PHY_INT),
PINMUX_IPSR_GPSR(IP0SR7_27_24, AVB0_TD2),
- PINMUX_IPSR_GPSR(IP0SR7_27_24, AVB0_MII_TD2),
PINMUX_IPSR_GPSR(IP0SR7_31_28, AVB0_TD1),
- PINMUX_IPSR_GPSR(IP0SR7_31_28, AVB0_MII_TD1),
/* IP1SR7 */
PINMUX_IPSR_GPSR(IP1SR7_3_0, AVB0_RD3),
- PINMUX_IPSR_GPSR(IP1SR7_3_0, AVB0_MII_RD3),
PINMUX_IPSR_GPSR(IP1SR7_7_4, AVB0_TXCREFCLK),
PINMUX_IPSR_GPSR(IP1SR7_11_8, AVB0_MAGIC),
PINMUX_IPSR_GPSR(IP1SR7_15_12, AVB0_TD0),
- PINMUX_IPSR_GPSR(IP1SR7_15_12, AVB0_MII_TD0),
PINMUX_IPSR_GPSR(IP1SR7_19_16, AVB0_RD2),
- PINMUX_IPSR_GPSR(IP1SR7_19_16, AVB0_MII_RD2),
PINMUX_IPSR_GPSR(IP1SR7_23_20, AVB0_MDC),
PINMUX_IPSR_GPSR(IP1SR7_27_24, AVB0_MDIO),
PINMUX_IPSR_GPSR(IP1SR7_31_28, AVB0_TXC),
- PINMUX_IPSR_GPSR(IP1SR7_31_28, AVB0_MII_TXC),
/* IP2SR7 */
PINMUX_IPSR_GPSR(IP2SR7_3_0, AVB0_TX_CTL),
- PINMUX_IPSR_GPSR(IP2SR7_3_0, AVB0_MII_TX_EN),
PINMUX_IPSR_GPSR(IP2SR7_7_4, AVB0_RD1),
- PINMUX_IPSR_GPSR(IP2SR7_7_4, AVB0_MII_RD1),
PINMUX_IPSR_GPSR(IP2SR7_11_8, AVB0_RD0),
- PINMUX_IPSR_GPSR(IP2SR7_11_8, AVB0_MII_RD0),
PINMUX_IPSR_GPSR(IP2SR7_15_12, AVB0_RXC),
- PINMUX_IPSR_GPSR(IP2SR7_15_12, AVB0_MII_RXC),
PINMUX_IPSR_GPSR(IP2SR7_19_16, AVB0_RX_CTL),
- PINMUX_IPSR_GPSR(IP2SR7_19_16, AVB0_MII_RX_DV),
/* IP0SR8 */
PINMUX_IPSR_MSEL(IP0SR8_3_0, SCL0, SEL_SCL0_0),
diff --git a/drivers/pinctrl/renesas/pfc-r8a779h0.c b/drivers/pinctrl/renesas/pfc-r8a779h0.c
index d6c2fbcf854..2c6c901f3a4 100644
--- a/drivers/pinctrl/renesas/pfc-r8a779h0.c
+++ b/drivers/pinctrl/renesas/pfc-r8a779h0.c
@@ -342,7 +342,7 @@
#define IP1SR2_3_0 FM(TPU0TO0_A) F_(0, 0) F_(0, 0) FM(TCLK1_B) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0)
#define IP1SR2_7_4 FM(CAN_CLK) FM(FXR_TXENA_N_B) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0)
#define IP1SR2_11_8 FM(CANFD0_TX) FM(FXR_TXENB_N_B) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0)
-#define IP1SR2_15_12 FM(CANFD0_RX) FM(STPWT_EXTFXR) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0)
+#define IP1SR2_15_12 FM(CANFD0_RX) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0)
#define IP1SR2_19_16 FM(CANFD2_TX) FM(TPU0TO2_A) F_(0, 0) FM(TCLK3_C) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0)
#define IP1SR2_23_20 FM(CANFD2_RX) FM(TPU0TO3_A) FM(PWM1_B) FM(TCLK4_C) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0)
#define IP1SR2_27_24 FM(CANFD3_TX) F_(0, 0) FM(PWM2_B) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0)
@@ -481,7 +481,7 @@
/* IP0SR7 */ /* 0 */ /* 1 */ /* 2 */ /* 3 4 5 6 7 8 9 A B C D E F */
#define IP0SR7_3_0 FM(AVB0_AVTP_PPS) FM(AVB0_MII_COL) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0)
#define IP0SR7_7_4 FM(AVB0_AVTP_CAPTURE) FM(AVB0_MII_CRS) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0)
-#define IP0SR7_11_8 FM(AVB0_AVTP_MATCH) FM(AVB0_MII_RX_ER) FM(CC5_OSCOUT) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0)
+#define IP0SR7_11_8 FM(AVB0_AVTP_MATCH) FM(AVB0_MII_RX_ER) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0)
#define IP0SR7_15_12 FM(AVB0_TD3) FM(AVB0_MII_TD3) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0)
#define IP0SR7_19_16 FM(AVB0_LINK) FM(AVB0_MII_TX_ER) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0)
#define IP0SR7_23_20 FM(AVB0_PHY_INT) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0)
@@ -868,7 +868,6 @@ static const u16 pinmux_data[] = {
PINMUX_IPSR_GPSR(IP1SR2_11_8, FXR_TXENB_N_B),
PINMUX_IPSR_GPSR(IP1SR2_15_12, CANFD0_RX),
- PINMUX_IPSR_GPSR(IP1SR2_15_12, STPWT_EXTFXR),
PINMUX_IPSR_GPSR(IP1SR2_19_16, CANFD2_TX),
PINMUX_IPSR_GPSR(IP1SR2_19_16, TPU0TO2_A),
@@ -1126,7 +1125,6 @@ static const u16 pinmux_data[] = {
PINMUX_IPSR_GPSR(IP0SR7_11_8, AVB0_AVTP_MATCH),
PINMUX_IPSR_GPSR(IP0SR7_11_8, AVB0_MII_RX_ER),
- PINMUX_IPSR_GPSR(IP0SR7_11_8, CC5_OSCOUT),
PINMUX_IPSR_GPSR(IP0SR7_15_12, AVB0_TD3),
PINMUX_IPSR_GPSR(IP0SR7_15_12, AVB0_MII_TD3),
diff --git a/drivers/scsi/scsi.c b/drivers/scsi/scsi.c
index 05608399be1..b414d022f3f 100644
--- a/drivers/scsi/scsi.c
+++ b/drivers/scsi/scsi.c
@@ -584,7 +584,7 @@ static int do_scsi_scan_one(struct udevice *dev, int id, int lun, bool verbose)
struct udevice *bdev;
struct blk_desc bd;
struct blk_desc *bdesc;
- char str[10], *name;
+ char str[10];
/*
* detect the scsi driver to get information about its geometry (block
@@ -600,10 +600,7 @@ static int do_scsi_scan_one(struct udevice *dev, int id, int lun, bool verbose)
* block devices created
*/
snprintf(str, sizeof(str), "id%dlun%d", id, lun);
- name = strdup(str);
- if (!name)
- return log_msg_ret("nam", -ENOMEM);
- ret = blk_create_devicef(dev, "scsi_blk", name, UCLASS_SCSI, -1,
+ ret = blk_create_devicef(dev, "scsi_blk", str, UCLASS_SCSI, -1,
bd.blksz, bd.lba, &bdev);
if (ret) {
debug("Can't create device\n");
diff --git a/drivers/usb/Kconfig b/drivers/usb/Kconfig
index daf2240ffd9..93c5ee69b25 100644
--- a/drivers/usb/Kconfig
+++ b/drivers/usb/Kconfig
@@ -78,8 +78,6 @@ source "drivers/usb/dwc3/Kconfig"
source "drivers/usb/mtu3/Kconfig"
-source "drivers/usb/musb/Kconfig"
-
source "drivers/usb/musb-new/Kconfig"
source "drivers/usb/emul/Kconfig"
diff --git a/drivers/usb/gadget/Kconfig b/drivers/usb/gadget/Kconfig
index 008f8c99a58..7e08aeab904 100644
--- a/drivers/usb/gadget/Kconfig
+++ b/drivers/usb/gadget/Kconfig
@@ -39,6 +39,7 @@ menuconfig USB_GADGET
config SPL_USB_GADGET
bool "USB Gadget Support in SPL"
+ depends on SPL_FRAMEWORK
help
Enable USB Gadget API which allows to enable USB device functions
in SPL.
@@ -107,6 +108,7 @@ config USB_GADGET_AT91
config USB_GADGET_DWC2_OTG
bool "DesignWare USB2.0 HS OTG controller (gadget mode)"
+ depends on ARM
select USB_GADGET_DUALSPEED
help
The Designware USB2.0 high-speed gadget controller
@@ -149,6 +151,7 @@ config USB_GADGET_OS_DESCRIPTORS
config CI_UDC
bool "ChipIdea device controller"
+ depends on !DM_USB_GADGET
select USB_GADGET_DUALSPEED
help
Say Y here to enable device controller functionality of the
diff --git a/drivers/usb/host/xhci-brcm.c b/drivers/usb/host/xhci-brcm.c
index 2ffad148dea..595839fac3c 100644
--- a/drivers/usb/host/xhci-brcm.c
+++ b/drivers/usb/host/xhci-brcm.c
@@ -85,7 +85,7 @@ static const struct udevice_id xhci_brcm_ids[] = {
{ }
};
-U_BOOT_DRIVER(usb_xhci) = {
+U_BOOT_DRIVER(xhci_brcm) = {
.name = "xhci_brcm",
.id = UCLASS_USB,
.probe = xhci_brcm_probe,
diff --git a/drivers/usb/host/xhci-exynos5.c b/drivers/usb/host/xhci-exynos5.c
index c509ce1620a..500696ccae7 100644
--- a/drivers/usb/host/xhci-exynos5.c
+++ b/drivers/usb/host/xhci-exynos5.c
@@ -246,7 +246,7 @@ static const struct udevice_id xhci_usb_ids[] = {
{ }
};
-U_BOOT_DRIVER(usb_xhci) = {
+U_BOOT_DRIVER(xhci_exynos) = {
.name = "xhci_exynos",
.id = UCLASS_USB,
.of_match = xhci_usb_ids,
diff --git a/drivers/usb/host/xhci-generic.c b/drivers/usb/host/xhci-generic.c
index 355d4883176..8bb4e277423 100644
--- a/drivers/usb/host/xhci-generic.c
+++ b/drivers/usb/host/xhci-generic.c
@@ -61,7 +61,7 @@ static const struct udevice_id xhci_usb_ids[] = {
{ }
};
-U_BOOT_DRIVER(usb_xhci) = {
+U_BOOT_DRIVER(xhci_generic) = {
.name = "xhci_generic",
.id = UCLASS_USB,
.of_match = xhci_usb_ids,
diff --git a/drivers/usb/host/xhci-mtk.c b/drivers/usb/host/xhci-mtk.c
index 7e288f0575b..ffe80c0bbdc 100644
--- a/drivers/usb/host/xhci-mtk.c
+++ b/drivers/usb/host/xhci-mtk.c
@@ -357,7 +357,7 @@ static const struct udevice_id xhci_mtk_ids[] = {
{ }
};
-U_BOOT_DRIVER(usb_xhci) = {
+U_BOOT_DRIVER(xhci_mtk) = {
.name = "xhci-mtk",
.id = UCLASS_USB,
.of_match = xhci_mtk_ids,
diff --git a/drivers/usb/host/xhci-mvebu.c b/drivers/usb/host/xhci-mvebu.c
index 1338b1021c6..12dc61aee9d 100644
--- a/drivers/usb/host/xhci-mvebu.c
+++ b/drivers/usb/host/xhci-mvebu.c
@@ -87,7 +87,7 @@ static const struct udevice_id xhci_usb_ids[] = {
{ }
};
-U_BOOT_DRIVER(usb_xhci) = {
+U_BOOT_DRIVER(xhci_mvebu) = {
.name = "xhci_mvebu",
.id = UCLASS_USB,
.of_match = xhci_usb_ids,
diff --git a/drivers/usb/host/xhci-rcar.c b/drivers/usb/host/xhci-rcar.c
index b72807053c4..95dfa2c3f87 100644
--- a/drivers/usb/host/xhci-rcar.c
+++ b/drivers/usb/host/xhci-rcar.c
@@ -149,7 +149,7 @@ static const struct udevice_id xhci_rcar_ids[] = {
{ }
};
-U_BOOT_DRIVER(usb_xhci) = {
+U_BOOT_DRIVER(xhci_rcar) = {
.name = "xhci_rcar",
.id = UCLASS_USB,
.probe = xhci_rcar_probe,
diff --git a/drivers/usb/musb/Kconfig b/drivers/usb/musb/Kconfig
deleted file mode 100644
index 2508b6ed0d1..00000000000
--- a/drivers/usb/musb/Kconfig
+++ /dev/null
@@ -1,20 +0,0 @@
-# SPDX-License-Identifier: GPL-2.0+
-#
-# (C) Copyright 2017
-# Adam Ford, Logic PD, aford173@gmail.com
-
-comment "Legacy MUSB Support"
-
-config USB_MUSB_HCD
- bool "Legacy MUSB Host Controller"
-
-config USB_MUSB_UDC
- bool "Legacy USB Device Controller"
-
-config USB_OMAP3
- bool "Legacy MUSB OMAP3 / OMAP4"
- depends on ARCH_OMAP2PLUS
-
-config USB_AM35X
- bool"Legacy MUSB AM35x"
- depends on ARCH_OMAP2PLUS && !USB_OMAP3
diff --git a/drivers/usb/musb/Makefile b/drivers/usb/musb/Makefile
deleted file mode 100644
index 744f2cfaa29..00000000000
--- a/drivers/usb/musb/Makefile
+++ /dev/null
@@ -1,9 +0,0 @@
-# SPDX-License-Identifier: GPL-2.0+
-#
-# (C) Copyright 2000-2007
-# Wolfgang Denk, DENX Software Engineering, wd@denx.de.
-
-obj-$(CONFIG_USB_MUSB_HCD) += musb_hcd.o musb_core.o
-obj-$(CONFIG_USB_MUSB_UDC) += musb_udc.o musb_core.o
-obj-$(CONFIG_USB_OMAP3) += omap3.o
-obj-$(CONFIG_USB_AM35X) += am35x.o
diff --git a/drivers/usb/musb/am35x.c b/drivers/usb/musb/am35x.c
deleted file mode 100644
index 2c23043d40e..00000000000
--- a/drivers/usb/musb/am35x.c
+++ /dev/null
@@ -1,138 +0,0 @@
-// SPDX-License-Identifier: GPL-2.0+
-/*
- * am35x.c - TI's AM35x platform specific usb wrapper functions.
- *
- * Author: Ajay Kumar Gupta <ajay.gupta@ti.com>
- *
- * Based on drivers/usb/musb/da8xx.c
- *
- * Copyright (c) 2010 Texas Instruments Incorporated
- */
-
-#include <linux/delay.h>
-
-#include "am35x.h"
-
-/* MUSB platform configuration */
-struct musb_config musb_cfg = {
- .regs = (struct musb_regs *)AM35X_USB_OTG_CORE_BASE,
- .timeout = AM35X_USB_OTG_TIMEOUT,
- .musb_speed = 0,
-};
-
-/*
- * Enable the USB phy
- */
-static u8 phy_on(void)
-{
- u32 devconf2;
- u32 timeout;
-
- devconf2 = readl(&am35x_scm_general_regs->devconf2);
-
- devconf2 &= ~(DEVCONF2_RESET | DEVCONF2_PHYPWRDN | DEVCONF2_OTGPWRDN |
- DEVCONF2_OTGMODE | DEVCONF2_REFFREQ |
- DEVCONF2_PHY_GPIOMODE);
- devconf2 |= DEVCONF2_SESENDEN | DEVCONF2_VBDTCTEN | DEVCONF2_PHY_PLLON |
- DEVCONF2_REFFREQ_13MHZ | DEVCONF2_DATPOL;
-
- writel(devconf2, &am35x_scm_general_regs->devconf2);
-
- /* wait until the USB phy is turned on */
- timeout = musb_cfg.timeout;
- while (timeout--)
- if (readl(&am35x_scm_general_regs->devconf2) & DEVCONF2_PHYCKGD)
- return 1;
-
- /* USB phy was not turned on */
- return 0;
-}
-
-/*
- * Disable the USB phy
- */
-static void phy_off(void)
-{
- u32 devconf2;
-
- /*
- * Power down the on-chip PHY.
- */
- devconf2 = readl(&am35x_scm_general_regs->devconf2);
-
- devconf2 &= ~DEVCONF2_PHY_PLLON;
- devconf2 |= DEVCONF2_PHYPWRDN | DEVCONF2_OTGPWRDN;
- writel(devconf2, &am35x_scm_general_regs->devconf2);
-}
-
-/*
- * This function performs platform specific initialization for usb0.
- */
-int musb_platform_init(void)
-{
- u32 revision;
- u32 sw_reset;
-
- /* global usb reset */
- sw_reset = readl(&am35x_scm_general_regs->ip_sw_reset);
- sw_reset |= (1 << 0);
- writel(sw_reset, &am35x_scm_general_regs->ip_sw_reset);
- sw_reset &= ~(1 << 0);
- writel(sw_reset, &am35x_scm_general_regs->ip_sw_reset);
-
- /* reset the controller */
- writel(0x1, &am35x_usb_regs->control);
- udelay(5000);
-
- /* start the on-chip usb phy and its pll */
- if (phy_on() == 0)
- return -1;
-
- /* Returns zero if e.g. not clocked */
- revision = readl(&am35x_usb_regs->revision);
- if (revision == 0)
- return -1;
-
- return 0;
-}
-
-/*
- * This function performs platform specific deinitialization for usb0.
- */
-void musb_platform_deinit(void)
-{
- /* Turn off the phy */
- phy_off();
-}
-
-/*
- * This function reads data from endpoint fifo for AM35x
- * which supports only 32bit read operation.
- *
- * ep - endpoint number
- * length - number of bytes to read from FIFO
- * fifo_data - pointer to data buffer into which data is read
- */
-__attribute__((weak))
-void read_fifo(u8 ep, u32 length, void *fifo_data)
-{
- u8 *data = (u8 *)fifo_data;
- u32 val;
- int i;
-
- /* select the endpoint index */
- writeb(ep, &musbr->index);
-
- if (length > 4) {
- for (i = 0; i < (length >> 2); i++) {
- val = readl(&musbr->fifox[ep]);
- memcpy(data, &val, 4);
- data += 4;
- }
- length %= 4;
- }
- if (length > 0) {
- val = readl(&musbr->fifox[ep]);
- memcpy(data, &val, length);
- }
-}
diff --git a/drivers/usb/musb/am35x.h b/drivers/usb/musb/am35x.h
deleted file mode 100644
index 82ad94329cb..00000000000
--- a/drivers/usb/musb/am35x.h
+++ /dev/null
@@ -1,81 +0,0 @@
-/* SPDX-License-Identifier: GPL-2.0+ */
-/*
- * am35x.h - TI's AM35x platform specific usb wrapper definitions.
- *
- * Author: Ajay Kumar Gupta <ajay.gupta@ti.com>
- *
- * Based on drivers/usb/musb/da8xx.h
- *
- * Copyright (c) 2010 Texas Instruments Incorporated
- */
-
-#ifndef __AM35X_USB_H__
-#define __AM35X_USB_H__
-
-#include <asm/arch/am35x_def.h>
-#include "musb_core.h"
-
-/* Base address of musb wrapper */
-#define AM35X_USB_OTG_BASE 0x5C040000
-
-/* Base address of musb core */
-#define AM35X_USB_OTG_CORE_BASE (AM35X_USB_OTG_BASE + 0x400)
-
-/* Timeout for AM35x usb module */
-#define AM35X_USB_OTG_TIMEOUT 0x3FFFFFF
-
-/*
- * AM35x platform USB wrapper register overlay.
- */
-struct am35x_usb_regs {
- u32 revision;
- u32 control;
- u32 status;
- u32 emulation;
- u32 reserved0[1];
- u32 autoreq;
- u32 srpfixtime;
- u32 ep_intsrc;
- u32 ep_intsrcset;
- u32 ep_intsrcclr;
- u32 ep_intmsk;
- u32 ep_intmskset;
- u32 ep_intmskclr;
- u32 ep_intsrcmsked;
- u32 reserved1[1];
- u32 core_intsrc;
- u32 core_intsrcset;
- u32 core_intsrcclr;
- u32 core_intmsk;
- u32 core_intmskset;
- u32 core_intmskclr;
- u32 core_intsrcmsked;
- u32 reserved2[1];
- u32 eoi;
- u32 mop_sop_en;
- u32 reserved3[2];
- u32 txmode;
- u32 rxmode;
- u32 epcount_mode;
-};
-
-#define am35x_usb_regs ((struct am35x_usb_regs *)AM35X_USB_OTG_BASE)
-
-/* USB 2.0 PHY Control */
-#define DEVCONF2_PHY_GPIOMODE (1 << 23)
-#define DEVCONF2_OTGMODE (3 << 14)
-#define DEVCONF2_SESENDEN (1 << 13) /* Vsess_end comparator */
-#define DEVCONF2_VBDTCTEN (1 << 12) /* Vbus comparator */
-#define DEVCONF2_REFFREQ_24MHZ (2 << 8)
-#define DEVCONF2_REFFREQ_26MHZ (7 << 8)
-#define DEVCONF2_REFFREQ_13MHZ (6 << 8)
-#define DEVCONF2_REFFREQ (0xf << 8)
-#define DEVCONF2_PHYCKGD (1 << 7)
-#define DEVCONF2_VBUSSENSE (1 << 6)
-#define DEVCONF2_PHY_PLLON (1 << 5) /* override PLL suspend */
-#define DEVCONF2_RESET (1 << 4)
-#define DEVCONF2_PHYPWRDN (1 << 3)
-#define DEVCONF2_OTGPWRDN (1 << 2)
-#define DEVCONF2_DATPOL (1 << 1)
-
-#endif /* __AM35X_USB_H__ */
diff --git a/drivers/usb/musb/musb_core.c b/drivers/usb/musb/musb_core.c
deleted file mode 100644
index 260552e4dbd..00000000000
--- a/drivers/usb/musb/musb_core.c
+++ /dev/null
@@ -1,150 +0,0 @@
-// SPDX-License-Identifier: GPL-2.0+
-/*
- * Mentor USB OTG Core functionality common for both Host and Device
- * functionality.
- *
- * Copyright (c) 2008 Texas Instruments
- *
- * Author: Thomas Abraham t-abraham@ti.com, Texas Instruments
- */
-
-#include <linux/bitops.h>
-
-#include "musb_core.h"
-struct musb_regs *musbr;
-
-/*
- * program the mentor core to start (enable interrupts, dma, etc.)
- */
-void musb_start(void)
-{
-#if defined(CONFIG_USB_MUSB_HCD)
- u8 devctl;
- u8 busctl;
-#endif
-
- /* disable all interrupts */
- writew(0, &musbr->intrtxe);
- writew(0, &musbr->intrrxe);
- writeb(0, &musbr->intrusbe);
- writeb(0, &musbr->testmode);
-
- /* put into basic highspeed mode and start session */
- writeb(MUSB_POWER_HSENAB, &musbr->power);
-#if defined(CONFIG_USB_MUSB_HCD)
- /* Program PHY to use EXT VBUS if required */
- if (musb_cfg.extvbus == 1) {
- busctl = musb_read_ulpi_buscontrol(musbr);
- musb_write_ulpi_buscontrol(musbr, busctl | ULPI_USE_EXTVBUS);
- }
-
- devctl = readb(&musbr->devctl);
- writeb(devctl | MUSB_DEVCTL_SESSION, &musbr->devctl);
-#endif
-}
-
-#ifdef MUSB_NO_DYNAMIC_FIFO
-# define config_fifo(dir, idx, addr)
-#else
-# define config_fifo(dir, idx, addr) \
- do { \
- writeb(idx, &musbr->dir##fifosz); \
- writew(addr, &musbr->dir##fifoadd); \
- } while (0)
-#endif
-
-/*
- * This function configures the endpoint configuration. The musb hcd or musb
- * device implementation can use this function to configure the endpoints
- * and set the FIFO sizes. Note: The summation of FIFO sizes of all endpoints
- * should not be more than the available FIFO size.
- *
- * epinfo - Pointer to EP configuration table
- * cnt - Number of entries in the EP conf table.
- */
-void musb_configure_ep(const struct musb_epinfo *epinfo, u8 cnt)
-{
- u16 csr;
- u16 fifoaddr = 64 >> 3; /* First 64 bytes of FIFO reserved for EP0 */
- u32 fifosize;
- u8 idx;
-
- while (cnt--) {
- /* prepare fifosize to write to register */
- fifosize = epinfo->epsize >> 3;
- idx = fifosize ? ((ffs(fifosize) - 1) & 0xF) : 0;
-
- writeb(epinfo->epnum, &musbr->index);
- if (epinfo->epdir) {
- /* Configure fifo size and fifo base address */
- config_fifo(tx, idx, fifoaddr);
-
- csr = readw(&musbr->txcsr);
- /* clear the data toggle bit */
- writew(csr | MUSB_TXCSR_CLRDATATOG, &musbr->txcsr);
- /* Flush fifo if required */
- if (csr & MUSB_TXCSR_TXPKTRDY)
- writew(csr | MUSB_TXCSR_FLUSHFIFO,
- &musbr->txcsr);
- } else {
- /* Configure fifo size and fifo base address */
- config_fifo(rx, idx, fifoaddr);
-
- csr = readw(&musbr->rxcsr);
- /* clear the data toggle bit */
- writew(csr | MUSB_RXCSR_CLRDATATOG, &musbr->rxcsr);
- /* Flush fifo if required */
- if (csr & MUSB_RXCSR_RXPKTRDY)
- writew(csr | MUSB_RXCSR_FLUSHFIFO,
- &musbr->rxcsr);
- }
- fifoaddr += 1 << idx;
- epinfo++;
- }
-}
-
-/*
- * This function writes data to endpoint fifo
- *
- * ep - endpoint number
- * length - number of bytes to write to FIFO
- * fifo_data - Pointer to data buffer that contains the data to write
- */
-__attribute__((weak))
-void write_fifo(u8 ep, u32 length, void *fifo_data)
-{
- u8 *data = (u8 *)fifo_data;
-
- /* select the endpoint index */
- writeb(ep, &musbr->index);
-
- /* write the data to the fifo */
- while (length--)
- writeb(*data++, &musbr->fifox[ep]);
-}
-
-/*
- * AM35x supports only 32bit read operations so
- * use seperate read_fifo() function for it.
- */
-#ifndef CONFIG_USB_AM35X
-/*
- * This function reads data from endpoint fifo
- *
- * ep - endpoint number
- * length - number of bytes to read from FIFO
- * fifo_data - pointer to data buffer into which data is read
- */
-__attribute__((weak))
-void read_fifo(u8 ep, u32 length, void *fifo_data)
-{
- u8 *data = (u8 *)fifo_data;
-
- /* select the endpoint index */
- writeb(ep, &musbr->index);
-
- /* read the data to the fifo */
- while (length--)
- *data++ = readb(&musbr->fifox[ep]);
-}
-#endif /* CONFIG_USB_AM35X */
diff --git a/drivers/usb/musb/musb_core.h b/drivers/usb/musb/musb_core.h
deleted file mode 100644
index 47b839c0835..00000000000
--- a/drivers/usb/musb/musb_core.h
+++ /dev/null
@@ -1,343 +0,0 @@
-/* SPDX-License-Identifier: GPL-2.0 */
-/******************************************************************
- * Copyright 2008 Mentor Graphics Corporation
- * Copyright (C) 2008 by Texas Instruments
- *
- * This file is part of the Inventra Controller Driver for Linux.
- ******************************************************************/
-
-#ifndef __MUSB_HDRC_DEFS_H__
-#define __MUSB_HDRC_DEFS_H__
-
-#include <usb_defs.h>
-#include <asm/io.h>
-
-#define MUSB_EP0_FIFOSIZE 64 /* This is non-configurable */
-
-/* EP0 */
-struct musb_ep0_regs {
- u16 reserved4;
- u16 csr0;
- u16 reserved5;
- u16 reserved6;
- u16 count0;
- u8 host_type0;
- u8 host_naklimit0;
- u8 reserved7;
- u8 reserved8;
- u8 reserved9;
- u8 configdata;
-};
-
-/* EP 1-15 */
-struct musb_epN_regs {
- u16 txmaxp;
- u16 txcsr;
- u16 rxmaxp;
- u16 rxcsr;
- u16 rxcount;
- u8 txtype;
- u8 txinterval;
- u8 rxtype;
- u8 rxinterval;
- u8 reserved0;
- u8 fifosize;
-};
-
-/* Mentor USB core register overlay structure */
-#ifndef musb_regs
-struct musb_regs {
- /* common registers */
- u8 faddr;
- u8 power;
- u16 intrtx;
- u16 intrrx;
- u16 intrtxe;
- u16 intrrxe;
- u8 intrusb;
- u8 intrusbe;
- u16 frame;
- u8 index;
- u8 testmode;
- /* indexed registers */
- u16 txmaxp;
- u16 txcsr;
- u16 rxmaxp;
- u16 rxcsr;
- u16 rxcount;
- u8 txtype;
- u8 txinterval;
- u8 rxtype;
- u8 rxinterval;
- u8 reserved0;
- u8 fifosize;
- /* fifo */
- u32 fifox[16];
- /* OTG, dynamic FIFO, version & vendor registers */
- u8 devctl;
- u8 reserved1;
- u8 txfifosz;
- u8 rxfifosz;
- u16 txfifoadd;
- u16 rxfifoadd;
- u32 vcontrol;
- u16 hwvers;
- u16 reserved2a[1];
- u8 ulpi_busctl;
- u8 reserved2b[1];
- u16 reserved2[3];
- u8 epinfo;
- u8 raminfo;
- u8 linkinfo;
- u8 vplen;
- u8 hseof1;
- u8 fseof1;
- u8 lseof1;
- u8 reserved3;
- /* target address registers */
- struct musb_tar_regs {
- u8 txfuncaddr;
- u8 reserved0;
- u8 txhubaddr;
- u8 txhubport;
- u8 rxfuncaddr;
- u8 reserved1;
- u8 rxhubaddr;
- u8 rxhubport;
- } tar[16];
- /*
- * endpoint registers
- * ep0 elements are valid when array index is 0
- * otherwise epN is valid
- */
- union musb_ep_regs {
- struct musb_ep0_regs ep0;
- struct musb_epN_regs epN;
- } ep[16];
-
-} __attribute__((packed));
-#endif
-
-/*
- * MUSB Register bits
- */
-
-/* POWER */
-#define MUSB_POWER_ISOUPDATE 0x80
-#define MUSB_POWER_SOFTCONN 0x40
-#define MUSB_POWER_HSENAB 0x20
-#define MUSB_POWER_HSMODE 0x10
-#define MUSB_POWER_RESET 0x08
-#define MUSB_POWER_RESUME 0x04
-#define MUSB_POWER_SUSPENDM 0x02
-#define MUSB_POWER_ENSUSPEND 0x01
-#define MUSB_POWER_HSMODE_SHIFT 4
-
-/* INTRUSB */
-#define MUSB_INTR_SUSPEND 0x01
-#define MUSB_INTR_RESUME 0x02
-#define MUSB_INTR_RESET 0x04
-#define MUSB_INTR_BABBLE 0x04
-#define MUSB_INTR_SOF 0x08
-#define MUSB_INTR_CONNECT 0x10
-#define MUSB_INTR_DISCONNECT 0x20
-#define MUSB_INTR_SESSREQ 0x40
-#define MUSB_INTR_VBUSERROR 0x80 /* For SESSION end */
-
-/* DEVCTL */
-#define MUSB_DEVCTL_BDEVICE 0x80
-#define MUSB_DEVCTL_FSDEV 0x40
-#define MUSB_DEVCTL_LSDEV 0x20
-#define MUSB_DEVCTL_VBUS 0x18
-#define MUSB_DEVCTL_VBUS_SHIFT 3
-#define MUSB_DEVCTL_HM 0x04
-#define MUSB_DEVCTL_HR 0x02
-#define MUSB_DEVCTL_SESSION 0x01
-
-/* ULPI VBUSCONTROL */
-#define ULPI_USE_EXTVBUS 0x01
-#define ULPI_USE_EXTVBUSIND 0x02
-
-/* TESTMODE */
-#define MUSB_TEST_FORCE_HOST 0x80
-#define MUSB_TEST_FIFO_ACCESS 0x40
-#define MUSB_TEST_FORCE_FS 0x20
-#define MUSB_TEST_FORCE_HS 0x10
-#define MUSB_TEST_PACKET 0x08
-#define MUSB_TEST_K 0x04
-#define MUSB_TEST_J 0x02
-#define MUSB_TEST_SE0_NAK 0x01
-
-/* Allocate for double-packet buffering (effectively doubles assigned _SIZE) */
-#define MUSB_FIFOSZ_DPB 0x10
-/* Allocation size (8, 16, 32, ... 4096) */
-#define MUSB_FIFOSZ_SIZE 0x0f
-
-/* CSR0 */
-#define MUSB_CSR0_FLUSHFIFO 0x0100
-#define MUSB_CSR0_TXPKTRDY 0x0002
-#define MUSB_CSR0_RXPKTRDY 0x0001
-
-/* CSR0 in Peripheral mode */
-#define MUSB_CSR0_P_SVDSETUPEND 0x0080
-#define MUSB_CSR0_P_SVDRXPKTRDY 0x0040
-#define MUSB_CSR0_P_SENDSTALL 0x0020
-#define MUSB_CSR0_P_SETUPEND 0x0010
-#define MUSB_CSR0_P_DATAEND 0x0008
-#define MUSB_CSR0_P_SENTSTALL 0x0004
-
-/* CSR0 in Host mode */
-#define MUSB_CSR0_H_DIS_PING 0x0800
-#define MUSB_CSR0_H_WR_DATATOGGLE 0x0400 /* Set to allow setting: */
-#define MUSB_CSR0_H_DATATOGGLE 0x0200 /* Data toggle control */
-#define MUSB_CSR0_H_NAKTIMEOUT 0x0080
-#define MUSB_CSR0_H_STATUSPKT 0x0040
-#define MUSB_CSR0_H_REQPKT 0x0020
-#define MUSB_CSR0_H_ERROR 0x0010
-#define MUSB_CSR0_H_SETUPPKT 0x0008
-#define MUSB_CSR0_H_RXSTALL 0x0004
-
-/* CSR0 bits to avoid zeroing (write zero clears, write 1 ignored) */
-#define MUSB_CSR0_P_WZC_BITS \
- (MUSB_CSR0_P_SENTSTALL)
-#define MUSB_CSR0_H_WZC_BITS \
- (MUSB_CSR0_H_NAKTIMEOUT | MUSB_CSR0_H_RXSTALL \
- | MUSB_CSR0_RXPKTRDY)
-
-/* TxType/RxType */
-#define MUSB_TYPE_SPEED 0xc0
-#define MUSB_TYPE_SPEED_SHIFT 6
-#define MUSB_TYPE_SPEED_HIGH 1
-#define MUSB_TYPE_SPEED_FULL 2
-#define MUSB_TYPE_SPEED_LOW 3
-#define MUSB_TYPE_PROTO 0x30 /* Implicitly zero for ep0 */
-#define MUSB_TYPE_PROTO_SHIFT 4
-#define MUSB_TYPE_REMOTE_END 0xf /* Implicitly zero for ep0 */
-#define MUSB_TYPE_PROTO_BULK 2
-#define MUSB_TYPE_PROTO_INTR 3
-
-/* CONFIGDATA */
-#define MUSB_CONFIGDATA_MPRXE 0x80 /* Auto bulk pkt combining */
-#define MUSB_CONFIGDATA_MPTXE 0x40 /* Auto bulk pkt splitting */
-#define MUSB_CONFIGDATA_BIGENDIAN 0x20
-#define MUSB_CONFIGDATA_HBRXE 0x10 /* HB-ISO for RX */
-#define MUSB_CONFIGDATA_HBTXE 0x08 /* HB-ISO for TX */
-#define MUSB_CONFIGDATA_DYNFIFO 0x04 /* Dynamic FIFO sizing */
-#define MUSB_CONFIGDATA_SOFTCONE 0x02 /* SoftConnect */
-#define MUSB_CONFIGDATA_UTMIDW 0x01 /* Data width 0/1 => 8/16bits */
-
-/* TXCSR in Peripheral and Host mode */
-#define MUSB_TXCSR_AUTOSET 0x8000
-#define MUSB_TXCSR_MODE 0x2000
-#define MUSB_TXCSR_DMAENAB 0x1000
-#define MUSB_TXCSR_FRCDATATOG 0x0800
-#define MUSB_TXCSR_DMAMODE 0x0400
-#define MUSB_TXCSR_CLRDATATOG 0x0040
-#define MUSB_TXCSR_FLUSHFIFO 0x0008
-#define MUSB_TXCSR_FIFONOTEMPTY 0x0002
-#define MUSB_TXCSR_TXPKTRDY 0x0001
-
-/* TXCSR in Peripheral mode */
-#define MUSB_TXCSR_P_ISO 0x4000
-#define MUSB_TXCSR_P_INCOMPTX 0x0080
-#define MUSB_TXCSR_P_SENTSTALL 0x0020
-#define MUSB_TXCSR_P_SENDSTALL 0x0010
-#define MUSB_TXCSR_P_UNDERRUN 0x0004
-
-/* TXCSR in Host mode */
-#define MUSB_TXCSR_H_WR_DATATOGGLE 0x0200
-#define MUSB_TXCSR_H_DATATOGGLE 0x0100
-#define MUSB_TXCSR_H_NAKTIMEOUT 0x0080
-#define MUSB_TXCSR_H_RXSTALL 0x0020
-#define MUSB_TXCSR_H_ERROR 0x0004
-#define MUSB_TXCSR_H_DATATOGGLE_SHIFT 8
-
-/* TXCSR bits to avoid zeroing (write zero clears, write 1 ignored) */
-#define MUSB_TXCSR_P_WZC_BITS \
- (MUSB_TXCSR_P_INCOMPTX | MUSB_TXCSR_P_SENTSTALL \
- | MUSB_TXCSR_P_UNDERRUN | MUSB_TXCSR_FIFONOTEMPTY)
-#define MUSB_TXCSR_H_WZC_BITS \
- (MUSB_TXCSR_H_NAKTIMEOUT | MUSB_TXCSR_H_RXSTALL \
- | MUSB_TXCSR_H_ERROR | MUSB_TXCSR_FIFONOTEMPTY)
-
-/* RXCSR in Peripheral and Host mode */
-#define MUSB_RXCSR_AUTOCLEAR 0x8000
-#define MUSB_RXCSR_DMAENAB 0x2000
-#define MUSB_RXCSR_DISNYET 0x1000
-#define MUSB_RXCSR_PID_ERR 0x1000
-#define MUSB_RXCSR_DMAMODE 0x0800
-#define MUSB_RXCSR_INCOMPRX 0x0100
-#define MUSB_RXCSR_CLRDATATOG 0x0080
-#define MUSB_RXCSR_FLUSHFIFO 0x0010
-#define MUSB_RXCSR_DATAERROR 0x0008
-#define MUSB_RXCSR_FIFOFULL 0x0002
-#define MUSB_RXCSR_RXPKTRDY 0x0001
-
-/* RXCSR in Peripheral mode */
-#define MUSB_RXCSR_P_ISO 0x4000
-#define MUSB_RXCSR_P_SENTSTALL 0x0040
-#define MUSB_RXCSR_P_SENDSTALL 0x0020
-#define MUSB_RXCSR_P_OVERRUN 0x0004
-
-/* RXCSR in Host mode */
-#define MUSB_RXCSR_H_AUTOREQ 0x4000
-#define MUSB_RXCSR_H_WR_DATATOGGLE 0x0400
-#define MUSB_RXCSR_H_DATATOGGLE 0x0200
-#define MUSB_RXCSR_H_RXSTALL 0x0040
-#define MUSB_RXCSR_H_REQPKT 0x0020
-#define MUSB_RXCSR_H_ERROR 0x0004
-#define MUSB_S_RXCSR_H_DATATOGGLE 9
-
-/* RXCSR bits to avoid zeroing (write zero clears, write 1 ignored) */
-#define MUSB_RXCSR_P_WZC_BITS \
- (MUSB_RXCSR_P_SENTSTALL | MUSB_RXCSR_P_OVERRUN \
- | MUSB_RXCSR_RXPKTRDY)
-#define MUSB_RXCSR_H_WZC_BITS \
- (MUSB_RXCSR_H_RXSTALL | MUSB_RXCSR_H_ERROR \
- | MUSB_RXCSR_DATAERROR | MUSB_RXCSR_RXPKTRDY)
-
-/* HUBADDR */
-#define MUSB_HUBADDR_MULTI_TT 0x80
-
-/* Endpoint configuration information. Note: The value of endpoint fifo size
- * element should be either 8,16,32,64,128,256,512,1024,2048 or 4096. Other
- * values are not supported
- */
-struct musb_epinfo {
- u8 epnum; /* endpoint number */
- u8 epdir; /* endpoint direction */
- u16 epsize; /* endpoint FIFO size */
-};
-
-/*
- * Platform specific MUSB configuration. Any platform using the musb
- * functionality should create one instance of this structure in the
- * platform specific file.
- */
-struct musb_config {
- struct musb_regs *regs;
- u32 timeout;
- u8 musb_speed;
- u8 extvbus;
-};
-
-/* externally defined data */
-extern struct musb_config musb_cfg;
-extern struct musb_regs *musbr;
-
-/* exported functions */
-extern void musb_start(void);
-extern void musb_configure_ep(const struct musb_epinfo *epinfo, u8 cnt);
-extern void write_fifo(u8 ep, u32 length, void *fifo_data);
-extern void read_fifo(u8 ep, u32 length, void *fifo_data);
-
-static inline u8 musb_read_ulpi_buscontrol(struct musb_regs *musbr)
-{
- return readb(&musbr->ulpi_busctl);
-}
-static inline void musb_write_ulpi_buscontrol(struct musb_regs *musbr, u8 val)
-{
- writeb(val, &musbr->ulpi_busctl);
-}
-
-#endif /* __MUSB_HDRC_DEFS_H__ */
diff --git a/drivers/usb/musb/musb_debug.h b/drivers/usb/musb/musb_debug.h
deleted file mode 100644
index 2c5e192ab21..00000000000
--- a/drivers/usb/musb/musb_debug.h
+++ /dev/null
@@ -1,191 +0,0 @@
-/* SPDX-License-Identifier: GPL-2.0+ */
-/*
- * Copyright (c) 2009 Wind River Systems, Inc.
- * Tom Rix <Tom.Rix@windriver.com>
- */
-
-/* Define MUSB_DEBUG before including this file to get debug macros */
-#ifdef MUSB_DEBUG
-
-#define MUSB_FLAGS_PRINT(v, x, y) \
- if (((v) & MUSB_##x##_##y)) \
- serial_printf("\t\t"#y"\n")
-
-static inline void musb_print_pwr(u8 b)
-{
- serial_printf("\tpower 0x%2.2x\n", b);
- MUSB_FLAGS_PRINT(b, POWER, ISOUPDATE);
- MUSB_FLAGS_PRINT(b, POWER, SOFTCONN);
- MUSB_FLAGS_PRINT(b, POWER, HSENAB);
- MUSB_FLAGS_PRINT(b, POWER, HSMODE);
- MUSB_FLAGS_PRINT(b, POWER, RESET);
- MUSB_FLAGS_PRINT(b, POWER, RESUME);
- MUSB_FLAGS_PRINT(b, POWER, SUSPENDM);
- MUSB_FLAGS_PRINT(b, POWER, ENSUSPEND);
-}
-
-static inline void musb_print_csr0(u16 w)
-{
- serial_printf("\tcsr0 0x%4.4x\n", w);
- MUSB_FLAGS_PRINT(w, CSR0, FLUSHFIFO);
- MUSB_FLAGS_PRINT(w, CSR0_P, SVDSETUPEND);
- MUSB_FLAGS_PRINT(w, CSR0_P, SVDRXPKTRDY);
- MUSB_FLAGS_PRINT(w, CSR0_P, SENDSTALL);
- MUSB_FLAGS_PRINT(w, CSR0_P, SETUPEND);
- MUSB_FLAGS_PRINT(w, CSR0_P, DATAEND);
- MUSB_FLAGS_PRINT(w, CSR0_P, SENTSTALL);
- MUSB_FLAGS_PRINT(w, CSR0, TXPKTRDY);
- MUSB_FLAGS_PRINT(w, CSR0, RXPKTRDY);
-}
-
-static inline void musb_print_intrusb(u8 b)
-{
- serial_printf("\tintrusb 0x%2.2x\n", b);
- MUSB_FLAGS_PRINT(b, INTR, VBUSERROR);
- MUSB_FLAGS_PRINT(b, INTR, SESSREQ);
- MUSB_FLAGS_PRINT(b, INTR, DISCONNECT);
- MUSB_FLAGS_PRINT(b, INTR, CONNECT);
- MUSB_FLAGS_PRINT(b, INTR, SOF);
- MUSB_FLAGS_PRINT(b, INTR, RESUME);
- MUSB_FLAGS_PRINT(b, INTR, SUSPEND);
-
- if (b & MUSB_INTR_BABBLE)
- serial_printf("\t\tMUSB_INTR_RESET or MUSB_INTR_BABBLE\n");
-
-}
-
-static inline void musb_print_intrtx(u16 w)
-{
- serial_printf("\tintrtx 0x%4.4x\n", w);
-}
-
-static inline void musb_print_intrrx(u16 w)
-{
- serial_printf("\tintrx 0x%4.4x\n", w);
-}
-
-static inline void musb_print_devctl(u8 b)
-{
- serial_printf("\tdevctl 0x%2.2x\n", b);
- if (b & MUSB_DEVCTL_BDEVICE)
- serial_printf("\t\tB device\n");
- else
- serial_printf("\t\tA device\n");
- if (b & MUSB_DEVCTL_FSDEV)
- serial_printf("\t\tFast Device -(host mode)\n");
- if (b & MUSB_DEVCTL_LSDEV)
- serial_printf("\t\tSlow Device -(host mode)\n");
- if (b & MUSB_DEVCTL_HM)
- serial_printf("\t\tHost mode\n");
- else
- serial_printf("\t\tPeripherial mode\n");
- if (b & MUSB_DEVCTL_HR)
- serial_printf("\t\tHost request started(B device)\n");
- else
- serial_printf("\t\tHost request finished(B device)\n");
- if (b & MUSB_DEVCTL_BDEVICE) {
- if (b & MUSB_DEVCTL_SESSION)
- serial_printf("\t\tStart of session(B device)\n");
- else
- serial_printf("\t\tEnd of session(B device)\n");
- } else {
- if (b & MUSB_DEVCTL_SESSION)
- serial_printf("\t\tStart of session(A device)\n");
- else
- serial_printf("\t\tEnd of session(A device)\n");
- }
-}
-
-static inline void musb_print_config(u8 b)
-{
- serial_printf("\tconfig 0x%2.2x\n", b);
- if (b & MUSB_CONFIGDATA_MPRXE)
- serial_printf("\t\tAuto combine rx bulk packets\n");
- if (b & MUSB_CONFIGDATA_MPTXE)
- serial_printf("\t\tAuto split tx bulk packets\n");
- if (b & MUSB_CONFIGDATA_BIGENDIAN)
- serial_printf("\t\tBig Endian ordering\n");
- else
- serial_printf("\t\tLittle Endian ordering\n");
- if (b & MUSB_CONFIGDATA_HBRXE)
- serial_printf("\t\tHigh speed rx iso endpoint\n");
- if (b & MUSB_CONFIGDATA_HBTXE)
- serial_printf("\t\tHigh speed tx iso endpoint\n");
- if (b & MUSB_CONFIGDATA_DYNFIFO)
- serial_printf("\t\tDynamic fifo sizing\n");
- if (b & MUSB_CONFIGDATA_SOFTCONE)
- serial_printf("\t\tSoft Connect\n");
- if (b & MUSB_CONFIGDATA_UTMIDW)
- serial_printf("\t\t16 bit data width\n");
- else
- serial_printf("\t\t8 bit data width\n");
-}
-
-static inline void musb_print_rxmaxp(u16 w)
-{
- serial_printf("\trxmaxp 0x%4.4x\n", w);
-}
-
-static inline void musb_print_rxcsr(u16 w)
-{
- serial_printf("\trxcsr 0x%4.4x\n", w);
- MUSB_FLAGS_PRINT(w, RXCSR, AUTOCLEAR);
- MUSB_FLAGS_PRINT(w, RXCSR, DMAENAB);
- MUSB_FLAGS_PRINT(w, RXCSR, DISNYET);
- MUSB_FLAGS_PRINT(w, RXCSR, PID_ERR);
- MUSB_FLAGS_PRINT(w, RXCSR, DMAMODE);
- MUSB_FLAGS_PRINT(w, RXCSR, CLRDATATOG);
- MUSB_FLAGS_PRINT(w, RXCSR, FLUSHFIFO);
- MUSB_FLAGS_PRINT(w, RXCSR, DATAERROR);
- MUSB_FLAGS_PRINT(w, RXCSR, FIFOFULL);
- MUSB_FLAGS_PRINT(w, RXCSR, RXPKTRDY);
- MUSB_FLAGS_PRINT(w, RXCSR_P, SENTSTALL);
- MUSB_FLAGS_PRINT(w, RXCSR_P, SENDSTALL);
- MUSB_FLAGS_PRINT(w, RXCSR_P, OVERRUN);
-
- if (w & MUSB_RXCSR_P_ISO)
- serial_printf("\t\tiso mode\n");
- else
- serial_printf("\t\tbulk mode\n");
-
-}
-
-static inline void musb_print_txmaxp(u16 w)
-{
- serial_printf("\ttxmaxp 0x%4.4x\n", w);
-}
-
-static inline void musb_print_txcsr(u16 w)
-{
- serial_printf("\ttxcsr 0x%4.4x\n", w);
- MUSB_FLAGS_PRINT(w, TXCSR, TXPKTRDY);
- MUSB_FLAGS_PRINT(w, TXCSR, FIFONOTEMPTY);
- MUSB_FLAGS_PRINT(w, TXCSR, FLUSHFIFO);
- MUSB_FLAGS_PRINT(w, TXCSR, CLRDATATOG);
- MUSB_FLAGS_PRINT(w, TXCSR_P, UNDERRUN);
- MUSB_FLAGS_PRINT(w, TXCSR_P, SENTSTALL);
- MUSB_FLAGS_PRINT(w, TXCSR_P, SENDSTALL);
-
- if (w & MUSB_TXCSR_MODE)
- serial_printf("\t\tTX mode\n");
- else
- serial_printf("\t\tRX mode\n");
-}
-
-#else
-
-/* stubs */
-
-#define musb_print_pwr(b)
-#define musb_print_csr0(w)
-#define musb_print_intrusb(b)
-#define musb_print_intrtx(w)
-#define musb_print_intrrx(w)
-#define musb_print_devctl(b)
-#define musb_print_config(b)
-#define musb_print_rxmaxp(w)
-#define musb_print_rxcsr(w)
-#define musb_print_txmaxp(w)
-#define musb_print_txcsr(w)
-
-#endif /* MUSB_DEBUG */
diff --git a/drivers/usb/musb/musb_hcd.c b/drivers/usb/musb/musb_hcd.c
deleted file mode 100644
index c95c6a48281..00000000000
--- a/drivers/usb/musb/musb_hcd.c
+++ /dev/null
@@ -1,1161 +0,0 @@
-// SPDX-License-Identifier: GPL-2.0+
-/*
- * Mentor USB OTG Core host controller driver.
- *
- * Copyright (c) 2008 Texas Instruments
- *
- * Author: Thomas Abraham t-abraham@ti.com, Texas Instruments
- */
-
-#include <log.h>
-#include <usb.h>
-#include <linux/delay.h>
-#include "musb_hcd.h"
-
-/* MSC control transfers */
-#define USB_MSC_BBB_RESET 0xFF
-#define USB_MSC_BBB_GET_MAX_LUN 0xFE
-
-/* Endpoint configuration information */
-static const struct musb_epinfo epinfo[3] = {
- {MUSB_BULK_EP, 1, 512}, /* EP1 - Bluk Out - 512 Bytes */
- {MUSB_BULK_EP, 0, 512}, /* EP1 - Bluk In - 512 Bytes */
- {MUSB_INTR_EP, 0, 64} /* EP2 - Interrupt IN - 64 Bytes */
-};
-
-/* --- Virtual Root Hub ---------------------------------------------------- */
-#ifdef MUSB_NO_MULTIPOINT
-static int rh_devnum;
-static u32 port_status;
-
-#include <usbroothubdes.h>
-
-#endif
-
-/*
- * This function writes the data toggle value.
- */
-static void write_toggle(struct usb_device *dev, u8 ep, u8 dir_out)
-{
- u16 toggle = usb_gettoggle(dev, ep, dir_out);
- u16 csr;
-
- if (dir_out) {
- csr = readw(&musbr->txcsr);
- if (!toggle) {
- if (csr & MUSB_TXCSR_MODE)
- csr = MUSB_TXCSR_CLRDATATOG;
- else
- csr = 0;
- writew(csr, &musbr->txcsr);
- } else {
- csr |= MUSB_TXCSR_H_WR_DATATOGGLE;
- writew(csr, &musbr->txcsr);
- csr |= (toggle << MUSB_TXCSR_H_DATATOGGLE_SHIFT);
- writew(csr, &musbr->txcsr);
- }
- } else {
- if (!toggle) {
- csr = readw(&musbr->txcsr);
- if (csr & MUSB_TXCSR_MODE)
- csr = MUSB_RXCSR_CLRDATATOG;
- else
- csr = 0;
- writew(csr, &musbr->rxcsr);
- } else {
- csr = readw(&musbr->rxcsr);
- csr |= MUSB_RXCSR_H_WR_DATATOGGLE;
- writew(csr, &musbr->rxcsr);
- csr |= (toggle << MUSB_S_RXCSR_H_DATATOGGLE);
- writew(csr, &musbr->rxcsr);
- }
- }
-}
-
-/*
- * This function checks if RxStall has occurred on the endpoint. If a RxStall
- * has occurred, the RxStall is cleared and 1 is returned. If RxStall has
- * not occurred, 0 is returned.
- */
-static u8 check_stall(u8 ep, u8 dir_out)
-{
- u16 csr;
-
- /* For endpoint 0 */
- if (!ep) {
- csr = readw(&musbr->txcsr);
- if (csr & MUSB_CSR0_H_RXSTALL) {
- csr &= ~MUSB_CSR0_H_RXSTALL;
- writew(csr, &musbr->txcsr);
- return 1;
- }
- } else { /* For non-ep0 */
- if (dir_out) { /* is it tx ep */
- csr = readw(&musbr->txcsr);
- if (csr & MUSB_TXCSR_H_RXSTALL) {
- csr &= ~MUSB_TXCSR_H_RXSTALL;
- writew(csr, &musbr->txcsr);
- return 1;
- }
- } else { /* is it rx ep */
- csr = readw(&musbr->rxcsr);
- if (csr & MUSB_RXCSR_H_RXSTALL) {
- csr &= ~MUSB_RXCSR_H_RXSTALL;
- writew(csr, &musbr->rxcsr);
- return 1;
- }
- }
- }
- return 0;
-}
-
-/*
- * waits until ep0 is ready. Returns 0 if ep is ready, -1 for timeout
- * error and -2 for stall.
- */
-static int wait_until_ep0_ready(struct usb_device *dev, u32 bit_mask)
-{
- u16 csr;
- int result = 1;
- int timeout = MUSB_TIMEOUT;
-
- while (result > 0) {
- csr = readw(&musbr->txcsr);
- if (csr & MUSB_CSR0_H_ERROR) {
- csr &= ~MUSB_CSR0_H_ERROR;
- writew(csr, &musbr->txcsr);
- dev->status = USB_ST_CRC_ERR;
- result = -1;
- break;
- }
-
- switch (bit_mask) {
- case MUSB_CSR0_TXPKTRDY:
- if (!(csr & MUSB_CSR0_TXPKTRDY)) {
- if (check_stall(MUSB_CONTROL_EP, 0)) {
- dev->status = USB_ST_STALLED;
- result = -2;
- } else
- result = 0;
- }
- break;
-
- case MUSB_CSR0_RXPKTRDY:
- if (check_stall(MUSB_CONTROL_EP, 0)) {
- dev->status = USB_ST_STALLED;
- result = -2;
- } else
- if (csr & MUSB_CSR0_RXPKTRDY)
- result = 0;
- break;
-
- case MUSB_CSR0_H_REQPKT:
- if (!(csr & MUSB_CSR0_H_REQPKT)) {
- if (check_stall(MUSB_CONTROL_EP, 0)) {
- dev->status = USB_ST_STALLED;
- result = -2;
- } else
- result = 0;
- }
- break;
- }
-
- /* Check the timeout */
- if (--timeout)
- udelay(1);
- else {
- dev->status = USB_ST_CRC_ERR;
- result = -1;
- break;
- }
- }
-
- return result;
-}
-
-/*
- * waits until tx ep is ready. Returns 1 when ep is ready and 0 on error.
- */
-static int wait_until_txep_ready(struct usb_device *dev, u8 ep)
-{
- u16 csr;
- int timeout = MUSB_TIMEOUT;
-
- do {
- if (check_stall(ep, 1)) {
- dev->status = USB_ST_STALLED;
- return 0;
- }
-
- csr = readw(&musbr->txcsr);
- if (csr & MUSB_TXCSR_H_ERROR) {
- dev->status = USB_ST_CRC_ERR;
- return 0;
- }
-
- /* Check the timeout */
- if (--timeout)
- udelay(1);
- else {
- dev->status = USB_ST_CRC_ERR;
- return -1;
- }
-
- } while (csr & MUSB_TXCSR_TXPKTRDY);
- return 1;
-}
-
-/*
- * waits until rx ep is ready. Returns 1 when ep is ready and 0 on error.
- */
-static int wait_until_rxep_ready(struct usb_device *dev, u8 ep)
-{
- u16 csr;
- int timeout = MUSB_TIMEOUT;
-
- do {
- if (check_stall(ep, 0)) {
- dev->status = USB_ST_STALLED;
- return 0;
- }
-
- csr = readw(&musbr->rxcsr);
- if (csr & MUSB_RXCSR_H_ERROR) {
- dev->status = USB_ST_CRC_ERR;
- return 0;
- }
-
- /* Check the timeout */
- if (--timeout)
- udelay(1);
- else {
- dev->status = USB_ST_CRC_ERR;
- return -1;
- }
-
- } while (!(csr & MUSB_RXCSR_RXPKTRDY));
- return 1;
-}
-
-/*
- * This function performs the setup phase of the control transfer
- */
-static int ctrlreq_setup_phase(struct usb_device *dev, struct devrequest *setup)
-{
- int result;
- u16 csr;
-
- /* write the control request to ep0 fifo */
- write_fifo(MUSB_CONTROL_EP, sizeof(struct devrequest), (void *)setup);
-
- /* enable transfer of setup packet */
- csr = readw(&musbr->txcsr);
- csr |= (MUSB_CSR0_TXPKTRDY|MUSB_CSR0_H_SETUPPKT);
- writew(csr, &musbr->txcsr);
-
- /* wait until the setup packet is transmitted */
- result = wait_until_ep0_ready(dev, MUSB_CSR0_TXPKTRDY);
- dev->act_len = 0;
- return result;
-}
-
-/*
- * This function handles the control transfer in data phase
- */
-static int ctrlreq_in_data_phase(struct usb_device *dev, u32 len, void *buffer)
-{
- u16 csr;
- u32 rxlen = 0;
- u32 nextlen = 0;
- u8 maxpktsize = (1 << dev->maxpacketsize) * 8;
- u8 *rxbuff = (u8 *)buffer;
- u8 rxedlength;
- int result;
-
- while (rxlen < len) {
- /* Determine the next read length */
- nextlen = ((len-rxlen) > maxpktsize) ? maxpktsize : (len-rxlen);
-
- /* Set the ReqPkt bit */
- csr = readw(&musbr->txcsr);
- writew(csr | MUSB_CSR0_H_REQPKT, &musbr->txcsr);
- result = wait_until_ep0_ready(dev, MUSB_CSR0_RXPKTRDY);
- if (result < 0)
- return result;
-
- /* Actual number of bytes received by usb */
- rxedlength = readb(&musbr->rxcount);
-
- /* Read the data from the RxFIFO */
- read_fifo(MUSB_CONTROL_EP, rxedlength, &rxbuff[rxlen]);
-
- /* Clear the RxPktRdy Bit */
- csr = readw(&musbr->txcsr);
- csr &= ~MUSB_CSR0_RXPKTRDY;
- writew(csr, &musbr->txcsr);
-
- /* short packet? */
- if (rxedlength != nextlen) {
- dev->act_len += rxedlength;
- break;
- }
- rxlen += nextlen;
- dev->act_len = rxlen;
- }
- return 0;
-}
-
-/*
- * This function handles the control transfer out data phase
- */
-static int ctrlreq_out_data_phase(struct usb_device *dev, u32 len, void *buffer)
-{
- u16 csr;
- u32 txlen = 0;
- u32 nextlen = 0;
- u8 maxpktsize = (1 << dev->maxpacketsize) * 8;
- u8 *txbuff = (u8 *)buffer;
- int result = 0;
-
- while (txlen < len) {
- /* Determine the next write length */
- nextlen = ((len-txlen) > maxpktsize) ? maxpktsize : (len-txlen);
-
- /* Load the data to send in FIFO */
- write_fifo(MUSB_CONTROL_EP, txlen, &txbuff[txlen]);
-
- /* Set TXPKTRDY bit */
- csr = readw(&musbr->txcsr);
-
- csr |= MUSB_CSR0_TXPKTRDY;
- csr |= MUSB_CSR0_H_DIS_PING;
- writew(csr, &musbr->txcsr);
- result = wait_until_ep0_ready(dev, MUSB_CSR0_TXPKTRDY);
- if (result < 0)
- break;
-
- txlen += nextlen;
- dev->act_len = txlen;
- }
- return result;
-}
-
-/*
- * This function handles the control transfer out status phase
- */
-static int ctrlreq_out_status_phase(struct usb_device *dev)
-{
- u16 csr;
- int result;
-
- /* Set the StatusPkt bit */
- csr = readw(&musbr->txcsr);
- csr |= (MUSB_CSR0_TXPKTRDY | MUSB_CSR0_H_STATUSPKT);
- csr |= MUSB_CSR0_H_DIS_PING;
- writew(csr, &musbr->txcsr);
-
- /* Wait until TXPKTRDY bit is cleared */
- result = wait_until_ep0_ready(dev, MUSB_CSR0_TXPKTRDY);
- return result;
-}
-
-/*
- * This function handles the control transfer in status phase
- */
-static int ctrlreq_in_status_phase(struct usb_device *dev)
-{
- u16 csr;
- int result;
-
- /* Set the StatusPkt bit and ReqPkt bit */
- csr = MUSB_CSR0_H_REQPKT | MUSB_CSR0_H_STATUSPKT;
- csr |= MUSB_CSR0_H_DIS_PING;
- writew(csr, &musbr->txcsr);
- result = wait_until_ep0_ready(dev, MUSB_CSR0_H_REQPKT);
-
- /* clear StatusPkt bit and RxPktRdy bit */
- csr = readw(&musbr->txcsr);
- csr &= ~(MUSB_CSR0_RXPKTRDY | MUSB_CSR0_H_STATUSPKT);
- writew(csr, &musbr->txcsr);
- return result;
-}
-
-/*
- * determines the speed of the device (High/Full/Slow)
- */
-static u8 get_dev_speed(struct usb_device *dev)
-{
- return (dev->speed == USB_SPEED_HIGH) ? MUSB_TYPE_SPEED_HIGH :
- ((dev->speed == USB_SPEED_LOW) ? MUSB_TYPE_SPEED_LOW :
- MUSB_TYPE_SPEED_FULL);
-}
-
-/*
- * configure the hub address and the port address.
- */
-static void config_hub_port(struct usb_device *dev, u8 ep)
-{
- u8 chid;
- u8 hub;
-
- /* Find out the nearest parent which is high speed */
- while (dev->parent->parent != NULL)
- if (get_dev_speed(dev->parent) != MUSB_TYPE_SPEED_HIGH)
- dev = dev->parent;
- else
- break;
-
- /* determine the port address at that hub */
- hub = dev->parent->devnum;
- for (chid = 0; chid < USB_MAXCHILDREN; chid++)
- if (dev->parent->children[chid] == dev)
- break;
-
-#ifndef MUSB_NO_MULTIPOINT
- /* configure the hub address and the port address */
- writeb(hub, &musbr->tar[ep].txhubaddr);
- writeb((chid + 1), &musbr->tar[ep].txhubport);
- writeb(hub, &musbr->tar[ep].rxhubaddr);
- writeb((chid + 1), &musbr->tar[ep].rxhubport);
-#endif
-}
-
-#ifdef MUSB_NO_MULTIPOINT
-
-static void musb_port_reset(int do_reset)
-{
- u8 power = readb(&musbr->power);
-
- if (do_reset) {
- power &= 0xf0;
- writeb(power | MUSB_POWER_RESET, &musbr->power);
- port_status |= USB_PORT_STAT_RESET;
- port_status &= ~USB_PORT_STAT_ENABLE;
- udelay(30000);
- } else {
- writeb(power & ~MUSB_POWER_RESET, &musbr->power);
-
- power = readb(&musbr->power);
- if (power & MUSB_POWER_HSMODE)
- port_status |= USB_PORT_STAT_HIGH_SPEED;
-
- port_status &= ~(USB_PORT_STAT_RESET | (USB_PORT_STAT_C_CONNECTION << 16));
- port_status |= USB_PORT_STAT_ENABLE
- | (USB_PORT_STAT_C_RESET << 16)
- | (USB_PORT_STAT_C_ENABLE << 16);
- }
-}
-
-/*
- * root hub control
- */
-static int musb_submit_rh_msg(struct usb_device *dev, unsigned long pipe,
- void *buffer, int transfer_len,
- struct devrequest *cmd)
-{
- int leni = transfer_len;
- int len = 0;
- int stat = 0;
- u32 datab[4];
- const u8 *data_buf = (u8 *) datab;
- u16 bmRType_bReq;
- u16 wValue;
- u16 wIndex;
- u16 wLength;
- u16 int_usb;
-
- if ((pipe & PIPE_INTERRUPT) == PIPE_INTERRUPT) {
- debug("Root-Hub submit IRQ: NOT implemented\n");
- return 0;
- }
-
- bmRType_bReq = cmd->requesttype | (cmd->request << 8);
- wValue = swap_16(cmd->value);
- wIndex = swap_16(cmd->index);
- wLength = swap_16(cmd->length);
-
- debug("--- HUB ----------------------------------------\n");
- debug("submit rh urb, req=%x val=%#x index=%#x len=%d\n",
- bmRType_bReq, wValue, wIndex, wLength);
- debug("------------------------------------------------\n");
-
- switch (bmRType_bReq) {
- case RH_GET_STATUS:
- debug("RH_GET_STATUS\n");
-
- *(__u16 *) data_buf = swap_16(1);
- len = 2;
- break;
-
- case RH_GET_STATUS | RH_INTERFACE:
- debug("RH_GET_STATUS | RH_INTERFACE\n");
-
- *(__u16 *) data_buf = swap_16(0);
- len = 2;
- break;
-
- case RH_GET_STATUS | RH_ENDPOINT:
- debug("RH_GET_STATUS | RH_ENDPOINT\n");
-
- *(__u16 *) data_buf = swap_16(0);
- len = 2;
- break;
-
- case RH_GET_STATUS | RH_CLASS:
- debug("RH_GET_STATUS | RH_CLASS\n");
-
- *(__u32 *) data_buf = swap_32(0);
- len = 4;
- break;
-
- case RH_GET_STATUS | RH_OTHER | RH_CLASS:
- debug("RH_GET_STATUS | RH_OTHER | RH_CLASS\n");
-
- int_usb = readw(&musbr->intrusb);
- if (int_usb & MUSB_INTR_CONNECT) {
- port_status |= USB_PORT_STAT_CONNECTION
- | (USB_PORT_STAT_C_CONNECTION << 16);
- port_status |= USB_PORT_STAT_HIGH_SPEED
- | USB_PORT_STAT_ENABLE;
- }
-
- if (port_status & USB_PORT_STAT_RESET)
- musb_port_reset(0);
-
- *(__u32 *) data_buf = swap_32(port_status);
- len = 4;
- break;
-
- case RH_CLEAR_FEATURE | RH_ENDPOINT:
- debug("RH_CLEAR_FEATURE | RH_ENDPOINT\n");
-
- switch (wValue) {
- case RH_ENDPOINT_STALL:
- debug("C_HUB_ENDPOINT_STALL\n");
- len = 0;
- break;
- }
- port_status &= ~(1 << wValue);
- break;
-
- case RH_CLEAR_FEATURE | RH_CLASS:
- debug("RH_CLEAR_FEATURE | RH_CLASS\n");
-
- switch (wValue) {
- case RH_C_HUB_LOCAL_POWER:
- debug("C_HUB_LOCAL_POWER\n");
- len = 0;
- break;
-
- case RH_C_HUB_OVER_CURRENT:
- debug("C_HUB_OVER_CURRENT\n");
- len = 0;
- break;
- }
- port_status &= ~(1 << wValue);
- break;
-
- case RH_CLEAR_FEATURE | RH_OTHER | RH_CLASS:
- debug("RH_CLEAR_FEATURE | RH_OTHER | RH_CLASS\n");
-
- switch (wValue) {
- case RH_PORT_ENABLE:
- len = 0;
- break;
-
- case RH_PORT_SUSPEND:
- len = 0;
- break;
-
- case RH_PORT_POWER:
- len = 0;
- break;
-
- case RH_C_PORT_CONNECTION:
- len = 0;
- break;
-
- case RH_C_PORT_ENABLE:
- len = 0;
- break;
-
- case RH_C_PORT_SUSPEND:
- len = 0;
- break;
-
- case RH_C_PORT_OVER_CURRENT:
- len = 0;
- break;
-
- case RH_C_PORT_RESET:
- len = 0;
- break;
-
- default:
- debug("invalid wValue\n");
- stat = USB_ST_STALLED;
- }
-
- port_status &= ~(1 << wValue);
- break;
-
- case RH_SET_FEATURE | RH_OTHER | RH_CLASS:
- debug("RH_SET_FEATURE | RH_OTHER | RH_CLASS\n");
-
- switch (wValue) {
- case RH_PORT_SUSPEND:
- len = 0;
- break;
-
- case RH_PORT_RESET:
- musb_port_reset(1);
- len = 0;
- break;
-
- case RH_PORT_POWER:
- len = 0;
- break;
-
- case RH_PORT_ENABLE:
- len = 0;
- break;
-
- default:
- debug("invalid wValue\n");
- stat = USB_ST_STALLED;
- }
-
- port_status |= 1 << wValue;
- break;
-
- case RH_SET_ADDRESS:
- debug("RH_SET_ADDRESS\n");
-
- rh_devnum = wValue;
- len = 0;
- break;
-
- case RH_GET_DESCRIPTOR:
- debug("RH_GET_DESCRIPTOR: %x, %d\n", wValue, wLength);
-
- switch (wValue) {
- case (USB_DT_DEVICE << 8): /* device descriptor */
- len = min_t(unsigned int,
- leni, min_t(unsigned int,
- sizeof(root_hub_dev_des),
- wLength));
- data_buf = root_hub_dev_des;
- break;
-
- case (USB_DT_CONFIG << 8): /* configuration descriptor */
- len = min_t(unsigned int,
- leni, min_t(unsigned int,
- sizeof(root_hub_config_des),
- wLength));
- data_buf = root_hub_config_des;
- break;
-
- case ((USB_DT_STRING << 8) | 0x00): /* string 0 descriptors */
- len = min_t(unsigned int,
- leni, min_t(unsigned int,
- sizeof(root_hub_str_index0),
- wLength));
- data_buf = root_hub_str_index0;
- break;
-
- case ((USB_DT_STRING << 8) | 0x01): /* string 1 descriptors */
- len = min_t(unsigned int,
- leni, min_t(unsigned int,
- sizeof(root_hub_str_index1),
- wLength));
- data_buf = root_hub_str_index1;
- break;
-
- default:
- debug("invalid wValue\n");
- stat = USB_ST_STALLED;
- }
-
- break;
-
- case RH_GET_DESCRIPTOR | RH_CLASS: {
- u8 *_data_buf = (u8 *) datab;
- debug("RH_GET_DESCRIPTOR | RH_CLASS\n");
-
- _data_buf[0] = 0x09; /* min length; */
- _data_buf[1] = 0x29;
- _data_buf[2] = 0x1; /* 1 port */
- _data_buf[3] = 0x01; /* per-port power switching */
- _data_buf[3] |= 0x10; /* no overcurrent reporting */
-
- /* Corresponds to data_buf[4-7] */
- _data_buf[4] = 0;
- _data_buf[5] = 5;
- _data_buf[6] = 0;
- _data_buf[7] = 0x02;
- _data_buf[8] = 0xff;
-
- len = min_t(unsigned int, leni,
- min_t(unsigned int, data_buf[0], wLength));
- break;
- }
-
- case RH_GET_CONFIGURATION:
- debug("RH_GET_CONFIGURATION\n");
-
- *(__u8 *) data_buf = 0x01;
- len = 1;
- break;
-
- case RH_SET_CONFIGURATION:
- debug("RH_SET_CONFIGURATION\n");
-
- len = 0;
- break;
-
- default:
- debug("*** *** *** unsupported root hub command *** *** ***\n");
- stat = USB_ST_STALLED;
- }
-
- len = min_t(int, len, leni);
- if (buffer != data_buf)
- memcpy(buffer, data_buf, len);
-
- dev->act_len = len;
- dev->status = stat;
- debug("dev act_len %d, status %lu\n", dev->act_len, dev->status);
-
- return stat;
-}
-
-static void musb_rh_init(void)
-{
- rh_devnum = 0;
- port_status = 0;
-}
-
-#else
-
-static void musb_rh_init(void) {}
-
-#endif
-
-/*
- * do a control transfer
- */
-int submit_control_msg(struct usb_device *dev, unsigned long pipe, void *buffer,
- int len, struct devrequest *setup)
-{
- int devnum = usb_pipedevice(pipe);
- u8 devspeed;
-
-#ifdef MUSB_NO_MULTIPOINT
- /* Control message is for the HUB? */
- if (devnum == rh_devnum) {
- int stat = musb_submit_rh_msg(dev, pipe, buffer, len, setup);
- if (stat)
- return stat;
- }
-#endif
-
- /* select control endpoint */
- writeb(MUSB_CONTROL_EP, &musbr->index);
- readw(&musbr->txcsr);
-
-#ifndef MUSB_NO_MULTIPOINT
- /* target addr and (for multipoint) hub addr/port */
- writeb(devnum, &musbr->tar[MUSB_CONTROL_EP].txfuncaddr);
- writeb(devnum, &musbr->tar[MUSB_CONTROL_EP].rxfuncaddr);
-#endif
-
- /* configure the hub address and the port number as required */
- devspeed = get_dev_speed(dev);
- if ((musb_ishighspeed()) && (dev->parent != NULL) &&
- (devspeed != MUSB_TYPE_SPEED_HIGH)) {
- config_hub_port(dev, MUSB_CONTROL_EP);
- writeb(devspeed << 6, &musbr->txtype);
- } else {
- writeb(musb_cfg.musb_speed << 6, &musbr->txtype);
-#ifndef MUSB_NO_MULTIPOINT
- writeb(0, &musbr->tar[MUSB_CONTROL_EP].txhubaddr);
- writeb(0, &musbr->tar[MUSB_CONTROL_EP].txhubport);
- writeb(0, &musbr->tar[MUSB_CONTROL_EP].rxhubaddr);
- writeb(0, &musbr->tar[MUSB_CONTROL_EP].rxhubport);
-#endif
- }
-
- /* Control transfer setup phase */
- if (ctrlreq_setup_phase(dev, setup) < 0)
- return 0;
-
- switch (setup->request) {
- case USB_REQ_GET_DESCRIPTOR:
- case USB_REQ_GET_CONFIGURATION:
- case USB_REQ_GET_INTERFACE:
- case USB_REQ_GET_STATUS:
- case USB_MSC_BBB_GET_MAX_LUN:
- /* control transfer in-data-phase */
- if (ctrlreq_in_data_phase(dev, len, buffer) < 0)
- return 0;
- /* control transfer out-status-phase */
- if (ctrlreq_out_status_phase(dev) < 0)
- return 0;
- break;
-
- case USB_REQ_SET_ADDRESS:
- case USB_REQ_SET_CONFIGURATION:
- case USB_REQ_SET_FEATURE:
- case USB_REQ_SET_INTERFACE:
- case USB_REQ_CLEAR_FEATURE:
- case USB_MSC_BBB_RESET:
- /* control transfer in status phase */
- if (ctrlreq_in_status_phase(dev) < 0)
- return 0;
- break;
-
- case USB_REQ_SET_DESCRIPTOR:
- /* control transfer out data phase */
- if (ctrlreq_out_data_phase(dev, len, buffer) < 0)
- return 0;
- /* control transfer in status phase */
- if (ctrlreq_in_status_phase(dev) < 0)
- return 0;
- break;
-
- default:
- /* unhandled control transfer */
- return -1;
- }
-
- dev->status = 0;
- dev->act_len = len;
-
-#ifdef MUSB_NO_MULTIPOINT
- /* Set device address to USB_FADDR register */
- if (setup->request == USB_REQ_SET_ADDRESS)
- writeb(dev->devnum, &musbr->faddr);
-#endif
-
- return len;
-}
-
-/*
- * do a bulk transfer
- */
-int submit_bulk_msg(struct usb_device *dev, unsigned long pipe,
- void *buffer, int len)
-{
- int dir_out = usb_pipeout(pipe);
- int ep = usb_pipeendpoint(pipe);
-#ifndef MUSB_NO_MULTIPOINT
- int devnum = usb_pipedevice(pipe);
-#endif
- u8 type;
- u16 csr;
- u32 txlen = 0;
- u32 nextlen = 0;
- u8 devspeed;
-
- /* select bulk endpoint */
- writeb(MUSB_BULK_EP, &musbr->index);
-
-#ifndef MUSB_NO_MULTIPOINT
- /* write the address of the device */
- if (dir_out)
- writeb(devnum, &musbr->tar[MUSB_BULK_EP].txfuncaddr);
- else
- writeb(devnum, &musbr->tar[MUSB_BULK_EP].rxfuncaddr);
-#endif
-
- /* configure the hub address and the port number as required */
- devspeed = get_dev_speed(dev);
- if ((musb_ishighspeed()) && (dev->parent != NULL) &&
- (devspeed != MUSB_TYPE_SPEED_HIGH)) {
- /*
- * MUSB is in high speed and the destination device is full
- * speed device. So configure the hub address and port
- * address registers.
- */
- config_hub_port(dev, MUSB_BULK_EP);
- } else {
-#ifndef MUSB_NO_MULTIPOINT
- if (dir_out) {
- writeb(0, &musbr->tar[MUSB_BULK_EP].txhubaddr);
- writeb(0, &musbr->tar[MUSB_BULK_EP].txhubport);
- } else {
- writeb(0, &musbr->tar[MUSB_BULK_EP].rxhubaddr);
- writeb(0, &musbr->tar[MUSB_BULK_EP].rxhubport);
- }
-#endif
- devspeed = musb_cfg.musb_speed;
- }
-
- /* Write the saved toggle bit value */
- write_toggle(dev, ep, dir_out);
-
- if (dir_out) { /* bulk-out transfer */
- /* Program the TxType register */
- type = (devspeed << MUSB_TYPE_SPEED_SHIFT) |
- (MUSB_TYPE_PROTO_BULK << MUSB_TYPE_PROTO_SHIFT) |
- (ep & MUSB_TYPE_REMOTE_END);
- writeb(type, &musbr->txtype);
-
- /* Write maximum packet size to the TxMaxp register */
- writew(dev->epmaxpacketout[ep], &musbr->txmaxp);
- while (txlen < len) {
- nextlen = ((len-txlen) < dev->epmaxpacketout[ep]) ?
- (len-txlen) : dev->epmaxpacketout[ep];
-
- /* Write the data to the FIFO */
- write_fifo(MUSB_BULK_EP, nextlen,
- (void *)(((u8 *)buffer) + txlen));
-
- /* Set the TxPktRdy bit */
- csr = readw(&musbr->txcsr);
- writew(csr | MUSB_TXCSR_TXPKTRDY, &musbr->txcsr);
-
- /* Wait until the TxPktRdy bit is cleared */
- if (wait_until_txep_ready(dev, MUSB_BULK_EP) != 1) {
- readw(&musbr->txcsr);
- usb_settoggle(dev, ep, dir_out,
- (csr >> MUSB_TXCSR_H_DATATOGGLE_SHIFT) & 1);
- dev->act_len = txlen;
- return 0;
- }
- txlen += nextlen;
- }
-
- /* Keep a copy of the data toggle bit */
- csr = readw(&musbr->txcsr);
- usb_settoggle(dev, ep, dir_out,
- (csr >> MUSB_TXCSR_H_DATATOGGLE_SHIFT) & 1);
- } else { /* bulk-in transfer */
- /* Write the saved toggle bit value */
- write_toggle(dev, ep, dir_out);
-
- /* Program the RxType register */
- type = (devspeed << MUSB_TYPE_SPEED_SHIFT) |
- (MUSB_TYPE_PROTO_BULK << MUSB_TYPE_PROTO_SHIFT) |
- (ep & MUSB_TYPE_REMOTE_END);
- writeb(type, &musbr->rxtype);
-
- /* Write the maximum packet size to the RxMaxp register */
- writew(dev->epmaxpacketin[ep], &musbr->rxmaxp);
- while (txlen < len) {
- nextlen = ((len-txlen) < dev->epmaxpacketin[ep]) ?
- (len-txlen) : dev->epmaxpacketin[ep];
-
- /* Set the ReqPkt bit */
- csr = readw(&musbr->rxcsr);
- writew(csr | MUSB_RXCSR_H_REQPKT, &musbr->rxcsr);
-
- /* Wait until the RxPktRdy bit is set */
- if (wait_until_rxep_ready(dev, MUSB_BULK_EP) != 1) {
- csr = readw(&musbr->rxcsr);
- usb_settoggle(dev, ep, dir_out,
- (csr >> MUSB_S_RXCSR_H_DATATOGGLE) & 1);
- csr &= ~MUSB_RXCSR_RXPKTRDY;
- writew(csr, &musbr->rxcsr);
- dev->act_len = txlen;
- return 0;
- }
-
- /* Read the data from the FIFO */
- read_fifo(MUSB_BULK_EP, nextlen,
- (void *)(((u8 *)buffer) + txlen));
-
- /* Clear the RxPktRdy bit */
- csr = readw(&musbr->rxcsr);
- csr &= ~MUSB_RXCSR_RXPKTRDY;
- writew(csr, &musbr->rxcsr);
- txlen += nextlen;
- }
-
- /* Keep a copy of the data toggle bit */
- csr = readw(&musbr->rxcsr);
- usb_settoggle(dev, ep, dir_out,
- (csr >> MUSB_S_RXCSR_H_DATATOGGLE) & 1);
- }
-
- /* bulk transfer is complete */
- dev->status = 0;
- dev->act_len = len;
- return 0;
-}
-
-/*
- * This function initializes the usb controller module.
- */
-int usb_lowlevel_init(int index, enum usb_init_type init, void **controller)
-{
- u8 power;
- u32 timeout;
-
- musb_rh_init();
-
- if (musb_platform_init() == -1)
- return -1;
-
- /* Configure all the endpoint FIFO's and start usb controller */
- musbr = musb_cfg.regs;
- musb_configure_ep(&epinfo[0], ARRAY_SIZE(epinfo));
- musb_start();
-
- /*
- * Wait until musb is enabled in host mode with a timeout. There
- * should be a usb device connected.
- */
- timeout = musb_cfg.timeout;
- while (--timeout)
- if (readb(&musbr->devctl) & MUSB_DEVCTL_HM)
- break;
-
- /* if musb core is not in host mode, then return */
- if (!timeout)
- return -1;
-
- /* start usb bus reset */
- power = readb(&musbr->power);
- writeb(power | MUSB_POWER_RESET, &musbr->power);
-
- /* After initiating a usb reset, wait for about 20ms to 30ms */
- udelay(30000);
-
- /* stop usb bus reset */
- power = readb(&musbr->power);
- power &= ~MUSB_POWER_RESET;
- writeb(power, &musbr->power);
-
- /* Determine if the connected device is a high/full/low speed device */
- musb_cfg.musb_speed = (readb(&musbr->power) & MUSB_POWER_HSMODE) ?
- MUSB_TYPE_SPEED_HIGH :
- ((readb(&musbr->devctl) & MUSB_DEVCTL_FSDEV) ?
- MUSB_TYPE_SPEED_FULL : MUSB_TYPE_SPEED_LOW);
- return 0;
-}
-
-/*
- * This function stops the operation of the davinci usb module.
- */
-int usb_lowlevel_stop(int index)
-{
- /* Reset the USB module */
- musb_platform_deinit();
- writeb(0, &musbr->devctl);
- return 0;
-}
-
-/*
- * This function supports usb interrupt transfers. Currently, usb interrupt
- * transfers are not supported.
- */
-int submit_int_msg(struct usb_device *dev, unsigned long pipe, void *buffer,
- int len, int interval, bool nonblock)
-{
- int dir_out = usb_pipeout(pipe);
- int ep = usb_pipeendpoint(pipe);
-#ifndef MUSB_NO_MULTIPOINT
- int devnum = usb_pipedevice(pipe);
-#endif
- u8 type;
- u16 csr;
- u32 txlen = 0;
- u32 nextlen = 0;
- u8 devspeed;
-
- /* select interrupt endpoint */
- writeb(MUSB_INTR_EP, &musbr->index);
-
-#ifndef MUSB_NO_MULTIPOINT
- /* write the address of the device */
- if (dir_out)
- writeb(devnum, &musbr->tar[MUSB_INTR_EP].txfuncaddr);
- else
- writeb(devnum, &musbr->tar[MUSB_INTR_EP].rxfuncaddr);
-#endif
-
- /* configure the hub address and the port number as required */
- devspeed = get_dev_speed(dev);
- if ((musb_ishighspeed()) && (dev->parent != NULL) &&
- (devspeed != MUSB_TYPE_SPEED_HIGH)) {
- /*
- * MUSB is in high speed and the destination device is full
- * speed device. So configure the hub address and port
- * address registers.
- */
- config_hub_port(dev, MUSB_INTR_EP);
- } else {
-#ifndef MUSB_NO_MULTIPOINT
- if (dir_out) {
- writeb(0, &musbr->tar[MUSB_INTR_EP].txhubaddr);
- writeb(0, &musbr->tar[MUSB_INTR_EP].txhubport);
- } else {
- writeb(0, &musbr->tar[MUSB_INTR_EP].rxhubaddr);
- writeb(0, &musbr->tar[MUSB_INTR_EP].rxhubport);
- }
-#endif
- devspeed = musb_cfg.musb_speed;
- }
-
- /* Write the saved toggle bit value */
- write_toggle(dev, ep, dir_out);
-
- if (!dir_out) { /* intrrupt-in transfer */
- /* Write the saved toggle bit value */
- write_toggle(dev, ep, dir_out);
- writeb(interval, &musbr->rxinterval);
-
- /* Program the RxType register */
- type = (devspeed << MUSB_TYPE_SPEED_SHIFT) |
- (MUSB_TYPE_PROTO_INTR << MUSB_TYPE_PROTO_SHIFT) |
- (ep & MUSB_TYPE_REMOTE_END);
- writeb(type, &musbr->rxtype);
-
- /* Write the maximum packet size to the RxMaxp register */
- writew(dev->epmaxpacketin[ep], &musbr->rxmaxp);
-
- while (txlen < len) {
- nextlen = ((len-txlen) < dev->epmaxpacketin[ep]) ?
- (len-txlen) : dev->epmaxpacketin[ep];
-
- /* Set the ReqPkt bit */
- csr = readw(&musbr->rxcsr);
- writew(csr | MUSB_RXCSR_H_REQPKT, &musbr->rxcsr);
-
- /* Wait until the RxPktRdy bit is set */
- if (wait_until_rxep_ready(dev, MUSB_INTR_EP) != 1) {
- csr = readw(&musbr->rxcsr);
- usb_settoggle(dev, ep, dir_out,
- (csr >> MUSB_S_RXCSR_H_DATATOGGLE) & 1);
- csr &= ~MUSB_RXCSR_RXPKTRDY;
- writew(csr, &musbr->rxcsr);
- dev->act_len = txlen;
- return 0;
- }
-
- /* Read the data from the FIFO */
- read_fifo(MUSB_INTR_EP, nextlen,
- (void *)(((u8 *)buffer) + txlen));
-
- /* Clear the RxPktRdy bit */
- csr = readw(&musbr->rxcsr);
- csr &= ~MUSB_RXCSR_RXPKTRDY;
- writew(csr, &musbr->rxcsr);
- txlen += nextlen;
- }
-
- /* Keep a copy of the data toggle bit */
- csr = readw(&musbr->rxcsr);
- usb_settoggle(dev, ep, dir_out,
- (csr >> MUSB_S_RXCSR_H_DATATOGGLE) & 1);
- }
-
- /* interrupt transfer is complete */
- dev->irq_status = 0;
- dev->irq_act_len = len;
- dev->irq_handle(dev);
- dev->status = 0;
- dev->act_len = len;
- return 0;
-}
diff --git a/drivers/usb/musb/musb_hcd.h b/drivers/usb/musb/musb_hcd.h
deleted file mode 100644
index a492e99ef9d..00000000000
--- a/drivers/usb/musb/musb_hcd.h
+++ /dev/null
@@ -1,93 +0,0 @@
-/* SPDX-License-Identifier: GPL-2.0+ */
-/*
- * Mentor USB OTG Core host controller driver.
- *
- * Copyright (c) 2008 Texas Instruments
- *
- * Author: Thomas Abraham t-abraham@ti.com, Texas Instruments
- */
-
-#ifndef __MUSB_HCD_H__
-#define __MUSB_HCD_H__
-
-#include "musb_core.h"
-#ifdef CONFIG_USB_KEYBOARD
-#include <stdio_dev.h>
-extern unsigned char new[];
-#endif
-
-#define MUSB_TIMEOUT 100000
-
-/* This defines the endpoint number used for control transfers */
-#define MUSB_CONTROL_EP 0
-
-/* This defines the endpoint number used for bulk transfer */
-#ifndef MUSB_BULK_EP
-# define MUSB_BULK_EP 1
-#endif
-
-/* This defines the endpoint number used for interrupt transfer */
-#define MUSB_INTR_EP 2
-
-/* Determine the operating speed of MUSB core */
-#define musb_ishighspeed() \
- ((readb(&musbr->power) & MUSB_POWER_HSMODE) \
- >> MUSB_POWER_HSMODE_SHIFT)
-
-/* USB HUB CONSTANTS (not OHCI-specific; see hub.h) */
-
-/* destination of request */
-#define RH_INTERFACE 0x01
-#define RH_ENDPOINT 0x02
-#define RH_OTHER 0x03
-
-#define RH_CLASS 0x20
-#define RH_VENDOR 0x40
-
-/* Requests: bRequest << 8 | bmRequestType */
-#define RH_GET_STATUS 0x0080
-#define RH_CLEAR_FEATURE 0x0100
-#define RH_SET_FEATURE 0x0300
-#define RH_SET_ADDRESS 0x0500
-#define RH_GET_DESCRIPTOR 0x0680
-#define RH_SET_DESCRIPTOR 0x0700
-#define RH_GET_CONFIGURATION 0x0880
-#define RH_SET_CONFIGURATION 0x0900
-#define RH_GET_STATE 0x0280
-#define RH_GET_INTERFACE 0x0A80
-#define RH_SET_INTERFACE 0x0B00
-#define RH_SYNC_FRAME 0x0C80
-/* Our Vendor Specific Request */
-#define RH_SET_EP 0x2000
-
-/* Hub port features */
-#define RH_PORT_CONNECTION 0x00
-#define RH_PORT_ENABLE 0x01
-#define RH_PORT_SUSPEND 0x02
-#define RH_PORT_OVER_CURRENT 0x03
-#define RH_PORT_RESET 0x04
-#define RH_PORT_POWER 0x08
-#define RH_PORT_LOW_SPEED 0x09
-
-#define RH_C_PORT_CONNECTION 0x10
-#define RH_C_PORT_ENABLE 0x11
-#define RH_C_PORT_SUSPEND 0x12
-#define RH_C_PORT_OVER_CURRENT 0x13
-#define RH_C_PORT_RESET 0x14
-
-/* Hub features */
-#define RH_C_HUB_LOCAL_POWER 0x00
-#define RH_C_HUB_OVER_CURRENT 0x01
-
-#define RH_DEVICE_REMOTE_WAKEUP 0x00
-#define RH_ENDPOINT_STALL 0x01
-
-#define RH_ACK 0x01
-#define RH_REQ_ERR -1
-#define RH_NACK 0x00
-
-/* extern functions */
-extern int musb_platform_init(void);
-extern void musb_platform_deinit(void);
-
-#endif /* __MUSB_HCD_H__ */
diff --git a/drivers/usb/musb/musb_udc.c b/drivers/usb/musb/musb_udc.c
deleted file mode 100644
index 696855ee3a6..00000000000
--- a/drivers/usb/musb/musb_udc.c
+++ /dev/null
@@ -1,953 +0,0 @@
-// SPDX-License-Identifier: GPL-2.0+
-/*
- * Copyright (c) 2009 Wind River Systems, Inc.
- * Tom Rix <Tom.Rix@windriver.com>
- *
- * This file is a rewrite of the usb device part of
- * repository git.omapzoom.org/repo/u-boot.git, branch master,
- * file cpu/omap3/fastboot.c
- *
- * This is the unique part of its copyright :
- *
- * -------------------------------------------------------------------------
- *
- * (C) Copyright 2008 - 2009
- * Windriver, <www.windriver.com>
- * Tom Rix <Tom.Rix@windriver.com>
- *
- * -------------------------------------------------------------------------
- *
- * The details of connecting the device to the uboot usb device subsystem
- * came from the old omap3 repository www.sakoman.net/u-boot-omap3.git,
- * branch omap3-dev-usb, file drivers/usb/usbdcore_musb.c
- *
- * This is the unique part of its copyright :
- *
- * -------------------------------------------------------------------------
- *
- * (C) Copyright 2008 Texas Instruments Incorporated.
- *
- * Based on
- * u-boot OMAP1510 USB drivers (drivers/usbdcore_omap1510.c)
- * twl4030 init based on linux (drivers/i2c/chips/twl4030_usb.c)
- *
- * Author: Diego Dompe (diego.dompe@ridgerun.com)
- * Atin Malaviya (atin.malaviya@gmail.com)
- *
- * -------------------------------------------------------------------------
- */
-
-#include <hang.h>
-#include <serial.h>
-#include <usbdevice.h>
-#include <linux/delay.h>
-#include <usb/udc.h>
-#include "../gadget/ep0.h"
-#include "musb_core.h"
-#if defined(CONFIG_USB_OMAP3)
-#include "omap3.h"
-#elif defined(CONFIG_USB_AM35X)
-#include "am35x.h"
-#endif
-
-/* Define MUSB_DEBUG for debugging */
-/* #define MUSB_DEBUG */
-#include "musb_debug.h"
-
-#define MAX_ENDPOINT 15
-
-#define GET_ENDPOINT(dev,ep) \
-(((struct usb_device_instance *)(dev))->bus->endpoint_array + ep)
-
-#define SET_EP0_STATE(s) \
-do { \
- if ((0 <= (s)) && (SET_ADDRESS >= (s))) { \
- if ((s) != ep0_state) { \
- if ((debug_setup) && (debug_level > 1)) \
- serial_printf("INFO : Changing state " \
- "from %s to %s in %s at " \
- "line %d\n", \
- ep0_state_strings[ep0_state],\
- ep0_state_strings[s], \
- __PRETTY_FUNCTION__, \
- __LINE__); \
- ep0_state = s; \
- } \
- } else { \
- if (debug_level > 0) \
- serial_printf("Error at %s %d with setting " \
- "state %d is invalid\n", \
- __PRETTY_FUNCTION__, __LINE__, s); \
- } \
-} while (0)
-
-/* static implies these initialized to 0 or NULL */
-static int debug_setup;
-static int debug_level;
-static struct musb_epinfo epinfo[MAX_ENDPOINT * 2 + 2];
-static enum ep0_state_enum {
- IDLE = 0,
- TX,
- RX,
- SET_ADDRESS
-} ep0_state = IDLE;
-static char *ep0_state_strings[4] = {
- "IDLE",
- "TX",
- "RX",
- "SET_ADDRESS",
-};
-
-static struct urb *ep0_urb;
-struct usb_endpoint_instance *ep0_endpoint;
-static struct usb_device_instance *udc_device;
-static int enabled;
-
-static u16 pending_intrrx;
-
-#ifdef MUSB_DEBUG
-static void musb_db_regs(void)
-{
- u8 b;
- u16 w;
-
- b = readb(&musbr->faddr);
- serial_printf("\tfaddr 0x%2.2x\n", b);
-
- b = readb(&musbr->power);
- musb_print_pwr(b);
-
- w = readw(&musbr->ep[0].ep0.csr0);
- musb_print_csr0(w);
-
- b = readb(&musbr->devctl);
- musb_print_devctl(b);
-
- b = readb(&musbr->ep[0].ep0.configdata);
- musb_print_config(b);
-
- w = readw(&musbr->frame);
- serial_printf("\tframe 0x%4.4x\n", w);
-
- b = readb(&musbr->index);
- serial_printf("\tindex 0x%2.2x\n", b);
-
- w = readw(&musbr->ep[1].epN.rxmaxp);
- musb_print_rxmaxp(w);
-
- w = readw(&musbr->ep[1].epN.rxcsr);
- musb_print_rxcsr(w);
-
- w = readw(&musbr->ep[1].epN.txmaxp);
- musb_print_txmaxp(w);
-
- w = readw(&musbr->ep[1].epN.txcsr);
- musb_print_txcsr(w);
-}
-#else
-#define musb_db_regs()
-#endif /* DEBUG_MUSB */
-
-static void musb_peri_softconnect(void)
-{
- u8 power, devctl;
-
- /* Power off MUSB */
- power = readb(&musbr->power);
- power &= ~MUSB_POWER_SOFTCONN;
- writeb(power, &musbr->power);
-
- /* Read intr to clear */
- readb(&musbr->intrusb);
- readw(&musbr->intrrx);
- readw(&musbr->intrtx);
-
- udelay(1000 * 1000); /* 1 sec */
-
- /* Power on MUSB */
- power = readb(&musbr->power);
- power |= MUSB_POWER_SOFTCONN;
- /*
- * The usb device interface is usb 1.1
- * Disable 2.0 high speed by clearring the hsenable bit.
- */
- power &= ~MUSB_POWER_HSENAB;
- writeb(power, &musbr->power);
-
- /* Check if device is in b-peripheral mode */
- devctl = readb(&musbr->devctl);
- if (!(devctl & MUSB_DEVCTL_BDEVICE) ||
- (devctl & MUSB_DEVCTL_HM)) {
- serial_printf("ERROR : Unsupport USB mode\n");
- serial_printf("Check that mini-B USB cable is attached "
- "to the device\n");
- }
-
- if (debug_setup && (debug_level > 1))
- musb_db_regs();
-}
-
-static void musb_peri_reset(void)
-{
- if ((debug_setup) && (debug_level > 1))
- serial_printf("INFO : %s reset\n", __PRETTY_FUNCTION__);
-
- if (ep0_endpoint)
- ep0_endpoint->endpoint_address = 0xff;
-
- /* Sync sw and hw addresses */
- writeb(udc_device->address, &musbr->faddr);
-
- SET_EP0_STATE(IDLE);
-}
-
-static void musb_peri_resume(void)
-{
- /* noop */
-}
-
-static void musb_peri_ep0_stall(void)
-{
- u16 csr0;
-
- csr0 = readw(&musbr->ep[0].ep0.csr0);
- csr0 |= MUSB_CSR0_P_SENDSTALL;
- writew(csr0, &musbr->ep[0].ep0.csr0);
- if ((debug_setup) && (debug_level > 1))
- serial_printf("INFO : %s stall\n", __PRETTY_FUNCTION__);
-}
-
-static void musb_peri_ep0_ack_req(void)
-{
- u16 csr0;
-
- csr0 = readw(&musbr->ep[0].ep0.csr0);
- csr0 |= MUSB_CSR0_P_SVDRXPKTRDY;
- writew(csr0, &musbr->ep[0].ep0.csr0);
-}
-
-static void musb_ep0_tx_ready(void)
-{
- u16 csr0;
-
- csr0 = readw(&musbr->ep[0].ep0.csr0);
- csr0 |= MUSB_CSR0_TXPKTRDY;
- writew(csr0, &musbr->ep[0].ep0.csr0);
-}
-
-static void musb_ep0_tx_ready_and_last(void)
-{
- u16 csr0;
-
- csr0 = readw(&musbr->ep[0].ep0.csr0);
- csr0 |= (MUSB_CSR0_TXPKTRDY | MUSB_CSR0_P_DATAEND);
- writew(csr0, &musbr->ep[0].ep0.csr0);
-}
-
-static void musb_peri_ep0_last(void)
-{
- u16 csr0;
-
- csr0 = readw(&musbr->ep[0].ep0.csr0);
- csr0 |= MUSB_CSR0_P_DATAEND;
- writew(csr0, &musbr->ep[0].ep0.csr0);
-}
-
-static void musb_peri_ep0_set_address(void)
-{
- u8 faddr;
- writeb(udc_device->address, &musbr->faddr);
-
- /* Verify */
- faddr = readb(&musbr->faddr);
- if (udc_device->address == faddr) {
- SET_EP0_STATE(IDLE);
- usbd_device_event_irq(udc_device, DEVICE_ADDRESS_ASSIGNED, 0);
- if ((debug_setup) && (debug_level > 1))
- serial_printf("INFO : %s Address set to %d\n",
- __PRETTY_FUNCTION__, udc_device->address);
- } else {
- if (debug_level > 0)
- serial_printf("ERROR : %s Address mismatch "
- "sw %d vs hw %d\n",
- __PRETTY_FUNCTION__,
- udc_device->address, faddr);
- }
-}
-
-static void musb_peri_rx_ack(unsigned int ep)
-{
- u16 peri_rxcsr;
-
- peri_rxcsr = readw(&musbr->ep[ep].epN.rxcsr);
- peri_rxcsr &= ~MUSB_RXCSR_RXPKTRDY;
- writew(peri_rxcsr, &musbr->ep[ep].epN.rxcsr);
-}
-
-static void musb_peri_tx_ready(unsigned int ep)
-{
- u16 peri_txcsr;
-
- peri_txcsr = readw(&musbr->ep[ep].epN.txcsr);
- peri_txcsr |= MUSB_TXCSR_TXPKTRDY;
- writew(peri_txcsr, &musbr->ep[ep].epN.txcsr);
-}
-
-static void musb_peri_ep0_zero_data_request(int err)
-{
- musb_peri_ep0_ack_req();
-
- if (err) {
- musb_peri_ep0_stall();
- SET_EP0_STATE(IDLE);
- } else {
-
- musb_peri_ep0_last();
-
- /* USBD state */
- switch (ep0_urb->device_request.bRequest) {
- case USB_REQ_SET_ADDRESS:
- if ((debug_setup) && (debug_level > 1))
- serial_printf("INFO : %s received set "
- "address\n", __PRETTY_FUNCTION__);
- break;
-
- case USB_REQ_SET_CONFIGURATION:
- if ((debug_setup) && (debug_level > 1))
- serial_printf("INFO : %s Configured\n",
- __PRETTY_FUNCTION__);
- usbd_device_event_irq(udc_device, DEVICE_CONFIGURED, 0);
- break;
- }
-
- /* EP0 state */
- if (USB_REQ_SET_ADDRESS == ep0_urb->device_request.bRequest) {
- SET_EP0_STATE(SET_ADDRESS);
- } else {
- SET_EP0_STATE(IDLE);
- }
- }
-}
-
-static void musb_peri_ep0_rx_data_request(void)
-{
- /*
- * This is the completion of the data OUT / RX
- *
- * Host is sending data to ep0 that is not
- * part of setup. This comes from the cdc_recv_setup
- * op that is device specific.
- *
- */
- musb_peri_ep0_ack_req();
-
- ep0_endpoint->rcv_urb = ep0_urb;
- ep0_urb->actual_length = 0;
- SET_EP0_STATE(RX);
-}
-
-static void musb_peri_ep0_tx_data_request(int err)
-{
- if (err) {
- musb_peri_ep0_stall();
- SET_EP0_STATE(IDLE);
- } else {
- musb_peri_ep0_ack_req();
-
- ep0_endpoint->tx_urb = ep0_urb;
- ep0_endpoint->sent = 0;
- SET_EP0_STATE(TX);
- }
-}
-
-static void musb_peri_ep0_idle(void)
-{
- u16 count0;
- int err;
- u16 csr0;
-
- /*
- * Verify addresses
- * A lot of confusion can be caused if the address
- * in software, udc layer, does not agree with the
- * hardware. Since the setting of the hardware address
- * must be set after the set address request, the
- * usb state machine is out of sync for a few frame.
- * It is a good idea to run this check when changes
- * are made to the state machine.
- */
- if ((debug_level > 0) &&
- (ep0_state != SET_ADDRESS)) {
- u8 faddr;
-
- faddr = readb(&musbr->faddr);
- if (udc_device->address != faddr) {
- serial_printf("ERROR : %s addresses do not"
- "match sw %d vs hw %d\n",
- __PRETTY_FUNCTION__,
- udc_device->address, faddr);
- udelay(1000 * 1000);
- hang();
- }
- }
-
- csr0 = readw(&musbr->ep[0].ep0.csr0);
-
- if (!(MUSB_CSR0_RXPKTRDY & csr0))
- goto end;
-
- count0 = readw(&musbr->ep[0].ep0.count0);
- if (count0 == 0)
- goto end;
-
- if (count0 != 8) {
- if ((debug_setup) && (debug_level > 1))
- serial_printf("WARN : %s SETUP incorrect size %d\n",
- __PRETTY_FUNCTION__, count0);
- musb_peri_ep0_stall();
- goto end;
- }
-
- read_fifo(0, count0, &ep0_urb->device_request);
-
- if (debug_level > 2)
- print_usb_device_request(&ep0_urb->device_request);
-
- if (ep0_urb->device_request.wLength == 0) {
- err = ep0_recv_setup(ep0_urb);
-
- /* Zero data request */
- musb_peri_ep0_zero_data_request(err);
- } else {
- /* Is data coming or going ? */
- u8 reqType = ep0_urb->device_request.bmRequestType;
-
- if (USB_REQ_DEVICE2HOST == (reqType & USB_REQ_DIRECTION_MASK)) {
- err = ep0_recv_setup(ep0_urb);
- /* Device to host */
- musb_peri_ep0_tx_data_request(err);
- } else {
- /*
- * Host to device
- *
- * The RX routine will call ep0_recv_setup
- * when the data packet has arrived.
- */
- musb_peri_ep0_rx_data_request();
- }
- }
-
-end:
- return;
-}
-
-static void musb_peri_ep0_rx(void)
-{
- /*
- * This is the completion of the data OUT / RX
- *
- * Host is sending data to ep0 that is not
- * part of setup. This comes from the cdc_recv_setup
- * op that is device specific.
- *
- * Pass the data back to driver ep0_recv_setup which
- * should give the cdc_recv_setup the chance to handle
- * the rx
- */
- u16 csr0;
- u16 count0;
-
- if (debug_level > 3) {
- if (0 != ep0_urb->actual_length) {
- serial_printf("%s finished ? %d of %d\n",
- __PRETTY_FUNCTION__,
- ep0_urb->actual_length,
- ep0_urb->device_request.wLength);
- }
- }
-
- if (ep0_urb->device_request.wLength == ep0_urb->actual_length) {
- musb_peri_ep0_last();
- SET_EP0_STATE(IDLE);
- ep0_recv_setup(ep0_urb);
- return;
- }
-
- csr0 = readw(&musbr->ep[0].ep0.csr0);
- if (!(MUSB_CSR0_RXPKTRDY & csr0))
- return;
-
- count0 = readw(&musbr->ep[0].ep0.count0);
-
- if (count0) {
- struct usb_endpoint_instance *endpoint;
- u32 length;
- u8 *data;
-
- endpoint = ep0_endpoint;
- if (endpoint && endpoint->rcv_urb) {
- struct urb *urb = endpoint->rcv_urb;
- unsigned int remaining_space = urb->buffer_length -
- urb->actual_length;
-
- if (remaining_space) {
- int urb_bad = 0; /* urb is good */
-
- if (count0 > remaining_space)
- length = remaining_space;
- else
- length = count0;
-
- data = (u8 *) urb->buffer_data;
- data += urb->actual_length;
-
- /* The common musb fifo reader */
- read_fifo(0, length, data);
-
- musb_peri_ep0_ack_req();
-
- /*
- * urb's actual_length is updated in
- * usbd_rcv_complete
- */
- usbd_rcv_complete(endpoint, length, urb_bad);
-
- } else {
- if (debug_level > 0)
- serial_printf("ERROR : %s no space in "
- "rcv buffer\n",
- __PRETTY_FUNCTION__);
- }
- } else {
- if (debug_level > 0)
- serial_printf("ERROR : %s problem with "
- "endpoint\n",
- __PRETTY_FUNCTION__);
- }
- } else {
- if (debug_level > 0)
- serial_printf("ERROR : %s with nothing to do\n",
- __PRETTY_FUNCTION__);
- }
-}
-
-static void musb_peri_ep0_tx(void)
-{
- u16 csr0;
- int transfer_size = 0;
- unsigned int p, pm;
-
- csr0 = readw(&musbr->ep[0].ep0.csr0);
-
- /* Check for pending tx */
- if (csr0 & MUSB_CSR0_TXPKTRDY)
- goto end;
-
- /* Check if this is the last packet sent */
- if (ep0_endpoint->sent >= ep0_urb->actual_length) {
- SET_EP0_STATE(IDLE);
- goto end;
- }
-
- transfer_size = ep0_urb->actual_length - ep0_endpoint->sent;
- /* Is the transfer size negative ? */
- if (transfer_size <= 0) {
- if (debug_level > 0)
- serial_printf("ERROR : %s problem with the"
- " transfer size %d\n",
- __PRETTY_FUNCTION__,
- transfer_size);
- SET_EP0_STATE(IDLE);
- goto end;
- }
-
- /* Truncate large transfers to the fifo size */
- if (transfer_size > ep0_endpoint->tx_packetSize)
- transfer_size = ep0_endpoint->tx_packetSize;
-
- write_fifo(0, transfer_size, &ep0_urb->buffer[ep0_endpoint->sent]);
- ep0_endpoint->sent += transfer_size;
-
- /* Done or more to send ? */
- if (ep0_endpoint->sent >= ep0_urb->actual_length)
- musb_ep0_tx_ready_and_last();
- else
- musb_ep0_tx_ready();
-
- /* Wait a bit */
- pm = 10;
- for (p = 0; p < pm; p++) {
- csr0 = readw(&musbr->ep[0].ep0.csr0);
- if (!(csr0 & MUSB_CSR0_TXPKTRDY))
- break;
-
- /* Double the delay. */
- udelay(1 << pm);
- }
-
- if ((ep0_endpoint->sent >= ep0_urb->actual_length) && (p < pm))
- SET_EP0_STATE(IDLE);
-
-end:
- return;
-}
-
-static void musb_peri_ep0(void)
-{
- u16 csr0;
-
- if (SET_ADDRESS == ep0_state)
- return;
-
- csr0 = readw(&musbr->ep[0].ep0.csr0);
-
- /* Error conditions */
- if (MUSB_CSR0_P_SENTSTALL & csr0) {
- csr0 &= ~MUSB_CSR0_P_SENTSTALL;
- writew(csr0, &musbr->ep[0].ep0.csr0);
- SET_EP0_STATE(IDLE);
- }
- if (MUSB_CSR0_P_SETUPEND & csr0) {
- csr0 |= MUSB_CSR0_P_SVDSETUPEND;
- writew(csr0, &musbr->ep[0].ep0.csr0);
- SET_EP0_STATE(IDLE);
- if ((debug_setup) && (debug_level > 1))
- serial_printf("WARN: %s SETUPEND\n",
- __PRETTY_FUNCTION__);
- }
-
- /* Normal states */
- if (IDLE == ep0_state)
- musb_peri_ep0_idle();
-
- if (TX == ep0_state)
- musb_peri_ep0_tx();
-
- if (RX == ep0_state)
- musb_peri_ep0_rx();
-}
-
-static void musb_peri_rx_ep(unsigned int ep)
-{
- u16 peri_rxcount;
- u16 peri_rxcsr = readw(&musbr->ep[ep].epN.rxcsr);
-
- if (!(peri_rxcsr & MUSB_RXCSR_RXPKTRDY)) {
- if (debug_level > 0)
- serial_printf("ERROR : %s %d without MUSB_RXCSR_RXPKTRDY set\n",
- __PRETTY_FUNCTION__, ep);
- return;
- }
-
- peri_rxcount = readw(&musbr->ep[ep].epN.rxcount);
- if (peri_rxcount) {
- struct usb_endpoint_instance *endpoint;
- u32 length;
- u8 *data;
-
- endpoint = GET_ENDPOINT(udc_device, ep);
- if (endpoint && endpoint->rcv_urb) {
- struct urb *urb = endpoint->rcv_urb;
- unsigned int remaining_space = urb->buffer_length -
- urb->actual_length;
-
- if (remaining_space) {
- int urb_bad = 0; /* urb is good */
-
- if (peri_rxcount > remaining_space)
- length = remaining_space;
- else
- length = peri_rxcount;
-
- data = (u8 *) urb->buffer_data;
- data += urb->actual_length;
-
- /* The common musb fifo reader */
- read_fifo(ep, length, data);
-
- if (length == peri_rxcount)
- musb_peri_rx_ack(ep);
- else
- pending_intrrx |= (1 << ep);
-
- /*
- * urb's actual_length is updated in
- * usbd_rcv_complete
- */
- usbd_rcv_complete(endpoint, length, urb_bad);
-
- } else {
- if (debug_level > 0)
- serial_printf("ERROR : %s %d no space "
- "in rcv buffer\n",
- __PRETTY_FUNCTION__, ep);
-
- pending_intrrx |= (1 << ep);
- }
- } else {
- if (debug_level > 0)
- serial_printf("ERROR : %s %d problem with "
- "endpoint\n",
- __PRETTY_FUNCTION__, ep);
-
- pending_intrrx |= (1 << ep);
- }
-
- } else {
- if (debug_level > 0)
- serial_printf("ERROR : %s %d with nothing to do\n",
- __PRETTY_FUNCTION__, ep);
-
- musb_peri_rx_ack(ep);
- }
-}
-
-static void musb_peri_rx(u16 intr)
-{
- unsigned int ep;
-
- /* First bit is reserved and does not indicate interrupt for EP0 */
-
- for (ep = 1; ep < 16; ep++) {
- if ((1 << ep) & intr)
- musb_peri_rx_ep(ep);
- }
-}
-
-static void musb_peri_tx(u16 intr)
-{
- unsigned int ep;
-
- /* Check for EP0: first bit indicates interrupt for both RX and TX */
- if (0x01 & intr)
- musb_peri_ep0();
-
- for (ep = 1; ep < 16; ep++) {
- if ((1 << ep) & intr)
- udc_endpoint_write(GET_ENDPOINT(udc_device, ep));
- }
-}
-
-void udc_irq(void)
-{
- /* This is a high freq called function */
- if (enabled) {
- u8 intrusb;
-
- intrusb = readb(&musbr->intrusb);
-
- /*
- * See drivers/usb/gadget/mpc8xx_udc.c for
- * state diagram going from detached through
- * configuration.
- */
- if (MUSB_INTR_RESUME & intrusb) {
- usbd_device_event_irq(udc_device,
- DEVICE_BUS_ACTIVITY, 0);
- musb_peri_resume();
- }
-
- if (MUSB_INTR_RESET & intrusb) {
- usbd_device_event_irq(udc_device, DEVICE_RESET, 0);
- musb_peri_reset();
- }
-
- if (MUSB_INTR_DISCONNECT & intrusb) {
- /* cable unplugged from hub/host */
- usbd_device_event_irq(udc_device, DEVICE_RESET, 0);
- musb_peri_reset();
- usbd_device_event_irq(udc_device, DEVICE_HUB_RESET, 0);
- }
-
- if (MUSB_INTR_SOF & intrusb) {
- usbd_device_event_irq(udc_device,
- DEVICE_BUS_ACTIVITY, 0);
- musb_peri_resume();
- }
-
- if (MUSB_INTR_SUSPEND & intrusb) {
- usbd_device_event_irq(udc_device,
- DEVICE_BUS_INACTIVE, 0);
- }
-
- if (ep0_state != SET_ADDRESS) {
- u16 intrrx, intrtx;
-
- intrrx = readw(&musbr->intrrx);
- intrtx = readw(&musbr->intrtx);
-
- intrrx |= pending_intrrx;
- pending_intrrx = 0;
-
- if (intrrx)
- musb_peri_rx(intrrx);
-
- if (intrtx)
- musb_peri_tx(intrtx);
- } else {
- if (readw(&musbr->intrtx) & 0x1) {
- u8 faddr;
- faddr = readb(&musbr->faddr);
- /*
- * Setting of the address can fail.
- * Normally it succeeds the second time.
- */
- if (udc_device->address != faddr)
- musb_peri_ep0_set_address();
- }
- }
- }
-}
-
-void udc_set_nak(int ep_num)
-{
- /* noop */
-}
-
-void udc_unset_nak(int ep_num)
-{
- /* noop */
-}
-
-int udc_endpoint_write(struct usb_endpoint_instance *endpoint)
-{
- int ret = 0;
-
- /* Transmit only if the hardware is available */
- if (endpoint->tx_urb && endpoint->state == 0) {
- unsigned int ep = endpoint->endpoint_address &
- USB_ENDPOINT_NUMBER_MASK;
-
- u16 peri_txcsr = readw(&musbr->ep[ep].epN.txcsr);
-
- /* Error conditions */
- if (peri_txcsr & MUSB_TXCSR_P_UNDERRUN) {
- peri_txcsr &= ~MUSB_TXCSR_P_UNDERRUN;
- writew(peri_txcsr, &musbr->ep[ep].epN.txcsr);
- }
-
- if (debug_level > 1)
- musb_print_txcsr(peri_txcsr);
-
- /* Check if a packet is waiting to be sent */
- if (!(peri_txcsr & MUSB_TXCSR_TXPKTRDY)) {
- u32 length;
- u8 *data;
- struct urb *urb = endpoint->tx_urb;
- unsigned int remaining_packet = urb->actual_length -
- endpoint->sent;
-
- if (endpoint->tx_packetSize < remaining_packet)
- length = endpoint->tx_packetSize;
- else
- length = remaining_packet;
-
- data = (u8 *) urb->buffer;
- data += endpoint->sent;
-
- /* common musb fifo function */
- write_fifo(ep, length, data);
-
- musb_peri_tx_ready(ep);
-
- endpoint->last = length;
- /* usbd_tx_complete will take care of updating 'sent' */
- usbd_tx_complete(endpoint);
- }
- } else {
- if (debug_level > 0)
- serial_printf("ERROR : %s Problem with urb %p "
- "or ep state %d\n",
- __PRETTY_FUNCTION__,
- endpoint->tx_urb, endpoint->state);
- }
-
- return ret;
-}
-
-void udc_setup_ep(struct usb_device_instance *device, unsigned int id,
- struct usb_endpoint_instance *endpoint)
-{
- if (0 == id) {
- /* EP0 */
- ep0_endpoint = endpoint;
- ep0_endpoint->endpoint_address = 0xff;
- ep0_urb = usbd_alloc_urb(device, endpoint);
- } else if (MAX_ENDPOINT >= id) {
- epinfo[(id * 2) + 0].epsize = endpoint->rcv_packetSize;
- epinfo[(id * 2) + 1].epsize = endpoint->tx_packetSize;
- musb_configure_ep(&epinfo[0], ARRAY_SIZE(epinfo));
- } else {
- if (debug_level > 0)
- serial_printf("ERROR : %s endpoint request %d "
- "exceeds maximum %d\n",
- __PRETTY_FUNCTION__, id, MAX_ENDPOINT);
- }
-}
-
-void udc_connect(void)
-{
- /* noop */
-}
-
-void udc_disconnect(void)
-{
- /* noop */
-}
-
-void udc_enable(struct usb_device_instance *device)
-{
- /* Save the device structure pointer */
- udc_device = device;
-
- enabled = 1;
-}
-
-void udc_disable(void)
-{
- enabled = 0;
-}
-
-void udc_startup_events(struct usb_device_instance *device)
-{
- /* The DEVICE_INIT event puts the USB device in the state STATE_INIT. */
- usbd_device_event_irq(device, DEVICE_INIT, 0);
-
- /*
- * The DEVICE_CREATE event puts the USB device in the state
- * STATE_ATTACHED.
- */
- usbd_device_event_irq(device, DEVICE_CREATE, 0);
-
- /* Resets the address to 0 */
- usbd_device_event_irq(device, DEVICE_RESET, 0);
-
- udc_enable(device);
-}
-
-int udc_init(void)
-{
- int ret;
- int ep_loop;
-
- ret = musb_platform_init();
- if (ret < 0)
- goto end;
-
- /* Configure all the endpoint FIFO's and start usb controller */
- musbr = musb_cfg.regs;
-
- /* Initialize the endpoints */
- for (ep_loop = 0; ep_loop <= MAX_ENDPOINT * 2; ep_loop++) {
- epinfo[ep_loop].epnum = (ep_loop / 2) + 1;
- epinfo[ep_loop].epdir = ep_loop % 2; /* OUT, IN */
- epinfo[ep_loop].epsize = 0;
- }
-
- musb_peri_softconnect();
-
- ret = 0;
-end:
-
- return ret;
-}
diff --git a/drivers/usb/musb/omap3.c b/drivers/usb/musb/omap3.c
deleted file mode 100644
index e5238bc02f8..00000000000
--- a/drivers/usb/musb/omap3.c
+++ /dev/null
@@ -1,129 +0,0 @@
-// SPDX-License-Identifier: GPL-2.0+
-/*
- * Copyright (c) 2009 Wind River Systems, Inc.
- * Tom Rix <Tom.Rix@windriver.com>
- *
- * This is file is based on
- * repository git.gitorious.org/u-boot-omap3/mainline.git,
- * branch omap3-dev-usb, file drivers/usb/host/omap3530_usb.c
- *
- * This is the unique part of its copyright :
- *
- * ------------------------------------------------------------------------
- *
- * Copyright (c) 2009 Texas Instruments
- *
- * ------------------------------------------------------------------------
- */
-
-#include <serial.h>
-#include <asm/omap_common.h>
-#include <twl4030.h>
-#include "omap3.h"
-
-static int platform_needs_initialization = 1;
-
-struct musb_config musb_cfg = {
- .regs = (struct musb_regs *)MENTOR_USB0_BASE,
- .timeout = OMAP3_USB_TIMEOUT,
- .musb_speed = 0,
-};
-
-/*
- * OMAP3 USB OTG registers.
- */
-struct omap3_otg_regs {
- u32 revision;
- u32 sysconfig;
- u32 sysstatus;
- u32 interfsel;
- u32 simenable;
- u32 forcestdby;
-};
-
-static struct omap3_otg_regs *otg;
-
-#define OMAP3_OTG_SYSCONFIG_SMART_STANDBY_MODE 0x2000
-#define OMAP3_OTG_SYSCONFIG_NO_STANDBY_MODE 0x1000
-#define OMAP3_OTG_SYSCONFIG_SMART_IDLE_MODE 0x0010
-#define OMAP3_OTG_SYSCONFIG_NO_IDLE_MODE 0x0008
-#define OMAP3_OTG_SYSCONFIG_ENABLEWAKEUP 0x0004
-#define OMAP3_OTG_SYSCONFIG_SOFTRESET 0x0002
-#define OMAP3_OTG_SYSCONFIG_AUTOIDLE 0x0001
-
-#define OMAP3_OTG_SYSSTATUS_RESETDONE 0x0001
-
-#define OMAP3_OTG_INTERFSEL_OMAP 0x0001
-
-#define OMAP3_OTG_FORCESTDBY_STANDBY 0x0001
-
-#ifdef DEBUG_MUSB_OMAP3
-static void musb_db_otg_regs(void)
-{
- u32 l;
- l = readl(&otg->revision);
- serial_printf("OTG_REVISION 0x%x\n", l);
- l = readl(&otg->sysconfig);
- serial_printf("OTG_SYSCONFIG 0x%x\n", l);
- l = readl(&otg->sysstatus);
- serial_printf("OTG_SYSSTATUS 0x%x\n", l);
- l = readl(&otg->interfsel);
- serial_printf("OTG_INTERFSEL 0x%x\n", l);
- l = readl(&otg->forcestdby);
- serial_printf("OTG_FORCESTDBY 0x%x\n", l);
-}
-#endif
-
-int musb_platform_init(void)
-{
- int ret = -1;
-
- if (platform_needs_initialization) {
- u32 stdby;
-
- /*
- * OMAP3EVM uses ISP1504 phy and so
- * twl4030 related init is not required.
- */
-#ifdef CONFIG_TWL4030_USB
- if (twl4030_usb_ulpi_init()) {
- serial_printf("ERROR: %s Could not initialize PHY\n",
- __PRETTY_FUNCTION__);
- goto end;
- }
-#endif
-
- otg = (struct omap3_otg_regs *)OMAP3_OTG_BASE;
-
- /* Set OTG to always be on */
- writel(OMAP3_OTG_SYSCONFIG_NO_STANDBY_MODE |
- OMAP3_OTG_SYSCONFIG_NO_IDLE_MODE, &otg->sysconfig);
-
- /* Set the interface */
- writel(OMAP3_OTG_INTERFSEL_OMAP, &otg->interfsel);
-
- /* Clear force standby */
- stdby = readl(&otg->forcestdby);
- stdby &= ~OMAP3_OTG_FORCESTDBY_STANDBY;
- writel(stdby, &otg->forcestdby);
-
-#ifdef CONFIG_TARGET_OMAP3_EVM
- musb_cfg.extvbus = omap3_evm_need_extvbus();
-#endif
-
- platform_needs_initialization = 0;
- }
-
- ret = platform_needs_initialization;
-
-#ifdef CONFIG_TWL4030_USB
-end:
-#endif
- return ret;
-
-}
-
-void musb_platform_deinit(void)
-{
- /* noop */
-}
diff --git a/drivers/usb/musb/omap3.h b/drivers/usb/musb/omap3.h
deleted file mode 100644
index 78fdb2959bb..00000000000
--- a/drivers/usb/musb/omap3.h
+++ /dev/null
@@ -1,38 +0,0 @@
-/* SPDX-License-Identifier: GPL-2.0+ */
-/*
- * Copyright (c) 2009 Wind River Systems, Inc.
- * Tom Rix <Tom.Rix@windriver.com>
- *
- * This file is based on the file drivers/usb/musb/davinci.h
- *
- * This is the unique part of its copyright:
- *
- * --------------------------------------------------------------------
- *
- * Copyright (c) 2008 Texas Instruments
- * Author: Thomas Abraham t-abraham@ti.com, Texas Instruments
- *
- * --------------------------------------------------------------------
- */
-#ifndef _MUSB_OMAP3_H_
-#define _MUSB_OMAP3_H_
-
-#include <asm/arch/cpu.h>
-#include "musb_core.h"
-
-/* Base address of MUSB registers */
-#define MENTOR_USB0_BASE MUSB_BASE
-
-/* Base address of OTG registers */
-#define OMAP3_OTG_BASE (MENTOR_USB0_BASE + 0x400)
-
-/* Timeout for USB module */
-#define OMAP3_USB_TIMEOUT 0x3FFFFFF
-
-int musb_platform_init(void);
-
-#ifdef CONFIG_TARGET_OMAP3_EVM
-extern u8 omap3_evm_need_extvbus(void);
-#endif
-
-#endif /* _MUSB_OMAP3_H */
diff --git a/include/dm/root.h b/include/dm/root.h
index 286bd9a2ddd..61a61e1ce46 100644
--- a/include/dm/root.h
+++ b/include/dm/root.h
@@ -114,7 +114,7 @@ int dm_extended_scan(bool pre_reloc_only);
*
* Some devices may not be visible to Driver Model. This weak function can
* be provided by boards which wish to create their own devices
- * programmaticaly. They should do this by calling device_bind() on each
+ * programmatically. They should do this by calling device_bind() on each
* device.
*
* @pre_reloc_only: If true, bind only nodes with special devicetree properties,
diff --git a/include/scmi_protocols.h b/include/scmi_protocols.h
index bb74a57f79a..ecab021b472 100644
--- a/include/scmi_protocols.h
+++ b/include/scmi_protocols.h
@@ -399,7 +399,7 @@ int scmi_generic_protocol_version(struct udevice *dev,
int scmi_base_protocol_version(struct udevice *dev, u32 *version);
/**
- * scmi_protocol_attrs - get protocol attributes
+ * scmi_base_protocol_attrs - get protocol attributes
* @dev: SCMI protocol device
* @num_agents: Number of SCMI agents
* @num_protocols: Number of SCMI protocols
@@ -414,7 +414,7 @@ int scmi_base_protocol_attrs(struct udevice *dev, u32 *num_agents,
u32 *num_protocols);
/**
- * scmi_protocol_message_attrs - get message-specific attributes
+ * scmi_base_protocol_message_attrs - get message-specific attributes
* @dev: SCMI protocol device
* @message_id: SCMI message ID
* @attributes: Message-specific attributes
@@ -733,6 +733,7 @@ int scmi_pwd_name_get(struct udevice *dev, u32 domain_id, u8 **name);
/*
* SCMI Clock Protocol
*/
+#define CLOCK_PROTOCOL_VERSION_2_1 0x20001
#define CLOCK_PROTOCOL_VERSION_3_0 0x30000
enum scmi_clock_message_id {
@@ -754,7 +755,7 @@ enum scmi_clock_message_id {
#define SCMI_CLOCK_NAME_LENGTH_MAX 16
/**
- * struct scmi_clk_get_nb_out - Response for SCMI_PROTOCOL_ATTRIBUTES command
+ * struct scmi_clk_protocol_attr_out - Response for SCMI_PROTOCOL_ATTRIBUTES command
* @status: SCMI command status
* @attributes: Attributes of the clock protocol, mainly number of clocks exposed
*/
@@ -772,7 +773,7 @@ struct scmi_clk_attribute_in {
};
/**
- * struct scmi_clk_get_nb_out - Response payload for SCMI_CLOCK_ATTRIBUTES command
+ * struct scmi_clk_attribute_out - Response payload for SCMI_CLOCK_ATTRIBUTES command
* @status: SCMI command status
* @attributes: clock attributes
* @clock_name: name of the clock
@@ -785,7 +786,7 @@ struct scmi_clk_attribute_out {
};
/**
- * struct scmi_clk_get_nb_out_v2 - Response payload for SCMI_CLOCK_ATTRIBUTES command
+ * struct scmi_clk_attribute_out_v2 - Response payload for SCMI_CLOCK_ATTRIBUTES command
* Clock management Protocol 2.0
* @status: SCMI command status
* @attributes: clock attributes
@@ -800,16 +801,28 @@ struct scmi_clk_attribute_out_v2 {
};
/**
- * struct scmi_clk_state_in - Message payload for CLOCK_CONFIG_SET command
+ * struct scmi_clk_state_in_v1 - Message payload for CLOCK_CONFIG_SET command for protocol < 2.1
* @clock_id: SCMI clock ID
* @attributes: Attributes of the targets clock state
*/
-struct scmi_clk_state_in {
+struct scmi_clk_state_in_v1 {
u32 clock_id;
u32 attributes;
};
/**
+ * struct scmi_clk_state_in_v2 - Message payload for CLOCK_CONFIG_SET command for protocol >= 2.1
+ * @clock_id: SCMI clock ID
+ * @attributes: Attributes of the targets clock state
+ * @extended_config_val: Extended and OEM specific configuration
+ */
+struct scmi_clk_state_in_v2 {
+ u32 clock_id;
+ u32 attributes;
+ u32 extended_config_val;
+};
+
+/**
* struct scmi_clk_state_out - Response payload for CLOCK_CONFIG_SET command
* @status: SCMI command status
*/
@@ -818,7 +831,7 @@ struct scmi_clk_state_out {
};
/**
- * struct scmi_clk_state_in - Message payload for CLOCK_RATE_GET command
+ * struct scmi_clk_rate_get_in - Message payload for CLOCK_RATE_GET command
* @clock_id: SCMI clock ID
* @attributes: Attributes of the targets clock state
*/
@@ -839,7 +852,7 @@ struct scmi_clk_rate_get_out {
};
/**
- * struct scmi_clk_state_in - Message payload for CLOCK_RATE_SET command
+ * struct scmi_clk_rate_set_in - Message payload for CLOCK_RATE_SET command
* @flags: Flags for the clock rate set request
* @clock_id: SCMI clock ID
* @rate_lsb: 32bit LSB of the clock rate in Hertz
@@ -861,7 +874,7 @@ struct scmi_clk_rate_set_out {
};
/**
- * struct scmi_clk_parent_state_in - Message payload for CLOCK_PARENT_SET command
+ * struct scmi_clk_parent_set_in - Message payload for CLOCK_PARENT_SET command
* @clock_id: SCMI clock ID
* @parent_clk: SCMI clock ID
*/
@@ -879,6 +892,7 @@ struct scmi_clk_parent_set_out {
};
/**
+ * struct scmi_clk_get_permissions_in - Message payload for CLOCK_GET_PERMISSIONS command
* @clock_id: Identifier for the clock device.
*/
struct scmi_clk_get_permissions_in {
@@ -886,6 +900,7 @@ struct scmi_clk_get_permissions_in {
};
/**
+ * struct scmi_clk_get_permissions_out - Response payload for CLOCK_GET_PERMISSIONS command
* @status: Negative 32-bit integers are used to return error status codes.
* @permissions: Bit[31] Clock state control, Bit[30] Clock parent control,
* Bit[29] Clock rate control, Bits[28:0] Reserved, must be zero.
@@ -1082,7 +1097,7 @@ struct scmi_pin_config {
};
/**
- * struct scmi_pad_config_set_in - Message payload for PAD_CONFIG_SET command
+ * struct scmi_pinctrl_config_set_in - Message payload for PAD_CONFIG_SET command
* @identifier: Identifier for the pin or group.
* @function_id: Identifier for the function selected to be enabled
* for the selected pin or group. This field is set to
diff --git a/lib/efi_client/efi_app.c b/lib/efi_client/efi_app.c
index 9b94a93ee4f..da8e3432859 100644
--- a/lib/efi_client/efi_app.c
+++ b/lib/efi_client/efi_app.c
@@ -21,7 +21,6 @@
#include <asm/global_data.h>
#include <linux/err.h>
#include <linux/types.h>
-#include <asm/global_data.h>
#include <dm/device-internal.h>
#include <dm/lists.h>
#include <dm/root.h>
diff --git a/lib/efi_client/efi_stub.c b/lib/efi_client/efi_stub.c
index a083c7f1e9b..da7972444df 100644
--- a/lib/efi_client/efi_stub.c
+++ b/lib/efi_client/efi_stub.c
@@ -110,7 +110,7 @@ void *memset(void *inptr, int ch, size_t size)
while (ptr < end)
*ptr++ = ch;
- return ptr;
+ return inptr;
}
static void jump_to_uboot(ulong cs32, ulong addr, ulong info)
diff --git a/lib/efi_loader/efi_firmware.c b/lib/efi_loader/efi_firmware.c
index 216df83de67..b41969c70fd 100644
--- a/lib/efi_loader/efi_firmware.c
+++ b/lib/efi_loader/efi_firmware.c
@@ -651,6 +651,7 @@ efi_status_t EFIAPI efi_firmware_fit_set_image(
efi_status_t status;
struct fmp_state state = { 0 };
char *orig_dfu_env;
+ void *img;
EFI_ENTRY("%p %d %p %zu %p %p %p\n", this, image_index, image,
image_size, vendor_code, progress, abort_reason);
@@ -677,7 +678,20 @@ efi_status_t EFIAPI efi_firmware_fit_set_image(
return EFI_EXIT(EFI_DEVICE_ERROR);
}
- ret = fit_update(image);
+ /* Make sure the update fitImage is properly aligned to 8-bytes */
+ if (!IS_ALIGNED((uintptr_t)image, 8)) {
+ img = memalign(8, image_size);
+ if (!img)
+ return EFI_EXIT(EFI_BAD_BUFFER_SIZE);
+ memcpy(img, image, image_size);
+ } else {
+ img = (void *)image;
+ }
+
+ ret = fit_update(img);
+
+ if (!IS_ALIGNED((uintptr_t)image, 8))
+ free(img);
if (env_set("dfu_alt_info", orig_dfu_env))
log_warning("Unable to restore env variable \"dfu_alt_info\". Further DFU operations may fail!\n");
diff --git a/lib/efi_loader/efi_ipconfig.c b/lib/efi_loader/efi_ipconfig.c
index 9f51f77fa9a..b20de8c3e4b 100644
--- a/lib/efi_loader/efi_ipconfig.c
+++ b/lib/efi_loader/efi_ipconfig.c
@@ -168,8 +168,8 @@ static efi_status_t EFIAPI efi_ip4_config2_register_notify(struct efi_ip4_config
}
/*
- * efi_ip4_config2_unregister_notify() - Remove a previously registered eventfor
- * the specified configuration data
+ * efi_ip4_config2_unregister_notify() - Remove a previously registered event
+ * for the specified configuration data
*
* This function implements EFI_IP4_CONFIG2_PROTOCOL.UnregisterDataNotify()
* See the Unified Extensible Firmware Interface
diff --git a/lib/efi_selftest/efi_selftest_console.c b/lib/efi_selftest/efi_selftest_console.c
index fd2b3d09abc..0f8e9d28ef4 100644
--- a/lib/efi_selftest/efi_selftest_console.c
+++ b/lib/efi_selftest/efi_selftest_console.c
@@ -12,12 +12,12 @@
struct efi_simple_text_output_protocol *con_out;
struct efi_simple_text_input_protocol *con_in;
-/*
- * Print a MAC address to an u16 string
+/**
+ * mac() - print a MAC address to an u16 string
*
- * @pointer: mac address
- * @buf: pointer to buffer address
- * on return position of terminating zero word
+ * @pointer: mac address
+ * @buf: pointer to buffer address,
+ * on return position of terminating zero word
*/
static void mac(void *pointer, u16 **buf)
{
@@ -43,7 +43,7 @@ static void mac(void *pointer, u16 **buf)
*buf = pos;
}
-/*
+/**
* printx() - print hexadecimal number to an u16 string
*
* @p: value to print
@@ -71,7 +71,7 @@ static void printx(u64 p, int prec, u16 **buf)
}
/**
- * print_guid() - print GUID to an u16 string
+ * print_uuid() - print GUID to an u16 string
*
* @p: GUID to print
* @buf: pointer to buffer address,
@@ -92,12 +92,12 @@ static void print_uuid(u8 *p, u16 **buf)
}
}
-/*
- * Print an unsigned 32bit value as decimal number to an u16 string
+/**
+ * uint2dec() - print an unsigned 32bit value as decimal number to an u16 string
*
* @value: value to be printed
* @prec: minimum number of digits to display
- * @buf: pointer to buffer address
+ * @buf: pointer to buffer address,
* on return position of terminating zero word
*/
static void uint2dec(u32 value, int prec, u16 **buf)
@@ -132,13 +132,13 @@ static void uint2dec(u32 value, int prec, u16 **buf)
*buf = pos;
}
-/*
- * Print a signed 32bit value as decimal number to an u16 string
+/**
+ * int2dec() - print a signed 32bit value as decimal number to an u16 string
*
* @value: value to be printed
* @prec: minimum number of digits to display
- * @buf: pointer to buffer address
- * on return position of terminating zero word
+ * @buf: pointer to buffer address,
+ * on return position of terminating zero word
*/
static void int2dec(s32 value, int prec, u16 **buf)
{
@@ -155,12 +155,12 @@ static void int2dec(s32 value, int prec, u16 **buf)
*buf = pos;
}
-/*
- * Print a colored formatted string to the EFI console
+/**
+ * efi_st_printc() - print a colored message
*
- * @color color, see constants in efi_api.h, use -1 for no color
- * @fmt format string
- * @... optional arguments
+ * @color: color, see constants in efi_api.h, use -1 for no color
+ * @fmt: printf style format string
+ * @...: arguments to be printed
*/
void efi_st_printc(int color, const char *fmt, ...)
{
@@ -271,10 +271,10 @@ void efi_st_printc(int color, const char *fmt, ...)
con_out->set_attribute(con_out, EFI_LIGHTGRAY);
}
-/*
- * Reads an Unicode character from the input device.
+/**
+ * efi_st_get_key() - read an Unicode character from the input device
*
- * Return: Unicode character
+ * Return: Unicode character
*/
u16 efi_st_get_key(void)
{
diff --git a/lib/efi_selftest/efi_selftest_snp.c b/lib/efi_selftest/efi_selftest_snp.c
index b00c76c2f17..290ed3a28f2 100644
--- a/lib/efi_selftest/efi_selftest_snp.c
+++ b/lib/efi_selftest/efi_selftest_snp.c
@@ -43,7 +43,7 @@ struct dhcp_hdr {
u8 chaddr[16];
u8 sname[64];
u8 file[128];
-};
+} __packed;
/*
* Message type option.
diff --git a/tools/docker/Dockerfile b/tools/docker/Dockerfile
index d2384219c06..58f2a28daa0 100644
--- a/tools/docker/Dockerfile
+++ b/tools/docker/Dockerfile
@@ -6,7 +6,7 @@ FROM ubuntu:jammy-20251001
LABEL org.opencontainers.image.authors="Tom Rini <trini@konsulko.com>"
LABEL org.opencontainers.image.description=" This image is for building U-Boot inside a container"
-# Used by docker to set the target platform: valid values are linux/arm64/v8
+# Used by Docker to set the target platform: valid values are linux/arm64
# and linux/amd64
ARG TARGETPLATFORM