diff options
427 files changed, 8871 insertions, 3574 deletions
diff --git a/.azure-pipelines.yml b/.azure-pipelines.yml index b3fd4ceef13..966a66ff567 100644 --- a/.azure-pipelines.yml +++ b/.azure-pipelines.yml @@ -251,7 +251,7 @@ stages: # the below corresponds to .gitlab-ci.yml "before_script" cd \${WORK_DIR} git config --global --add safe.directory \${WORK_DIR} - git clone --depth=1 https://source.denx.de/u-boot/u-boot-test-hooks /tmp/uboot-test-hooks + git clone --depth=1 https://github.com/u-boot/u-boot-test-hooks /tmp/uboot-test-hooks # qemu_arm64_lwip_defconfig is the same as qemu_arm64 but with NET_LWIP enabled. # The test config and the boardenv file from qemu_arm64 can be re-used so create symlinks ln -s conf.qemu_arm64_na /tmp/uboot-test-hooks/bin/travis-ci/conf.qemu_arm64_lwip_na diff --git a/MAINTAINERS b/MAINTAINERS index f98acbc8885..d490b43c57f 100644 --- a/MAINTAINERS +++ b/MAINTAINERS @@ -602,6 +602,7 @@ ARM SAMSUNG EXYNOS850 SOC M: Sam Protsenko <semen.protsenko@linaro.org> S: Maintained F: drivers/clk/exynos/clk-exynos850.c +F: drivers/phy/phy-exynos-usbdrd.c F: drivers/pinctrl/exynos/pinctrl-exynos850.c ARM SAMSUNG SOC DRIVERS @@ -1576,6 +1577,7 @@ M: Yao Zi <ziyao@disroot.org> S: Maintained F: arch/riscv/cpu/th1520/ F: drivers/clk/thead/clk-th1520-ap.c +F: drivers/net/dwmac_thead.c F: drivers/pinctrl/pinctrl-th1520.c F: drivers/ram/thead/th1520_ddr.c @@ -1864,7 +1866,7 @@ F: common/spl_reloc.c F: include/vbe.h VIDEO -M: Anatolij Gustschin <agust@denx.de> +M: Anatolij Gustschin <ag.dev.uboot@gmail.com> S: Maintained T: git https://source.denx.de/u-boot/custodians/u-boot-video.git F: drivers/video/ @@ -416,8 +416,8 @@ HOST_LFS_CFLAGS := $(shell getconf LFS_CFLAGS 2>/dev/null) HOST_LFS_LDFLAGS := $(shell getconf LFS_LDFLAGS 2>/dev/null) HOST_LFS_LIBS := $(shell getconf LFS_LIBS 2>/dev/null) -HOSTCC = gcc -HOSTCXX = g++ +HOSTCC = cc +HOSTCXX = c++ KBUILD_HOSTCFLAGS := -Wall -Wstrict-prototypes -O2 \ -fomit-frame-pointer -std=gnu11 $(HOST_LFS_CFLAGS) \ $(HOSTCFLAGS) #-Wmissing-prototypes Enable it and fix warnings diff --git a/arch/Kconfig.nxp b/arch/Kconfig.nxp index 5a8c382ed75..ef9087d0197 100644 --- a/arch/Kconfig.nxp +++ b/arch/Kconfig.nxp @@ -84,6 +84,28 @@ config SYS_FSL_SFP_VER_3_4 endchoice +config FSL_SEC_MON + bool + help + Freescale Security Monitor block is responsible for monitoring + system states. + Security Monitor can be transitioned on any security failures, + like software violations or hardware security violations. + +choice + prompt "Security monitor interaction endianess" + depends on FSL_SEC_MON + default SYS_FSL_SEC_MON_BE if PPC + default SYS_FSL_SEC_MON_LE + +config SYS_FSL_SEC_MON_LE + bool "Security monitor interactions are little endian" + +config SYS_FSL_SEC_MON_BE + bool "Security monitor interactions are big endian" + +endchoice + config SPL_UBOOT_KEY_HASH string "Non-SRK key hash for U-Boot public/private key pair" depends on SPL diff --git a/arch/arm/Kconfig b/arch/arm/Kconfig index 5872455a0fe..4e7593616d8 100644 --- a/arch/arm/Kconfig +++ b/arch/arm/Kconfig @@ -835,6 +835,9 @@ config ARCH_K3 select FIT_SIGNATURE if ARM64 select LTO imply TI_SECURE_DEVICE + imply DM_RNG if ARM64 + imply TEE if ARM64 + imply OPTEE if ARM64 config ARCH_OMAP2PLUS bool "TI OMAP2+" diff --git a/arch/arm/cpu/armv8/fsl-layerscape/Kconfig b/arch/arm/cpu/armv8/fsl-layerscape/Kconfig index 787c7a7c1da..20883fe6825 100644 --- a/arch/arm/cpu/armv8/fsl-layerscape/Kconfig +++ b/arch/arm/cpu/armv8/fsl-layerscape/Kconfig @@ -77,11 +77,11 @@ config ARCH_LS1043A select SYS_FSL_DDR_BE select SYS_FSL_DDR_VER_50 select SYS_FSL_ERRATUM_A008850 if !TFABOOT - select SYS_FSL_ERRATUM_A008997 - select SYS_FSL_ERRATUM_A009008 + select SYS_FSL_ERRATUM_A008997 if USB + select SYS_FSL_ERRATUM_A009008 if USB select SYS_FSL_ERRATUM_A009660 if !TFABOOT select SYS_FSL_ERRATUM_A009663 if !TFABOOT - select SYS_FSL_ERRATUM_A009798 + select SYS_FSL_ERRATUM_A009798 if USB select SYS_FSL_ERRATUM_A009942 if !TFABOOT select SYS_FSL_ERRATUM_A010315 if PCIE_LAYERSCAPE select SYS_FSL_ERRATUM_A010539 diff --git a/arch/arm/dts/Makefile b/arch/arm/dts/Makefile index 17795f8f746..0dc7e190eb9 100644 --- a/arch/arm/dts/Makefile +++ b/arch/arm/dts/Makefile @@ -760,7 +760,6 @@ dtb-y += \ imx6dl-riotboard.dtb \ imx6dl-sabreauto.dtb \ imx6dl-sabresd.dtb \ - imx6dl-sielaff.dtb \ imx6dl-wandboard-revd1.dtb endif @@ -918,6 +917,7 @@ dtb-$(CONFIG_ARCH_IMX8M) += \ imx8mq-librem5-r4.dtb dtb-$(CONFIG_ARCH_IMX9) += \ + imx93-11x11-frdm.dtb \ imx93-var-som-symphony.dtb dtb-$(CONFIG_ARCH_IMXRT) += imxrt1020-evk.dtb \ diff --git a/arch/arm/dts/ast2600.dtsi b/arch/arm/dts/ast2600.dtsi index cb8ce8b6b6f..a048951fa18 100644 --- a/arch/arm/dts/ast2600.dtsi +++ b/arch/arm/dts/ast2600.dtsi @@ -794,7 +794,7 @@ uart11: serial@1e790500 { compatible = "ns16550a"; - reg = <0x1e790400 0x20>; + reg = <0x1e790500 0x20>; reg-shift = <2>; interrupts = <GIC_SPI 62 IRQ_TYPE_LEVEL_HIGH>; clocks = <&scu ASPEED_CLK_GATE_UART11CLK>; diff --git a/arch/arm/dts/imx6dl-sielaff.dts b/arch/arm/dts/imx6dl-sielaff.dts deleted file mode 100644 index 7de8d5f2651..00000000000 --- a/arch/arm/dts/imx6dl-sielaff.dts +++ /dev/null @@ -1,533 +0,0 @@ -// SPDX-License-Identifier: GPL-2.0+ OR MIT -/* - * Copyright (C) 2022 Kontron Electronics GmbH - */ - -/dts-v1/; - -#include "imx6dl.dtsi" -#include <dt-bindings/clock/imx6qdl-clock.h> -#include <dt-bindings/gpio/gpio.h> -#include <dt-bindings/input/input.h> - -/ { - model = "Sielaff i.MX6 Solo"; - compatible = "sielaff,imx6dl-board", "fsl,imx6dl"; - - chosen { - stdout-path = &uart2; - }; - - backlight: pwm-backlight { - compatible = "pwm-backlight"; - pinctrl-names = "default"; - pinctrl-0 = <&pinctrl_backlight>; - pwms = <&pwm3 0 50000 0>; - brightness-levels = <0 0 64 88 112 136 184 232 255>; - default-brightness-level = <4>; - enable-gpios = <&gpio6 16 GPIO_ACTIVE_HIGH>; - power-supply = <®_backlight>; - }; - - cec { - compatible = "cec-gpio"; - pinctrl-names = "default"; - pinctrl-0 = <&pinctrl_hdmi_cec>; - cec-gpios = <&gpio2 7 GPIO_ACTIVE_HIGH>; - hdmi-phandle = <&hdmi>; - }; - - enet_ref: clock-enet-ref { - compatible = "fixed-clock"; - #clock-cells = <0>; - clock-frequency = <50000000>; - clock-output-names = "enet-ref"; - }; - - gpio-keys { - compatible = "gpio-keys"; - pinctrl-names = "default"; - pinctrl-0 = <&pinctrl_gpio_keys>; - - key-0 { - gpios = <&gpio2 16 0>; - debounce-interval = <10>; - linux,code = <1>; - }; - - key-1 { - gpios = <&gpio3 27 0>; - debounce-interval = <10>; - linux,code = <2>; - }; - - key-2 { - gpios = <&gpio5 4 0>; - debounce-interval = <10>; - linux,code = <3>; - }; - }; - - leds { - compatible = "gpio-leds"; - pinctrl-names = "default"; - pinctrl-0 = <&pinctrl_gpio_leds>; - - led-debug { - label = "debug-led"; - gpios = <&gpio5 21 GPIO_ACTIVE_HIGH>; - default-state = "off"; - linux,default-trigger = "heartbeat"; - }; - }; - - memory@80000000 { - reg = <0x80000000 0x20000000>; - device_type = "memory"; - }; - - osc_eth_phy: clock-osc-eth-phy { - compatible = "fixed-clock"; - #clock-cells = <0>; - clock-frequency = <25000000>; - clock-output-names = "osc-eth-phy"; - }; - - panel { - compatible = "lg,lb070wv8"; - backlight = <&backlight>; - power-supply = <®_3v3>; - - port { - panel_in_lvds: endpoint { - remote-endpoint = <&lvds_out>; - }; - }; - }; - - reg_3v3: regulator-3v3 { - compatible = "regulator-fixed"; - regulator-name = "3v3"; - regulator-min-microvolt = <3300000>; - regulator-max-microvolt = <3300000>; - }; - - reg_backlight: regulator-backlight { - compatible = "regulator-fixed"; - pinctrl-names = "default"; - pinctrl-0 = <&pinctrl_reg_backlight>; - enable-active-high; - gpio = <&gpio1 23 GPIO_ACTIVE_HIGH>; - regulator-name = "backlight"; - regulator-min-microvolt = <12000000>; - regulator-max-microvolt = <12000000>; - }; - - reg_usb_otg_vbus: regulator-usb-otg-vbus { - compatible = "regulator-fixed"; - pinctrl-names = "default"; - pinctrl-0 = <&pinctrl_reg_usbotg_vbus>; - enable-active-high; - gpio = <&gpio4 15 GPIO_ACTIVE_HIGH>; - regulator-name = "usb_otg_vbus"; - regulator-min-microvolt = <5000000>; - regulator-max-microvolt = <5000000>; - }; -}; - -&ecspi2 { - pinctrl-names = "default"; - pinctrl-0 = <&pinctrl_ecspi2>; - cs-gpios = <&gpio5 29 GPIO_ACTIVE_LOW>; - status = "okay"; - - flash@0 { - compatible = "jedec,spi-nor"; - reg = <0>; - spi-max-frequency = <20000000>; - }; -}; - -&fec { - /* - * Set PTP clock to external instead of internal reference, as the - * REF_CLK from the PHY is fed back into the i.MX6 and the GPR - * register needs to be set accordingly (see mach-imx6q.c). - */ - clocks = <&clks IMX6QDL_CLK_ENET>, - <&clks IMX6QDL_CLK_ENET>, - <&enet_ref>, - <&clks IMX6QDL_CLK_ENET_REF>; - clock-names = "ipg", "ahb", "ptp", "enet_out"; - pinctrl-names = "default"; - pinctrl-0 = <&pinctrl_enet>; - phy-connection-type = "rmii"; - phy-handle = <ðphy>; - status = "okay"; - - mdio { - #address-cells = <1>; - #size-cells = <0>; - - ethphy: ethernet-phy@1 { - reg = <1>; - clocks = <&osc_eth_phy>; - clock-names = "rmii-ref"; - micrel,led-mode = <1>; - reset-assert-us = <500>; - reset-deassert-us = <100>; - reset-gpios = <&gpio5 2 GPIO_ACTIVE_LOW>; - }; - }; -}; - -&gpio1 { - gpio-line-names = - "", "", "", "", "", "", "", "", - "", "", "", "", "", "", "key-out", "key-in", - "", "", "", "", "", "", "", "", - "", "", "", "", "", "", "", ""; -}; - -&gpio2 { - gpio-line-names = - "", "", "", "", "", "", "", "", - "lan9500a-rst", "", "", "", "", "", "", "", - "", "", "", "", "", "", "", "", - "", "", "", "", "", "", "", ""; -}; - -&gpmi { - pinctrl-names = "default"; - pinctrl-0 = <&pinctrl_gpmi_nand>; - status = "okay"; -}; - -&hdmi { - ddc-i2c-bus = <&i2c4>; - status = "okay"; -}; - -&i2c2 { - pinctrl-names = "default"; - pinctrl-0 = <&pinctrl_i2c2>; - clock-frequency = <100000>; - status = "okay"; - - rtc@51 { - compatible = "nxp,pcf8563"; - reg = <0x51>; - }; -}; - -&i2c3 { - pinctrl-names = "default"; - pinctrl-0 = <&pinctrl_i2c3>; - clock-frequency = <100000>; - status = "okay"; - - touchscreen@55 { - compatible = "sitronix,st1633"; - reg = <0x55>; - pinctrl-names = "default"; - pinctrl-0 = <&pinctrl_touch>; - interrupts = <18 IRQ_TYPE_EDGE_FALLING>; - interrupt-parent = <&gpio5>; - gpios = <&gpio1 2 GPIO_ACTIVE_LOW>; - status = "disabled"; - }; - - touchscreen@5d { - compatible = "goodix,gt928"; - reg = <0x5d>; - pinctrl-names = "default"; - pinctrl-0 = <&pinctrl_touch>; - interrupts = <18 IRQ_TYPE_LEVEL_LOW>; - interrupt-parent = <&gpio5>; - irq-gpios = <&gpio5 18 GPIO_ACTIVE_HIGH>; - reset-gpios = <&gpio1 2 GPIO_ACTIVE_HIGH>; - status = "disabled"; - }; -}; - -&i2c4 { - pinctrl-names = "default"; - pinctrl-0 = <&pinctrl_i2c4>; - clock-frequency = <100000>; - status = "okay"; -}; - -&ldb { - status = "okay"; - - lvds: lvds-channel@0 { - fsl,data-mapping = "spwg"; - fsl,data-width = <24>; - status = "okay"; - - port@4 { - reg = <4>; - - lvds_out: endpoint { - remote-endpoint = <&panel_in_lvds>; - }; - }; - }; -}; - -&pwm3 { - pinctrl-names = "default"; - pinctrl-0 = <&pinctrl_pwm3>; - status = "okay"; -}; - -&uart1 { - pinctrl-names = "default"; - pinctrl-0 = <&pinctrl_uart1>; - status = "okay"; -}; - -&uart2 { - pinctrl-names = "default"; - pinctrl-0 = <&pinctrl_uart2>; - status = "okay"; -}; - -&uart3 { - pinctrl-names = "default"; - pinctrl-0 = <&pinctrl_uart3>; - status = "okay"; -}; - -&usbh1 { - pinctrl-names = "default"; - pinctrl-0 = <&pinctrl_usbh1>; - disable-over-current; - status = "okay"; - - #address-cells = <1>; - #size-cells = <0>; - - usb1@1 { - compatible = "usb4b4,6570"; - reg = <1>; - clocks = <&clks IMX6QDL_CLK_CKO>; - - assigned-clocks = <&clks IMX6QDL_CLK_CKO>, - <&clks IMX6QDL_CLK_CKO2_SEL>; - assigned-clock-parents = <&clks IMX6QDL_CLK_CKO2>, - <&clks IMX6QDL_CLK_OSC>; - assigned-clock-rates = <12000000 0>; - }; -}; - -&usbotg { - pinctrl-names = "default"; - pinctrl-0 = <&pinctrl_usbotg>; - dr_mode = "host"; - over-current-active-low; - vbus-supply = <®_usb_otg_vbus>; - status = "okay"; -}; - -&usdhc3 { - pinctrl-names = "default"; - pinctrl-0 = <&pinctrl_usdhc3>; - cd-gpios = <&gpio1 4 GPIO_ACTIVE_LOW>; - vmmc-supply = <®_3v3>; - voltage-ranges = <3300 3300>; - no-1-8-v; - status = "okay"; -}; - -&wdog1 { - pinctrl-names = "default"; - pinctrl-0 = <&pinctrl_wdog>; - fsl,ext-reset-output; - status = "okay"; -}; - -&iomuxc { - pinctrl-names = "default"; - pinctrl-0 = <&pinctrl_hog>; - - pinctrl_hog: hoggrp { - fsl,pins = < - MX6QDL_PAD_RGMII_RD0__GPIO6_IO25 0x1b0b0 /* PMIC_IRQ */ - MX6QDL_PAD_SD2_DAT3__GPIO1_IO12 0x1b0b0 - MX6QDL_PAD_SD2_DAT1__GPIO1_IO14 0x1b0b0 - MX6QDL_PAD_SD2_DAT0__GPIO1_IO15 0x1b0b0 - MX6QDL_PAD_SD4_DAT0__GPIO2_IO08 0x1b0b0 - MX6QDL_PAD_EIM_D29__GPIO3_IO29 0x1b0b0 - >; - }; - - pinctrl_backlight: backlightgrp { - fsl,pins = < - MX6QDL_PAD_NANDF_CS3__GPIO6_IO16 0x100b1 - >; - }; - - pinctrl_ecspi2: ecspi2grp { - fsl,pins = < - MX6QDL_PAD_CSI0_DAT10__ECSPI2_MISO 0x100b1 - MX6QDL_PAD_CSI0_DAT9__ECSPI2_MOSI 0x100b1 - MX6QDL_PAD_CSI0_DAT8__ECSPI2_SCLK 0x100b1 - MX6QDL_PAD_CSI0_DAT11__GPIO5_IO29 0x100b1 - >; - }; - - pinctrl_enet: enetgrp { - fsl,pins = < - MX6QDL_PAD_ENET_MDIO__ENET_MDIO 0x1b0b0 - MX6QDL_PAD_ENET_MDC__ENET_MDC 0x1b0b0 - MX6QDL_PAD_ENET_RXD0__ENET_RX_DATA0 0x1b0b0 - MX6QDL_PAD_ENET_RXD1__ENET_RX_DATA1 0x1b0b0 - MX6QDL_PAD_ENET_CRS_DV__ENET_RX_EN 0x1b0b0 - MX6QDL_PAD_ENET_RX_ER__ENET_RX_ER 0x1b0b0 - MX6QDL_PAD_ENET_TXD0__ENET_TX_DATA0 0x1b0b0 - MX6QDL_PAD_ENET_TXD1__ENET_TX_DATA1 0x1b0b0 - MX6QDL_PAD_ENET_TX_EN__ENET_TX_EN 0x1b0b0 - MX6QDL_PAD_GPIO_16__ENET_REF_CLK 0x4001b0a8 - MX6QDL_PAD_EIM_A25__GPIO5_IO02 0x100b1 - >; - }; - - pinctrl_gpio_keys: gpiokeysgrp { - fsl,pins = < - MX6QDL_PAD_EIM_A22__GPIO2_IO16 0x1b080 - MX6QDL_PAD_EIM_D27__GPIO3_IO27 0x1b080 - MX6QDL_PAD_EIM_A24__GPIO5_IO04 0x1b080 - >; - }; - - pinctrl_gpio_leds: gpioledsgrp { - fsl,pins = < - MX6QDL_PAD_CSI0_VSYNC__GPIO5_IO21 0x1b0b0 - >; - }; - - pinctrl_gpmi_nand: gpminandgrp { - fsl,pins = < - MX6QDL_PAD_NANDF_CLE__NAND_CLE 0xb0b1 - MX6QDL_PAD_NANDF_ALE__NAND_ALE 0xb0b1 - MX6QDL_PAD_NANDF_WP_B__NAND_WP_B 0xb0b1 - MX6QDL_PAD_NANDF_RB0__NAND_READY_B 0xb000 - MX6QDL_PAD_NANDF_CS0__NAND_CE0_B 0xb0b1 - MX6QDL_PAD_SD4_CMD__NAND_RE_B 0xb0b1 - MX6QDL_PAD_SD4_CLK__NAND_WE_B 0xb0b1 - MX6QDL_PAD_NANDF_D0__NAND_DATA00 0xb0b1 - MX6QDL_PAD_NANDF_D1__NAND_DATA01 0xb0b1 - MX6QDL_PAD_NANDF_D2__NAND_DATA02 0xb0b1 - MX6QDL_PAD_NANDF_D3__NAND_DATA03 0xb0b1 - MX6QDL_PAD_NANDF_D4__NAND_DATA04 0xb0b1 - MX6QDL_PAD_NANDF_D5__NAND_DATA05 0xb0b1 - MX6QDL_PAD_NANDF_D6__NAND_DATA06 0xb0b1 - MX6QDL_PAD_NANDF_D7__NAND_DATA07 0xb0b1 - >; - }; - - pinctrl_hdmi_cec: hdmicecgrp { - fsl,pins = < - MX6QDL_PAD_EIM_A21__GPIO2_IO17 0x1b8b1 - >; - }; - - pinctrl_i2c2: i2c2grp { - fsl,pins = < - MX6QDL_PAD_KEY_COL3__I2C2_SCL 0x4001b8b1 - MX6QDL_PAD_KEY_ROW3__I2C2_SDA 0x4001b8b1 - >; - }; - - pinctrl_i2c3: i2c3grp { - fsl,pins = < - MX6QDL_PAD_GPIO_5__I2C3_SCL 0x4001f8b1 - MX6QDL_PAD_GPIO_6__I2C3_SDA 0x4001f8b1 - >; - }; - - pinctrl_i2c4: i2c4grp { - fsl,pins = < - MX6QDL_PAD_GPIO_7__I2C4_SCL 0x4001b8b1 - MX6QDL_PAD_GPIO_8__I2C4_SDA 0x4001b8b1 - >; - }; - - pinctrl_pwm3: pwm3grp { - fsl,pins = < - MX6QDL_PAD_SD4_DAT1__PWM3_OUT 0x1b0b1 - >; - }; - - pinctrl_reg_backlight: regbacklightgrp { - fsl,pins = < - MX6QDL_PAD_ENET_REF_CLK__GPIO1_IO23 0x1b0b1 - >; - }; - - pinctrl_reg_usbotg_vbus: regusbotgvbusgrp { - fsl,pins = < - MX6QDL_PAD_KEY_ROW4__GPIO4_IO15 0x1b0b1 - >; - }; - - pinctrl_touch: touchgrp { - fsl,pins = < - MX6QDL_PAD_GPIO_2__GPIO1_IO02 0x1b0b0 - MX6QDL_PAD_CSI0_PIXCLK__GPIO5_IO18 0x1b0b0 - >; - }; - - pinctrl_uart1: uart1grp { - fsl,pins = < - MX6QDL_PAD_SD3_DAT7__UART1_TX_DATA 0x1b0b1 - MX6QDL_PAD_SD3_DAT6__UART1_RX_DATA 0x1b0b1 - >; - }; - - pinctrl_uart2: uart2grp { - fsl,pins = < - MX6QDL_PAD_SD4_DAT7__UART2_TX_DATA 0x1b0b1 - MX6QDL_PAD_SD4_DAT4__UART2_RX_DATA 0x1b0b1 - >; - }; - - pinctrl_uart3: uart3grp { - fsl,pins = < - MX6QDL_PAD_EIM_D24__UART3_TX_DATA 0x1b0b0 - MX6QDL_PAD_EIM_D25__UART3_RX_DATA 0x1b0b0 - >; - }; - - pinctrl_usbh1: usbh1grp { - fsl,pins = < - MX6QDL_PAD_GPIO_3__USB_H1_OC 0x1b0b1 - MX6QDL_PAD_CSI0_MCLK__CCM_CLKO1 0x1b0b0 - >; - }; - - pinctrl_usbotg: usbotggrp { - fsl,pins = < - MX6QDL_PAD_KEY_COL4__USB_OTG_OC 0x1b0b1 - >; - }; - - pinctrl_usdhc3: usdhc3grp { - fsl,pins = < - MX6QDL_PAD_SD3_CMD__SD3_CMD 0x17059 - MX6QDL_PAD_SD3_CLK__SD3_CLK 0x10059 - MX6QDL_PAD_SD3_DAT0__SD3_DATA0 0x17059 - MX6QDL_PAD_SD3_DAT1__SD3_DATA1 0x17059 - MX6QDL_PAD_SD3_DAT2__SD3_DATA2 0x17059 - MX6QDL_PAD_SD3_DAT3__SD3_DATA3 0x17059 - MX6QDL_PAD_GPIO_4__GPIO1_IO04 0x100b1 - >; - }; - - pinctrl_wdog: wdoggrp { - fsl,pins = < - MX6QDL_PAD_GPIO_9__WDOG1_B 0x1b0b0 - >; - }; -}; diff --git a/arch/arm/dts/imx93-11x11-frdm-u-boot.dtsi b/arch/arm/dts/imx93-11x11-frdm-u-boot.dtsi new file mode 100644 index 00000000000..41111b1a95a --- /dev/null +++ b/arch/arm/dts/imx93-11x11-frdm-u-boot.dtsi @@ -0,0 +1,186 @@ +// SPDX-License-Identifier: GPL-2.0+ +/* + * Copyright 2025 NXP + */ + +#include "imx93-u-boot.dtsi" + +/ { + wdt-reboot { + compatible = "wdt-reboot"; + wdt = <&wdog3>; + bootph-pre-ram; + bootph-some-ram; + }; +}; + +&A55_0 { + clocks = <&clk IMX93_CLK_A55_SEL>; +}; + +&A55_1 { + clocks = <&clk IMX93_CLK_A55_SEL>; +}; + +&{/soc@0} { + bootph-all; + bootph-pre-ram; +}; + +&aips1 { + bootph-pre-ram; + bootph-all; +}; + +&aips2 { + bootph-pre-ram; + bootph-some-ram; +}; + +&aips3 { + bootph-pre-ram; + bootph-some-ram; +}; + +&iomuxc { + bootph-pre-ram; + bootph-some-ram; +}; + +®_usdhc2_vmmc { + u-boot,off-on-delay-us = <20000>; + bootph-pre-ram; +}; + +&pinctrl_reg_usdhc2_vmmc { + bootph-pre-ram; +}; + +&pinctrl_uart1 { + bootph-pre-ram; + bootph-some-ram; +}; + +&pinctrl_usdhc1 { + bootph-pre-ram; +}; + +&pinctrl_usdhc2_gpio { + bootph-pre-ram; +}; + +&pinctrl_usdhc2 { + bootph-pre-ram; +}; + +&gpio1 { + bootph-pre-ram; + bootph-some-ram; +}; + +&gpio2 { + bootph-pre-ram; + bootph-some-ram; +}; + +&gpio3 { + bootph-pre-ram; + bootph-some-ram; +}; + +&gpio4 { + bootph-pre-ram; + bootph-some-ram; +}; + +&lpuart1 { + bootph-pre-ram; + bootph-some-ram; +}; + +&usdhc1 { + bootph-pre-ram; +}; + +&usdhc2 { + bootph-pre-ram; + fsl,signal-voltage-switch-extra-delay-ms = <8>; +}; + +&lpi2c1 { + bootph-pre-ram; +}; + +&lpi2c2 { + bootph-pre-ram; +}; + +&lpi2c3 { + bootph-pre-ram; +}; + +&{/soc@0/bus@44000000/i2c@44350000/pmic@25} { + bootph-pre-ram; +}; + +&{/soc@0/bus@44000000/i2c@44350000/pmic@25/regulators} { + bootph-pre-ram; +}; + +&pinctrl_lpi2c2 { + bootph-pre-ram; +}; + +&pinctrl_lpi2c3 { + bootph-pre-ram; +}; + +&fec { + phy-reset-gpios = <&pcal6524 16 GPIO_ACTIVE_LOW>; + phy-reset-duration = <15>; + phy-reset-post-delay = <100>; +}; + +ðphy1 { + reset-gpios = <&pcal6524 15 GPIO_ACTIVE_LOW>; + reset-assert-us = <15000>; + reset-deassert-us = <100000>; +}; + +&usbotg1 { + status = "okay"; + extcon = <&ptn5110>; +}; + +&usbotg2 { + status = "okay"; +}; + +&s4muap { + bootph-pre-ram; + bootph-some-ram; + status = "okay"; +}; + +&clk { + bootph-all; + bootph-pre-ram; + /delete-property/ assigned-clocks; + /delete-property/ assigned-clock-rates; + /delete-property/ assigned-clock-parents; +}; + +&osc_32k { + bootph-all; + bootph-pre-ram; +}; + +&osc_24m { + bootph-all; + bootph-pre-ram; +}; + +&clk_ext1 { + bootph-all; + bootph-pre-ram; +}; diff --git a/arch/arm/dts/imx93-11x11-frdm.dts b/arch/arm/dts/imx93-11x11-frdm.dts new file mode 100644 index 00000000000..993567e767d --- /dev/null +++ b/arch/arm/dts/imx93-11x11-frdm.dts @@ -0,0 +1,603 @@ +// SPDX-License-Identifier: (GPL-2.0+ OR MIT) +/dts-v1/; + +#include <dt-bindings/usb/pd.h> +#include "imx93.dtsi" + +/ { + compatible = "fsl,imx93-11x11-frdm", "fsl,imx93"; + model = "NXP i.MX93 11X11 FRDM board"; + + aliases { + mmc0 = &usdhc1; /* EMMC */ + mmc1 = &usdhc2; /* uSD */ + rtc0 = &pcf2131; + serial0 = &lpuart1; + }; + + chosen { + stdout-path = &lpuart1; + }; + + reg_vref_1v8: regulator-adc-vref { + compatible = "regulator-fixed"; + regulator-min-microvolt = <1800000>; + regulator-max-microvolt = <1800000>; + regulator-name = "vref_1v8"; + }; + + reg_usdhc2_vmmc: regulator-usdhc2 { + compatible = "regulator-fixed"; + off-on-delay-us = <12000>; + pinctrl-0 = <&pinctrl_reg_usdhc2_vmmc>; + pinctrl-names = "default"; + regulator-min-microvolt = <3300000>; + regulator-max-microvolt = <3300000>; + regulator-name = "VSD_3V3"; + gpio = <&gpio3 7 GPIO_ACTIVE_HIGH>; + enable-active-high; + }; + + reg_usdhc3_vmmc: regulator-usdhc3 { + compatible = "regulator-fixed"; + regulator-min-microvolt = <3300000>; + regulator-max-microvolt = <3300000>; + regulator-name = "WLAN_EN"; + gpio = <&pcal6524 20 GPIO_ACTIVE_HIGH>; + enable-active-high; + /* + * IW612 wifi chip needs more delay than other wifi chips to complete + * the host interface initialization after power up, otherwise the + * internal state of IW612 may be unstable, resulting in the failure of + * the SDIO3.0 switch voltage. + */ + startup-delay-us = <20000>; + }; + + reserved-memory { + ranges; + #address-cells = <2>; + #size-cells = <2>; + + linux,cma { + compatible = "shared-dma-pool"; + alloc-ranges = <0 0x80000000 0 0x30000000>; + reusable; + size = <0 0x10000000>; + linux,cma-default; + }; + + rsc_table: rsc-table@2021e000 { + reg = <0 0x2021e000 0 0x1000>; + no-map; + }; + + vdev0vring0: vdev0vring0@a4000000 { + reg = <0 0xa4000000 0 0x8000>; + no-map; + }; + + vdev0vring1: vdev0vring1@a4008000 { + reg = <0 0xa4008000 0 0x8000>; + no-map; + }; + + vdev1vring0: vdev1vring0@a4010000 { + reg = <0 0xa4010000 0 0x8000>; + no-map; + }; + + vdev1vring1: vdev1vring1@a4018000 { + reg = <0 0xa4018000 0 0x8000>; + no-map; + }; + + vdevbuffer: vdevbuffer@a4020000 { + compatible = "shared-dma-pool"; + reg = <0 0xa4020000 0 0x100000>; + no-map; + }; + }; + + usdhc3_pwrseq: usdhc3_pwrseq { + compatible = "mmc-pwrseq-simple"; + reset-gpios = <&pcal6524 12 GPIO_ACTIVE_LOW>; + }; +}; + +&adc1 { + vref-supply = <®_vref_1v8>; + status = "okay"; +}; + +&eqos { + phy-handle = <ðphy1>; + phy-mode = "rgmii-id"; + pinctrl-0 = <&pinctrl_eqos>; + pinctrl-1 = <&pinctrl_eqos_sleep>; + pinctrl-names = "default", "sleep"; + status = "okay"; + + mdio { + compatible = "snps,dwmac-mdio"; + #address-cells = <1>; + #size-cells = <0>; + clock-frequency = <5000000>; + + ethphy1: ethernet-phy@1 { + reg = <1>; + reset-assert-us = <10000>; + reset-deassert-us = <80000>; + reset-gpios = <&pcal6524 15 GPIO_ACTIVE_LOW>; + }; + }; +}; + +&fec { + phy-handle = <ðphy2>; + phy-mode = "rgmii-id"; + pinctrl-0 = <&pinctrl_fec>; + pinctrl-1 = <&pinctrl_fec_sleep>; + pinctrl-names = "default", "sleep"; + fsl,magic-packet; + status = "okay"; + + mdio { + #address-cells = <1>; + #size-cells = <0>; + clock-frequency = <5000000>; + + ethphy2: ethernet-phy@2 { + reg = <2>; + eee-broken-1000t; + reset-assert-us = <10000>; + reset-deassert-us = <80000>; + reset-gpios = <&pcal6524 16 GPIO_ACTIVE_LOW>; + }; + }; +}; + +&lpi2c2 { + clock-frequency = <400000>; + pinctrl-0 = <&pinctrl_lpi2c2>; + pinctrl-names = "default"; + status = "okay"; + + pcal6524: gpio@22 { + compatible = "nxp,pcal6524"; + reg = <0x22>; + #interrupt-cells = <2>; + interrupt-controller; + interrupt-parent = <&gpio3>; + interrupts = <27 IRQ_TYPE_LEVEL_LOW>; + #gpio-cells = <2>; + gpio-controller; + pinctrl-0 = <&pinctrl_pcal6524>; + pinctrl-names = "default"; + }; + + pmic@25 { + compatible = "nxp,pca9451a"; + reg = <0x25>; + interrupt-parent = <&pcal6524>; + interrupts = <11 IRQ_TYPE_EDGE_FALLING>; + + regulators { + + buck1: BUCK1 { + regulator-name = "BUCK1"; + regulator-always-on; + regulator-boot-on; + regulator-min-microvolt = <650000>; + regulator-max-microvolt = <2237500>; + regulator-ramp-delay = <3125>; + }; + + buck2: BUCK2 { + regulator-name = "BUCK2"; + regulator-always-on; + regulator-boot-on; + regulator-min-microvolt = <600000>; + regulator-max-microvolt = <2187500>; + regulator-ramp-delay = <3125>; + }; + + buck4: BUCK4 { + regulator-name = "BUCK4"; + regulator-always-on; + regulator-boot-on; + regulator-min-microvolt = <600000>; + regulator-max-microvolt = <3400000>; + }; + + buck5: BUCK5 { + regulator-name = "BUCK5"; + regulator-always-on; + regulator-boot-on; + regulator-min-microvolt = <600000>; + regulator-max-microvolt = <3400000>; + }; + + buck6: BUCK6 { + regulator-name = "BUCK6"; + regulator-always-on; + regulator-boot-on; + regulator-min-microvolt = <600000>; + regulator-max-microvolt = <3400000>; + }; + + ldo1: LDO1 { + regulator-name = "LDO1"; + regulator-always-on; + regulator-boot-on; + regulator-min-microvolt = <1600000>; + regulator-max-microvolt = <3300000>; + }; + + ldo4: LDO4 { + regulator-name = "LDO4"; + regulator-always-on; + regulator-boot-on; + regulator-min-microvolt = <800000>; + regulator-max-microvolt = <3300000>; + }; + + ldo5: LDO5 { + regulator-name = "LDO5"; + regulator-always-on; + regulator-boot-on; + regulator-min-microvolt = <1800000>; + regulator-max-microvolt = <3300000>; + }; + }; + }; + + eeprom: eeprom@50 { + compatible = "atmel,24c256"; + reg = <0x50>; + pagesize = <64>; + }; +}; + +&lpi2c3 { + #address-cells = <1>; + #size-cells = <0>; + clock-frequency = <400000>; + pinctrl-0 = <&pinctrl_lpi2c3>; + pinctrl-names = "default"; + status = "okay"; + + ptn5110: tcpc@50 { + compatible = "nxp,ptn5110", "tcpci"; + reg = <0x50>; + interrupt-parent = <&gpio3>; + interrupts = <27 IRQ_TYPE_LEVEL_LOW>; + + typec1_con: connector { + compatible = "usb-c-connector"; + data-role = "dual"; + label = "USB-C"; + op-sink-microwatt = <15000000>; + power-role = "dual"; + self-powered; + sink-pdos = <PDO_FIXED(5000, 3000, PDO_FIXED_USB_COMM) + PDO_VAR(5000, 20000, 3000)>; + source-pdos = <PDO_FIXED(5000, 3000, PDO_FIXED_USB_COMM)>; + try-power-role = "sink"; + + ports { + #address-cells = <1>; + #size-cells = <0>; + + port@0 { + reg = <0>; + + typec1_dr_sw: endpoint { + remote-endpoint = <&usb1_drd_sw>; + }; + }; + }; + }; + }; + + pcf2131: rtc@53 { + compatible = "nxp,pcf2131"; + reg = <0x53>; + interrupt-parent = <&pcal6524>; + interrupts = <1 IRQ_TYPE_EDGE_FALLING>; + }; +}; + +&lpuart1 { /* console */ + pinctrl-0 = <&pinctrl_uart1>; + pinctrl-names = "default"; + status = "okay"; +}; + +&usbotg1 { + adp-disable; + disable-over-current; + dr_mode = "otg"; + hnp-disable; + srp-disable; + usb-role-switch; + samsung,picophy-dc-vol-level-adjust = <7>; + samsung,picophy-pre-emp-curr-control = <3>; + status = "okay"; + + port { + + usb1_drd_sw: endpoint { + remote-endpoint = <&typec1_dr_sw>; + }; + }; +}; + +&usbotg2 { + disable-over-current; + dr_mode = "host"; + samsung,picophy-dc-vol-level-adjust = <7>; + samsung,picophy-pre-emp-curr-control = <3>; + status = "okay"; +}; + +&usdhc1 { + bus-width = <8>; + non-removable; + pinctrl-0 = <&pinctrl_usdhc1>; + pinctrl-1 = <&pinctrl_usdhc1_100mhz>; + pinctrl-2 = <&pinctrl_usdhc1_200mhz>; + pinctrl-names = "default", "state_100mhz", "state_200mhz"; + status = "okay"; +}; + +&usdhc2 { + bus-width = <4>; + cd-gpios = <&gpio3 00 GPIO_ACTIVE_LOW>; + no-mmc; + no-sdio; + pinctrl-0 = <&pinctrl_usdhc2>, <&pinctrl_usdhc2_gpio>; + pinctrl-1 = <&pinctrl_usdhc2_100mhz>, <&pinctrl_usdhc2_gpio>; + pinctrl-2 = <&pinctrl_usdhc2_200mhz>, <&pinctrl_usdhc2_gpio>; + pinctrl-3 = <&pinctrl_usdhc2_sleep>, <&pinctrl_usdhc2_gpio_sleep>; + pinctrl-names = "default", "state_100mhz", "state_200mhz", "sleep"; + vmmc-supply = <®_usdhc2_vmmc>; + status = "okay"; +}; + +&wdog3 { + status = "okay"; +}; + +&iomuxc { + + pinctrl_eqos: eqosgrp { + fsl,pins = < + MX93_PAD_ENET1_MDC__ENET_QOS_MDC 0x57e + MX93_PAD_ENET1_MDIO__ENET_QOS_MDIO 0x57e + MX93_PAD_ENET1_RD0__ENET_QOS_RGMII_RD0 0x57e + MX93_PAD_ENET1_RD1__ENET_QOS_RGMII_RD1 0x57e + MX93_PAD_ENET1_RD2__ENET_QOS_RGMII_RD2 0x57e + MX93_PAD_ENET1_RD3__ENET_QOS_RGMII_RD3 0x57e + MX93_PAD_ENET1_RXC__CCM_ENET_QOS_CLOCK_GENERATE_RX_CLK 0x58e + MX93_PAD_ENET1_RX_CTL__ENET_QOS_RGMII_RX_CTL 0x57e + MX93_PAD_ENET1_TD0__ENET_QOS_RGMII_TD0 0x57e + MX93_PAD_ENET1_TD1__ENET_QOS_RGMII_TD1 0x57e + MX93_PAD_ENET1_TD2__ENET_QOS_RGMII_TD2 0x57e + MX93_PAD_ENET1_TD3__ENET_QOS_RGMII_TD3 0x57e + MX93_PAD_ENET1_TXC__CCM_ENET_QOS_CLOCK_GENERATE_TX_CLK 0x58e + MX93_PAD_ENET1_TX_CTL__ENET_QOS_RGMII_TX_CTL 0x57e + >; + }; + + pinctrl_eqos_sleep: eqossleepgrp { + fsl,pins = < + MX93_PAD_ENET1_MDC__GPIO4_IO00 0x31e + MX93_PAD_ENET1_MDIO__GPIO4_IO01 0x31e + MX93_PAD_ENET1_RD0__GPIO4_IO10 0x31e + MX93_PAD_ENET1_RD1__GPIO4_IO11 0x31e + MX93_PAD_ENET1_RD2__GPIO4_IO12 0x31e + MX93_PAD_ENET1_RD3__GPIO4_IO13 0x31e + MX93_PAD_ENET1_RXC__GPIO4_IO09 0x31e + MX93_PAD_ENET1_RX_CTL__GPIO4_IO08 0x31e + MX93_PAD_ENET1_TD0__GPIO4_IO05 0x31e + MX93_PAD_ENET1_TD1__GPIO4_IO04 0x31e + MX93_PAD_ENET1_TD2__GPIO4_IO03 0x31e + MX93_PAD_ENET1_TD3__GPIO4_IO02 0x31e + MX93_PAD_ENET1_TXC__GPIO4_IO07 0x31e + MX93_PAD_ENET1_TX_CTL__GPIO4_IO06 0x31e + >; + }; + + pinctrl_fec: fecgrp { + fsl,pins = < + MX93_PAD_ENET2_MDC__ENET1_MDC 0x57e + MX93_PAD_ENET2_MDIO__ENET1_MDIO 0x57e + MX93_PAD_ENET2_RD0__ENET1_RGMII_RD0 0x57e + MX93_PAD_ENET2_RD1__ENET1_RGMII_RD1 0x57e + MX93_PAD_ENET2_RD2__ENET1_RGMII_RD2 0x57e + MX93_PAD_ENET2_RD3__ENET1_RGMII_RD3 0x57e + MX93_PAD_ENET2_RXC__ENET1_RGMII_RXC 0x58e + MX93_PAD_ENET2_RX_CTL__ENET1_RGMII_RX_CTL 0x57e + MX93_PAD_ENET2_TD0__ENET1_RGMII_TD0 0x57e + MX93_PAD_ENET2_TD1__ENET1_RGMII_TD1 0x57e + MX93_PAD_ENET2_TD2__ENET1_RGMII_TD2 0x57e + MX93_PAD_ENET2_TD3__ENET1_RGMII_TD3 0x57e + MX93_PAD_ENET2_TXC__ENET1_RGMII_TXC 0x58e + MX93_PAD_ENET2_TX_CTL__ENET1_RGMII_TX_CTL 0x57e + >; + }; + + pinctrl_fec_sleep: fecsleepgrp { + fsl,pins = < + MX93_PAD_ENET2_MDC__GPIO4_IO14 0x51e + MX93_PAD_ENET2_MDIO__GPIO4_IO15 0x51e + MX93_PAD_ENET2_RD0__GPIO4_IO24 0x51e + MX93_PAD_ENET2_RD1__GPIO4_IO25 0x51e + MX93_PAD_ENET2_RD2__GPIO4_IO26 0x51e + MX93_PAD_ENET2_RD3__GPIO4_IO27 0x51e + MX93_PAD_ENET2_RXC__GPIO4_IO23 0x51e + MX93_PAD_ENET2_RX_CTL__GPIO4_IO22 0x51e + MX93_PAD_ENET2_TD0__GPIO4_IO19 0x51e + MX93_PAD_ENET2_TD1__GPIO4_IO18 0x51e + MX93_PAD_ENET2_TD2__GPIO4_IO17 0x51e + MX93_PAD_ENET2_TD3__GPIO4_IO16 0x51e + MX93_PAD_ENET2_TXC__GPIO4_IO21 0x51e + MX93_PAD_ENET2_TX_CTL__GPIO4_IO20 0x51e + >; + }; + + pinctrl_flexcan2: flexcan2grp { + fsl,pins = < + MX93_PAD_GPIO_IO25__CAN2_TX 0x139e + MX93_PAD_GPIO_IO27__CAN2_RX 0x139e + >; + }; + + pinctrl_lpi2c2: lpi2c2grp { + fsl,pins = < + MX93_PAD_I2C2_SCL__LPI2C2_SCL 0x40000b9e + MX93_PAD_I2C2_SDA__LPI2C2_SDA 0x40000b9e + >; + }; + + pinctrl_lpi2c3: lpi2c3grp { + fsl,pins = < + MX93_PAD_GPIO_IO28__LPI2C3_SDA 0x40000b9e + MX93_PAD_GPIO_IO29__LPI2C3_SCL 0x40000b9e + >; + }; + + pinctrl_pcal6524: pcal6524grp { + fsl,pins = < + MX93_PAD_CCM_CLKO2__GPIO3_IO27 0x31e + >; + }; + + pinctrl_reg_usdhc2_vmmc: regusdhc2vmmcgrp { + fsl,pins = < + MX93_PAD_SD2_RESET_B__GPIO3_IO07 0x31e + >; + }; + + pinctrl_uart1: uart1grp { + fsl,pins = < + MX93_PAD_UART1_RXD__LPUART1_RX 0x31e + MX93_PAD_UART1_TXD__LPUART1_TX 0x31e + >; + }; + + /* need to config the SION for data and cmd pad, refer to ERR052021 */ + pinctrl_usdhc1: usdhc1grp { + fsl,pins = < + MX93_PAD_SD1_CLK__USDHC1_CLK 0x1582 + MX93_PAD_SD1_CMD__USDHC1_CMD 0x40001382 + MX93_PAD_SD1_DATA0__USDHC1_DATA0 0x40001382 + MX93_PAD_SD1_DATA1__USDHC1_DATA1 0x40001382 + MX93_PAD_SD1_DATA2__USDHC1_DATA2 0x40001382 + MX93_PAD_SD1_DATA3__USDHC1_DATA3 0x40001382 + MX93_PAD_SD1_DATA4__USDHC1_DATA4 0x40001382 + MX93_PAD_SD1_DATA5__USDHC1_DATA5 0x40001382 + MX93_PAD_SD1_DATA6__USDHC1_DATA6 0x40001382 + MX93_PAD_SD1_DATA7__USDHC1_DATA7 0x40001382 + MX93_PAD_SD1_STROBE__USDHC1_STROBE 0x1582 + >; + }; + + /* need to config the SION for data and cmd pad, refer to ERR052021 */ + pinctrl_usdhc1_100mhz: usdhc1-100mhzgrp { + fsl,pins = < + MX93_PAD_SD1_CLK__USDHC1_CLK 0x158e + MX93_PAD_SD1_CMD__USDHC1_CMD 0x4000138e + MX93_PAD_SD1_DATA0__USDHC1_DATA0 0x4000138e + MX93_PAD_SD1_DATA1__USDHC1_DATA1 0x4000138e + MX93_PAD_SD1_DATA2__USDHC1_DATA2 0x4000138e + MX93_PAD_SD1_DATA3__USDHC1_DATA3 0x4000138e + MX93_PAD_SD1_DATA4__USDHC1_DATA4 0x4000138e + MX93_PAD_SD1_DATA5__USDHC1_DATA5 0x4000138e + MX93_PAD_SD1_DATA6__USDHC1_DATA6 0x4000138e + MX93_PAD_SD1_DATA7__USDHC1_DATA7 0x4000138e + MX93_PAD_SD1_STROBE__USDHC1_STROBE 0x158e + >; + }; + + /* need to config the SION for data and cmd pad, refer to ERR052021 */ + pinctrl_usdhc1_200mhz: usdhc1-200mhzgrp { + fsl,pins = < + MX93_PAD_SD1_CLK__USDHC1_CLK 0x15fe + MX93_PAD_SD1_CMD__USDHC1_CMD 0x400013fe + MX93_PAD_SD1_DATA0__USDHC1_DATA0 0x400013fe + MX93_PAD_SD1_DATA1__USDHC1_DATA1 0x400013fe + MX93_PAD_SD1_DATA2__USDHC1_DATA2 0x400013fe + MX93_PAD_SD1_DATA3__USDHC1_DATA3 0x400013fe + MX93_PAD_SD1_DATA4__USDHC1_DATA4 0x400013fe + MX93_PAD_SD1_DATA5__USDHC1_DATA5 0x400013fe + MX93_PAD_SD1_DATA6__USDHC1_DATA6 0x400013fe + MX93_PAD_SD1_DATA7__USDHC1_DATA7 0x400013fe + MX93_PAD_SD1_STROBE__USDHC1_STROBE 0x15fe + >; + }; + + pinctrl_usdhc2_gpio: usdhc2gpiogrp { + fsl,pins = < + MX93_PAD_SD2_CD_B__GPIO3_IO00 0x31e + >; + }; + + pinctrl_usdhc2_gpio_sleep: usdhc2gpiosleepgrp { + fsl,pins = < + MX93_PAD_SD2_CD_B__GPIO3_IO00 0x51e + >; + }; + + /* need to config the SION for data and cmd pad, refer to ERR052021 */ + pinctrl_usdhc2: usdhc2grp { + fsl,pins = < + MX93_PAD_SD2_CLK__USDHC2_CLK 0x1582 + MX93_PAD_SD2_CMD__USDHC2_CMD 0x40001382 + MX93_PAD_SD2_DATA0__USDHC2_DATA0 0x40001382 + MX93_PAD_SD2_DATA1__USDHC2_DATA1 0x40001382 + MX93_PAD_SD2_DATA2__USDHC2_DATA2 0x40001382 + MX93_PAD_SD2_DATA3__USDHC2_DATA3 0x40001382 + MX93_PAD_SD2_VSELECT__USDHC2_VSELECT 0x51e + >; + }; + + /* need to config the SION for data and cmd pad, refer to ERR052021 */ + pinctrl_usdhc2_100mhz: usdhc2-100mhzgrp { + fsl,pins = < + MX93_PAD_SD2_CLK__USDHC2_CLK 0x158e + MX93_PAD_SD2_CMD__USDHC2_CMD 0x4000138e + MX93_PAD_SD2_DATA0__USDHC2_DATA0 0x4000138e + MX93_PAD_SD2_DATA1__USDHC2_DATA1 0x4000138e + MX93_PAD_SD2_DATA2__USDHC2_DATA2 0x4000138e + MX93_PAD_SD2_DATA3__USDHC2_DATA3 0x4000138e + MX93_PAD_SD2_VSELECT__USDHC2_VSELECT 0x51e + >; + }; + + /* need to config the SION for data and cmd pad, refer to ERR052021 */ + pinctrl_usdhc2_200mhz: usdhc2-200mhzgrp { + fsl,pins = < + MX93_PAD_SD2_CLK__USDHC2_CLK 0x15fe + MX93_PAD_SD2_CMD__USDHC2_CMD 0x400013fe + MX93_PAD_SD2_DATA0__USDHC2_DATA0 0x400013fe + MX93_PAD_SD2_DATA1__USDHC2_DATA1 0x400013fe + MX93_PAD_SD2_DATA2__USDHC2_DATA2 0x400013fe + MX93_PAD_SD2_DATA3__USDHC2_DATA3 0x400013fe + MX93_PAD_SD2_VSELECT__USDHC2_VSELECT 0x51e + >; + }; + + pinctrl_usdhc2_sleep: usdhc2-sleepgrp { + fsl,pins = < + MX93_PAD_SD2_CLK__GPIO3_IO01 0x51e + MX93_PAD_SD2_CMD__GPIO3_IO02 0x51e + MX93_PAD_SD2_DATA0__GPIO3_IO03 0x51e + MX93_PAD_SD2_DATA1__GPIO3_IO04 0x51e + MX93_PAD_SD2_DATA2__GPIO3_IO05 0x51e + MX93_PAD_SD2_DATA3__GPIO3_IO06 0x51e + MX93_PAD_SD2_VSELECT__GPIO3_IO19 0x51e + >; + }; +}; diff --git a/arch/arm/dts/imx95-u-boot.dtsi b/arch/arm/dts/imx95-u-boot.dtsi index 5ec3b1c51d6..9bf8f9834c9 100644 --- a/arch/arm/dts/imx95-u-boot.dtsi +++ b/arch/arm/dts/imx95-u-boot.dtsi @@ -22,12 +22,12 @@ type = "nxp-header-ddrfw"; imx-lpddr-imem { - filename = "lpddr5_imem_v202311.bin"; + filename = "lpddr5_imem_v202409.bin"; type = "blob-ext"; }; imx-lpddr-dmem { - filename = "lpddr5_dmem_v202311.bin"; + filename = "lpddr5_dmem_v202409.bin"; type = "blob-ext"; }; }; @@ -36,12 +36,12 @@ type = "nxp-header-ddrfw"; imx-lpddr-imem-qb { - filename = "lpddr5_imem_qb_v202311.bin"; + filename = "lpddr5_imem_qb_v202409.bin"; type = "blob-ext"; }; imx-lpddr-dmem-qb { - filename = "lpddr5_dmem_qb_v202311.bin"; + filename = "lpddr5_dmem_qb_v202409.bin"; type = "blob-ext"; }; }; diff --git a/arch/arm/dts/k3-am625-phycore-som-binman.dtsi b/arch/arm/dts/k3-am625-phycore-som-binman.dtsi index 6deebdadf09..a9bd5a2be84 100644 --- a/arch/arm/dts/k3-am625-phycore-som-binman.dtsi +++ b/arch/arm/dts/k3-am625-phycore-som-binman.dtsi @@ -25,7 +25,7 @@ content-sysfw-data = <&combined_tifs_cfg>; content-sysfw-inner-cert = <&sysfw_inner_cert>; content-dm-data = <&combined_dm_cfg>; - load = <0x43c00000>; + load = <CONFIG_SPL_TEXT_BASE>; load-sysfw = <0x40000>; load-sysfw-data = <0x67000>; load-dm-data = <0x43c3a800>; @@ -69,7 +69,7 @@ content-sysfw-data = <&combined_tifs_cfg_fs>; content-sysfw-inner-cert = <&sysfw_inner_cert_fs>; content-dm-data = <&combined_dm_cfg_fs>; - load = <0x43c00000>; + load = <CONFIG_SPL_TEXT_BASE>; load-sysfw = <0x40000>; load-sysfw-data = <0x67000>; load-dm-data = <0x43c3a800>; @@ -105,7 +105,7 @@ combined; dm-data; content-sbl = <&u_boot_spl_unsigned>; - load = <0x43c00000>; + load = <CONFIG_SPL_TEXT_BASE>; content-sysfw = <&ti_fs_gp>; load-sysfw = <0x40000>; content-sysfw-data = <&combined_tifs_cfg_gp>; diff --git a/arch/arm/dts/k3-am625-sk-binman.dtsi b/arch/arm/dts/k3-am625-sk-binman.dtsi index 6822a5dac89..f743c4353b4 100644 --- a/arch/arm/dts/k3-am625-sk-binman.dtsi +++ b/arch/arm/dts/k3-am625-sk-binman.dtsi @@ -23,7 +23,7 @@ content-sysfw-data = <&combined_tifs_cfg>; content-sysfw-inner-cert = <&sysfw_inner_cert>; content-dm-data = <&combined_dm_cfg>; - load = <0x43c00000>; + load = <CONFIG_SPL_TEXT_BASE>; load-sysfw = <0x40000>; load-sysfw-data = <0x67000>; load-dm-data = <0x43c3a800>; @@ -67,7 +67,7 @@ content-sysfw-data = <&combined_tifs_cfg_fs>; content-sysfw-inner-cert = <&sysfw_inner_cert_fs>; content-dm-data = <&combined_dm_cfg_fs>; - load = <0x43c00000>; + load = <CONFIG_SPL_TEXT_BASE>; load-sysfw = <0x40000>; load-sysfw-data = <0x67000>; load-dm-data = <0x43c3a800>; @@ -103,7 +103,7 @@ combined; dm-data; content-sbl = <&u_boot_spl_unsigned>; - load = <0x43c00000>; + load = <CONFIG_SPL_TEXT_BASE>; content-sysfw = <&ti_fs_gp>; load-sysfw = <0x40000>; content-sysfw-data = <&combined_tifs_cfg_gp>; diff --git a/arch/arm/dts/k3-am625-verdin-wifi-dev-binman.dtsi b/arch/arm/dts/k3-am625-verdin-wifi-dev-binman.dtsi index bfbba28269c..65fef6e4790 100644 --- a/arch/arm/dts/k3-am625-verdin-wifi-dev-binman.dtsi +++ b/arch/arm/dts/k3-am625-verdin-wifi-dev-binman.dtsi @@ -23,7 +23,7 @@ content-sysfw-data = <&combined_tifs_cfg>; content-sysfw-inner-cert = <&sysfw_inner_cert>; content-dm-data = <&combined_dm_cfg>; - load = <0x43c00000>; + load = <CONFIG_SPL_TEXT_BASE>; load-sysfw = <0x40000>; load-sysfw-data = <0x67000>; load-dm-data = <0x43c3a800>; @@ -67,7 +67,7 @@ content-sysfw-data = <&combined_tifs_cfg_fs>; content-sysfw-inner-cert = <&sysfw_inner_cert_fs>; content-dm-data = <&combined_dm_cfg_fs>; - load = <0x43c00000>; + load = <CONFIG_SPL_TEXT_BASE>; load-sysfw = <0x40000>; load-sysfw-data = <0x67000>; load-dm-data = <0x43c3a800>; @@ -103,7 +103,7 @@ combined; dm-data; content-sbl = <&u_boot_spl_unsigned>; - load = <0x43c00000>; + load = <CONFIG_SPL_TEXT_BASE>; content-sysfw = <&ti_fs_gp>; load-sysfw = <0x40000>; content-sysfw-data = <&combined_tifs_cfg_gp>; diff --git a/arch/arm/dts/k3-am62a-phycore-som-binman.dtsi b/arch/arm/dts/k3-am62a-phycore-som-binman.dtsi index fd340101532..9bcdf74ffe4 100644 --- a/arch/arm/dts/k3-am62a-phycore-som-binman.dtsi +++ b/arch/arm/dts/k3-am62a-phycore-som-binman.dtsi @@ -30,7 +30,7 @@ content-sysfw-data = <&combined_tifs_cfg>; content-sysfw-inner-cert = <&sysfw_inner_cert>; content-dm-data = <&combined_dm_cfg>; - load = <0x43c00000>; + load = <CONFIG_SPL_TEXT_BASE>; load-sysfw = <0x40000>; load-sysfw-data = <0x67000>; load-dm-data = <0x43c3a800>; @@ -74,7 +74,7 @@ content-sysfw-data = <&combined_tifs_cfg_fs>; content-sysfw-inner-cert = <&sysfw_inner_cert_fs>; content-dm-data = <&combined_dm_cfg_fs>; - load = <0x43c00000>; + load = <CONFIG_SPL_TEXT_BASE>; load-sysfw = <0x40000>; load-sysfw-data = <0x67000>; load-dm-data = <0x43c3a800>; @@ -110,7 +110,7 @@ combined; dm-data; content-sbl = <&u_boot_spl_unsigned>; - load = <0x43c00000>; + load = <CONFIG_SPL_TEXT_BASE>; content-sysfw = <&ti_fs_gp>; load-sysfw = <0x40000>; content-sysfw-data = <&combined_tifs_cfg_gp>; diff --git a/arch/arm/dts/k3-am62a-sk-binman.dtsi b/arch/arm/dts/k3-am62a-sk-binman.dtsi index 877a513a241..0685bdd7e0c 100644 --- a/arch/arm/dts/k3-am62a-sk-binman.dtsi +++ b/arch/arm/dts/k3-am62a-sk-binman.dtsi @@ -27,7 +27,7 @@ content-sysfw-data = <&combined_tifs_cfg>; content-sysfw-inner-cert = <&sysfw_inner_cert>; content-dm-data = <&combined_dm_cfg>; - load = <0x43c00000>; + load = <CONFIG_SPL_TEXT_BASE>; load-sysfw = <0x40000>; load-sysfw-data = <0x67000>; load-dm-data = <0x43c3a800>; @@ -71,7 +71,7 @@ content-sysfw-data = <&combined_tifs_cfg_fs>; content-sysfw-inner-cert = <&sysfw_inner_cert_fs>; content-dm-data = <&combined_dm_cfg_fs>; - load = <0x43c00000>; + load = <CONFIG_SPL_TEXT_BASE>; load-sysfw = <0x40000>; load-sysfw-data = <0x67000>; load-dm-data = <0x43c3a800>; @@ -107,7 +107,7 @@ combined; dm-data; content-sbl = <&u_boot_spl_unsigned>; - load = <0x43c00000>; + load = <CONFIG_SPL_TEXT_BASE>; content-sysfw = <&ti_fs_gp>; load-sysfw = <0x40000>; content-sysfw-data = <&combined_tifs_cfg_gp>; diff --git a/arch/arm/dts/k3-am62p-sk-binman.dtsi b/arch/arm/dts/k3-am62p-sk-binman.dtsi index d65e5c4d4e1..feb59edcd83 100644 --- a/arch/arm/dts/k3-am62p-sk-binman.dtsi +++ b/arch/arm/dts/k3-am62p-sk-binman.dtsi @@ -25,7 +25,7 @@ content-sysfw-data = <&combined_tifs_cfg_fs>; content-sysfw-inner-cert = <&sysfw_inner_cert_fs>; content-dm-data = <&combined_dm_cfg_fs>; - load = <0x43c00000>; + load = <CONFIG_SPL_TEXT_BASE>; load-sysfw = <0x40000>; load-sysfw-data = <0x67000>; load-dm-data = <0x43c4a800>; @@ -72,7 +72,7 @@ content-sysfw-data = <&combined_tifs_cfg_hs>; content-sysfw-inner-cert = <&sysfw_inner_cert_hs>; content-dm-data = <&combined_dm_cfg_hs>; - load = <0x43c00000>; + load = <CONFIG_SPL_TEXT_BASE>; load-sysfw = <0x40000>; load-sysfw-data = <0x67000>; load-dm-data = <0x43c4a800>; diff --git a/arch/arm/dts/k3-am62p5-verdin-wifi-dev-binman.dtsi b/arch/arm/dts/k3-am62p5-verdin-wifi-dev-binman.dtsi index 13fac18d7aa..b1591faaf0a 100644 --- a/arch/arm/dts/k3-am62p5-verdin-wifi-dev-binman.dtsi +++ b/arch/arm/dts/k3-am62p5-verdin-wifi-dev-binman.dtsi @@ -25,7 +25,7 @@ content-sysfw-data = <&combined_tifs_cfg_fs>; content-sysfw-inner-cert = <&sysfw_inner_cert_fs>; content-dm-data = <&combined_dm_cfg_fs>; - load = <0x43c00000>; + load = <CONFIG_SPL_TEXT_BASE>; load-sysfw = <0x40000>; load-sysfw-data = <0x67000>; load-dm-data = <0x43c4a800>; @@ -74,7 +74,7 @@ content-sysfw-data = <&combined_tifs_cfg_hs>; content-sysfw-inner-cert = <&sysfw_inner_cert_hs>; content-dm-data = <&combined_dm_cfg_hs>; - load = <0x43c00000>; + load = <CONFIG_SPL_TEXT_BASE>; load-sysfw = <0x40000>; load-sysfw-data = <0x67000>; load-dm-data = <0x43c4a800>; diff --git a/arch/arm/dts/k3-am65-iot2050-boot-image.dtsi b/arch/arm/dts/k3-am65-iot2050-boot-image.dtsi index f49d6f262f2..b3d64485249 100644 --- a/arch/arm/dts/k3-am65-iot2050-boot-image.dtsi +++ b/arch/arm/dts/k3-am65-iot2050-boot-image.dtsi @@ -208,7 +208,7 @@ fit,fdt-list-val = "ti/k3-am6528-iot2050-basic", "ti/k3-am6548-iot2050-advanced"; configurations { - default = "ti/k3-am6528-iot2050-basic"; + default = "config-1"; @config-SEQ { loadables = #ifdef CONFIG_WDT_K3_RTI_FW_FILE @@ -265,7 +265,7 @@ }; configurations { - default = "ti/k3-am6528-iot2050-basic-pg2"; + default = "config-1"; @config-SEQ { loadables = #ifdef CONFIG_WDT_K3_RTI_FW_FILE diff --git a/arch/arm/dts/k3-am67a-beagley-ai-u-boot.dtsi b/arch/arm/dts/k3-am67a-beagley-ai-u-boot.dtsi index 2a0023fb7c3..0e810e7f492 100644 --- a/arch/arm/dts/k3-am67a-beagley-ai-u-boot.dtsi +++ b/arch/arm/dts/k3-am67a-beagley-ai-u-boot.dtsi @@ -75,7 +75,7 @@ content-sysfw-data = <&combined_tifs_cfg>; content-sysfw-inner-cert = <&sysfw_inner_cert>; content-dm-data = <&combined_dm_cfg>; - load = <0x43c00000>; + load = <CONFIG_SPL_TEXT_BASE>; load-sysfw = <0x40000>; load-sysfw-data = <0x67000>; load-dm-data = <0x43c7a800>; @@ -125,7 +125,7 @@ content-sysfw-data = <&combined_tifs_cfg_fs>; content-sysfw-inner-cert = <&sysfw_inner_cert_fs>; content-dm-data = <&combined_dm_cfg_fs>; - load = <0x43c00000>; + load = <CONFIG_SPL_TEXT_BASE>; load-sysfw = <0x40000>; load-sysfw-data = <0x67000>; load-dm-data = <0x43c7a800>; diff --git a/arch/arm/dts/k3-j7200-binman.dtsi b/arch/arm/dts/k3-j7200-binman.dtsi index b74bd1657f9..b4e0ce8bfcf 100644 --- a/arch/arm/dts/k3-j7200-binman.dtsi +++ b/arch/arm/dts/k3-j7200-binman.dtsi @@ -24,7 +24,7 @@ content-sysfw-data = <&combined_tifs_cfg_sr1>; content-sysfw-inner-cert = <&sysfw_inner_cert_sr1>; content-dm-data = <&combined_dm_cfg_sr1>; - load = <0x41c00000>; + load = <CONFIG_SPL_TEXT_BASE>; load-sysfw = <0x40000>; load-sysfw-data = <0x7f000>; load-dm-data = <0x41c80000>; @@ -67,7 +67,7 @@ content-sysfw-data = <&combined_tifs_cfg>; content-sysfw-inner-cert = <&sysfw_inner_cert>; content-dm-data = <&combined_dm_cfg>; - load = <0x41c00000>; + load = <CONFIG_SPL_TEXT_BASE>; load-sysfw = <0x40000>; load-sysfw-data = <0x7f000>; load-dm-data = <0x41c80000>; @@ -112,7 +112,7 @@ content-sysfw-data = <&combined_tifs_cfg_fs_sr1>; content-sysfw-inner-cert = <&sysfw_inner_cert_fs_sr1>; content-dm-data = <&combined_dm_cfg_fs_sr1>; - load = <0x41c00000>; + load = <CONFIG_SPL_TEXT_BASE>; load-sysfw = <0x40000>; load-sysfw-data = <0x7f000>; load-dm-data = <0x41c80000>; @@ -155,7 +155,7 @@ content-sysfw-data = <&combined_tifs_cfg_fs>; content-sysfw-inner-cert = <&sysfw_inner_cert_fs>; content-dm-data = <&combined_dm_cfg_fs>; - load = <0x41c00000>; + load = <CONFIG_SPL_TEXT_BASE>; load-sysfw = <0x40000>; load-sysfw-data = <0x7f000>; load-dm-data = <0x41c80000>; @@ -192,7 +192,7 @@ combined; dm-data; content-sbl = <&u_boot_spl_unsigned>; - load = <0x41c00000>; + load = <CONFIG_SPL_TEXT_BASE>; content-sysfw = <&ti_fs_gp>; load-sysfw = <0x40000>; content-sysfw-data = <&combined_tifs_cfg_gp>; diff --git a/arch/arm/dts/k3-j721s2-binman.dtsi b/arch/arm/dts/k3-j721s2-binman.dtsi index 4f524e58ceb..f79b3e543ae 100644 --- a/arch/arm/dts/k3-j721s2-binman.dtsi +++ b/arch/arm/dts/k3-j721s2-binman.dtsi @@ -23,7 +23,7 @@ content-sysfw-data = <&combined_tifs_cfg>; content-sysfw-inner-cert = <&sysfw_inner_cert>; content-dm-data = <&combined_dm_cfg>; - load = <0x41c00000>; + load = <CONFIG_SPL_TEXT_BASE>; load-sysfw = <0x40000>; load-sysfw-data = <0x67000>; load-dm-data = <0x41c80000>; @@ -66,7 +66,7 @@ content-sysfw-data = <&combined_tifs_cfg_fs>; content-sysfw-inner-cert = <&sysfw_inner_cert_fs>; content-dm-data = <&combined_dm_cfg_fs>; - load = <0x41c00000>; + load = <CONFIG_SPL_TEXT_BASE>; load-sysfw = <0x40000>; load-sysfw-data = <0x67000>; load-dm-data = <0x41c80000>; @@ -103,7 +103,7 @@ combined; dm-data; content-sbl = <&u_boot_spl_unsigned>; - load = <0x41c00000>; + load = <CONFIG_SPL_TEXT_BASE>; content-sysfw = <&ti_fs_gp>; load-sysfw = <0x40000>; content-sysfw-data = <&combined_tifs_cfg_gp>; diff --git a/arch/arm/dts/k3-j722s-binman.dtsi b/arch/arm/dts/k3-j722s-binman.dtsi index 57e966ea666..278b7bfac7f 100644 --- a/arch/arm/dts/k3-j722s-binman.dtsi +++ b/arch/arm/dts/k3-j722s-binman.dtsi @@ -23,7 +23,7 @@ content-sysfw-data = <&combined_tifs_cfg>; content-sysfw-inner-cert = <&sysfw_inner_cert>; content-dm-data = <&combined_dm_cfg>; - load = <0x43c00000>; + load = <CONFIG_SPL_TEXT_BASE>; load-sysfw = <0x40000>; load-sysfw-data = <0x67000>; load-dm-data = <0x43c7a800>; @@ -73,7 +73,7 @@ content-sysfw-data = <&combined_tifs_cfg_fs>; content-sysfw-inner-cert = <&sysfw_inner_cert_fs>; content-dm-data = <&combined_dm_cfg_fs>; - load = <0x43c00000>; + load = <CONFIG_SPL_TEXT_BASE>; load-sysfw = <0x40000>; load-sysfw-data = <0x67000>; load-dm-data = <0x43c7a800>; diff --git a/arch/arm/dts/k3-j784s4-binman.dtsi b/arch/arm/dts/k3-j784s4-binman.dtsi index a7ce1ee2b03..34b2cc1e681 100644 --- a/arch/arm/dts/k3-j784s4-binman.dtsi +++ b/arch/arm/dts/k3-j784s4-binman.dtsi @@ -27,7 +27,7 @@ content-sysfw-data = <&combined_tifs_cfg>; content-sysfw-inner-cert = <&sysfw_inner_cert>; content-dm-data = <&combined_dm_cfg>; - load = <0x41c00000>; + load = <CONFIG_SPL_TEXT_BASE>; load-sysfw = <0x40000>; load-sysfw-data = <0x66800>; load-dm-data = <0x41c80000>; @@ -74,7 +74,7 @@ content-sysfw-data = <&combined_tifs_cfg_fs>; content-sysfw-inner-cert = <&sysfw_inner_cert_fs>; content-dm-data = <&combined_dm_cfg_fs>; - load = <0x41c00000>; + load = <CONFIG_SPL_TEXT_BASE>; load-sysfw = <0x40000>; load-sysfw-data = <0x66800>; load-dm-data = <0x41c80000>; @@ -114,7 +114,7 @@ combined; dm-data; content-sbl = <&u_boot_spl_unsigned>; - load = <0x41c00000>; + load = <CONFIG_SPL_TEXT_BASE>; content-sysfw = <&ti_fs_gp>; load-sysfw = <0x40000>; content-sysfw-data = <&combined_tifs_cfg_gp>; diff --git a/arch/arm/dts/ls1021a-pg-wcom-expu1.dts b/arch/arm/dts/ls1021a-pg-wcom-expu1.dts index ec8e7dee271..1068f1a288a 100644 --- a/arch/arm/dts/ls1021a-pg-wcom-expu1.dts +++ b/arch/arm/dts/ls1021a-pg-wcom-expu1.dts @@ -51,6 +51,26 @@ &i2c0 { status = "okay"; + + pca9547@70 { + compatible = "nxp,pca9547"; + reg = <0x70>; + #address-cells = <1>; + #size-cells = <0>; + i2c-mux-idle-disconnect; + + i2c@1 { + reg = <1>; + #address-cells = <1>; + #size-cells = <0>; + + ivm@50 { + compatible = "atmel,24c02"; + reg = <0x50>; + label = "MAIN_CTRL"; + }; + }; + }; }; &dspi1 { diff --git a/arch/arm/dts/ls1021a-pg-wcom-seli8.dts b/arch/arm/dts/ls1021a-pg-wcom-seli8.dts index 03ce3ab4e47..3e8c54d83c9 100644 --- a/arch/arm/dts/ls1021a-pg-wcom-seli8.dts +++ b/arch/arm/dts/ls1021a-pg-wcom-seli8.dts @@ -44,6 +44,26 @@ &i2c0 { status = "okay"; + + pca9547@70 { + compatible = "nxp,pca9547"; + reg = <0x70>; + #address-cells = <1>; + #size-cells = <0>; + i2c-mux-idle-disconnect; + + i2c@1 { + reg = <1>; + #address-cells = <1>; + #size-cells = <0>; + + ivm@50 { + compatible = "atmel,24c02"; + reg = <0x50>; + label = "MAIN_CTRL"; + }; + }; + }; }; &ifc { diff --git a/arch/arm/dts/zynqmp-binman-som.dts b/arch/arm/dts/zynqmp-binman-som.dts index a70123feead..469b94bbde6 100644 --- a/arch/arm/dts/zynqmp-binman-som.dts +++ b/arch/arm/dts/zynqmp-binman-som.dts @@ -20,7 +20,6 @@ binman: binman { multiple-images; -#ifdef CONFIG_SPL fit-dtb.blob { filename = "fit-dtb.blob"; pad-byte = <0>; @@ -109,6 +108,7 @@ }; }; +#ifdef CONFIG_SPL /* Generation in a static way */ itb { filename = U_BOOT_ITB_FILENAME; diff --git a/arch/arm/include/asm/arch-imx9/ddr.h b/arch/arm/include/asm/arch-imx9/ddr.h index 0dd2d62b9ef..a8e3f7354c7 100644 --- a/arch/arm/include/asm/arch-imx9/ddr.h +++ b/arch/arm/include/asm/arch-imx9/ddr.h @@ -118,6 +118,7 @@ void ddrphy_init_set_dfi_clk(unsigned int drate); void ddrphy_init_read_msg_block(enum fw_type type); void get_trained_CDD(unsigned int fsp); +u32 lpddr4_mr_read(u32 mr_rank, u32 mr_addr); ulong ddrphy_addr_remap(u32 paddr_apb_from_ctlr); diff --git a/arch/arm/include/asm/arch-mx27/imx-regs.h b/arch/arm/include/asm/arch-mx27/imx-regs.h index 60499189b2c..a9152814245 100644 --- a/arch/arm/include/asm/arch-mx27/imx-regs.h +++ b/arch/arm/include/asm/arch-mx27/imx-regs.h @@ -21,11 +21,6 @@ extern void mx27_uart1_init_pins(void); extern void mx27_fec_init_pins(void); #endif /* CONFIG_FEC_MXC */ -#ifdef CONFIG_MMC_MXC -extern void mx27_sd1_init_pins(void); -extern void mx27_sd2_init_pins(void); -#endif /* CONFIG_MMC_MXC */ - /* AIPI */ struct aipi_regs { u32 psr0; diff --git a/arch/arm/include/asm/mach-imx/ele_api.h b/arch/arm/include/asm/mach-imx/ele_api.h index 19d12696a1e..64b243dcaaa 100644 --- a/arch/arm/include/asm/mach-imx/ele_api.h +++ b/arch/arm/include/asm/mach-imx/ele_api.h @@ -134,6 +134,8 @@ struct ele_get_info_data { u32 sha_fw[8]; u32 oem_srkh[16]; u32 state; + u32 oem_pqc_srkh[16]; + u32 reserved[8]; }; int ele_release_rdc(u8 core_id, u8 xrdc, u32 *response); diff --git a/arch/arm/mach-imx/image-container.c b/arch/arm/mach-imx/image-container.c index f84e23f4b2a..3a9e6dcf225 100644 --- a/arch/arm/mach-imx/image-container.c +++ b/arch/arm/mach-imx/image-container.c @@ -66,7 +66,7 @@ static bool is_v2x_fw_container(ulong addr) struct boot_img_t *img_entry; phdr = (struct container_hdr *)addr; - if (phdr->tag != 0x87 || phdr->version != 0x0) { + if ((phdr->tag != 0x87 && phdr->tag != 0x82) || phdr->version != 0x0) { debug("Wrong container header\n"); return false; } diff --git a/arch/arm/mach-imx/imx8ulp/soc.c b/arch/arm/mach-imx/imx8ulp/soc.c index 8fe70e2424f..e85cb0dd252 100644 --- a/arch/arm/mach-imx/imx8ulp/soc.c +++ b/arch/arm/mach-imx/imx8ulp/soc.c @@ -279,7 +279,7 @@ int print_cpuinfo(void) if (!ret) { ret = thermal_get_temp(udev, &temp); if (!ret) - printf("CPU current temperature: %d\n", temp); + printf("CPU current temperature: %dC\n", temp); else debug(" - failed to get CPU current temperature\n"); } else { diff --git a/arch/arm/mach-imx/imx9/Kconfig b/arch/arm/mach-imx/imx9/Kconfig index 6af45938edb..4e0e194690b 100644 --- a/arch/arm/mach-imx/imx9/Kconfig +++ b/arch/arm/mach-imx/imx9/Kconfig @@ -33,6 +33,7 @@ config IMX95 select DM_MAILBOX select SCMI_FIRMWARE select SPL_IMX_CONTAINER_USE_TRAMPOLINE + select IMX_PQC_SUPPORT config SYS_SOC default "imx9" @@ -65,6 +66,14 @@ config TARGET_IMX93_11X11_EVK imply BOOTSTD_FULL imply BOOTSTD_BOOTCOMMAND +config TARGET_IMX93_FRDM + bool "imx93_frdm" + select OF_BOARD_FIXUP + select IMX93 + select IMX9_LPDDR4X + imply BOOTSTD_FULL + imply BOOTSTD_BOOTCOMMAND + config TARGET_IMX93_VAR_SOM bool "imx93_var_som" select IMX93 @@ -89,6 +98,7 @@ endchoice source "board/freescale/imx91_evk/Kconfig" source "board/freescale/imx93_evk/Kconfig" +source "board/freescale/imx93_frdm/Kconfig" source "board/freescale/imx93_qsb/Kconfig" source "board/phytec/phycore_imx93/Kconfig" source "board/variscite/imx93_var_som/Kconfig" diff --git a/arch/arm/mach-imx/imx9/scmi/container.cfg b/arch/arm/mach-imx/imx9/scmi/container.cfg index 441d9beedd1..b25f3b726c5 100644 --- a/arch/arm/mach-imx/imx9/scmi/container.cfg +++ b/arch/arm/mach-imx/imx9/scmi/container.cfg @@ -3,6 +3,7 @@ * Copyright 2025 NXP */ +CNTR_VERSION 2 BOOT_FROM SD SOC_TYPE IMX9 CONTAINER diff --git a/arch/arm/mach-imx/imx9/scmi/imximage.cfg b/arch/arm/mach-imx/imx9/scmi/imximage.cfg index 6af1c4ba628..c2c92174c1c 100644 --- a/arch/arm/mach-imx/imx9/scmi/imximage.cfg +++ b/arch/arm/mach-imx/imx9/scmi/imximage.cfg @@ -3,13 +3,14 @@ * Copyright 2025 NXP */ +CNTR_VERSION 2 BOOT_FROM SD SOC_TYPE IMX9 -APPEND mx95a0-ahab-container.img +APPEND mx95b0-ahab-container.img CONTAINER +DUMMY_DDR IMAGE OEI m33-oei-ddrfw.bin 0x1ffc0000 HOLD 0x10000 -IMAGE OEI oei-m33-tcm.bin 0x1ffc0000 IMAGE M33 m33_image.bin 0x1ffc0000 IMAGE A55 spl/u-boot-spl.bin 0x20480000 DUMMY_V2X 0x8b000000 diff --git a/arch/riscv/cpu/th1520/dram.c b/arch/riscv/cpu/th1520/dram.c index 91007c0a3d3..8a0ca26785e 100644 --- a/arch/riscv/cpu/th1520/dram.c +++ b/arch/riscv/cpu/th1520/dram.c @@ -19,3 +19,19 @@ int dram_init_banksize(void) { return fdtdec_setup_memory_banksize(); } + +phys_addr_t board_get_usable_ram_top(phys_size_t total_size) +{ + /* + * Ensure that we run from first 4GB so that all + * addresses used by U-Boot are 32bit addresses. + * + * This in-turn ensures that 32bit DMA capable + * devices work fine because DMA mapping APIs will + * provide 32bit DMA addresses only. + */ + if (gd->ram_top > SZ_4G) + return SZ_4G; + + return gd->ram_top; +} diff --git a/arch/riscv/dts/th1520-lichee-module-4a.dtsi b/arch/riscv/dts/th1520-lichee-module-4a.dtsi index 9b255f8243c..eecd3e9832a 100644 --- a/arch/riscv/dts/th1520-lichee-module-4a.dtsi +++ b/arch/riscv/dts/th1520-lichee-module-4a.dtsi @@ -11,6 +11,11 @@ model = "Sipeed Lichee Module 4A"; compatible = "sipeed,lichee-module-4a", "thead,th1520"; + aliases { + ethernet0 = &gmac0; + ethernet1 = &gmac1; + }; + memory@0 { device_type = "memory"; reg = <0x0 0x00000000 0x2 0x00000000>; @@ -38,6 +43,120 @@ status = "okay"; }; +&gmac0 { + pinctrl-names = "default"; + pinctrl-0 = <&gmac0_pins>, <&mdio0_pins>; + phy-handle = <&phy0>; + phy-mode = "rgmii-id"; + status = "okay"; +}; + +&gmac1 { + pinctrl-names = "default"; + pinctrl-0 = <&gmac1_pins>; + phy-handle = <&phy1>; + phy-mode = "rgmii-id"; + status = "okay"; +}; + +&mdio0 { + phy0: ethernet-phy@1 { + reg = <1>; + }; + + phy1: ethernet-phy@2 { + reg = <2>; + }; +}; + +&padctrl0_apsys { + gmac0_pins: gmac0-0 { + tx-pins { + pins = "GMAC0_TX_CLK", + "GMAC0_TXEN", + "GMAC0_TXD0", + "GMAC0_TXD1", + "GMAC0_TXD2", + "GMAC0_TXD3"; + function = "gmac0"; + bias-disable; + drive-strength = <25>; + input-disable; + input-schmitt-disable; + slew-rate = <0>; + }; + + rx-pins { + pins = "GMAC0_RX_CLK", + "GMAC0_RXDV", + "GMAC0_RXD0", + "GMAC0_RXD1", + "GMAC0_RXD2", + "GMAC0_RXD3"; + function = "gmac0"; + bias-disable; + drive-strength = <1>; + input-enable; + input-schmitt-disable; + slew-rate = <0>; + }; + }; + + gmac1_pins: gmac1-0 { + tx-pins { + pins = "GPIO2_18", /* GMAC1_TX_CLK */ + "GPIO2_20", /* GMAC1_TXEN */ + "GPIO2_21", /* GMAC1_TXD0 */ + "GPIO2_22", /* GMAC1_TXD1 */ + "GPIO2_23", /* GMAC1_TXD2 */ + "GPIO2_24"; /* GMAC1_TXD3 */ + function = "gmac1"; + bias-disable; + drive-strength = <25>; + input-disable; + input-schmitt-disable; + slew-rate = <0>; + }; + + rx-pins { + pins = "GPIO2_19", /* GMAC1_RX_CLK */ + "GPIO2_25", /* GMAC1_RXDV */ + "GPIO2_30", /* GMAC1_RXD0 */ + "GPIO2_31", /* GMAC1_RXD1 */ + "GPIO3_0", /* GMAC1_RXD2 */ + "GPIO3_1"; /* GMAC1_RXD3 */ + function = "gmac1"; + bias-disable; + drive-strength = <1>; + input-enable; + input-schmitt-disable; + slew-rate = <0>; + }; + }; + + mdio0_pins: mdio0-0 { + mdc-pins { + pins = "GMAC0_MDC"; + function = "gmac0"; + bias-disable; + drive-strength = <13>; + input-disable; + input-schmitt-disable; + slew-rate = <0>; + }; + + mdio-pins { + pins = "GMAC0_MDIO"; + function = "gmac0"; + bias-disable; + drive-strength = <13>; + input-enable; + input-schmitt-enable; + slew-rate = <0>; + }; + }; +}; + &sdio0 { bus-width = <4>; max-frequency = <198000000>; diff --git a/arch/riscv/dts/th1520.dtsi b/arch/riscv/dts/th1520.dtsi index 8306eda5521..c46925a132a 100644 --- a/arch/riscv/dts/th1520.dtsi +++ b/arch/riscv/dts/th1520.dtsi @@ -177,6 +177,48 @@ status = "disabled"; }; + gmac1: ethernet@ffe7060000 { + compatible = "thead,th1520-gmac", "snps,dwmac-3.70a"; + reg = <0xff 0xe7060000 0x0 0x2000>, <0xff 0xec004000 0x0 0x1000>; + reg-names = "dwmac", "apb"; + interrupts = <67 IRQ_TYPE_LEVEL_HIGH>; + interrupt-names = "macirq"; + clocks = <&clk CLK_GMAC_AXI>, <&clk CLK_GMAC1>; + clock-names = "stmmaceth", "pclk"; + snps,pbl = <32>; + snps,fixed-burst; + snps,multicast-filter-bins = <64>; + snps,perfect-filter-entries = <32>; + status = "disabled"; + + mdio1: mdio { + compatible = "snps,dwmac-mdio"; + #address-cells = <1>; + #size-cells = <0>; + }; + }; + + gmac0: ethernet@ffe7070000 { + compatible = "thead,th1520-gmac", "snps,dwmac-3.70a"; + reg = <0xff 0xe7070000 0x0 0x2000>, <0xff 0xec003000 0x0 0x1000>; + reg-names = "dwmac", "apb"; + interrupts = <66 IRQ_TYPE_LEVEL_HIGH>; + interrupt-names = "macirq"; + clocks = <&clk CLK_GMAC_AXI>, <&clk CLK_GMAC0>; + clock-names = "stmmaceth", "pclk"; + snps,pbl = <32>; + snps,fixed-burst; + snps,multicast-filter-bins = <64>; + snps,perfect-filter-entries = <32>; + status = "disabled"; + + mdio0: mdio { + compatible = "snps,dwmac-mdio"; + #address-cells = <1>; + #size-cells = <0>; + }; + }; + emmc: mmc@ffe7080000 { compatible = "thead,th1520-dwcmshc"; reg = <0xff 0xe7080000 0x0 0x10000>; diff --git a/arch/sandbox/include/asm/io.h b/arch/sandbox/include/asm/io.h index 6e3f9547fee..11ed89e0071 100644 --- a/arch/sandbox/include/asm/io.h +++ b/arch/sandbox/include/asm/io.h @@ -8,6 +8,10 @@ #include <linux/types.h> +static inline void sync(void) +{ +} + enum sandboxio_size_t { SB_SIZE_8, SB_SIZE_16, diff --git a/board/Marvell/octeontx2/board.c b/board/Marvell/octeontx2/board.c index 01ba53cf68d..1bea5a60513 100644 --- a/board/Marvell/octeontx2/board.c +++ b/board/Marvell/octeontx2/board.c @@ -93,11 +93,6 @@ int board_early_init_r(void) return 0; } -int board_init(void) -{ - return 0; -} - int timer_init(void) { return 0; diff --git a/board/amlogic/odroid-go-ultra/odroid-go-ultra.c b/board/amlogic/odroid-go-ultra/odroid-go-ultra.c index f9412071737..fc0057746e0 100644 --- a/board/amlogic/odroid-go-ultra/odroid-go-ultra.c +++ b/board/amlogic/odroid-go-ultra/odroid-go-ultra.c @@ -13,8 +13,3 @@ int mmc_get_env_dev(void) return 1; return 0; } - -int board_init(void) -{ - return 0; -} diff --git a/board/armltd/corstone1000/corstone1000.c b/board/armltd/corstone1000/corstone1000.c index 3ad77f51949..16d0e679c3e 100644 --- a/board/armltd/corstone1000/corstone1000.c +++ b/board/armltd/corstone1000/corstone1000.c @@ -77,11 +77,6 @@ static struct mm_region corstone1000_mem_map[] = { struct mm_region *mem_map = corstone1000_mem_map; -int board_init(void) -{ - return 0; -} - int dram_init(void) { gd->ram_size = PHYS_SDRAM_1_SIZE; diff --git a/board/armltd/total_compute/total_compute.c b/board/armltd/total_compute/total_compute.c index 75bc6b0631f..12bb6defab2 100644 --- a/board/armltd/total_compute/total_compute.c +++ b/board/armltd/total_compute/total_compute.c @@ -70,11 +70,6 @@ int misc_init_r(void) return 0; } -int board_init(void) -{ - return 0; -} - int dram_init(void) { return fdtdec_setup_mem_size_base(); diff --git a/board/beacon/imx8mm/imx8mm_beacon.c b/board/beacon/imx8mm/imx8mm_beacon.c index 204235a3f8e..6459a99cb9d 100644 --- a/board/beacon/imx8mm/imx8mm_beacon.c +++ b/board/beacon/imx8mm/imx8mm_beacon.c @@ -6,8 +6,3 @@ #include <asm/global_data.h> DECLARE_GLOBAL_DATA_PTR; - -int board_init(void) -{ - return 0; -} diff --git a/board/beacon/imx8mn/imx8mn_beacon.c b/board/beacon/imx8mn/imx8mn_beacon.c index 204235a3f8e..6459a99cb9d 100644 --- a/board/beacon/imx8mn/imx8mn_beacon.c +++ b/board/beacon/imx8mn/imx8mn_beacon.c @@ -6,8 +6,3 @@ #include <asm/global_data.h> DECLARE_GLOBAL_DATA_PTR; - -int board_init(void) -{ - return 0; -} diff --git a/board/beagle/beagleboneai64/beagleboneai64.c b/board/beagle/beagleboneai64/beagleboneai64.c index 99eb8972cf3..500fcc58ed8 100644 --- a/board/beagle/beagleboneai64/beagleboneai64.c +++ b/board/beagle/beagleboneai64/beagleboneai64.c @@ -45,11 +45,6 @@ struct efi_capsule_update_info update_info = { .images = fw_images, }; -int board_init(void) -{ - return 0; -} - int dram_init(void) { return fdtdec_setup_mem_size_base(); diff --git a/board/beagle/beagleplay/beagleplay.c b/board/beagle/beagleplay/beagleplay.c index 78635810585..9bc9ca30e95 100644 --- a/board/beagle/beagleplay/beagleplay.c +++ b/board/beagle/beagleplay/beagleplay.c @@ -41,11 +41,6 @@ struct efi_capsule_update_info update_info = { .images = fw_images, }; -int board_init(void) -{ - return 0; -} - int dram_init(void) { return fdtdec_setup_mem_size_base(); diff --git a/board/beagle/beagley-ai/beagley-ai.c b/board/beagle/beagley-ai/beagley-ai.c index 9786f628f6d..26fa54e27bb 100644 --- a/board/beagle/beagley-ai/beagley-ai.c +++ b/board/beagle/beagley-ai/beagley-ai.c @@ -21,11 +21,6 @@ void set_dfu_alt_info(char *interface, char *devstr) } #endif -int board_init(void) -{ - return 0; -} - int dram_init(void) { return fdtdec_setup_mem_size_base(); diff --git a/board/broadcom/bcmbca/board.c b/board/broadcom/bcmbca/board.c index a6ced92565f..1ab6224011c 100644 --- a/board/broadcom/bcmbca/board.c +++ b/board/broadcom/bcmbca/board.c @@ -5,11 +5,6 @@ #include <fdtdec.h> -int board_init(void) -{ - return 0; -} - int dram_init(void) { if (fdtdec_setup_mem_size_base() != 0) diff --git a/board/broadcom/bcmns/ns.c b/board/broadcom/bcmns/ns.c index 45cc62936ce..47a01227a35 100644 --- a/board/broadcom/bcmns/ns.c +++ b/board/broadcom/bcmns/ns.c @@ -31,11 +31,6 @@ int board_late_init(void) return 0; } -int board_init(void) -{ - return 0; -} - void reset_cpu(void) { } diff --git a/board/broadcom/bcmstb/bcmstb.c b/board/broadcom/bcmstb/bcmstb.c index e655f610c84..e7313d8c431 100644 --- a/board/broadcom/bcmstb/bcmstb.c +++ b/board/broadcom/bcmstb/bcmstb.c @@ -32,11 +32,6 @@ union reg_value_union { const phys_addr_t *address; }; -int board_init(void) -{ - return 0; -} - void reset_cpu(void) { } diff --git a/board/bsh/imx8mn_smm_s2/imx8mn_smm_s2.c b/board/bsh/imx8mn_smm_s2/imx8mn_smm_s2.c index c9989687399..c4a85c4aa44 100644 --- a/board/bsh/imx8mn_smm_s2/imx8mn_smm_s2.c +++ b/board/bsh/imx8mn_smm_s2/imx8mn_smm_s2.c @@ -6,11 +6,6 @@ #include <asm/arch/sys_proto.h> #include <env.h> -int board_init(void) -{ - return 0; -} - int board_late_init(void) { if (is_usb_boot()) { diff --git a/board/canaan/k230_canmv/board.c b/board/canaan/k230_canmv/board.c index a705ee8f67b..7d012df214f 100644 --- a/board/canaan/k230_canmv/board.c +++ b/board/canaan/k230_canmv/board.c @@ -3,7 +3,3 @@ * Copyright (c) 2025, Junhui Liu <junhui.liu@pigmoral.tech> */ -int board_init(void) -{ - return 0; -} diff --git a/board/cavium/thunderx/thunderx.c b/board/cavium/thunderx/thunderx.c index b1a805c1360..4c477ad551c 100644 --- a/board/cavium/thunderx/thunderx.c +++ b/board/cavium/thunderx/thunderx.c @@ -72,11 +72,6 @@ static struct mm_region thunderx_mem_map[] = { struct mm_region *mem_map = thunderx_mem_map; -int board_init(void) -{ - return 0; -} - int timer_init(void) { return 0; diff --git a/board/data_modul/imx8mm_edm_sbc/imx8mm_data_modul_edm_sbc.c b/board/data_modul/imx8mm_edm_sbc/imx8mm_data_modul_edm_sbc.c index 339702e8392..e271d060efa 100644 --- a/board/data_modul/imx8mm_edm_sbc/imx8mm_data_modul_edm_sbc.c +++ b/board/data_modul/imx8mm_edm_sbc/imx8mm_data_modul_edm_sbc.c @@ -16,11 +16,6 @@ DECLARE_GLOBAL_DATA_PTR; -int board_init(void) -{ - return 0; -} - int board_late_init(void) { struct udevice *dev; diff --git a/board/data_modul/imx8mp_edm_sbc/imx8mp_data_modul_edm_sbc.c b/board/data_modul/imx8mp_edm_sbc/imx8mp_data_modul_edm_sbc.c index 138acd36ad2..d6f0a917023 100644 --- a/board/data_modul/imx8mp_edm_sbc/imx8mp_data_modul_edm_sbc.c +++ b/board/data_modul/imx8mp_edm_sbc/imx8mp_data_modul_edm_sbc.c @@ -46,11 +46,6 @@ enum env_location env_get_location(enum env_operation op, int prio) return prio ? ENVL_UNKNOWN : ENVL_MMC; } -int board_init(void) -{ - return 0; -} - int board_late_init(void) { struct udevice *dev; diff --git a/board/dhelectronics/dh_imx8mp/imx8mp_dhcom_pdk2.c b/board/dhelectronics/dh_imx8mp/imx8mp_dhcom_pdk2.c index 4275436b128..3a890c5920c 100644 --- a/board/dhelectronics/dh_imx8mp/imx8mp_dhcom_pdk2.c +++ b/board/dhelectronics/dh_imx8mp/imx8mp_dhcom_pdk2.c @@ -153,11 +153,6 @@ void dh_add_item_number_and_serial_to_env(struct eeprom_id_page *eip) } } -int board_init(void) -{ - return 0; -} - int board_late_init(void) { u8 eeprom_buffer[DH_EEPROM_ID_PAGE_MAX_SIZE] = { 0 }; diff --git a/board/emcraft/imx8mp_navqp/imx8mp_navqp.c b/board/emcraft/imx8mp_navqp/imx8mp_navqp.c index 219efdddcb5..04b3bc8caf5 100644 --- a/board/emcraft/imx8mp_navqp/imx8mp_navqp.c +++ b/board/emcraft/imx8mp_navqp/imx8mp_navqp.c @@ -4,7 +4,3 @@ * Copyright 2024 Gilles Talis <gilles.talis@gmail.com> */ -int board_init(void) -{ - return 0; -} diff --git a/board/emulation/qemu-arm/qemu-arm.c b/board/emulation/qemu-arm/qemu-arm.c index 31f5a775137..38f0ec5f2fb 100644 --- a/board/emulation/qemu-arm/qemu-arm.c +++ b/board/emulation/qemu-arm/qemu-arm.c @@ -102,11 +102,6 @@ static struct mm_region qemu_arm64_mem_map[] = { struct mm_region *mem_map = qemu_arm64_mem_map; #endif -int board_init(void) -{ - return 0; -} - int board_late_init(void) { /* diff --git a/board/emulation/qemu-ppce500/qemu-ppce500.c b/board/emulation/qemu-ppce500/qemu-ppce500.c index 40d295dbf06..58de4a05296 100644 --- a/board/emulation/qemu-ppce500/qemu-ppce500.c +++ b/board/emulation/qemu-ppce500/qemu-ppce500.c @@ -170,9 +170,9 @@ int misc_init_r(void) * Detect the presence of the platform bus node, and * create a virtual memory mapping for it. */ - for (ret = uclass_find_first_device(UCLASS_SIMPLE_BUS, &dev); + for (uclass_find_first_device(UCLASS_SIMPLE_BUS, &dev); dev; - ret = uclass_find_next_device(&dev)) { + uclass_find_next_device(&dev)) { if (device_is_compatible(dev, "qemu,platform")) { struct simple_bus_plat *plat = dev_get_uclass_plat(dev); diff --git a/board/emulation/qemu-riscv/qemu-riscv.c b/board/emulation/qemu-riscv/qemu-riscv.c index 70190ebe8fc..97c8211c100 100644 --- a/board/emulation/qemu-riscv/qemu-riscv.c +++ b/board/emulation/qemu-riscv/qemu-riscv.c @@ -28,11 +28,6 @@ int is_flash_available(void) } #endif -int board_init(void) -{ - return 0; -} - int board_late_init(void) { /* start usb so that usb keyboard can be used as input device */ diff --git a/board/emulation/qemu-sbsa/qemu-sbsa.c b/board/emulation/qemu-sbsa/qemu-sbsa.c index cf1d5acf5cb..30b3a41a9e9 100644 --- a/board/emulation/qemu-sbsa/qemu-sbsa.c +++ b/board/emulation/qemu-sbsa/qemu-sbsa.c @@ -93,11 +93,6 @@ int board_late_init(void) return 0; } -int board_init(void) -{ - return 0; -} - /** * dtb_dt_qemu - Return the address of the QEMU provided FDT. * diff --git a/board/emulation/qemu-xtensa/qemu-xtensa.c b/board/emulation/qemu-xtensa/qemu-xtensa.c index 0ca83341c25..2e2a5a26d94 100644 --- a/board/emulation/qemu-xtensa/qemu-xtensa.c +++ b/board/emulation/qemu-xtensa/qemu-xtensa.c @@ -13,11 +13,6 @@ DECLARE_GLOBAL_DATA_PTR; -int board_init(void) -{ - return 0; -} - unsigned long get_board_sys_clk(void) { return gd->cpu_clk ? gd->cpu_clk : 40000000; diff --git a/board/engicam/stm32mp1/stm32mp1.c b/board/engicam/stm32mp1/stm32mp1.c index 56557d56429..82278a48ae8 100644 --- a/board/engicam/stm32mp1/stm32mp1.c +++ b/board/engicam/stm32mp1/stm32mp1.c @@ -34,12 +34,6 @@ int checkboard(void) return 0; } -/* board dependent setup after realloc */ -int board_init(void) -{ - return 0; -} - int board_late_init(void) { return 0; diff --git a/board/freescale/imx8mp_evk/imx8mp_evk.c b/board/freescale/imx8mp_evk/imx8mp_evk.c index 2a9ba7df2bb..732c0fa561d 100644 --- a/board/freescale/imx8mp_evk/imx8mp_evk.c +++ b/board/freescale/imx8mp_evk/imx8mp_evk.c @@ -28,12 +28,6 @@ struct efi_capsule_update_info update_info = { }; #endif /* EFI_HAVE_CAPSULE_SUPPORT */ - -int board_init(void) -{ - return 0; -} - int board_late_init(void) { #if CONFIG_IS_ENABLED(ENV_IS_IN_MMC) diff --git a/board/freescale/imx91_evk/imx91_evk.c b/board/freescale/imx91_evk/imx91_evk.c index 83bfca2f22d..cbd0a72bf4b 100644 --- a/board/freescale/imx91_evk/imx91_evk.c +++ b/board/freescale/imx91_evk/imx91_evk.c @@ -9,11 +9,6 @@ #include <netdev.h> #include <asm/arch/sys_proto.h> -int board_init(void) -{ - return 0; -} - int board_late_init(void) { #ifdef CONFIG_ENV_IS_IN_MMC diff --git a/board/freescale/imx93_evk/MAINTAINERS b/board/freescale/imx93_evk/MAINTAINERS index 34ba278fcdf..eb6e669bd17 100644 --- a/board/freescale/imx93_evk/MAINTAINERS +++ b/board/freescale/imx93_evk/MAINTAINERS @@ -1,4 +1,4 @@ -i.MX93 MEK BOARD +i.MX93 EVK BOARD M: Peng Fan <peng.fan@nxp.com> S: Maintained F: board/freescale/imx93_evk/ diff --git a/board/freescale/imx93_evk/imx93_evk.c b/board/freescale/imx93_evk/imx93_evk.c index d84d56be5e1..d62f94dc418 100644 --- a/board/freescale/imx93_evk/imx93_evk.c +++ b/board/freescale/imx93_evk/imx93_evk.c @@ -13,11 +13,8 @@ #include <asm/arch/sys_proto.h> #include <asm/arch-imx9/imx93_pins.h> #include <asm/arch/clock.h> -#include <power/pmic.h> #include <dm/device.h> #include <dm/uclass.h> -#include <usb.h> -#include <dwc3-uboot.h> DECLARE_GLOBAL_DATA_PTR; diff --git a/board/freescale/imx93_frdm/Kconfig b/board/freescale/imx93_frdm/Kconfig new file mode 100644 index 00000000000..5f5ac7f8f04 --- /dev/null +++ b/board/freescale/imx93_frdm/Kconfig @@ -0,0 +1,12 @@ +if TARGET_IMX93_FRDM + +config SYS_BOARD + default "imx93_frdm" + +config SYS_VENDOR + default "freescale" + +config SYS_CONFIG_NAME + default "imx93_frdm" + +endif diff --git a/board/freescale/imx93_frdm/MAINTAINERS b/board/freescale/imx93_frdm/MAINTAINERS new file mode 100644 index 00000000000..59595bb2118 --- /dev/null +++ b/board/freescale/imx93_frdm/MAINTAINERS @@ -0,0 +1,6 @@ +i.MX93 FRDM BOARD +M: Fabio Estevam <festevam@gmail.com> +S: Maintained +F: board/freescale/imx93_frdm/ +F: include/configs/imx93_frdm.h +F: configs/imx93_frdm_defconfig diff --git a/board/freescale/imx93_frdm/Makefile b/board/freescale/imx93_frdm/Makefile new file mode 100644 index 00000000000..9612b1fa55b --- /dev/null +++ b/board/freescale/imx93_frdm/Makefile @@ -0,0 +1,11 @@ +# +# Copyright 2025 NXP +# +# SPDX-License-Identifier: GPL-2.0+ +# + +obj-y += imx93_frdm.o + +ifdef CONFIG_XPL_BUILD +obj-y += spl.o lpddr4x_1gb_timing.o lpddr4x_2gb_timing.o +endif diff --git a/board/freescale/imx93_frdm/imx93_frdm.c b/board/freescale/imx93_frdm/imx93_frdm.c new file mode 100644 index 00000000000..c74fd85712f --- /dev/null +++ b/board/freescale/imx93_frdm/imx93_frdm.c @@ -0,0 +1,59 @@ +// SPDX-License-Identifier: GPL-2.0+ +/* + * Copyright 2025 NXP + */ + +#include <env.h> +#include <efi_loader.h> +#include <init.h> +#include <asm/global_data.h> +#include <asm/arch/sys_proto.h> +#include <asm/arch-imx9/imx93_pins.h> +#include <asm/arch/clock.h> +#include <dm/device.h> +#include <dm/uclass.h> + +DECLARE_GLOBAL_DATA_PTR; + +#if IS_ENABLED(CONFIG_EFI_HAVE_CAPSULE_SUPPORT) +#define IMX_BOOT_IMAGE_GUID \ + EFI_GUID(0xbc550d86, 0xda26, 0x4b70, 0xac, 0x05, \ + 0x2a, 0x44, 0x8e, 0xda, 0x6f, 0x21) + +struct efi_fw_image fw_images[] = { + { + .image_type_id = IMX_BOOT_IMAGE_GUID, + .fw_name = u"IMX93-11X11-FRDM-RAW", + .image_index = 1, + }, +}; + +struct efi_capsule_update_info update_info = { + .dfu_string = "mmc 0=flash-bin raw 0 0x2000 mmcpart 1", + .num_images = ARRAY_SIZE(fw_images), + .images = fw_images, +}; +#endif /* EFI_HAVE_CAPSULE_SUPPORT */ + +int board_early_init_f(void) +{ + return 0; +} + +int board_init(void) +{ + return 0; +} + +int board_late_init(void) +{ + if (IS_ENABLED(CONFIG_ENV_IS_IN_MMC) || IS_ENABLED(CONFIG_ENV_IS_IN_NOWHERE)) + board_late_mmc_env_init(); + + if (IS_ENABLED(CONFIG_ENV_VARS_UBOOT_RUNTIME_CONFIG)) { + env_set("board_name", "11X11_FRDM"); + env_set("board_rev", "iMX93"); + } + + return 0; +} diff --git a/board/freescale/imx93_frdm/imx93_frdm.env b/board/freescale/imx93_frdm/imx93_frdm.env new file mode 100644 index 00000000000..528a953c8df --- /dev/null +++ b/board/freescale/imx93_frdm/imx93_frdm.env @@ -0,0 +1,31 @@ +/* SPDX-License-Identifier: (GPL-2.0+ OR MIT) */ + +boot_targets=mmc0 mmc1 +boot_fit=no +bootm_size=0x10000000 +cntr_addr=0x98000000 +cntr_file=os_cntr_signed.bin +console=ttyLP0,115200 +fdt_addr_r=0x83000000 +fdt_addr=0x83000000 +fdtfile=CONFIG_DEFAULT_FDT_FILE +image=Image +mmcdev=1 +mmcpart=1 +mmcroot=/dev/mmcblk${mmcdev}p2 rootwait rw +mmcautodetect=yes +mmcargs=setenv bootargs console=${console} root=${mmcroot} +kernel_addr_r=CONFIG_SYS_LOAD_ADDR +loadimage=load mmc ${mmcdev}:${mmcpart} ${loadaddr} ${image} +loadfdt=load mmc ${mmcdev}:${mmcpart} ${fdt_addr_r} ${fdtfile} +boot_os=booti ${loadaddr} - ${fdt_addr_r} + +bsp_bootcmd= + echo Running BSP bootcmd ...; + mmc dev ${mmcdev}; + run mmcargs; + run loadimage; + run loadfdt; + run boot_os; + +scriptaddr=0x83500000 diff --git a/board/freescale/imx93_frdm/lpddr4_timing.h b/board/freescale/imx93_frdm/lpddr4_timing.h new file mode 100644 index 00000000000..192bc9e1519 --- /dev/null +++ b/board/freescale/imx93_frdm/lpddr4_timing.h @@ -0,0 +1,12 @@ +/* SPDX-License-Identifier: GPL-2.0+ */ +/* + * Copyright 2022 Marek Vasut <marex@denx.de> + */ + +#ifndef __LPDDR4_TIMING_H__ +#define __LPDDR4_TIMING_H__ + +extern struct dram_timing_info dram_timing_1GB; +extern struct dram_timing_info dram_timing_2GB; + +#endif /* __LPDDR4_TIMING_H__ */ diff --git a/board/freescale/imx93_frdm/lpddr4x_1gb_timing.c b/board/freescale/imx93_frdm/lpddr4x_1gb_timing.c new file mode 100644 index 00000000000..17549206ee4 --- /dev/null +++ b/board/freescale/imx93_frdm/lpddr4x_1gb_timing.c @@ -0,0 +1,1996 @@ +// SPDX-License-Identifier: BSD-3-Clause +/* + * Copyright 2025 NXP + * + * Code generated with DDR Tool v3.3.0_7.8-d1cdb7d3. + * DDR PHY FW2022.01 + */ + +#include <linux/kernel.h> +#include <asm/arch/ddr.h> + +/* Initialize DDRC registers */ +static struct dram_cfg_param ddr_ddrc_cfg[] = { + {0x4e300110, 0x44100001}, + {0x4e300000, 0x8000bf}, + {0x4e300008, 0x0}, + {0x4e300080, 0x80000412}, + {0x4e300084, 0x0}, + {0x4e300114, 0x1002}, + {0x4e300260, 0x80}, + {0x4e300f04, 0x80}, + {0x4e300800, 0x43b30002}, + {0x4e300804, 0x1f1f1f1f}, + {0x4e301000, 0x0}, + {0x4e301240, 0x0}, + {0x4e301244, 0x0}, + {0x4e301248, 0x0}, + {0x4e30124c, 0x0}, + {0x4e301250, 0x0}, + {0x4e301254, 0x0}, + {0x4e301258, 0x0}, + {0x4e30125c, 0x0}, +}; + +/* dram fsp cfg */ +static struct dram_fsp_cfg ddr_dram_fsp_cfg[] = { + { + { + {0x4e300100, 0x24A0321B}, + {0x4e300104, 0xF8EE001B}, + {0x4e300108, 0x2F2E3233}, + {0x4e30010C, 0x0005C18B}, + {0x4e300124, 0x1C790000}, + {0x4e300160, 0x00009102}, + {0x4e30016C, 0x35F00000}, + {0x4e300170, 0x8B0B0608}, + {0x4e300250, 0x00000028}, + {0x4e300254, 0x00FE00FE}, + {0x4e300258, 0x00000008}, + {0x4e30025C, 0x00000400}, + {0x4e300300, 0x224F2213}, + {0x4e300304, 0x00FE2213}, + {0x4e300308, 0x0A380E3D}, + }, + { + {0x01, 0xE4}, + {0x02, 0x36}, + {0x03, 0x32}, + {0x0b, 0x46}, + {0x0c, 0x11}, + {0x0e, 0x11}, + {0x16, 0x04}, + }, + 0, + }, + { + { + {0x4e300100, 0x124F2100}, + {0x4e300104, 0xF877000E}, + {0x4e300108, 0x1816E4AA}, + {0x4e30010C, 0x005101E6}, + {0x4e300124, 0x0E3C0000}, + {0x4e300160, 0x00009101}, + {0x4e30016C, 0x30900000}, + {0x4e300170, 0x8A0A0508}, + {0x4e300250, 0x00000014}, + {0x4e300254, 0x007B007B}, + {0x4e300258, 0x00000008}, + {0x4e30025C, 0x00000400}, + }, + { + {0x01, 0xB4}, + {0x02, 0x1B}, + {0x03, 0x32}, + {0x0b, 0x46}, + {0x0c, 0x11}, + {0x0e, 0x11}, + {0x16, 0x04}, + }, + 0, + }, + { + { + {0x4e300100, 0x00051000}, + {0x4e300104, 0xF855000A}, + {0x4e300108, 0x6E620A48}, + {0x4e30010C, 0x0031010D}, + {0x4e300124, 0x04C50000}, + {0x4e300160, 0x00009100}, + {0x4e30016C, 0x30000000}, + {0x4e300170, 0x89090408}, + {0x4e300250, 0x00000007}, + {0x4e300254, 0x00240024}, + {0x4e300258, 0x00000008}, + {0x4e30025C, 0x00000400}, + }, + { + {0x01, 0x94}, + {0x02, 0x9}, + {0x03, 0x32}, + {0x0b, 0x46}, + {0x0c, 0x11}, + {0x0e, 0x11}, + {0x16, 0x04}, + }, + 1, + }, + +}; + +/* PHY Initialize Configuration */ +static struct dram_cfg_param ddr_ddrphy_cfg[] = { + {0x100a0, 0x4}, + {0x100a1, 0x5}, + {0x100a2, 0x6}, + {0x100a3, 0x7}, + {0x100a4, 0x0}, + {0x100a5, 0x1}, + {0x100a6, 0x2}, + {0x100a7, 0x3}, + {0x110a0, 0x3}, + {0x110a1, 0x2}, + {0x110a2, 0x0}, + {0x110a3, 0x1}, + {0x110a4, 0x7}, + {0x110a5, 0x6}, + {0x110a6, 0x4}, + {0x110a7, 0x5}, + {0x1005f, 0x5ff}, + {0x1015f, 0x5ff}, + {0x1105f, 0x5ff}, + {0x1115f, 0x5ff}, + {0x11005f, 0x5ff}, + {0x11015f, 0x5ff}, + {0x11105f, 0x5ff}, + {0x11115f, 0x5ff}, + {0x21005f, 0x5ff}, + {0x21015f, 0x5ff}, + {0x21105f, 0x5ff}, + {0x21115f, 0x5ff}, + {0x55, 0x1ff}, + {0x1055, 0x1ff}, + {0x2055, 0x1ff}, + {0x200c5, 0x19}, + {0x1200c5, 0xb}, + {0x2200c5, 0x7}, + {0x2002e, 0x2}, + {0x12002e, 0x2}, + {0x22002e, 0x2}, + {0x90204, 0x0}, + {0x190204, 0x0}, + {0x290204, 0x0}, + {0x20024, 0x1e3}, + {0x2003a, 0x2}, + {0x2007d, 0x212}, + {0x2007c, 0x61}, + {0x120024, 0x1e3}, + {0x2003a, 0x2}, + {0x12007d, 0x212}, + {0x12007c, 0x61}, + {0x220024, 0x1e3}, + {0x2003a, 0x2}, + {0x22007d, 0x212}, + {0x22007c, 0x61}, + {0x20056, 0x3}, + {0x120056, 0x3}, + {0x220056, 0x3}, + {0x1004d, 0x600}, + {0x1014d, 0x600}, + {0x1104d, 0x600}, + {0x1114d, 0x600}, + {0x11004d, 0x600}, + {0x11014d, 0x600}, + {0x11104d, 0x600}, + {0x11114d, 0x600}, + {0x21004d, 0x600}, + {0x21014d, 0x600}, + {0x21104d, 0x600}, + {0x21114d, 0x600}, + {0x10049, 0xe00}, + {0x10149, 0xe00}, + {0x11049, 0xe00}, + {0x11149, 0xe00}, + {0x110049, 0xe00}, + {0x110149, 0xe00}, + {0x111049, 0xe00}, + {0x111149, 0xe00}, + {0x210049, 0xe00}, + {0x210149, 0xe00}, + {0x211049, 0xe00}, + {0x211149, 0xe00}, + {0x43, 0x60}, + {0x1043, 0x60}, + {0x2043, 0x60}, + {0x20018, 0x1}, + {0x20075, 0x4}, + {0x20050, 0x0}, + {0x2009b, 0x2}, + {0x20008, 0x3a5}, + {0x120008, 0x1d3}, + {0x220008, 0x9c}, + {0x20088, 0x9}, + {0x200b2, 0x10c}, + {0x10043, 0x5a1}, + {0x10143, 0x5a1}, + {0x11043, 0x5a1}, + {0x11143, 0x5a1}, + {0x1200b2, 0x10c}, + {0x110043, 0x5a1}, + {0x110143, 0x5a1}, + {0x111043, 0x5a1}, + {0x111143, 0x5a1}, + {0x2200b2, 0x10c}, + {0x210043, 0x5a1}, + {0x210143, 0x5a1}, + {0x211043, 0x5a1}, + {0x211143, 0x5a1}, + {0x200fa, 0x2}, + {0x1200fa, 0x2}, + {0x2200fa, 0x2}, + {0x20019, 0x1}, + {0x120019, 0x1}, + {0x220019, 0x1}, + {0x200f0, 0x600}, + {0x200f1, 0x0}, + {0x200f2, 0x4444}, + {0x200f3, 0x8888}, + {0x200f4, 0x5655}, + {0x200f5, 0x0}, + {0x200f6, 0x0}, + {0x200f7, 0xf000}, + {0x1004a, 0x500}, + {0x1104a, 0x500}, + {0x20025, 0x0}, + {0x2002d, 0x0}, + {0x12002d, 0x0}, + {0x22002d, 0x0}, + {0x2002c, 0x0}, + {0x20021, 0x0}, + {0x200c7, 0x21}, + {0x1200c7, 0x21}, + {0x200ca, 0x24}, + {0x1200ca, 0x24}, +}; + +/* PHY trained csr */ +static struct dram_cfg_param ddr_ddrphy_trained_csr[] = { + {0x1005f, 0x0}, + {0x1015f, 0x0}, + {0x1105f, 0x0}, + {0x1115f, 0x0}, + {0x11005f, 0x0}, + {0x11015f, 0x0}, + {0x11105f, 0x0}, + {0x11115f, 0x0}, + {0x21005f, 0x0}, + {0x21015f, 0x0}, + {0x21105f, 0x0}, + {0x21115f, 0x0}, + {0x55, 0x0}, + {0x1055, 0x0}, + {0x2055, 0x0}, + {0x200c5, 0x0}, + {0x1200c5, 0x0}, + {0x2200c5, 0x0}, + {0x2002e, 0x0}, + {0x12002e, 0x0}, + {0x22002e, 0x0}, + {0x90204, 0x0}, + {0x190204, 0x0}, + {0x290204, 0x0}, + {0x20024, 0x0}, + {0x2003a, 0x0}, + {0x2007d, 0x0}, + {0x2007c, 0x0}, + {0x120024, 0x0}, + {0x12007d, 0x0}, + {0x12007c, 0x0}, + {0x220024, 0x0}, + {0x22007d, 0x0}, + {0x22007c, 0x0}, + {0x20056, 0x0}, + {0x120056, 0x0}, + {0x220056, 0x0}, + {0x1004d, 0x0}, + {0x1014d, 0x0}, + {0x1104d, 0x0}, + {0x1114d, 0x0}, + {0x11004d, 0x0}, + {0x11014d, 0x0}, + {0x11104d, 0x0}, + {0x11114d, 0x0}, + {0x21004d, 0x0}, + {0x21014d, 0x0}, + {0x21104d, 0x0}, + {0x21114d, 0x0}, + {0x10049, 0x0}, + {0x10149, 0x0}, + {0x11049, 0x0}, + {0x11149, 0x0}, + {0x110049, 0x0}, + {0x110149, 0x0}, + {0x111049, 0x0}, + {0x111149, 0x0}, + {0x210049, 0x0}, + {0x210149, 0x0}, + {0x211049, 0x0}, + {0x211149, 0x0}, + {0x43, 0x0}, + {0x1043, 0x0}, + {0x2043, 0x0}, + {0x20018, 0x0}, + {0x20075, 0x0}, + {0x20050, 0x0}, + {0x2009b, 0x0}, + {0x20008, 0x0}, + {0x120008, 0x0}, + {0x220008, 0x0}, + {0x20088, 0x0}, + {0x200b2, 0x0}, + {0x10043, 0x0}, + {0x10143, 0x0}, + {0x11043, 0x0}, + {0x11143, 0x0}, + {0x1200b2, 0x0}, + {0x110043, 0x0}, + {0x110143, 0x0}, + {0x111043, 0x0}, + {0x111143, 0x0}, + {0x2200b2, 0x0}, + {0x210043, 0x0}, + {0x210143, 0x0}, + {0x211043, 0x0}, + {0x211143, 0x0}, + {0x200fa, 0x0}, + {0x1200fa, 0x0}, + {0x2200fa, 0x0}, + {0x20019, 0x0}, + {0x120019, 0x0}, + {0x220019, 0x0}, + {0x200f0, 0x0}, + {0x200f1, 0x0}, + {0x200f2, 0x0}, + {0x200f3, 0x0}, + {0x200f4, 0x0}, + {0x200f5, 0x0}, + {0x200f6, 0x0}, + {0x200f7, 0x0}, + {0x1004a, 0x0}, + {0x1104a, 0x0}, + {0x20025, 0x0}, + {0x2002d, 0x0}, + {0x12002d, 0x0}, + {0x22002d, 0x0}, + {0x2002c, 0x0}, + {0xd0000, 0x0}, + {0x90000, 0x0}, + {0x90001, 0x0}, + {0x90002, 0x0}, + {0x90003, 0x0}, + {0x90004, 0x0}, + {0x90005, 0x0}, + {0x90029, 0x0}, + {0x9002a, 0x0}, + {0x9002b, 0x0}, + {0x9002c, 0x0}, + {0x9002d, 0x0}, + {0x9002e, 0x0}, + {0x9002f, 0x0}, + {0x90030, 0x0}, + {0x90031, 0x0}, + {0x90032, 0x0}, + {0x90033, 0x0}, + {0x90034, 0x0}, + {0x90035, 0x0}, + {0x90036, 0x0}, + {0x90037, 0x0}, + {0x90038, 0x0}, + {0x90039, 0x0}, + {0x9003a, 0x0}, + {0x9003b, 0x0}, + {0x9003c, 0x0}, + {0x9003d, 0x0}, + {0x9003e, 0x0}, + {0x9003f, 0x0}, + {0x90040, 0x0}, + {0x90041, 0x0}, + {0x90042, 0x0}, + {0x90043, 0x0}, + {0x90044, 0x0}, + {0x90045, 0x0}, + {0x90046, 0x0}, + {0x90047, 0x0}, + {0x90048, 0x0}, + {0x90049, 0x0}, + {0x9004a, 0x0}, + {0x9004b, 0x0}, + {0x9004c, 0x0}, + {0x9004d, 0x0}, + {0x9004e, 0x0}, + {0x9004f, 0x0}, + {0x90050, 0x0}, + {0x90051, 0x0}, + {0x90052, 0x0}, + {0x90053, 0x0}, + {0x90054, 0x0}, + {0x90055, 0x0}, + {0x90056, 0x0}, + {0x90057, 0x0}, + {0x90058, 0x0}, + {0x90059, 0x0}, + {0x9005a, 0x0}, + {0x9005b, 0x0}, + {0x9005c, 0x0}, + {0x9005d, 0x0}, + {0x9005e, 0x0}, + {0x9005f, 0x0}, + {0x90060, 0x0}, + {0x90061, 0x0}, + {0x90062, 0x0}, + {0x90063, 0x0}, + {0x90064, 0x0}, + {0x90065, 0x0}, + {0x90066, 0x0}, + {0x90067, 0x0}, + {0x90068, 0x0}, + {0x90069, 0x0}, + {0x9006a, 0x0}, + {0x9006b, 0x0}, + {0x9006c, 0x0}, + {0x9006d, 0x0}, + {0x9006e, 0x0}, + {0x9006f, 0x0}, + {0x90070, 0x0}, + {0x90071, 0x0}, + {0x90072, 0x0}, + {0x90073, 0x0}, + {0x90074, 0x0}, + {0x90075, 0x0}, + {0x90076, 0x0}, + {0x90077, 0x0}, + {0x90078, 0x0}, + {0x90079, 0x0}, + {0x9007a, 0x0}, + {0x9007b, 0x0}, + {0x9007c, 0x0}, + {0x9007d, 0x0}, + {0x9007e, 0x0}, + {0x9007f, 0x0}, + {0x90080, 0x0}, + {0x90081, 0x0}, + {0x90082, 0x0}, + {0x90083, 0x0}, + {0x90084, 0x0}, + {0x90085, 0x0}, + {0x90086, 0x0}, + {0x90087, 0x0}, + {0x90088, 0x0}, + {0x90089, 0x0}, + {0x9008a, 0x0}, + {0x9008b, 0x0}, + {0x9008c, 0x0}, + {0x9008d, 0x0}, + {0x9008e, 0x0}, + {0x9008f, 0x0}, + {0x90090, 0x0}, + {0x90091, 0x0}, + {0x90092, 0x0}, + {0x90093, 0x0}, + {0x90094, 0x0}, + {0x90095, 0x0}, + {0x90096, 0x0}, + {0x90097, 0x0}, + {0x90098, 0x0}, + {0x90099, 0x0}, + {0x9009a, 0x0}, + {0x9009b, 0x0}, + {0x9009c, 0x0}, + {0x9009d, 0x0}, + {0x9009e, 0x0}, + {0x9009f, 0x0}, + {0x900a0, 0x0}, + {0x900a1, 0x0}, + {0x900a2, 0x0}, + {0x900a3, 0x0}, + {0x900a4, 0x0}, + {0x900a5, 0x0}, + {0x900a6, 0x0}, + {0x900a7, 0x0}, + {0x900a8, 0x0}, + {0x900a9, 0x0}, + {0x40000, 0x0}, + {0x40020, 0x0}, + {0x40040, 0x0}, + {0x40060, 0x0}, + {0x40001, 0x0}, + {0x40021, 0x0}, + {0x40041, 0x0}, + {0x40061, 0x0}, + {0x40002, 0x0}, + {0x40022, 0x0}, + {0x40042, 0x0}, + {0x40062, 0x0}, + {0x40003, 0x0}, + {0x40023, 0x0}, + {0x40043, 0x0}, + {0x40063, 0x0}, + {0x40004, 0x0}, + {0x40024, 0x0}, + {0x40044, 0x0}, + {0x40064, 0x0}, + {0x40005, 0x0}, + {0x40025, 0x0}, + {0x40045, 0x0}, + {0x40065, 0x0}, + {0x40006, 0x0}, + {0x40026, 0x0}, + {0x40046, 0x0}, + {0x40066, 0x0}, + {0x40007, 0x0}, + {0x40027, 0x0}, + {0x40047, 0x0}, + {0x40067, 0x0}, + {0x40008, 0x0}, + {0x40028, 0x0}, + {0x40048, 0x0}, + {0x40068, 0x0}, + {0x40009, 0x0}, + {0x40029, 0x0}, + {0x40049, 0x0}, + {0x40069, 0x0}, + {0x4000a, 0x0}, + {0x4002a, 0x0}, + {0x4004a, 0x0}, + {0x4006a, 0x0}, + {0x4000b, 0x0}, + {0x4002b, 0x0}, + {0x4004b, 0x0}, + {0x4006b, 0x0}, + {0x4000c, 0x0}, + {0x4002c, 0x0}, + {0x4004c, 0x0}, + {0x4006c, 0x0}, + {0x4000d, 0x0}, + {0x4002d, 0x0}, + {0x4004d, 0x0}, + {0x4006d, 0x0}, + {0x4000e, 0x0}, + {0x4002e, 0x0}, + {0x4004e, 0x0}, + {0x4006e, 0x0}, + {0x4000f, 0x0}, + {0x4002f, 0x0}, + {0x4004f, 0x0}, + {0x4006f, 0x0}, + {0x40010, 0x0}, + {0x40030, 0x0}, + {0x40050, 0x0}, + {0x40070, 0x0}, + {0x40011, 0x0}, + {0x40031, 0x0}, + {0x40051, 0x0}, + {0x40071, 0x0}, + {0x40012, 0x0}, + {0x40032, 0x0}, + {0x40052, 0x0}, + {0x40072, 0x0}, + {0x40013, 0x0}, + {0x40033, 0x0}, + {0x40053, 0x0}, + {0x40073, 0x0}, + {0x40014, 0x0}, + {0x40034, 0x0}, + {0x40054, 0x0}, + {0x40074, 0x0}, + {0x40015, 0x0}, + {0x40035, 0x0}, + {0x40055, 0x0}, + {0x40075, 0x0}, + {0x40016, 0x0}, + {0x40036, 0x0}, + {0x40056, 0x0}, + {0x40076, 0x0}, + {0x40017, 0x0}, + {0x40037, 0x0}, + {0x40057, 0x0}, + {0x40077, 0x0}, + {0x40018, 0x0}, + {0x40038, 0x0}, + {0x40058, 0x0}, + {0x40078, 0x0}, + {0x40019, 0x0}, + {0x40039, 0x0}, + {0x40059, 0x0}, + {0x40079, 0x0}, + {0x4001a, 0x0}, + {0x4003a, 0x0}, + {0x4005a, 0x0}, + {0x4007a, 0x0}, + {0x900aa, 0x0}, + {0x900ab, 0x0}, + {0x900ac, 0x0}, + {0x900ad, 0x0}, + {0x900ae, 0x0}, + {0x900af, 0x0}, + {0x900b0, 0x0}, + {0x900b1, 0x0}, + {0x900b2, 0x0}, + {0x900b3, 0x0}, + {0x900b4, 0x0}, + {0x900b5, 0x0}, + {0x900b6, 0x0}, + {0x900b7, 0x0}, + {0x900b8, 0x0}, + {0x900b9, 0x0}, + {0x900ba, 0x0}, + {0x900bb, 0x0}, + {0x900bc, 0x0}, + {0x900bd, 0x0}, + {0x900be, 0x0}, + {0x900bf, 0x0}, + {0x900c0, 0x0}, + {0x900c1, 0x0}, + {0x900c2, 0x0}, + {0x900c3, 0x0}, + {0x900c4, 0x0}, + {0x900c5, 0x0}, + {0x900c6, 0x0}, + {0x900c7, 0x0}, + {0x900c8, 0x0}, + {0x900c9, 0x0}, + {0x900ca, 0x0}, + {0x900cb, 0x0}, + {0x900cc, 0x0}, + {0x900cd, 0x0}, + {0x900ce, 0x0}, + {0x900cf, 0x0}, + {0x900d0, 0x0}, + {0x900d1, 0x0}, + {0x900d2, 0x0}, + {0x900d3, 0x0}, + {0x900d4, 0x0}, + {0x900d5, 0x0}, + {0x900d6, 0x0}, + {0x900d7, 0x0}, + {0x900d8, 0x0}, + {0x900d9, 0x0}, + {0x900da, 0x0}, + {0x900db, 0x0}, + {0x900dc, 0x0}, + {0x900dd, 0x0}, + {0x900de, 0x0}, + {0x900df, 0x0}, + {0x900e0, 0x0}, + {0x900e1, 0x0}, + {0x900e2, 0x0}, + {0x900e3, 0x0}, + {0x900e4, 0x0}, + {0x900e5, 0x0}, + {0x900e6, 0x0}, + {0x900e7, 0x0}, + {0x900e8, 0x0}, + {0x900e9, 0x0}, + {0x900ea, 0x0}, + {0x900eb, 0x0}, + {0x900ec, 0x0}, + {0x900ed, 0x0}, + {0x900ee, 0x0}, + {0x900ef, 0x0}, + {0x900f0, 0x0}, + {0x900f1, 0x0}, + {0x900f2, 0x0}, + {0x900f3, 0x0}, + {0x900f4, 0x0}, + {0x900f5, 0x0}, + {0x900f6, 0x0}, + {0x900f7, 0x0}, + {0x900f8, 0x0}, + {0x900f9, 0x0}, + {0x900fa, 0x0}, + {0x900fb, 0x0}, + {0x900fc, 0x0}, + {0x900fd, 0x0}, + {0x900fe, 0x0}, + {0x900ff, 0x0}, + {0x90100, 0x0}, + {0x90101, 0x0}, + {0x90102, 0x0}, + {0x90103, 0x0}, + {0x90104, 0x0}, + {0x90105, 0x0}, + {0x90106, 0x0}, + {0x90107, 0x0}, + {0x90108, 0x0}, + {0x90109, 0x0}, + {0x9010a, 0x0}, + {0x9010b, 0x0}, + {0x9010c, 0x0}, + {0x9010d, 0x0}, + {0x9010e, 0x0}, + {0x9010f, 0x0}, + {0x90110, 0x0}, + {0x90111, 0x0}, + {0x90112, 0x0}, + {0x90113, 0x0}, + {0x90114, 0x0}, + {0x90115, 0x0}, + {0x90116, 0x0}, + {0x90117, 0x0}, + {0x90118, 0x0}, + {0x90119, 0x0}, + {0x9011a, 0x0}, + {0x9011b, 0x0}, + {0x9011c, 0x0}, + {0x9011d, 0x0}, + {0x9011e, 0x0}, + {0x9011f, 0x0}, + {0x90120, 0x0}, + {0x90121, 0x0}, + {0x90122, 0x0}, + {0x90123, 0x0}, + {0x90124, 0x0}, + {0x90125, 0x0}, + {0x90126, 0x0}, + {0x90127, 0x0}, + {0x90128, 0x0}, + {0x90129, 0x0}, + {0x9012a, 0x0}, + {0x9012b, 0x0}, + {0x9012c, 0x0}, + {0x9012d, 0x0}, + {0x9012e, 0x0}, + {0x9012f, 0x0}, + {0x90130, 0x0}, + {0x90131, 0x0}, + {0x90132, 0x0}, + {0x90133, 0x0}, + {0x90134, 0x0}, + {0x90135, 0x0}, + {0x90136, 0x0}, + {0x90137, 0x0}, + {0x90138, 0x0}, + {0x90139, 0x0}, + {0x9013a, 0x0}, + {0x9013b, 0x0}, + {0x9013c, 0x0}, + {0x9013d, 0x0}, + {0x9013e, 0x0}, + {0x9013f, 0x0}, + {0x90140, 0x0}, + {0x90141, 0x0}, + {0x90142, 0x0}, + {0x90143, 0x0}, + {0x90144, 0x0}, + {0x90145, 0x0}, + {0x90146, 0x0}, + {0x90147, 0x0}, + {0x90148, 0x0}, + {0x90149, 0x0}, + {0x9014a, 0x0}, + {0x9014b, 0x0}, + {0x9014c, 0x0}, + {0x9014d, 0x0}, + {0x9014e, 0x0}, + {0x9014f, 0x0}, + {0x90150, 0x0}, + {0x90151, 0x0}, + {0x90152, 0x0}, + {0x90153, 0x0}, + {0x90154, 0x0}, + {0x90155, 0x0}, + {0x90156, 0x0}, + {0x90157, 0x0}, + {0x90158, 0x0}, + {0x90159, 0x0}, + {0x9015a, 0x0}, + {0x9015b, 0x0}, + {0x9015c, 0x0}, + {0x9015d, 0x0}, + {0x9015e, 0x0}, + {0x9015f, 0x0}, + {0x90160, 0x0}, + {0x90161, 0x0}, + {0x90162, 0x0}, + {0x90163, 0x0}, + {0x90164, 0x0}, + {0x90165, 0x0}, + {0x90166, 0x0}, + {0x90167, 0x0}, + {0x90168, 0x0}, + {0x90169, 0x0}, + {0x9016a, 0x0}, + {0x9016b, 0x0}, + {0x9016c, 0x0}, + {0x9016d, 0x0}, + {0x9016e, 0x0}, + {0x9016f, 0x0}, + {0x90170, 0x0}, + {0x90171, 0x0}, + {0x90172, 0x0}, + {0x90173, 0x0}, + {0x90174, 0x0}, + {0x90175, 0x0}, + {0x90176, 0x0}, + {0x90177, 0x0}, + {0x90178, 0x0}, + {0x90179, 0x0}, + {0x9017a, 0x0}, + {0x9017b, 0x0}, + {0x9017c, 0x0}, + {0x9017d, 0x0}, + {0x9017e, 0x0}, + {0x9017f, 0x0}, + {0x90180, 0x0}, + {0x90181, 0x0}, + {0x90182, 0x0}, + {0x90183, 0x0}, + {0x90184, 0x0}, + {0x90006, 0x0}, + {0x90007, 0x0}, + {0x90008, 0x0}, + {0x90009, 0x0}, + {0x9000a, 0x0}, + {0x9000b, 0x0}, + {0xd00e7, 0x0}, + {0x90017, 0x0}, + {0x9001f, 0x0}, + {0x90026, 0x0}, + {0x400d0, 0x0}, + {0x400d1, 0x0}, + {0x400d2, 0x0}, + {0x400d3, 0x0}, + {0x400d4, 0x0}, + {0x400d5, 0x0}, + {0x400d6, 0x0}, + {0x400d7, 0x0}, + {0x200be, 0x0}, + {0x2000b, 0x0}, + {0x2000c, 0x0}, + {0x2000d, 0x0}, + {0x2000e, 0x0}, + {0x12000b, 0x0}, + {0x12000c, 0x0}, + {0x12000d, 0x0}, + {0x12000e, 0x0}, + {0x22000b, 0x0}, + {0x22000c, 0x0}, + {0x22000d, 0x0}, + {0x22000e, 0x0}, + {0x9000c, 0x0}, + {0x9000d, 0x0}, + {0x9000e, 0x0}, + {0x9000f, 0x0}, + {0x90010, 0x0}, + {0x90011, 0x0}, + {0x90012, 0x0}, + {0x90013, 0x0}, + {0x20010, 0x0}, + {0x20011, 0x0}, + {0x120010, 0x0}, + {0x120011, 0x0}, + {0x40080, 0x0}, + {0x40081, 0x0}, + {0x40082, 0x0}, + {0x40083, 0x0}, + {0x40084, 0x0}, + {0x40085, 0x0}, + {0x140080, 0x0}, + {0x140081, 0x0}, + {0x140082, 0x0}, + {0x140083, 0x0}, + {0x140084, 0x0}, + {0x140085, 0x0}, + {0x240080, 0x0}, + {0x240081, 0x0}, + {0x240082, 0x0}, + {0x240083, 0x0}, + {0x240084, 0x0}, + {0x240085, 0x0}, + {0x400fd, 0x0}, + {0x400f1, 0x0}, + {0x10011, 0x0}, + {0x10012, 0x0}, + {0x10013, 0x0}, + {0x10018, 0x0}, + {0x10002, 0x0}, + {0x100b2, 0x0}, + {0x101b4, 0x0}, + {0x102b4, 0x0}, + {0x103b4, 0x0}, + {0x104b4, 0x0}, + {0x105b4, 0x0}, + {0x106b4, 0x0}, + {0x107b4, 0x0}, + {0x108b4, 0x0}, + {0x11011, 0x0}, + {0x11012, 0x0}, + {0x11013, 0x0}, + {0x11018, 0x0}, + {0x11002, 0x0}, + {0x110b2, 0x0}, + {0x111b4, 0x0}, + {0x112b4, 0x0}, + {0x113b4, 0x0}, + {0x114b4, 0x0}, + {0x115b4, 0x0}, + {0x116b4, 0x0}, + {0x117b4, 0x0}, + {0x118b4, 0x0}, + {0x20089, 0x0}, + {0xc0080, 0x0}, + {0x200cb, 0x0}, + {0x10068, 0x0}, + {0x10069, 0x0}, + {0x10168, 0x0}, + {0x10169, 0x0}, + {0x10268, 0x0}, + {0x10269, 0x0}, + {0x10368, 0x0}, + {0x10369, 0x0}, + {0x10468, 0x0}, + {0x10469, 0x0}, + {0x10568, 0x0}, + {0x10569, 0x0}, + {0x10668, 0x0}, + {0x10669, 0x0}, + {0x10768, 0x0}, + {0x10769, 0x0}, + {0x10868, 0x0}, + {0x10869, 0x0}, + {0x100aa, 0x0}, + {0x10062, 0x0}, + {0x10001, 0x0}, + {0x100a0, 0x0}, + {0x100a1, 0x0}, + {0x100a2, 0x0}, + {0x100a3, 0x0}, + {0x100a4, 0x0}, + {0x100a5, 0x0}, + {0x100a6, 0x0}, + {0x100a7, 0x0}, + {0x11068, 0x0}, + {0x11069, 0x0}, + {0x11168, 0x0}, + {0x11169, 0x0}, + {0x11268, 0x0}, + {0x11269, 0x0}, + {0x11368, 0x0}, + {0x11369, 0x0}, + {0x11468, 0x0}, + {0x11469, 0x0}, + {0x11568, 0x0}, + {0x11569, 0x0}, + {0x11668, 0x0}, + {0x11669, 0x0}, + {0x11768, 0x0}, + {0x11769, 0x0}, + {0x11868, 0x0}, + {0x11869, 0x0}, + {0x110aa, 0x0}, + {0x11062, 0x0}, + {0x11001, 0x0}, + {0x110a0, 0x0}, + {0x110a1, 0x0}, + {0x110a2, 0x0}, + {0x110a3, 0x0}, + {0x110a4, 0x0}, + {0x110a5, 0x0}, + {0x110a6, 0x0}, + {0x110a7, 0x0}, + {0x80, 0x0}, + {0x1080, 0x0}, + {0x2080, 0x0}, + {0x10020, 0x0}, + {0x10080, 0x0}, + {0x10081, 0x0}, + {0x100d0, 0x0}, + {0x100d1, 0x0}, + {0x1008c, 0x0}, + {0x1008d, 0x0}, + {0x10180, 0x0}, + {0x10181, 0x0}, + {0x101d0, 0x0}, + {0x101d1, 0x0}, + {0x1018c, 0x0}, + {0x1018d, 0x0}, + {0x100c0, 0x0}, + {0x100c1, 0x0}, + {0x101c0, 0x0}, + {0x101c1, 0x0}, + {0x102c0, 0x0}, + {0x102c1, 0x0}, + {0x103c0, 0x0}, + {0x103c1, 0x0}, + {0x104c0, 0x0}, + {0x104c1, 0x0}, + {0x105c0, 0x0}, + {0x105c1, 0x0}, + {0x106c0, 0x0}, + {0x106c1, 0x0}, + {0x107c0, 0x0}, + {0x107c1, 0x0}, + {0x108c0, 0x0}, + {0x108c1, 0x0}, + {0x100ae, 0x0}, + {0x100af, 0x0}, + {0x11020, 0x0}, + {0x11080, 0x0}, + {0x11081, 0x0}, + {0x110d0, 0x0}, + {0x110d1, 0x0}, + {0x1108c, 0x0}, + {0x1108d, 0x0}, + {0x11180, 0x0}, + {0x11181, 0x0}, + {0x111d0, 0x0}, + {0x111d1, 0x0}, + {0x1118c, 0x0}, + {0x1118d, 0x0}, + {0x110c0, 0x0}, + {0x110c1, 0x0}, + {0x111c0, 0x0}, + {0x111c1, 0x0}, + {0x112c0, 0x0}, + {0x112c1, 0x0}, + {0x113c0, 0x0}, + {0x113c1, 0x0}, + {0x114c0, 0x0}, + {0x114c1, 0x0}, + {0x115c0, 0x0}, + {0x115c1, 0x0}, + {0x116c0, 0x0}, + {0x116c1, 0x0}, + {0x117c0, 0x0}, + {0x117c1, 0x0}, + {0x118c0, 0x0}, + {0x118c1, 0x0}, + {0x110ae, 0x0}, + {0x110af, 0x0}, + {0x90201, 0x0}, + {0x90202, 0x0}, + {0x90203, 0x0}, + {0x90205, 0x0}, + {0x90206, 0x0}, + {0x90207, 0x0}, + {0x90208, 0x0}, + {0x20020, 0x0}, + {0x100080, 0x0}, + {0x101080, 0x0}, + {0x102080, 0x0}, + {0x110020, 0x0}, + {0x110080, 0x0}, + {0x110081, 0x0}, + {0x1100d0, 0x0}, + {0x1100d1, 0x0}, + {0x11008c, 0x0}, + {0x11008d, 0x0}, + {0x110180, 0x0}, + {0x110181, 0x0}, + {0x1101d0, 0x0}, + {0x1101d1, 0x0}, + {0x11018c, 0x0}, + {0x11018d, 0x0}, + {0x1100c0, 0x0}, + {0x1100c1, 0x0}, + {0x1101c0, 0x0}, + {0x1101c1, 0x0}, + {0x1102c0, 0x0}, + {0x1102c1, 0x0}, + {0x1103c0, 0x0}, + {0x1103c1, 0x0}, + {0x1104c0, 0x0}, + {0x1104c1, 0x0}, + {0x1105c0, 0x0}, + {0x1105c1, 0x0}, + {0x1106c0, 0x0}, + {0x1106c1, 0x0}, + {0x1107c0, 0x0}, + {0x1107c1, 0x0}, + {0x1108c0, 0x0}, + {0x1108c1, 0x0}, + {0x1100ae, 0x0}, + {0x1100af, 0x0}, + {0x111020, 0x0}, + {0x111080, 0x0}, + {0x111081, 0x0}, + {0x1110d0, 0x0}, + {0x1110d1, 0x0}, + {0x11108c, 0x0}, + {0x11108d, 0x0}, + {0x111180, 0x0}, + {0x111181, 0x0}, + {0x1111d0, 0x0}, + {0x1111d1, 0x0}, + {0x11118c, 0x0}, + {0x11118d, 0x0}, + {0x1110c0, 0x0}, + {0x1110c1, 0x0}, + {0x1111c0, 0x0}, + {0x1111c1, 0x0}, + {0x1112c0, 0x0}, + {0x1112c1, 0x0}, + {0x1113c0, 0x0}, + {0x1113c1, 0x0}, + {0x1114c0, 0x0}, + {0x1114c1, 0x0}, + {0x1115c0, 0x0}, + {0x1115c1, 0x0}, + {0x1116c0, 0x0}, + {0x1116c1, 0x0}, + {0x1117c0, 0x0}, + {0x1117c1, 0x0}, + {0x1118c0, 0x0}, + {0x1118c1, 0x0}, + {0x1110ae, 0x0}, + {0x1110af, 0x0}, + {0x190201, 0x0}, + {0x190202, 0x0}, + {0x190203, 0x0}, + {0x190205, 0x0}, + {0x190206, 0x0}, + {0x190207, 0x0}, + {0x190208, 0x0}, + {0x120020, 0x0}, + {0x200080, 0x0}, + {0x201080, 0x0}, + {0x202080, 0x0}, + {0x210020, 0x0}, + {0x210080, 0x0}, + {0x210081, 0x0}, + {0x2100d0, 0x0}, + {0x2100d1, 0x0}, + {0x21008c, 0x0}, + {0x21008d, 0x0}, + {0x210180, 0x0}, + {0x210181, 0x0}, + {0x2101d0, 0x0}, + {0x2101d1, 0x0}, + {0x21018c, 0x0}, + {0x21018d, 0x0}, + {0x2100c0, 0x0}, + {0x2100c1, 0x0}, + {0x2101c0, 0x0}, + {0x2101c1, 0x0}, + {0x2102c0, 0x0}, + {0x2102c1, 0x0}, + {0x2103c0, 0x0}, + {0x2103c1, 0x0}, + {0x2104c0, 0x0}, + {0x2104c1, 0x0}, + {0x2105c0, 0x0}, + {0x2105c1, 0x0}, + {0x2106c0, 0x0}, + {0x2106c1, 0x0}, + {0x2107c0, 0x0}, + {0x2107c1, 0x0}, + {0x2108c0, 0x0}, + {0x2108c1, 0x0}, + {0x2100ae, 0x0}, + {0x2100af, 0x0}, + {0x211020, 0x0}, + {0x211080, 0x0}, + {0x211081, 0x0}, + {0x2110d0, 0x0}, + {0x2110d1, 0x0}, + {0x21108c, 0x0}, + {0x21108d, 0x0}, + {0x211180, 0x0}, + {0x211181, 0x0}, + {0x2111d0, 0x0}, + {0x2111d1, 0x0}, + {0x21118c, 0x0}, + {0x21118d, 0x0}, + {0x2110c0, 0x0}, + {0x2110c1, 0x0}, + {0x2111c0, 0x0}, + {0x2111c1, 0x0}, + {0x2112c0, 0x0}, + {0x2112c1, 0x0}, + {0x2113c0, 0x0}, + {0x2113c1, 0x0}, + {0x2114c0, 0x0}, + {0x2114c1, 0x0}, + {0x2115c0, 0x0}, + {0x2115c1, 0x0}, + {0x2116c0, 0x0}, + {0x2116c1, 0x0}, + {0x2117c0, 0x0}, + {0x2117c1, 0x0}, + {0x2118c0, 0x0}, + {0x2118c1, 0x0}, + {0x2110ae, 0x0}, + {0x2110af, 0x0}, + {0x290201, 0x0}, + {0x290202, 0x0}, + {0x290203, 0x0}, + {0x290205, 0x0}, + {0x290206, 0x0}, + {0x290207, 0x0}, + {0x290208, 0x0}, + {0x220020, 0x0}, + {0x20077, 0x0}, + {0x20072, 0x0}, + {0x20073, 0x0}, + {0x400c0, 0x0}, + {0x10040, 0x0}, + {0x10140, 0x0}, + {0x10240, 0x0}, + {0x10340, 0x0}, + {0x10440, 0x0}, + {0x10540, 0x0}, + {0x10640, 0x0}, + {0x10740, 0x0}, + {0x10840, 0x0}, + {0x11040, 0x0}, + {0x11140, 0x0}, + {0x11240, 0x0}, + {0x11340, 0x0}, + {0x11440, 0x0}, + {0x11540, 0x0}, + {0x11640, 0x0}, + {0x11740, 0x0}, + {0x11840, 0x0}, +}; + +/* P0 message block parameter for training firmware */ +static struct dram_cfg_param ddr_fsp0_cfg[] = { + {0xd0000, 0x0}, + {0x54003, 0xe94}, + {0x54004, 0x4}, + {0x54006, 0x15}, + {0x54008, 0x131f}, + {0x54009, 0xc8}, + {0x5400b, 0x4}, + {0x5400d, 0x100}, + {0x5400f, 0x100}, + {0x54012, 0x110}, + {0x54019, 0x36e4}, + {0x5401a, 0x32}, + {0x5401b, 0x1146}, + {0x5401c, 0x1108}, + {0x5401e, 0x4}, + {0x5401f, 0x36e4}, + {0x54020, 0x32}, + {0x54021, 0x1146}, + {0x54022, 0x1108}, + {0x54024, 0x4}, + {0x54032, 0xe400}, + {0x54033, 0x3236}, + {0x54034, 0x4600}, + {0x54035, 0x811}, + {0x54036, 0x11}, + {0x54037, 0x400}, + {0x54038, 0xe400}, + {0x54039, 0x3236}, + {0x5403a, 0x4600}, + {0x5403b, 0x811}, + {0x5403c, 0x11}, + {0x5403d, 0x400}, + {0xd0000, 0x1} +}; + +/* P1 message block parameter for training firmware */ +static struct dram_cfg_param ddr_fsp1_cfg[] = { + {0xd0000, 0x0}, + {0x54002, 0x1}, + {0x54003, 0x74a}, + {0x54004, 0x4}, + {0x54006, 0x15}, + {0x54008, 0x121f}, + {0x54009, 0xc8}, + {0x5400b, 0x4}, + {0x5400d, 0x100}, + {0x5400f, 0x100}, + {0x54012, 0x110}, + {0x54019, 0x1bb4}, + {0x5401a, 0x32}, + {0x5401b, 0x1146}, + {0x5401c, 0x1108}, + {0x5401e, 0x4}, + {0x5401f, 0x1bb4}, + {0x54020, 0x32}, + {0x54021, 0x1146}, + {0x54022, 0x1108}, + {0x54024, 0x4}, + {0x54032, 0xb400}, + {0x54033, 0x321b}, + {0x54034, 0x4600}, + {0x54035, 0x811}, + {0x54036, 0x11}, + {0x54037, 0x400}, + {0x54038, 0xb400}, + {0x54039, 0x321b}, + {0x5403a, 0x4600}, + {0x5403b, 0x811}, + {0x5403c, 0x11}, + {0x5403d, 0x400}, + {0xd0000, 0x1} +}; + +/* P2 message block parameter for training firmware */ +static struct dram_cfg_param ddr_fsp2_cfg[] = { + {0xd0000, 0x0}, + {0x54002, 0x102}, + {0x54003, 0x270}, + {0x54004, 0x4}, + {0x54006, 0x15}, + {0x54008, 0x121f}, + {0x54009, 0xc8}, + {0x5400b, 0x4}, + {0x5400d, 0x100}, + {0x5400f, 0x100}, + {0x54012, 0x110}, + {0x54019, 0x994}, + {0x5401a, 0x32}, + {0x5401b, 0x1146}, + {0x5401c, 0x1100}, + {0x5401e, 0x4}, + {0x5401f, 0x994}, + {0x54020, 0x32}, + {0x54021, 0x1146}, + {0x54022, 0x1100}, + {0x54024, 0x4}, + {0x54032, 0x9400}, + {0x54033, 0x3209}, + {0x54034, 0x4600}, + {0x54035, 0x11}, + {0x54036, 0x11}, + {0x54037, 0x400}, + {0x54038, 0x9400}, + {0x54039, 0x3209}, + {0x5403a, 0x4600}, + {0x5403b, 0x11}, + {0x5403c, 0x11}, + {0x5403d, 0x400}, + {0xd0000, 0x1} +}; + +/* P0 2D message block parameter for training firmware */ +static struct dram_cfg_param ddr_fsp0_2d_cfg[] = { + {0xd0000, 0x0}, + {0x54003, 0xe94}, + {0x54004, 0x4}, + {0x54006, 0x15}, + {0x54008, 0x61}, + {0x54009, 0xc8}, + {0x5400b, 0x4}, + {0x5400d, 0x100}, + {0x5400f, 0x100}, + {0x54010, 0x2080}, + {0x54012, 0x110}, + {0x54019, 0x36e4}, + {0x5401a, 0x32}, + {0x5401b, 0x1146}, + {0x5401c, 0x1108}, + {0x5401e, 0x4}, + {0x5401f, 0x36e4}, + {0x54020, 0x32}, + {0x54021, 0x1146}, + {0x54022, 0x1108}, + {0x54024, 0x4}, + {0x54032, 0xe400}, + {0x54033, 0x3236}, + {0x54034, 0x4600}, + {0x54035, 0x811}, + {0x54036, 0x11}, + {0x54037, 0x400}, + {0x54038, 0xe400}, + {0x54039, 0x3236}, + {0x5403a, 0x4600}, + {0x5403b, 0x811}, + {0x5403c, 0x11}, + {0x5403d, 0x400}, + {0xd0000, 0x1} +}; + +/* DRAM PHY init engine image */ +static struct dram_cfg_param ddr_phy_pie[] = { + {0xd0000, 0x0}, + {0x90000, 0x10}, + {0x90001, 0x400}, + {0x90002, 0x10e}, + {0x90003, 0x0}, + {0x90004, 0x0}, + {0x90005, 0x8}, + {0x90029, 0xb}, + {0x9002a, 0x480}, + {0x9002b, 0x109}, + {0x9002c, 0x8}, + {0x9002d, 0x448}, + {0x9002e, 0x139}, + {0x9002f, 0x8}, + {0x90030, 0x478}, + {0x90031, 0x109}, + {0x90032, 0x0}, + {0x90033, 0xe8}, + {0x90034, 0x109}, + {0x90035, 0x2}, + {0x90036, 0x10}, + {0x90037, 0x139}, + {0x90038, 0xb}, + {0x90039, 0x7c0}, + {0x9003a, 0x139}, + {0x9003b, 0x44}, + {0x9003c, 0x633}, + {0x9003d, 0x159}, + {0x9003e, 0x14f}, + {0x9003f, 0x630}, + {0x90040, 0x159}, + {0x90041, 0x47}, + {0x90042, 0x633}, + {0x90043, 0x149}, + {0x90044, 0x4f}, + {0x90045, 0x633}, + {0x90046, 0x179}, + {0x90047, 0x8}, + {0x90048, 0xe0}, + {0x90049, 0x109}, + {0x9004a, 0x0}, + {0x9004b, 0x7c8}, + {0x9004c, 0x109}, + {0x9004d, 0x0}, + {0x9004e, 0x1}, + {0x9004f, 0x8}, + {0x90050, 0x30}, + {0x90051, 0x65a}, + {0x90052, 0x9}, + {0x90053, 0x0}, + {0x90054, 0x45a}, + {0x90055, 0x9}, + {0x90056, 0x0}, + {0x90057, 0x448}, + {0x90058, 0x109}, + {0x90059, 0x40}, + {0x9005a, 0x633}, + {0x9005b, 0x179}, + {0x9005c, 0x1}, + {0x9005d, 0x618}, + {0x9005e, 0x109}, + {0x9005f, 0x40c0}, + {0x90060, 0x633}, + {0x90061, 0x149}, + {0x90062, 0x8}, + {0x90063, 0x4}, + {0x90064, 0x48}, + {0x90065, 0x4040}, + {0x90066, 0x633}, + {0x90067, 0x149}, + {0x90068, 0x0}, + {0x90069, 0x4}, + {0x9006a, 0x48}, + {0x9006b, 0x40}, + {0x9006c, 0x633}, + {0x9006d, 0x149}, + {0x9006e, 0x0}, + {0x9006f, 0x658}, + {0x90070, 0x109}, + {0x90071, 0x10}, + {0x90072, 0x4}, + {0x90073, 0x18}, + {0x90074, 0x0}, + {0x90075, 0x4}, + {0x90076, 0x78}, + {0x90077, 0x549}, + {0x90078, 0x633}, + {0x90079, 0x159}, + {0x9007a, 0xd49}, + {0x9007b, 0x633}, + {0x9007c, 0x159}, + {0x9007d, 0x94a}, + {0x9007e, 0x633}, + {0x9007f, 0x159}, + {0x90080, 0x441}, + {0x90081, 0x633}, + {0x90082, 0x149}, + {0x90083, 0x42}, + {0x90084, 0x633}, + {0x90085, 0x149}, + {0x90086, 0x1}, + {0x90087, 0x633}, + {0x90088, 0x149}, + {0x90089, 0x0}, + {0x9008a, 0xe0}, + {0x9008b, 0x109}, + {0x9008c, 0xa}, + {0x9008d, 0x10}, + {0x9008e, 0x109}, + {0x9008f, 0x9}, + {0x90090, 0x3c0}, + {0x90091, 0x149}, + {0x90092, 0x9}, + {0x90093, 0x3c0}, + {0x90094, 0x159}, + {0x90095, 0x18}, + {0x90096, 0x10}, + {0x90097, 0x109}, + {0x90098, 0x0}, + {0x90099, 0x3c0}, + {0x9009a, 0x109}, + {0x9009b, 0x18}, + {0x9009c, 0x4}, + {0x9009d, 0x48}, + {0x9009e, 0x18}, + {0x9009f, 0x4}, + {0x900a0, 0x58}, + {0x900a1, 0xb}, + {0x900a2, 0x10}, + {0x900a3, 0x109}, + {0x900a4, 0x1}, + {0x900a5, 0x10}, + {0x900a6, 0x109}, + {0x900a7, 0x5}, + {0x900a8, 0x7c0}, + {0x900a9, 0x109}, + {0x40000, 0x811}, + {0x40020, 0x880}, + {0x40040, 0x0}, + {0x40060, 0x0}, + {0x40001, 0x4008}, + {0x40021, 0x83}, + {0x40041, 0x4f}, + {0x40061, 0x0}, + {0x40002, 0x4040}, + {0x40022, 0x83}, + {0x40042, 0x51}, + {0x40062, 0x0}, + {0x40003, 0x811}, + {0x40023, 0x880}, + {0x40043, 0x0}, + {0x40063, 0x0}, + {0x40004, 0x720}, + {0x40024, 0xf}, + {0x40044, 0x1740}, + {0x40064, 0x0}, + {0x40005, 0x16}, + {0x40025, 0x83}, + {0x40045, 0x4b}, + {0x40065, 0x0}, + {0x40006, 0x716}, + {0x40026, 0xf}, + {0x40046, 0x2001}, + {0x40066, 0x0}, + {0x40007, 0x716}, + {0x40027, 0xf}, + {0x40047, 0x2800}, + {0x40067, 0x0}, + {0x40008, 0x716}, + {0x40028, 0xf}, + {0x40048, 0xf00}, + {0x40068, 0x0}, + {0x40009, 0x720}, + {0x40029, 0xf}, + {0x40049, 0x1400}, + {0x40069, 0x0}, + {0x4000a, 0xe08}, + {0x4002a, 0xc15}, + {0x4004a, 0x0}, + {0x4006a, 0x0}, + {0x4000b, 0x625}, + {0x4002b, 0x15}, + {0x4004b, 0x0}, + {0x4006b, 0x0}, + {0x4000c, 0x4028}, + {0x4002c, 0x80}, + {0x4004c, 0x0}, + {0x4006c, 0x0}, + {0x4000d, 0xe08}, + {0x4002d, 0xc1a}, + {0x4004d, 0x0}, + {0x4006d, 0x0}, + {0x4000e, 0x625}, + {0x4002e, 0x1a}, + {0x4004e, 0x0}, + {0x4006e, 0x0}, + {0x4000f, 0x4040}, + {0x4002f, 0x80}, + {0x4004f, 0x0}, + {0x4006f, 0x0}, + {0x40010, 0x2604}, + {0x40030, 0x15}, + {0x40050, 0x0}, + {0x40070, 0x0}, + {0x40011, 0x708}, + {0x40031, 0x5}, + {0x40051, 0x0}, + {0x40071, 0x2002}, + {0x40012, 0x8}, + {0x40032, 0x80}, + {0x40052, 0x0}, + {0x40072, 0x0}, + {0x40013, 0x2604}, + {0x40033, 0x1a}, + {0x40053, 0x0}, + {0x40073, 0x0}, + {0x40014, 0x708}, + {0x40034, 0xa}, + {0x40054, 0x0}, + {0x40074, 0x2002}, + {0x40015, 0x4040}, + {0x40035, 0x80}, + {0x40055, 0x0}, + {0x40075, 0x0}, + {0x40016, 0x60a}, + {0x40036, 0x15}, + {0x40056, 0x1200}, + {0x40076, 0x0}, + {0x40017, 0x61a}, + {0x40037, 0x15}, + {0x40057, 0x1300}, + {0x40077, 0x0}, + {0x40018, 0x60a}, + {0x40038, 0x1a}, + {0x40058, 0x1200}, + {0x40078, 0x0}, + {0x40019, 0x642}, + {0x40039, 0x1a}, + {0x40059, 0x1300}, + {0x40079, 0x0}, + {0x4001a, 0x4808}, + {0x4003a, 0x880}, + {0x4005a, 0x0}, + {0x4007a, 0x0}, + {0x900aa, 0x0}, + {0x900ab, 0x790}, + {0x900ac, 0x11a}, + {0x900ad, 0x8}, + {0x900ae, 0x7aa}, + {0x900af, 0x2a}, + {0x900b0, 0x10}, + {0x900b1, 0x7b2}, + {0x900b2, 0x2a}, + {0x900b3, 0x0}, + {0x900b4, 0x7c8}, + {0x900b5, 0x109}, + {0x900b6, 0x10}, + {0x900b7, 0x10}, + {0x900b8, 0x109}, + {0x900b9, 0x10}, + {0x900ba, 0x2a8}, + {0x900bb, 0x129}, + {0x900bc, 0x8}, + {0x900bd, 0x370}, + {0x900be, 0x129}, + {0x900bf, 0xa}, + {0x900c0, 0x3c8}, + {0x900c1, 0x1a9}, + {0x900c2, 0xc}, + {0x900c3, 0x408}, + {0x900c4, 0x199}, + {0x900c5, 0x14}, + {0x900c6, 0x790}, + {0x900c7, 0x11a}, + {0x900c8, 0x8}, + {0x900c9, 0x4}, + {0x900ca, 0x18}, + {0x900cb, 0xe}, + {0x900cc, 0x408}, + {0x900cd, 0x199}, + {0x900ce, 0x8}, + {0x900cf, 0x8568}, + {0x900d0, 0x108}, + {0x900d1, 0x18}, + {0x900d2, 0x790}, + {0x900d3, 0x16a}, + {0x900d4, 0x8}, + {0x900d5, 0x1d8}, + {0x900d6, 0x169}, + {0x900d7, 0x10}, + {0x900d8, 0x8558}, + {0x900d9, 0x168}, + {0x900da, 0x1ff8}, + {0x900db, 0x85a8}, + {0x900dc, 0x1e8}, + {0x900dd, 0x50}, + {0x900de, 0x798}, + {0x900df, 0x16a}, + {0x900e0, 0x60}, + {0x900e1, 0x7a0}, + {0x900e2, 0x16a}, + {0x900e3, 0x8}, + {0x900e4, 0x8310}, + {0x900e5, 0x168}, + {0x900e6, 0x8}, + {0x900e7, 0xa310}, + {0x900e8, 0x168}, + {0x900e9, 0xa}, + {0x900ea, 0x408}, + {0x900eb, 0x169}, + {0x900ec, 0x6e}, + {0x900ed, 0x0}, + {0x900ee, 0x68}, + {0x900ef, 0x0}, + {0x900f0, 0x408}, + {0x900f1, 0x169}, + {0x900f2, 0x0}, + {0x900f3, 0x8310}, + {0x900f4, 0x168}, + {0x900f5, 0x0}, + {0x900f6, 0xa310}, + {0x900f7, 0x168}, + {0x900f8, 0x1ff8}, + {0x900f9, 0x85a8}, + {0x900fa, 0x1e8}, + {0x900fb, 0x68}, + {0x900fc, 0x798}, + {0x900fd, 0x16a}, + {0x900fe, 0x78}, + {0x900ff, 0x7a0}, + {0x90100, 0x16a}, + {0x90101, 0x68}, + {0x90102, 0x790}, + {0x90103, 0x16a}, + {0x90104, 0x8}, + {0x90105, 0x8b10}, + {0x90106, 0x168}, + {0x90107, 0x8}, + {0x90108, 0xab10}, + {0x90109, 0x168}, + {0x9010a, 0xa}, + {0x9010b, 0x408}, + {0x9010c, 0x169}, + {0x9010d, 0x58}, + {0x9010e, 0x0}, + {0x9010f, 0x68}, + {0x90110, 0x0}, + {0x90111, 0x408}, + {0x90112, 0x169}, + {0x90113, 0x0}, + {0x90114, 0x8b10}, + {0x90115, 0x168}, + {0x90116, 0x1}, + {0x90117, 0xab10}, + {0x90118, 0x168}, + {0x90119, 0x0}, + {0x9011a, 0x1d8}, + {0x9011b, 0x169}, + {0x9011c, 0x80}, + {0x9011d, 0x790}, + {0x9011e, 0x16a}, + {0x9011f, 0x18}, + {0x90120, 0x7aa}, + {0x90121, 0x6a}, + {0x90122, 0xa}, + {0x90123, 0x0}, + {0x90124, 0x1e9}, + {0x90125, 0x8}, + {0x90126, 0x8080}, + {0x90127, 0x108}, + {0x90128, 0xf}, + {0x90129, 0x408}, + {0x9012a, 0x169}, + {0x9012b, 0xc}, + {0x9012c, 0x0}, + {0x9012d, 0x68}, + {0x9012e, 0x9}, + {0x9012f, 0x0}, + {0x90130, 0x1a9}, + {0x90131, 0x0}, + {0x90132, 0x408}, + {0x90133, 0x169}, + {0x90134, 0x0}, + {0x90135, 0x8080}, + {0x90136, 0x108}, + {0x90137, 0x8}, + {0x90138, 0x7aa}, + {0x90139, 0x6a}, + {0x9013a, 0x0}, + {0x9013b, 0x8568}, + {0x9013c, 0x108}, + {0x9013d, 0xb7}, + {0x9013e, 0x790}, + {0x9013f, 0x16a}, + {0x90140, 0x1f}, + {0x90141, 0x0}, + {0x90142, 0x68}, + {0x90143, 0x8}, + {0x90144, 0x8558}, + {0x90145, 0x168}, + {0x90146, 0xf}, + {0x90147, 0x408}, + {0x90148, 0x169}, + {0x90149, 0xd}, + {0x9014a, 0x0}, + {0x9014b, 0x68}, + {0x9014c, 0x0}, + {0x9014d, 0x408}, + {0x9014e, 0x169}, + {0x9014f, 0x0}, + {0x90150, 0x8558}, + {0x90151, 0x168}, + {0x90152, 0x8}, + {0x90153, 0x3c8}, + {0x90154, 0x1a9}, + {0x90155, 0x3}, + {0x90156, 0x370}, + {0x90157, 0x129}, + {0x90158, 0x20}, + {0x90159, 0x2aa}, + {0x9015a, 0x9}, + {0x9015b, 0x8}, + {0x9015c, 0xe8}, + {0x9015d, 0x109}, + {0x9015e, 0x0}, + {0x9015f, 0x8140}, + {0x90160, 0x10c}, + {0x90161, 0x10}, + {0x90162, 0x8138}, + {0x90163, 0x104}, + {0x90164, 0x8}, + {0x90165, 0x448}, + {0x90166, 0x109}, + {0x90167, 0xf}, + {0x90168, 0x7c0}, + {0x90169, 0x109}, + {0x9016a, 0x0}, + {0x9016b, 0xe8}, + {0x9016c, 0x109}, + {0x9016d, 0x47}, + {0x9016e, 0x630}, + {0x9016f, 0x109}, + {0x90170, 0x8}, + {0x90171, 0x618}, + {0x90172, 0x109}, + {0x90173, 0x8}, + {0x90174, 0xe0}, + {0x90175, 0x109}, + {0x90176, 0x0}, + {0x90177, 0x7c8}, + {0x90178, 0x109}, + {0x90179, 0x8}, + {0x9017a, 0x8140}, + {0x9017b, 0x10c}, + {0x9017c, 0x0}, + {0x9017d, 0x478}, + {0x9017e, 0x109}, + {0x9017f, 0x0}, + {0x90180, 0x1}, + {0x90181, 0x8}, + {0x90182, 0x8}, + {0x90183, 0x4}, + {0x90184, 0x0}, + {0x90006, 0x8}, + {0x90007, 0x7c8}, + {0x90008, 0x109}, + {0x90009, 0x0}, + {0x9000a, 0x400}, + {0x9000b, 0x106}, + {0xd00e7, 0x400}, + {0x90017, 0x0}, + {0x9001f, 0x2b}, + {0x90026, 0x69}, + {0x400d0, 0x0}, + {0x400d1, 0x101}, + {0x400d2, 0x105}, + {0x400d3, 0x107}, + {0x400d4, 0x10f}, + {0x400d5, 0x202}, + {0x400d6, 0x20a}, + {0x400d7, 0x20b}, + {0x2003a, 0x2}, + {0x200be, 0x3}, + {0x2000b, 0x41a}, + {0x2000c, 0xe9}, + {0x2000d, 0x91c}, + {0x2000e, 0x2c}, + {0x12000b, 0x20d}, + {0x12000c, 0x74}, + {0x12000d, 0x48e}, + {0x12000e, 0x2c}, + {0x22000b, 0xb0}, + {0x22000c, 0x27}, + {0x22000d, 0x186}, + {0x22000e, 0x10}, + {0x9000c, 0x0}, + {0x9000d, 0x173}, + {0x9000e, 0x60}, + {0x9000f, 0x6110}, + {0x90010, 0x2152}, + {0x90011, 0xdfbd}, + {0x90012, 0x2060}, + {0x90013, 0x6152}, + {0x20010, 0x5a}, + {0x20011, 0x3}, + {0x120010, 0x5a}, + {0x120011, 0x3}, + {0x40080, 0xe0}, + {0x40081, 0x12}, + {0x40082, 0xe0}, + {0x40083, 0x12}, + {0x40084, 0xe0}, + {0x40085, 0x12}, + {0x140080, 0xe0}, + {0x140081, 0x12}, + {0x140082, 0xe0}, + {0x140083, 0x12}, + {0x140084, 0xe0}, + {0x140085, 0x12}, + {0x240080, 0xe0}, + {0x240081, 0x12}, + {0x240082, 0xe0}, + {0x240083, 0x12}, + {0x240084, 0xe0}, + {0x240085, 0x12}, + {0x400fd, 0xf}, + {0x400f1, 0xe}, + {0x10011, 0x1}, + {0x10012, 0x1}, + {0x10013, 0x180}, + {0x10018, 0x1}, + {0x10002, 0x6209}, + {0x100b2, 0x1}, + {0x101b4, 0x1}, + {0x102b4, 0x1}, + {0x103b4, 0x1}, + {0x104b4, 0x1}, + {0x105b4, 0x1}, + {0x106b4, 0x1}, + {0x107b4, 0x1}, + {0x108b4, 0x1}, + {0x11011, 0x1}, + {0x11012, 0x1}, + {0x11013, 0x180}, + {0x11018, 0x1}, + {0x11002, 0x6209}, + {0x110b2, 0x1}, + {0x111b4, 0x1}, + {0x112b4, 0x1}, + {0x113b4, 0x1}, + {0x114b4, 0x1}, + {0x115b4, 0x1}, + {0x116b4, 0x1}, + {0x117b4, 0x1}, + {0x118b4, 0x1}, + {0x20089, 0x1}, + {0x20088, 0x19}, + {0xc0080, 0x0}, + {0xd0000, 0x1}, +}; + +static struct dram_fsp_msg ddr_dram_fsp_msg[] = { + { + /* P0 3733mts 1D */ + .drate = 3733, + .fw_type = FW_1D_IMAGE, + .fsp_cfg = ddr_fsp0_cfg, + .fsp_cfg_num = ARRAY_SIZE(ddr_fsp0_cfg), + }, + { + /* P1 1866mts 1D */ + .drate = 1866, + .fw_type = FW_1D_IMAGE, + .fsp_cfg = ddr_fsp1_cfg, + .fsp_cfg_num = ARRAY_SIZE(ddr_fsp1_cfg), + }, + { + /* P2 625mts 1D */ + .drate = 625, + .fw_type = FW_1D_IMAGE, + .fsp_cfg = ddr_fsp2_cfg, + .fsp_cfg_num = ARRAY_SIZE(ddr_fsp2_cfg), + }, + { + /* P0 3733mts 2D */ + .drate = 3733, + .fw_type = FW_2D_IMAGE, + .fsp_cfg = ddr_fsp0_2d_cfg, + .fsp_cfg_num = ARRAY_SIZE(ddr_fsp0_2d_cfg), + }, +}; + +/* ddr timing config params */ +struct dram_timing_info dram_timing_1GB = { + .ddrc_cfg = ddr_ddrc_cfg, + .ddrc_cfg_num = ARRAY_SIZE(ddr_ddrc_cfg), + .ddrphy_cfg = ddr_ddrphy_cfg, + .ddrphy_cfg_num = ARRAY_SIZE(ddr_ddrphy_cfg), + .fsp_msg = ddr_dram_fsp_msg, + .fsp_msg_num = ARRAY_SIZE(ddr_dram_fsp_msg), + .ddrphy_trained_csr = ddr_ddrphy_trained_csr, + .ddrphy_trained_csr_num = ARRAY_SIZE(ddr_ddrphy_trained_csr), + .ddrphy_pie = ddr_phy_pie, + .ddrphy_pie_num = ARRAY_SIZE(ddr_phy_pie), + .fsp_table = { 3733, 1866, 625, }, + .fsp_cfg = ddr_dram_fsp_cfg, + .fsp_cfg_num = ARRAY_SIZE(ddr_dram_fsp_cfg), +}; diff --git a/board/freescale/imx93_frdm/lpddr4x_2gb_timing.c b/board/freescale/imx93_frdm/lpddr4x_2gb_timing.c new file mode 100644 index 00000000000..cd129e12959 --- /dev/null +++ b/board/freescale/imx93_frdm/lpddr4x_2gb_timing.c @@ -0,0 +1,1995 @@ +// SPDX-License-Identifier: BSD-3-Clause +/* + * Copyright 2025 NXP + * + * Code generated with DDR Tool v3.4.0_8.3-4e2b550a. + * DDR PHY FW2022.01 + */ + +#include <linux/kernel.h> +#include <asm/arch/ddr.h> + +/* Initialize DDRC registers */ +static struct dram_cfg_param ddr_ddrc_cfg[] = { + {0x4e300110, 0x44100001}, + {0x4e300000, 0x8000ff}, + {0x4e300008, 0x0}, + {0x4e300080, 0x80000512}, + {0x4e300084, 0x0}, + {0x4e300114, 0x1002}, + {0x4e300260, 0x80}, + {0x4e300f04, 0x80}, + {0x4e300800, 0x43b30002}, + {0x4e300804, 0x1f1f1f1f}, + {0x4e301000, 0x0}, + {0x4e301240, 0x0}, + {0x4e301244, 0x0}, + {0x4e301248, 0x0}, + {0x4e30124c, 0x0}, + {0x4e301250, 0x0}, + {0x4e301254, 0x0}, + {0x4e301258, 0x0}, + {0x4e30125c, 0x0}, +}; + +/* dram fsp cfg */ +static struct dram_fsp_cfg ddr_dram_fsp_cfg[] = { + { + { + {0x4e300100, 0x24AB321B}, + {0x4e300104, 0xF8EE001B}, + {0x4e300108, 0x2F2EE233}, + {0x4e30010C, 0x0005E18B}, + {0x4e300124, 0x1C760000}, + {0x4e300160, 0x00009102}, + {0x4e30016C, 0x35F00000}, + {0x4e300170, 0x8B0B0608}, + {0x4e300250, 0x00000028}, + {0x4e300254, 0x015B015B}, + {0x4e300258, 0x00000008}, + {0x4e30025C, 0x00000400}, + {0x4e300300, 0x224F2213}, + {0x4e300304, 0x015B2213}, + {0x4e300308, 0x0A3C0E3D}, + }, + { + {0x01, 0xE4}, + {0x02, 0x36}, + {0x03, 0x32}, + {0x0b, 0x46}, + {0x0c, 0x11}, + {0x0e, 0x11}, + {0x16, 0x04}, + }, + 0, + }, + { + { + {0x4e300100, 0x12552100}, + {0x4e300104, 0xF877000E}, + {0x4e300108, 0x1816B4AA}, + {0x4e30010C, 0x005101E6}, + {0x4e300124, 0x0E3C0000}, + {0x4e300160, 0x00009101}, + {0x4e30016C, 0x30900000}, + {0x4e300170, 0x8A0A0508}, + {0x4e300250, 0x00000014}, + {0x4e300254, 0x00AA00AA}, + {0x4e300258, 0x00000008}, + {0x4e30025C, 0x00000400}, + }, + { + {0x01, 0xB4}, + {0x02, 0x1B}, + {0x03, 0x32}, + {0x0b, 0x46}, + {0x0c, 0x11}, + {0x0e, 0x11}, + {0x16, 0x04}, + }, + 0, + }, + { + { + {0x4e300100, 0x00061000}, + {0x4e300104, 0xF855000A}, + {0x4e300108, 0x6E62FA48}, + {0x4e30010C, 0x0031010D}, + {0x4e300124, 0x04C50000}, + {0x4e300160, 0x00009100}, + {0x4e30016C, 0x30000000}, + {0x4e300170, 0x89090408}, + {0x4e300250, 0x00000007}, + {0x4e300254, 0x00340034}, + {0x4e300258, 0x00000008}, + {0x4e30025C, 0x00000400}, + }, + { + {0x01, 0x94}, + {0x02, 0x9}, + {0x03, 0x32}, + {0x0b, 0x46}, + {0x0c, 0x11}, + {0x0e, 0x11}, + {0x16, 0x04}, + }, + 1, + }, +}; + +/* PHY Initialize Configuration */ +static struct dram_cfg_param ddr_ddrphy_cfg[] = { + {0x100a0, 0x4}, + {0x100a1, 0x5}, + {0x100a2, 0x6}, + {0x100a3, 0x7}, + {0x100a4, 0x0}, + {0x100a5, 0x1}, + {0x100a6, 0x2}, + {0x100a7, 0x3}, + {0x110a0, 0x3}, + {0x110a1, 0x2}, + {0x110a2, 0x0}, + {0x110a3, 0x1}, + {0x110a4, 0x7}, + {0x110a5, 0x6}, + {0x110a6, 0x4}, + {0x110a7, 0x5}, + {0x1005f, 0x5ff}, + {0x1015f, 0x5ff}, + {0x1105f, 0x5ff}, + {0x1115f, 0x5ff}, + {0x11005f, 0x5ff}, + {0x11015f, 0x5ff}, + {0x11105f, 0x5ff}, + {0x11115f, 0x5ff}, + {0x21005f, 0x5ff}, + {0x21015f, 0x5ff}, + {0x21105f, 0x5ff}, + {0x21115f, 0x5ff}, + {0x55, 0x1ff}, + {0x1055, 0x1ff}, + {0x2055, 0x1ff}, + {0x200c5, 0x19}, + {0x1200c5, 0xb}, + {0x2200c5, 0x7}, + {0x2002e, 0x2}, + {0x12002e, 0x2}, + {0x22002e, 0x2}, + {0x90204, 0x0}, + {0x190204, 0x0}, + {0x290204, 0x0}, + {0x20024, 0x1e3}, + {0x2003a, 0x2}, + {0x2007d, 0x212}, + {0x2007c, 0x61}, + {0x120024, 0x1e3}, + {0x2003a, 0x2}, + {0x12007d, 0x212}, + {0x12007c, 0x61}, + {0x220024, 0x1e3}, + {0x2003a, 0x2}, + {0x22007d, 0x212}, + {0x22007c, 0x61}, + {0x20056, 0x3}, + {0x120056, 0x3}, + {0x220056, 0x3}, + {0x1004d, 0x600}, + {0x1014d, 0x600}, + {0x1104d, 0x600}, + {0x1114d, 0x600}, + {0x11004d, 0x600}, + {0x11014d, 0x600}, + {0x11104d, 0x600}, + {0x11114d, 0x600}, + {0x21004d, 0x600}, + {0x21014d, 0x600}, + {0x21104d, 0x600}, + {0x21114d, 0x600}, + {0x10049, 0xe00}, + {0x10149, 0xe00}, + {0x11049, 0xe00}, + {0x11149, 0xe00}, + {0x110049, 0xe00}, + {0x110149, 0xe00}, + {0x111049, 0xe00}, + {0x111149, 0xe00}, + {0x210049, 0xe00}, + {0x210149, 0xe00}, + {0x211049, 0xe00}, + {0x211149, 0xe00}, + {0x43, 0x60}, + {0x1043, 0x60}, + {0x2043, 0x60}, + {0x20018, 0x1}, + {0x20075, 0x4}, + {0x20050, 0x0}, + {0x2009b, 0x2}, + {0x20008, 0x3a5}, + {0x120008, 0x1d3}, + {0x220008, 0x9c}, + {0x20088, 0x9}, + {0x200b2, 0x10c}, + {0x10043, 0x5a1}, + {0x10143, 0x5a1}, + {0x11043, 0x5a1}, + {0x11143, 0x5a1}, + {0x1200b2, 0x10c}, + {0x110043, 0x5a1}, + {0x110143, 0x5a1}, + {0x111043, 0x5a1}, + {0x111143, 0x5a1}, + {0x2200b2, 0x10c}, + {0x210043, 0x5a1}, + {0x210143, 0x5a1}, + {0x211043, 0x5a1}, + {0x211143, 0x5a1}, + {0x200fa, 0x2}, + {0x1200fa, 0x2}, + {0x2200fa, 0x2}, + {0x20019, 0x1}, + {0x120019, 0x1}, + {0x220019, 0x1}, + {0x200f0, 0x600}, + {0x200f1, 0x0}, + {0x200f2, 0x4444}, + {0x200f3, 0x8888}, + {0x200f4, 0x5655}, + {0x200f5, 0x0}, + {0x200f6, 0x0}, + {0x200f7, 0xf000}, + {0x1004a, 0x500}, + {0x1104a, 0x500}, + {0x20025, 0x0}, + {0x2002d, 0x0}, + {0x12002d, 0x0}, + {0x22002d, 0x0}, + {0x2002c, 0x0}, + {0x20021, 0x0}, + {0x200c7, 0x21}, + {0x1200c7, 0x21}, + {0x200ca, 0x24}, + {0x1200ca, 0x24}, +}; + +/* ddr phy trained csr */ +static struct dram_cfg_param ddr_ddrphy_trained_csr[] = { + {0x1005f, 0x0}, + {0x1015f, 0x0}, + {0x1105f, 0x0}, + {0x1115f, 0x0}, + {0x11005f, 0x0}, + {0x11015f, 0x0}, + {0x11105f, 0x0}, + {0x11115f, 0x0}, + {0x21005f, 0x0}, + {0x21015f, 0x0}, + {0x21105f, 0x0}, + {0x21115f, 0x0}, + {0x55, 0x0}, + {0x1055, 0x0}, + {0x2055, 0x0}, + {0x200c5, 0x0}, + {0x1200c5, 0x0}, + {0x2200c5, 0x0}, + {0x2002e, 0x0}, + {0x12002e, 0x0}, + {0x22002e, 0x0}, + {0x90204, 0x0}, + {0x190204, 0x0}, + {0x290204, 0x0}, + {0x20024, 0x0}, + {0x2003a, 0x0}, + {0x2007d, 0x0}, + {0x2007c, 0x0}, + {0x120024, 0x0}, + {0x12007d, 0x0}, + {0x12007c, 0x0}, + {0x220024, 0x0}, + {0x22007d, 0x0}, + {0x22007c, 0x0}, + {0x20056, 0x0}, + {0x120056, 0x0}, + {0x220056, 0x0}, + {0x1004d, 0x0}, + {0x1014d, 0x0}, + {0x1104d, 0x0}, + {0x1114d, 0x0}, + {0x11004d, 0x0}, + {0x11014d, 0x0}, + {0x11104d, 0x0}, + {0x11114d, 0x0}, + {0x21004d, 0x0}, + {0x21014d, 0x0}, + {0x21104d, 0x0}, + {0x21114d, 0x0}, + {0x10049, 0x0}, + {0x10149, 0x0}, + {0x11049, 0x0}, + {0x11149, 0x0}, + {0x110049, 0x0}, + {0x110149, 0x0}, + {0x111049, 0x0}, + {0x111149, 0x0}, + {0x210049, 0x0}, + {0x210149, 0x0}, + {0x211049, 0x0}, + {0x211149, 0x0}, + {0x43, 0x0}, + {0x1043, 0x0}, + {0x2043, 0x0}, + {0x20018, 0x0}, + {0x20075, 0x0}, + {0x20050, 0x0}, + {0x2009b, 0x0}, + {0x20008, 0x0}, + {0x120008, 0x0}, + {0x220008, 0x0}, + {0x20088, 0x0}, + {0x200b2, 0x0}, + {0x10043, 0x0}, + {0x10143, 0x0}, + {0x11043, 0x0}, + {0x11143, 0x0}, + {0x1200b2, 0x0}, + {0x110043, 0x0}, + {0x110143, 0x0}, + {0x111043, 0x0}, + {0x111143, 0x0}, + {0x2200b2, 0x0}, + {0x210043, 0x0}, + {0x210143, 0x0}, + {0x211043, 0x0}, + {0x211143, 0x0}, + {0x200fa, 0x0}, + {0x1200fa, 0x0}, + {0x2200fa, 0x0}, + {0x20019, 0x0}, + {0x120019, 0x0}, + {0x220019, 0x0}, + {0x200f0, 0x0}, + {0x200f1, 0x0}, + {0x200f2, 0x0}, + {0x200f3, 0x0}, + {0x200f4, 0x0}, + {0x200f5, 0x0}, + {0x200f6, 0x0}, + {0x200f7, 0x0}, + {0x1004a, 0x0}, + {0x1104a, 0x0}, + {0x20025, 0x0}, + {0x2002d, 0x0}, + {0x12002d, 0x0}, + {0x22002d, 0x0}, + {0x2002c, 0x0}, + {0xd0000, 0x0}, + {0x90000, 0x0}, + {0x90001, 0x0}, + {0x90002, 0x0}, + {0x90003, 0x0}, + {0x90004, 0x0}, + {0x90005, 0x0}, + {0x90029, 0x0}, + {0x9002a, 0x0}, + {0x9002b, 0x0}, + {0x9002c, 0x0}, + {0x9002d, 0x0}, + {0x9002e, 0x0}, + {0x9002f, 0x0}, + {0x90030, 0x0}, + {0x90031, 0x0}, + {0x90032, 0x0}, + {0x90033, 0x0}, + {0x90034, 0x0}, + {0x90035, 0x0}, + {0x90036, 0x0}, + {0x90037, 0x0}, + {0x90038, 0x0}, + {0x90039, 0x0}, + {0x9003a, 0x0}, + {0x9003b, 0x0}, + {0x9003c, 0x0}, + {0x9003d, 0x0}, + {0x9003e, 0x0}, + {0x9003f, 0x0}, + {0x90040, 0x0}, + {0x90041, 0x0}, + {0x90042, 0x0}, + {0x90043, 0x0}, + {0x90044, 0x0}, + {0x90045, 0x0}, + {0x90046, 0x0}, + {0x90047, 0x0}, + {0x90048, 0x0}, + {0x90049, 0x0}, + {0x9004a, 0x0}, + {0x9004b, 0x0}, + {0x9004c, 0x0}, + {0x9004d, 0x0}, + {0x9004e, 0x0}, + {0x9004f, 0x0}, + {0x90050, 0x0}, + {0x90051, 0x0}, + {0x90052, 0x0}, + {0x90053, 0x0}, + {0x90054, 0x0}, + {0x90055, 0x0}, + {0x90056, 0x0}, + {0x90057, 0x0}, + {0x90058, 0x0}, + {0x90059, 0x0}, + {0x9005a, 0x0}, + {0x9005b, 0x0}, + {0x9005c, 0x0}, + {0x9005d, 0x0}, + {0x9005e, 0x0}, + {0x9005f, 0x0}, + {0x90060, 0x0}, + {0x90061, 0x0}, + {0x90062, 0x0}, + {0x90063, 0x0}, + {0x90064, 0x0}, + {0x90065, 0x0}, + {0x90066, 0x0}, + {0x90067, 0x0}, + {0x90068, 0x0}, + {0x90069, 0x0}, + {0x9006a, 0x0}, + {0x9006b, 0x0}, + {0x9006c, 0x0}, + {0x9006d, 0x0}, + {0x9006e, 0x0}, + {0x9006f, 0x0}, + {0x90070, 0x0}, + {0x90071, 0x0}, + {0x90072, 0x0}, + {0x90073, 0x0}, + {0x90074, 0x0}, + {0x90075, 0x0}, + {0x90076, 0x0}, + {0x90077, 0x0}, + {0x90078, 0x0}, + {0x90079, 0x0}, + {0x9007a, 0x0}, + {0x9007b, 0x0}, + {0x9007c, 0x0}, + {0x9007d, 0x0}, + {0x9007e, 0x0}, + {0x9007f, 0x0}, + {0x90080, 0x0}, + {0x90081, 0x0}, + {0x90082, 0x0}, + {0x90083, 0x0}, + {0x90084, 0x0}, + {0x90085, 0x0}, + {0x90086, 0x0}, + {0x90087, 0x0}, + {0x90088, 0x0}, + {0x90089, 0x0}, + {0x9008a, 0x0}, + {0x9008b, 0x0}, + {0x9008c, 0x0}, + {0x9008d, 0x0}, + {0x9008e, 0x0}, + {0x9008f, 0x0}, + {0x90090, 0x0}, + {0x90091, 0x0}, + {0x90092, 0x0}, + {0x90093, 0x0}, + {0x90094, 0x0}, + {0x90095, 0x0}, + {0x90096, 0x0}, + {0x90097, 0x0}, + {0x90098, 0x0}, + {0x90099, 0x0}, + {0x9009a, 0x0}, + {0x9009b, 0x0}, + {0x9009c, 0x0}, + {0x9009d, 0x0}, + {0x9009e, 0x0}, + {0x9009f, 0x0}, + {0x900a0, 0x0}, + {0x900a1, 0x0}, + {0x900a2, 0x0}, + {0x900a3, 0x0}, + {0x900a4, 0x0}, + {0x900a5, 0x0}, + {0x900a6, 0x0}, + {0x900a7, 0x0}, + {0x900a8, 0x0}, + {0x900a9, 0x0}, + {0x40000, 0x0}, + {0x40020, 0x0}, + {0x40040, 0x0}, + {0x40060, 0x0}, + {0x40001, 0x0}, + {0x40021, 0x0}, + {0x40041, 0x0}, + {0x40061, 0x0}, + {0x40002, 0x0}, + {0x40022, 0x0}, + {0x40042, 0x0}, + {0x40062, 0x0}, + {0x40003, 0x0}, + {0x40023, 0x0}, + {0x40043, 0x0}, + {0x40063, 0x0}, + {0x40004, 0x0}, + {0x40024, 0x0}, + {0x40044, 0x0}, + {0x40064, 0x0}, + {0x40005, 0x0}, + {0x40025, 0x0}, + {0x40045, 0x0}, + {0x40065, 0x0}, + {0x40006, 0x0}, + {0x40026, 0x0}, + {0x40046, 0x0}, + {0x40066, 0x0}, + {0x40007, 0x0}, + {0x40027, 0x0}, + {0x40047, 0x0}, + {0x40067, 0x0}, + {0x40008, 0x0}, + {0x40028, 0x0}, + {0x40048, 0x0}, + {0x40068, 0x0}, + {0x40009, 0x0}, + {0x40029, 0x0}, + {0x40049, 0x0}, + {0x40069, 0x0}, + {0x4000a, 0x0}, + {0x4002a, 0x0}, + {0x4004a, 0x0}, + {0x4006a, 0x0}, + {0x4000b, 0x0}, + {0x4002b, 0x0}, + {0x4004b, 0x0}, + {0x4006b, 0x0}, + {0x4000c, 0x0}, + {0x4002c, 0x0}, + {0x4004c, 0x0}, + {0x4006c, 0x0}, + {0x4000d, 0x0}, + {0x4002d, 0x0}, + {0x4004d, 0x0}, + {0x4006d, 0x0}, + {0x4000e, 0x0}, + {0x4002e, 0x0}, + {0x4004e, 0x0}, + {0x4006e, 0x0}, + {0x4000f, 0x0}, + {0x4002f, 0x0}, + {0x4004f, 0x0}, + {0x4006f, 0x0}, + {0x40010, 0x0}, + {0x40030, 0x0}, + {0x40050, 0x0}, + {0x40070, 0x0}, + {0x40011, 0x0}, + {0x40031, 0x0}, + {0x40051, 0x0}, + {0x40071, 0x0}, + {0x40012, 0x0}, + {0x40032, 0x0}, + {0x40052, 0x0}, + {0x40072, 0x0}, + {0x40013, 0x0}, + {0x40033, 0x0}, + {0x40053, 0x0}, + {0x40073, 0x0}, + {0x40014, 0x0}, + {0x40034, 0x0}, + {0x40054, 0x0}, + {0x40074, 0x0}, + {0x40015, 0x0}, + {0x40035, 0x0}, + {0x40055, 0x0}, + {0x40075, 0x0}, + {0x40016, 0x0}, + {0x40036, 0x0}, + {0x40056, 0x0}, + {0x40076, 0x0}, + {0x40017, 0x0}, + {0x40037, 0x0}, + {0x40057, 0x0}, + {0x40077, 0x0}, + {0x40018, 0x0}, + {0x40038, 0x0}, + {0x40058, 0x0}, + {0x40078, 0x0}, + {0x40019, 0x0}, + {0x40039, 0x0}, + {0x40059, 0x0}, + {0x40079, 0x0}, + {0x4001a, 0x0}, + {0x4003a, 0x0}, + {0x4005a, 0x0}, + {0x4007a, 0x0}, + {0x900aa, 0x0}, + {0x900ab, 0x0}, + {0x900ac, 0x0}, + {0x900ad, 0x0}, + {0x900ae, 0x0}, + {0x900af, 0x0}, + {0x900b0, 0x0}, + {0x900b1, 0x0}, + {0x900b2, 0x0}, + {0x900b3, 0x0}, + {0x900b4, 0x0}, + {0x900b5, 0x0}, + {0x900b6, 0x0}, + {0x900b7, 0x0}, + {0x900b8, 0x0}, + {0x900b9, 0x0}, + {0x900ba, 0x0}, + {0x900bb, 0x0}, + {0x900bc, 0x0}, + {0x900bd, 0x0}, + {0x900be, 0x0}, + {0x900bf, 0x0}, + {0x900c0, 0x0}, + {0x900c1, 0x0}, + {0x900c2, 0x0}, + {0x900c3, 0x0}, + {0x900c4, 0x0}, + {0x900c5, 0x0}, + {0x900c6, 0x0}, + {0x900c7, 0x0}, + {0x900c8, 0x0}, + {0x900c9, 0x0}, + {0x900ca, 0x0}, + {0x900cb, 0x0}, + {0x900cc, 0x0}, + {0x900cd, 0x0}, + {0x900ce, 0x0}, + {0x900cf, 0x0}, + {0x900d0, 0x0}, + {0x900d1, 0x0}, + {0x900d2, 0x0}, + {0x900d3, 0x0}, + {0x900d4, 0x0}, + {0x900d5, 0x0}, + {0x900d6, 0x0}, + {0x900d7, 0x0}, + {0x900d8, 0x0}, + {0x900d9, 0x0}, + {0x900da, 0x0}, + {0x900db, 0x0}, + {0x900dc, 0x0}, + {0x900dd, 0x0}, + {0x900de, 0x0}, + {0x900df, 0x0}, + {0x900e0, 0x0}, + {0x900e1, 0x0}, + {0x900e2, 0x0}, + {0x900e3, 0x0}, + {0x900e4, 0x0}, + {0x900e5, 0x0}, + {0x900e6, 0x0}, + {0x900e7, 0x0}, + {0x900e8, 0x0}, + {0x900e9, 0x0}, + {0x900ea, 0x0}, + {0x900eb, 0x0}, + {0x900ec, 0x0}, + {0x900ed, 0x0}, + {0x900ee, 0x0}, + {0x900ef, 0x0}, + {0x900f0, 0x0}, + {0x900f1, 0x0}, + {0x900f2, 0x0}, + {0x900f3, 0x0}, + {0x900f4, 0x0}, + {0x900f5, 0x0}, + {0x900f6, 0x0}, + {0x900f7, 0x0}, + {0x900f8, 0x0}, + {0x900f9, 0x0}, + {0x900fa, 0x0}, + {0x900fb, 0x0}, + {0x900fc, 0x0}, + {0x900fd, 0x0}, + {0x900fe, 0x0}, + {0x900ff, 0x0}, + {0x90100, 0x0}, + {0x90101, 0x0}, + {0x90102, 0x0}, + {0x90103, 0x0}, + {0x90104, 0x0}, + {0x90105, 0x0}, + {0x90106, 0x0}, + {0x90107, 0x0}, + {0x90108, 0x0}, + {0x90109, 0x0}, + {0x9010a, 0x0}, + {0x9010b, 0x0}, + {0x9010c, 0x0}, + {0x9010d, 0x0}, + {0x9010e, 0x0}, + {0x9010f, 0x0}, + {0x90110, 0x0}, + {0x90111, 0x0}, + {0x90112, 0x0}, + {0x90113, 0x0}, + {0x90114, 0x0}, + {0x90115, 0x0}, + {0x90116, 0x0}, + {0x90117, 0x0}, + {0x90118, 0x0}, + {0x90119, 0x0}, + {0x9011a, 0x0}, + {0x9011b, 0x0}, + {0x9011c, 0x0}, + {0x9011d, 0x0}, + {0x9011e, 0x0}, + {0x9011f, 0x0}, + {0x90120, 0x0}, + {0x90121, 0x0}, + {0x90122, 0x0}, + {0x90123, 0x0}, + {0x90124, 0x0}, + {0x90125, 0x0}, + {0x90126, 0x0}, + {0x90127, 0x0}, + {0x90128, 0x0}, + {0x90129, 0x0}, + {0x9012a, 0x0}, + {0x9012b, 0x0}, + {0x9012c, 0x0}, + {0x9012d, 0x0}, + {0x9012e, 0x0}, + {0x9012f, 0x0}, + {0x90130, 0x0}, + {0x90131, 0x0}, + {0x90132, 0x0}, + {0x90133, 0x0}, + {0x90134, 0x0}, + {0x90135, 0x0}, + {0x90136, 0x0}, + {0x90137, 0x0}, + {0x90138, 0x0}, + {0x90139, 0x0}, + {0x9013a, 0x0}, + {0x9013b, 0x0}, + {0x9013c, 0x0}, + {0x9013d, 0x0}, + {0x9013e, 0x0}, + {0x9013f, 0x0}, + {0x90140, 0x0}, + {0x90141, 0x0}, + {0x90142, 0x0}, + {0x90143, 0x0}, + {0x90144, 0x0}, + {0x90145, 0x0}, + {0x90146, 0x0}, + {0x90147, 0x0}, + {0x90148, 0x0}, + {0x90149, 0x0}, + {0x9014a, 0x0}, + {0x9014b, 0x0}, + {0x9014c, 0x0}, + {0x9014d, 0x0}, + {0x9014e, 0x0}, + {0x9014f, 0x0}, + {0x90150, 0x0}, + {0x90151, 0x0}, + {0x90152, 0x0}, + {0x90153, 0x0}, + {0x90154, 0x0}, + {0x90155, 0x0}, + {0x90156, 0x0}, + {0x90157, 0x0}, + {0x90158, 0x0}, + {0x90159, 0x0}, + {0x9015a, 0x0}, + {0x9015b, 0x0}, + {0x9015c, 0x0}, + {0x9015d, 0x0}, + {0x9015e, 0x0}, + {0x9015f, 0x0}, + {0x90160, 0x0}, + {0x90161, 0x0}, + {0x90162, 0x0}, + {0x90163, 0x0}, + {0x90164, 0x0}, + {0x90165, 0x0}, + {0x90166, 0x0}, + {0x90167, 0x0}, + {0x90168, 0x0}, + {0x90169, 0x0}, + {0x9016a, 0x0}, + {0x9016b, 0x0}, + {0x9016c, 0x0}, + {0x9016d, 0x0}, + {0x9016e, 0x0}, + {0x9016f, 0x0}, + {0x90170, 0x0}, + {0x90171, 0x0}, + {0x90172, 0x0}, + {0x90173, 0x0}, + {0x90174, 0x0}, + {0x90175, 0x0}, + {0x90176, 0x0}, + {0x90177, 0x0}, + {0x90178, 0x0}, + {0x90179, 0x0}, + {0x9017a, 0x0}, + {0x9017b, 0x0}, + {0x9017c, 0x0}, + {0x9017d, 0x0}, + {0x9017e, 0x0}, + {0x9017f, 0x0}, + {0x90180, 0x0}, + {0x90181, 0x0}, + {0x90182, 0x0}, + {0x90183, 0x0}, + {0x90184, 0x0}, + {0x90006, 0x0}, + {0x90007, 0x0}, + {0x90008, 0x0}, + {0x90009, 0x0}, + {0x9000a, 0x0}, + {0x9000b, 0x0}, + {0xd00e7, 0x0}, + {0x90017, 0x0}, + {0x9001f, 0x0}, + {0x90026, 0x0}, + {0x400d0, 0x0}, + {0x400d1, 0x0}, + {0x400d2, 0x0}, + {0x400d3, 0x0}, + {0x400d4, 0x0}, + {0x400d5, 0x0}, + {0x400d6, 0x0}, + {0x400d7, 0x0}, + {0x200be, 0x0}, + {0x2000b, 0x0}, + {0x2000c, 0x0}, + {0x2000d, 0x0}, + {0x2000e, 0x0}, + {0x12000b, 0x0}, + {0x12000c, 0x0}, + {0x12000d, 0x0}, + {0x12000e, 0x0}, + {0x22000b, 0x0}, + {0x22000c, 0x0}, + {0x22000d, 0x0}, + {0x22000e, 0x0}, + {0x9000c, 0x0}, + {0x9000d, 0x0}, + {0x9000e, 0x0}, + {0x9000f, 0x0}, + {0x90010, 0x0}, + {0x90011, 0x0}, + {0x90012, 0x0}, + {0x90013, 0x0}, + {0x20010, 0x0}, + {0x20011, 0x0}, + {0x120010, 0x0}, + {0x120011, 0x0}, + {0x40080, 0x0}, + {0x40081, 0x0}, + {0x40082, 0x0}, + {0x40083, 0x0}, + {0x40084, 0x0}, + {0x40085, 0x0}, + {0x140080, 0x0}, + {0x140081, 0x0}, + {0x140082, 0x0}, + {0x140083, 0x0}, + {0x140084, 0x0}, + {0x140085, 0x0}, + {0x240080, 0x0}, + {0x240081, 0x0}, + {0x240082, 0x0}, + {0x240083, 0x0}, + {0x240084, 0x0}, + {0x240085, 0x0}, + {0x400fd, 0x0}, + {0x400f1, 0x0}, + {0x10011, 0x0}, + {0x10012, 0x0}, + {0x10013, 0x0}, + {0x10018, 0x0}, + {0x10002, 0x0}, + {0x100b2, 0x0}, + {0x101b4, 0x0}, + {0x102b4, 0x0}, + {0x103b4, 0x0}, + {0x104b4, 0x0}, + {0x105b4, 0x0}, + {0x106b4, 0x0}, + {0x107b4, 0x0}, + {0x108b4, 0x0}, + {0x11011, 0x0}, + {0x11012, 0x0}, + {0x11013, 0x0}, + {0x11018, 0x0}, + {0x11002, 0x0}, + {0x110b2, 0x0}, + {0x111b4, 0x0}, + {0x112b4, 0x0}, + {0x113b4, 0x0}, + {0x114b4, 0x0}, + {0x115b4, 0x0}, + {0x116b4, 0x0}, + {0x117b4, 0x0}, + {0x118b4, 0x0}, + {0x20089, 0x0}, + {0xc0080, 0x0}, + {0x200cb, 0x0}, + {0x10068, 0x0}, + {0x10069, 0x0}, + {0x10168, 0x0}, + {0x10169, 0x0}, + {0x10268, 0x0}, + {0x10269, 0x0}, + {0x10368, 0x0}, + {0x10369, 0x0}, + {0x10468, 0x0}, + {0x10469, 0x0}, + {0x10568, 0x0}, + {0x10569, 0x0}, + {0x10668, 0x0}, + {0x10669, 0x0}, + {0x10768, 0x0}, + {0x10769, 0x0}, + {0x10868, 0x0}, + {0x10869, 0x0}, + {0x100aa, 0x0}, + {0x10062, 0x0}, + {0x10001, 0x0}, + {0x100a0, 0x0}, + {0x100a1, 0x0}, + {0x100a2, 0x0}, + {0x100a3, 0x0}, + {0x100a4, 0x0}, + {0x100a5, 0x0}, + {0x100a6, 0x0}, + {0x100a7, 0x0}, + {0x11068, 0x0}, + {0x11069, 0x0}, + {0x11168, 0x0}, + {0x11169, 0x0}, + {0x11268, 0x0}, + {0x11269, 0x0}, + {0x11368, 0x0}, + {0x11369, 0x0}, + {0x11468, 0x0}, + {0x11469, 0x0}, + {0x11568, 0x0}, + {0x11569, 0x0}, + {0x11668, 0x0}, + {0x11669, 0x0}, + {0x11768, 0x0}, + {0x11769, 0x0}, + {0x11868, 0x0}, + {0x11869, 0x0}, + {0x110aa, 0x0}, + {0x11062, 0x0}, + {0x11001, 0x0}, + {0x110a0, 0x0}, + {0x110a1, 0x0}, + {0x110a2, 0x0}, + {0x110a3, 0x0}, + {0x110a4, 0x0}, + {0x110a5, 0x0}, + {0x110a6, 0x0}, + {0x110a7, 0x0}, + {0x80, 0x0}, + {0x1080, 0x0}, + {0x2080, 0x0}, + {0x10020, 0x0}, + {0x10080, 0x0}, + {0x10081, 0x0}, + {0x100d0, 0x0}, + {0x100d1, 0x0}, + {0x1008c, 0x0}, + {0x1008d, 0x0}, + {0x10180, 0x0}, + {0x10181, 0x0}, + {0x101d0, 0x0}, + {0x101d1, 0x0}, + {0x1018c, 0x0}, + {0x1018d, 0x0}, + {0x100c0, 0x0}, + {0x100c1, 0x0}, + {0x101c0, 0x0}, + {0x101c1, 0x0}, + {0x102c0, 0x0}, + {0x102c1, 0x0}, + {0x103c0, 0x0}, + {0x103c1, 0x0}, + {0x104c0, 0x0}, + {0x104c1, 0x0}, + {0x105c0, 0x0}, + {0x105c1, 0x0}, + {0x106c0, 0x0}, + {0x106c1, 0x0}, + {0x107c0, 0x0}, + {0x107c1, 0x0}, + {0x108c0, 0x0}, + {0x108c1, 0x0}, + {0x100ae, 0x0}, + {0x100af, 0x0}, + {0x11020, 0x0}, + {0x11080, 0x0}, + {0x11081, 0x0}, + {0x110d0, 0x0}, + {0x110d1, 0x0}, + {0x1108c, 0x0}, + {0x1108d, 0x0}, + {0x11180, 0x0}, + {0x11181, 0x0}, + {0x111d0, 0x0}, + {0x111d1, 0x0}, + {0x1118c, 0x0}, + {0x1118d, 0x0}, + {0x110c0, 0x0}, + {0x110c1, 0x0}, + {0x111c0, 0x0}, + {0x111c1, 0x0}, + {0x112c0, 0x0}, + {0x112c1, 0x0}, + {0x113c0, 0x0}, + {0x113c1, 0x0}, + {0x114c0, 0x0}, + {0x114c1, 0x0}, + {0x115c0, 0x0}, + {0x115c1, 0x0}, + {0x116c0, 0x0}, + {0x116c1, 0x0}, + {0x117c0, 0x0}, + {0x117c1, 0x0}, + {0x118c0, 0x0}, + {0x118c1, 0x0}, + {0x110ae, 0x0}, + {0x110af, 0x0}, + {0x90201, 0x0}, + {0x90202, 0x0}, + {0x90203, 0x0}, + {0x90205, 0x0}, + {0x90206, 0x0}, + {0x90207, 0x0}, + {0x90208, 0x0}, + {0x20020, 0x0}, + {0x100080, 0x0}, + {0x101080, 0x0}, + {0x102080, 0x0}, + {0x110020, 0x0}, + {0x110080, 0x0}, + {0x110081, 0x0}, + {0x1100d0, 0x0}, + {0x1100d1, 0x0}, + {0x11008c, 0x0}, + {0x11008d, 0x0}, + {0x110180, 0x0}, + {0x110181, 0x0}, + {0x1101d0, 0x0}, + {0x1101d1, 0x0}, + {0x11018c, 0x0}, + {0x11018d, 0x0}, + {0x1100c0, 0x0}, + {0x1100c1, 0x0}, + {0x1101c0, 0x0}, + {0x1101c1, 0x0}, + {0x1102c0, 0x0}, + {0x1102c1, 0x0}, + {0x1103c0, 0x0}, + {0x1103c1, 0x0}, + {0x1104c0, 0x0}, + {0x1104c1, 0x0}, + {0x1105c0, 0x0}, + {0x1105c1, 0x0}, + {0x1106c0, 0x0}, + {0x1106c1, 0x0}, + {0x1107c0, 0x0}, + {0x1107c1, 0x0}, + {0x1108c0, 0x0}, + {0x1108c1, 0x0}, + {0x1100ae, 0x0}, + {0x1100af, 0x0}, + {0x111020, 0x0}, + {0x111080, 0x0}, + {0x111081, 0x0}, + {0x1110d0, 0x0}, + {0x1110d1, 0x0}, + {0x11108c, 0x0}, + {0x11108d, 0x0}, + {0x111180, 0x0}, + {0x111181, 0x0}, + {0x1111d0, 0x0}, + {0x1111d1, 0x0}, + {0x11118c, 0x0}, + {0x11118d, 0x0}, + {0x1110c0, 0x0}, + {0x1110c1, 0x0}, + {0x1111c0, 0x0}, + {0x1111c1, 0x0}, + {0x1112c0, 0x0}, + {0x1112c1, 0x0}, + {0x1113c0, 0x0}, + {0x1113c1, 0x0}, + {0x1114c0, 0x0}, + {0x1114c1, 0x0}, + {0x1115c0, 0x0}, + {0x1115c1, 0x0}, + {0x1116c0, 0x0}, + {0x1116c1, 0x0}, + {0x1117c0, 0x0}, + {0x1117c1, 0x0}, + {0x1118c0, 0x0}, + {0x1118c1, 0x0}, + {0x1110ae, 0x0}, + {0x1110af, 0x0}, + {0x190201, 0x0}, + {0x190202, 0x0}, + {0x190203, 0x0}, + {0x190205, 0x0}, + {0x190206, 0x0}, + {0x190207, 0x0}, + {0x190208, 0x0}, + {0x120020, 0x0}, + {0x200080, 0x0}, + {0x201080, 0x0}, + {0x202080, 0x0}, + {0x210020, 0x0}, + {0x210080, 0x0}, + {0x210081, 0x0}, + {0x2100d0, 0x0}, + {0x2100d1, 0x0}, + {0x21008c, 0x0}, + {0x21008d, 0x0}, + {0x210180, 0x0}, + {0x210181, 0x0}, + {0x2101d0, 0x0}, + {0x2101d1, 0x0}, + {0x21018c, 0x0}, + {0x21018d, 0x0}, + {0x2100c0, 0x0}, + {0x2100c1, 0x0}, + {0x2101c0, 0x0}, + {0x2101c1, 0x0}, + {0x2102c0, 0x0}, + {0x2102c1, 0x0}, + {0x2103c0, 0x0}, + {0x2103c1, 0x0}, + {0x2104c0, 0x0}, + {0x2104c1, 0x0}, + {0x2105c0, 0x0}, + {0x2105c1, 0x0}, + {0x2106c0, 0x0}, + {0x2106c1, 0x0}, + {0x2107c0, 0x0}, + {0x2107c1, 0x0}, + {0x2108c0, 0x0}, + {0x2108c1, 0x0}, + {0x2100ae, 0x0}, + {0x2100af, 0x0}, + {0x211020, 0x0}, + {0x211080, 0x0}, + {0x211081, 0x0}, + {0x2110d0, 0x0}, + {0x2110d1, 0x0}, + {0x21108c, 0x0}, + {0x21108d, 0x0}, + {0x211180, 0x0}, + {0x211181, 0x0}, + {0x2111d0, 0x0}, + {0x2111d1, 0x0}, + {0x21118c, 0x0}, + {0x21118d, 0x0}, + {0x2110c0, 0x0}, + {0x2110c1, 0x0}, + {0x2111c0, 0x0}, + {0x2111c1, 0x0}, + {0x2112c0, 0x0}, + {0x2112c1, 0x0}, + {0x2113c0, 0x0}, + {0x2113c1, 0x0}, + {0x2114c0, 0x0}, + {0x2114c1, 0x0}, + {0x2115c0, 0x0}, + {0x2115c1, 0x0}, + {0x2116c0, 0x0}, + {0x2116c1, 0x0}, + {0x2117c0, 0x0}, + {0x2117c1, 0x0}, + {0x2118c0, 0x0}, + {0x2118c1, 0x0}, + {0x2110ae, 0x0}, + {0x2110af, 0x0}, + {0x290201, 0x0}, + {0x290202, 0x0}, + {0x290203, 0x0}, + {0x290205, 0x0}, + {0x290206, 0x0}, + {0x290207, 0x0}, + {0x290208, 0x0}, + {0x220020, 0x0}, + {0x20077, 0x0}, + {0x20072, 0x0}, + {0x20073, 0x0}, + {0x400c0, 0x0}, + {0x10040, 0x0}, + {0x10140, 0x0}, + {0x10240, 0x0}, + {0x10340, 0x0}, + {0x10440, 0x0}, + {0x10540, 0x0}, + {0x10640, 0x0}, + {0x10740, 0x0}, + {0x10840, 0x0}, + {0x11040, 0x0}, + {0x11140, 0x0}, + {0x11240, 0x0}, + {0x11340, 0x0}, + {0x11440, 0x0}, + {0x11540, 0x0}, + {0x11640, 0x0}, + {0x11740, 0x0}, + {0x11840, 0x0}, +}; + +/* P0 message block parameter for training firmware */ +static struct dram_cfg_param ddr_fsp0_cfg[] = { + {0xd0000, 0x0}, + {0x54003, 0xe94}, + {0x54004, 0x4}, + {0x54006, 0x15}, + {0x54008, 0x131f}, + {0x54009, 0xc8}, + {0x5400b, 0x4}, + {0x5400d, 0x100}, + {0x5400f, 0x100}, + {0x54012, 0x110}, + {0x54019, 0x36e4}, + {0x5401a, 0x32}, + {0x5401b, 0x1146}, + {0x5401c, 0x1108}, + {0x5401e, 0x4}, + {0x5401f, 0x36e4}, + {0x54020, 0x32}, + {0x54021, 0x1146}, + {0x54022, 0x1108}, + {0x54024, 0x4}, + {0x54032, 0xe400}, + {0x54033, 0x3236}, + {0x54034, 0x4600}, + {0x54035, 0x811}, + {0x54036, 0x11}, + {0x54037, 0x400}, + {0x54038, 0xe400}, + {0x54039, 0x3236}, + {0x5403a, 0x4600}, + {0x5403b, 0x811}, + {0x5403c, 0x11}, + {0x5403d, 0x400}, + {0xd0000, 0x1} +}; + +/* P1 message block parameter for training firmware */ +static struct dram_cfg_param ddr_fsp1_cfg[] = { + {0xd0000, 0x0}, + {0x54002, 0x1}, + {0x54003, 0x74a}, + {0x54004, 0x4}, + {0x54006, 0x15}, + {0x54008, 0x121f}, + {0x54009, 0xc8}, + {0x5400b, 0x4}, + {0x5400d, 0x100}, + {0x5400f, 0x100}, + {0x54012, 0x110}, + {0x54019, 0x1bb4}, + {0x5401a, 0x32}, + {0x5401b, 0x1146}, + {0x5401c, 0x1108}, + {0x5401e, 0x4}, + {0x5401f, 0x1bb4}, + {0x54020, 0x32}, + {0x54021, 0x1146}, + {0x54022, 0x1108}, + {0x54024, 0x4}, + {0x54032, 0xb400}, + {0x54033, 0x321b}, + {0x54034, 0x4600}, + {0x54035, 0x811}, + {0x54036, 0x11}, + {0x54037, 0x400}, + {0x54038, 0xb400}, + {0x54039, 0x321b}, + {0x5403a, 0x4600}, + {0x5403b, 0x811}, + {0x5403c, 0x11}, + {0x5403d, 0x400}, + {0xd0000, 0x1} +}; + +/* P2 message block parameter for training firmware */ +static struct dram_cfg_param ddr_fsp2_cfg[] = { + {0xd0000, 0x0}, + {0x54002, 0x102}, + {0x54003, 0x270}, + {0x54004, 0x4}, + {0x54006, 0x15}, + {0x54008, 0x121f}, + {0x54009, 0xc8}, + {0x5400b, 0x4}, + {0x5400d, 0x100}, + {0x5400f, 0x100}, + {0x54012, 0x110}, + {0x54019, 0x994}, + {0x5401a, 0x32}, + {0x5401b, 0x1146}, + {0x5401c, 0x1100}, + {0x5401e, 0x4}, + {0x5401f, 0x994}, + {0x54020, 0x32}, + {0x54021, 0x1146}, + {0x54022, 0x1100}, + {0x54024, 0x4}, + {0x54032, 0x9400}, + {0x54033, 0x3209}, + {0x54034, 0x4600}, + {0x54035, 0x11}, + {0x54036, 0x11}, + {0x54037, 0x400}, + {0x54038, 0x9400}, + {0x54039, 0x3209}, + {0x5403a, 0x4600}, + {0x5403b, 0x11}, + {0x5403c, 0x11}, + {0x5403d, 0x400}, + {0xd0000, 0x1} +}; + +/* P0 2D message block parameter for training firmware */ +static struct dram_cfg_param ddr_fsp0_2d_cfg[] = { + {0xd0000, 0x0}, + {0x54003, 0xe94}, + {0x54004, 0x4}, + {0x54006, 0x15}, + {0x54008, 0x61}, + {0x54009, 0xc8}, + {0x5400b, 0x4}, + {0x5400d, 0x100}, + {0x5400f, 0x100}, + {0x54010, 0x2080}, + {0x54012, 0x110}, + {0x54019, 0x36e4}, + {0x5401a, 0x32}, + {0x5401b, 0x1146}, + {0x5401c, 0x1108}, + {0x5401e, 0x4}, + {0x5401f, 0x36e4}, + {0x54020, 0x32}, + {0x54021, 0x1146}, + {0x54022, 0x1108}, + {0x54024, 0x4}, + {0x54032, 0xe400}, + {0x54033, 0x3236}, + {0x54034, 0x4600}, + {0x54035, 0x811}, + {0x54036, 0x11}, + {0x54037, 0x400}, + {0x54038, 0xe400}, + {0x54039, 0x3236}, + {0x5403a, 0x4600}, + {0x5403b, 0x811}, + {0x5403c, 0x11}, + {0x5403d, 0x400}, + {0xd0000, 0x1} +}; + +/* DRAM PHY init engine image */ +static struct dram_cfg_param ddr_phy_pie[] = { + {0xd0000, 0x0}, + {0x90000, 0x10}, + {0x90001, 0x400}, + {0x90002, 0x10e}, + {0x90003, 0x0}, + {0x90004, 0x0}, + {0x90005, 0x8}, + {0x90029, 0xb}, + {0x9002a, 0x480}, + {0x9002b, 0x109}, + {0x9002c, 0x8}, + {0x9002d, 0x448}, + {0x9002e, 0x139}, + {0x9002f, 0x8}, + {0x90030, 0x478}, + {0x90031, 0x109}, + {0x90032, 0x0}, + {0x90033, 0xe8}, + {0x90034, 0x109}, + {0x90035, 0x2}, + {0x90036, 0x10}, + {0x90037, 0x139}, + {0x90038, 0xb}, + {0x90039, 0x7c0}, + {0x9003a, 0x139}, + {0x9003b, 0x44}, + {0x9003c, 0x633}, + {0x9003d, 0x159}, + {0x9003e, 0x14f}, + {0x9003f, 0x630}, + {0x90040, 0x159}, + {0x90041, 0x47}, + {0x90042, 0x633}, + {0x90043, 0x149}, + {0x90044, 0x4f}, + {0x90045, 0x633}, + {0x90046, 0x179}, + {0x90047, 0x8}, + {0x90048, 0xe0}, + {0x90049, 0x109}, + {0x9004a, 0x0}, + {0x9004b, 0x7c8}, + {0x9004c, 0x109}, + {0x9004d, 0x0}, + {0x9004e, 0x1}, + {0x9004f, 0x8}, + {0x90050, 0x30}, + {0x90051, 0x65a}, + {0x90052, 0x9}, + {0x90053, 0x0}, + {0x90054, 0x45a}, + {0x90055, 0x9}, + {0x90056, 0x0}, + {0x90057, 0x448}, + {0x90058, 0x109}, + {0x90059, 0x40}, + {0x9005a, 0x633}, + {0x9005b, 0x179}, + {0x9005c, 0x1}, + {0x9005d, 0x618}, + {0x9005e, 0x109}, + {0x9005f, 0x40c0}, + {0x90060, 0x633}, + {0x90061, 0x149}, + {0x90062, 0x8}, + {0x90063, 0x4}, + {0x90064, 0x48}, + {0x90065, 0x4040}, + {0x90066, 0x633}, + {0x90067, 0x149}, + {0x90068, 0x0}, + {0x90069, 0x4}, + {0x9006a, 0x48}, + {0x9006b, 0x40}, + {0x9006c, 0x633}, + {0x9006d, 0x149}, + {0x9006e, 0x0}, + {0x9006f, 0x658}, + {0x90070, 0x109}, + {0x90071, 0x10}, + {0x90072, 0x4}, + {0x90073, 0x18}, + {0x90074, 0x0}, + {0x90075, 0x4}, + {0x90076, 0x78}, + {0x90077, 0x549}, + {0x90078, 0x633}, + {0x90079, 0x159}, + {0x9007a, 0xd49}, + {0x9007b, 0x633}, + {0x9007c, 0x159}, + {0x9007d, 0x94a}, + {0x9007e, 0x633}, + {0x9007f, 0x159}, + {0x90080, 0x441}, + {0x90081, 0x633}, + {0x90082, 0x149}, + {0x90083, 0x42}, + {0x90084, 0x633}, + {0x90085, 0x149}, + {0x90086, 0x1}, + {0x90087, 0x633}, + {0x90088, 0x149}, + {0x90089, 0x0}, + {0x9008a, 0xe0}, + {0x9008b, 0x109}, + {0x9008c, 0xa}, + {0x9008d, 0x10}, + {0x9008e, 0x109}, + {0x9008f, 0x9}, + {0x90090, 0x3c0}, + {0x90091, 0x149}, + {0x90092, 0x9}, + {0x90093, 0x3c0}, + {0x90094, 0x159}, + {0x90095, 0x18}, + {0x90096, 0x10}, + {0x90097, 0x109}, + {0x90098, 0x0}, + {0x90099, 0x3c0}, + {0x9009a, 0x109}, + {0x9009b, 0x18}, + {0x9009c, 0x4}, + {0x9009d, 0x48}, + {0x9009e, 0x18}, + {0x9009f, 0x4}, + {0x900a0, 0x58}, + {0x900a1, 0xb}, + {0x900a2, 0x10}, + {0x900a3, 0x109}, + {0x900a4, 0x1}, + {0x900a5, 0x10}, + {0x900a6, 0x109}, + {0x900a7, 0x5}, + {0x900a8, 0x7c0}, + {0x900a9, 0x109}, + {0x40000, 0x811}, + {0x40020, 0x880}, + {0x40040, 0x0}, + {0x40060, 0x0}, + {0x40001, 0x4008}, + {0x40021, 0x83}, + {0x40041, 0x4f}, + {0x40061, 0x0}, + {0x40002, 0x4040}, + {0x40022, 0x83}, + {0x40042, 0x51}, + {0x40062, 0x0}, + {0x40003, 0x811}, + {0x40023, 0x880}, + {0x40043, 0x0}, + {0x40063, 0x0}, + {0x40004, 0x720}, + {0x40024, 0xf}, + {0x40044, 0x1740}, + {0x40064, 0x0}, + {0x40005, 0x16}, + {0x40025, 0x83}, + {0x40045, 0x4b}, + {0x40065, 0x0}, + {0x40006, 0x716}, + {0x40026, 0xf}, + {0x40046, 0x2001}, + {0x40066, 0x0}, + {0x40007, 0x716}, + {0x40027, 0xf}, + {0x40047, 0x2800}, + {0x40067, 0x0}, + {0x40008, 0x716}, + {0x40028, 0xf}, + {0x40048, 0xf00}, + {0x40068, 0x0}, + {0x40009, 0x720}, + {0x40029, 0xf}, + {0x40049, 0x1400}, + {0x40069, 0x0}, + {0x4000a, 0xe08}, + {0x4002a, 0xc15}, + {0x4004a, 0x0}, + {0x4006a, 0x0}, + {0x4000b, 0x625}, + {0x4002b, 0x15}, + {0x4004b, 0x0}, + {0x4006b, 0x0}, + {0x4000c, 0x4028}, + {0x4002c, 0x80}, + {0x4004c, 0x0}, + {0x4006c, 0x0}, + {0x4000d, 0xe08}, + {0x4002d, 0xc1a}, + {0x4004d, 0x0}, + {0x4006d, 0x0}, + {0x4000e, 0x625}, + {0x4002e, 0x1a}, + {0x4004e, 0x0}, + {0x4006e, 0x0}, + {0x4000f, 0x4040}, + {0x4002f, 0x80}, + {0x4004f, 0x0}, + {0x4006f, 0x0}, + {0x40010, 0x2604}, + {0x40030, 0x15}, + {0x40050, 0x0}, + {0x40070, 0x0}, + {0x40011, 0x708}, + {0x40031, 0x5}, + {0x40051, 0x0}, + {0x40071, 0x2002}, + {0x40012, 0x8}, + {0x40032, 0x80}, + {0x40052, 0x0}, + {0x40072, 0x0}, + {0x40013, 0x2604}, + {0x40033, 0x1a}, + {0x40053, 0x0}, + {0x40073, 0x0}, + {0x40014, 0x708}, + {0x40034, 0xa}, + {0x40054, 0x0}, + {0x40074, 0x2002}, + {0x40015, 0x4040}, + {0x40035, 0x80}, + {0x40055, 0x0}, + {0x40075, 0x0}, + {0x40016, 0x60a}, + {0x40036, 0x15}, + {0x40056, 0x1200}, + {0x40076, 0x0}, + {0x40017, 0x61a}, + {0x40037, 0x15}, + {0x40057, 0x1300}, + {0x40077, 0x0}, + {0x40018, 0x60a}, + {0x40038, 0x1a}, + {0x40058, 0x1200}, + {0x40078, 0x0}, + {0x40019, 0x642}, + {0x40039, 0x1a}, + {0x40059, 0x1300}, + {0x40079, 0x0}, + {0x4001a, 0x4808}, + {0x4003a, 0x880}, + {0x4005a, 0x0}, + {0x4007a, 0x0}, + {0x900aa, 0x0}, + {0x900ab, 0x790}, + {0x900ac, 0x11a}, + {0x900ad, 0x8}, + {0x900ae, 0x7aa}, + {0x900af, 0x2a}, + {0x900b0, 0x10}, + {0x900b1, 0x7b2}, + {0x900b2, 0x2a}, + {0x900b3, 0x0}, + {0x900b4, 0x7c8}, + {0x900b5, 0x109}, + {0x900b6, 0x10}, + {0x900b7, 0x10}, + {0x900b8, 0x109}, + {0x900b9, 0x10}, + {0x900ba, 0x2a8}, + {0x900bb, 0x129}, + {0x900bc, 0x8}, + {0x900bd, 0x370}, + {0x900be, 0x129}, + {0x900bf, 0xa}, + {0x900c0, 0x3c8}, + {0x900c1, 0x1a9}, + {0x900c2, 0xc}, + {0x900c3, 0x408}, + {0x900c4, 0x199}, + {0x900c5, 0x14}, + {0x900c6, 0x790}, + {0x900c7, 0x11a}, + {0x900c8, 0x8}, + {0x900c9, 0x4}, + {0x900ca, 0x18}, + {0x900cb, 0xe}, + {0x900cc, 0x408}, + {0x900cd, 0x199}, + {0x900ce, 0x8}, + {0x900cf, 0x8568}, + {0x900d0, 0x108}, + {0x900d1, 0x18}, + {0x900d2, 0x790}, + {0x900d3, 0x16a}, + {0x900d4, 0x8}, + {0x900d5, 0x1d8}, + {0x900d6, 0x169}, + {0x900d7, 0x10}, + {0x900d8, 0x8558}, + {0x900d9, 0x168}, + {0x900da, 0x1ff8}, + {0x900db, 0x85a8}, + {0x900dc, 0x1e8}, + {0x900dd, 0x50}, + {0x900de, 0x798}, + {0x900df, 0x16a}, + {0x900e0, 0x60}, + {0x900e1, 0x7a0}, + {0x900e2, 0x16a}, + {0x900e3, 0x8}, + {0x900e4, 0x8310}, + {0x900e5, 0x168}, + {0x900e6, 0x8}, + {0x900e7, 0xa310}, + {0x900e8, 0x168}, + {0x900e9, 0xa}, + {0x900ea, 0x408}, + {0x900eb, 0x169}, + {0x900ec, 0x6e}, + {0x900ed, 0x0}, + {0x900ee, 0x68}, + {0x900ef, 0x0}, + {0x900f0, 0x408}, + {0x900f1, 0x169}, + {0x900f2, 0x0}, + {0x900f3, 0x8310}, + {0x900f4, 0x168}, + {0x900f5, 0x0}, + {0x900f6, 0xa310}, + {0x900f7, 0x168}, + {0x900f8, 0x1ff8}, + {0x900f9, 0x85a8}, + {0x900fa, 0x1e8}, + {0x900fb, 0x68}, + {0x900fc, 0x798}, + {0x900fd, 0x16a}, + {0x900fe, 0x78}, + {0x900ff, 0x7a0}, + {0x90100, 0x16a}, + {0x90101, 0x68}, + {0x90102, 0x790}, + {0x90103, 0x16a}, + {0x90104, 0x8}, + {0x90105, 0x8b10}, + {0x90106, 0x168}, + {0x90107, 0x8}, + {0x90108, 0xab10}, + {0x90109, 0x168}, + {0x9010a, 0xa}, + {0x9010b, 0x408}, + {0x9010c, 0x169}, + {0x9010d, 0x58}, + {0x9010e, 0x0}, + {0x9010f, 0x68}, + {0x90110, 0x0}, + {0x90111, 0x408}, + {0x90112, 0x169}, + {0x90113, 0x0}, + {0x90114, 0x8b10}, + {0x90115, 0x168}, + {0x90116, 0x1}, + {0x90117, 0xab10}, + {0x90118, 0x168}, + {0x90119, 0x0}, + {0x9011a, 0x1d8}, + {0x9011b, 0x169}, + {0x9011c, 0x80}, + {0x9011d, 0x790}, + {0x9011e, 0x16a}, + {0x9011f, 0x18}, + {0x90120, 0x7aa}, + {0x90121, 0x6a}, + {0x90122, 0xa}, + {0x90123, 0x0}, + {0x90124, 0x1e9}, + {0x90125, 0x8}, + {0x90126, 0x8080}, + {0x90127, 0x108}, + {0x90128, 0xf}, + {0x90129, 0x408}, + {0x9012a, 0x169}, + {0x9012b, 0xc}, + {0x9012c, 0x0}, + {0x9012d, 0x68}, + {0x9012e, 0x9}, + {0x9012f, 0x0}, + {0x90130, 0x1a9}, + {0x90131, 0x0}, + {0x90132, 0x408}, + {0x90133, 0x169}, + {0x90134, 0x0}, + {0x90135, 0x8080}, + {0x90136, 0x108}, + {0x90137, 0x8}, + {0x90138, 0x7aa}, + {0x90139, 0x6a}, + {0x9013a, 0x0}, + {0x9013b, 0x8568}, + {0x9013c, 0x108}, + {0x9013d, 0xb7}, + {0x9013e, 0x790}, + {0x9013f, 0x16a}, + {0x90140, 0x1f}, + {0x90141, 0x0}, + {0x90142, 0x68}, + {0x90143, 0x8}, + {0x90144, 0x8558}, + {0x90145, 0x168}, + {0x90146, 0xf}, + {0x90147, 0x408}, + {0x90148, 0x169}, + {0x90149, 0xd}, + {0x9014a, 0x0}, + {0x9014b, 0x68}, + {0x9014c, 0x0}, + {0x9014d, 0x408}, + {0x9014e, 0x169}, + {0x9014f, 0x0}, + {0x90150, 0x8558}, + {0x90151, 0x168}, + {0x90152, 0x8}, + {0x90153, 0x3c8}, + {0x90154, 0x1a9}, + {0x90155, 0x3}, + {0x90156, 0x370}, + {0x90157, 0x129}, + {0x90158, 0x20}, + {0x90159, 0x2aa}, + {0x9015a, 0x9}, + {0x9015b, 0x8}, + {0x9015c, 0xe8}, + {0x9015d, 0x109}, + {0x9015e, 0x0}, + {0x9015f, 0x8140}, + {0x90160, 0x10c}, + {0x90161, 0x10}, + {0x90162, 0x8138}, + {0x90163, 0x104}, + {0x90164, 0x8}, + {0x90165, 0x448}, + {0x90166, 0x109}, + {0x90167, 0xf}, + {0x90168, 0x7c0}, + {0x90169, 0x109}, + {0x9016a, 0x0}, + {0x9016b, 0xe8}, + {0x9016c, 0x109}, + {0x9016d, 0x47}, + {0x9016e, 0x630}, + {0x9016f, 0x109}, + {0x90170, 0x8}, + {0x90171, 0x618}, + {0x90172, 0x109}, + {0x90173, 0x8}, + {0x90174, 0xe0}, + {0x90175, 0x109}, + {0x90176, 0x0}, + {0x90177, 0x7c8}, + {0x90178, 0x109}, + {0x90179, 0x8}, + {0x9017a, 0x8140}, + {0x9017b, 0x10c}, + {0x9017c, 0x0}, + {0x9017d, 0x478}, + {0x9017e, 0x109}, + {0x9017f, 0x0}, + {0x90180, 0x1}, + {0x90181, 0x8}, + {0x90182, 0x8}, + {0x90183, 0x4}, + {0x90184, 0x0}, + {0x90006, 0x8}, + {0x90007, 0x7c8}, + {0x90008, 0x109}, + {0x90009, 0x0}, + {0x9000a, 0x400}, + {0x9000b, 0x106}, + {0xd00e7, 0x400}, + {0x90017, 0x0}, + {0x9001f, 0x2b}, + {0x90026, 0x69}, + {0x400d0, 0x0}, + {0x400d1, 0x101}, + {0x400d2, 0x105}, + {0x400d3, 0x107}, + {0x400d4, 0x10f}, + {0x400d5, 0x202}, + {0x400d6, 0x20a}, + {0x400d7, 0x20b}, + {0x2003a, 0x2}, + {0x200be, 0x3}, + {0x2000b, 0x41a}, + {0x2000c, 0xe9}, + {0x2000d, 0x91c}, + {0x2000e, 0x2c}, + {0x12000b, 0x20d}, + {0x12000c, 0x74}, + {0x12000d, 0x48e}, + {0x12000e, 0x2c}, + {0x22000b, 0xb0}, + {0x22000c, 0x27}, + {0x22000d, 0x186}, + {0x22000e, 0x10}, + {0x9000c, 0x0}, + {0x9000d, 0x173}, + {0x9000e, 0x60}, + {0x9000f, 0x6110}, + {0x90010, 0x2152}, + {0x90011, 0xdfbd}, + {0x90012, 0x2060}, + {0x90013, 0x6152}, + {0x20010, 0x5a}, + {0x20011, 0x3}, + {0x120010, 0x5a}, + {0x120011, 0x3}, + {0x40080, 0xe0}, + {0x40081, 0x12}, + {0x40082, 0xe0}, + {0x40083, 0x12}, + {0x40084, 0xe0}, + {0x40085, 0x12}, + {0x140080, 0xe0}, + {0x140081, 0x12}, + {0x140082, 0xe0}, + {0x140083, 0x12}, + {0x140084, 0xe0}, + {0x140085, 0x12}, + {0x240080, 0xe0}, + {0x240081, 0x12}, + {0x240082, 0xe0}, + {0x240083, 0x12}, + {0x240084, 0xe0}, + {0x240085, 0x12}, + {0x400fd, 0xf}, + {0x400f1, 0xe}, + {0x10011, 0x1}, + {0x10012, 0x1}, + {0x10013, 0x180}, + {0x10018, 0x1}, + {0x10002, 0x6209}, + {0x100b2, 0x1}, + {0x101b4, 0x1}, + {0x102b4, 0x1}, + {0x103b4, 0x1}, + {0x104b4, 0x1}, + {0x105b4, 0x1}, + {0x106b4, 0x1}, + {0x107b4, 0x1}, + {0x108b4, 0x1}, + {0x11011, 0x1}, + {0x11012, 0x1}, + {0x11013, 0x180}, + {0x11018, 0x1}, + {0x11002, 0x6209}, + {0x110b2, 0x1}, + {0x111b4, 0x1}, + {0x112b4, 0x1}, + {0x113b4, 0x1}, + {0x114b4, 0x1}, + {0x115b4, 0x1}, + {0x116b4, 0x1}, + {0x117b4, 0x1}, + {0x118b4, 0x1}, + {0x20089, 0x1}, + {0x20088, 0x19}, + {0xc0080, 0x0}, + {0xd0000, 0x1}, +}; + +static struct dram_fsp_msg ddr_dram_fsp_msg[] = { + { + /* P0 3733mts 1D */ + .drate = 3733, + .fw_type = FW_1D_IMAGE, + .fsp_cfg = ddr_fsp0_cfg, + .fsp_cfg_num = ARRAY_SIZE(ddr_fsp0_cfg), + }, + { + /* P1 1866mts 1D */ + .drate = 1866, + .fw_type = FW_1D_IMAGE, + .fsp_cfg = ddr_fsp1_cfg, + .fsp_cfg_num = ARRAY_SIZE(ddr_fsp1_cfg), + }, + { + /* P2 625mts 1D */ + .drate = 625, + .fw_type = FW_1D_IMAGE, + .fsp_cfg = ddr_fsp2_cfg, + .fsp_cfg_num = ARRAY_SIZE(ddr_fsp2_cfg), + }, + { + /* P0 3733mts 2D */ + .drate = 3733, + .fw_type = FW_2D_IMAGE, + .fsp_cfg = ddr_fsp0_2d_cfg, + .fsp_cfg_num = ARRAY_SIZE(ddr_fsp0_2d_cfg), + }, +}; + +/* ddr timing config params */ +struct dram_timing_info dram_timing_2GB = { + .ddrc_cfg = ddr_ddrc_cfg, + .ddrc_cfg_num = ARRAY_SIZE(ddr_ddrc_cfg), + .ddrphy_cfg = ddr_ddrphy_cfg, + .ddrphy_cfg_num = ARRAY_SIZE(ddr_ddrphy_cfg), + .fsp_msg = ddr_dram_fsp_msg, + .fsp_msg_num = ARRAY_SIZE(ddr_dram_fsp_msg), + .ddrphy_trained_csr = ddr_ddrphy_trained_csr, + .ddrphy_trained_csr_num = ARRAY_SIZE(ddr_ddrphy_trained_csr), + .ddrphy_pie = ddr_phy_pie, + .ddrphy_pie_num = ARRAY_SIZE(ddr_phy_pie), + .fsp_table = { 3733, 1866, 625, }, + .fsp_cfg = ddr_dram_fsp_cfg, + .fsp_cfg_num = ARRAY_SIZE(ddr_dram_fsp_cfg), +}; diff --git a/board/freescale/imx93_frdm/spl.c b/board/freescale/imx93_frdm/spl.c new file mode 100644 index 00000000000..006c752d071 --- /dev/null +++ b/board/freescale/imx93_frdm/spl.c @@ -0,0 +1,195 @@ +// SPDX-License-Identifier: GPL-2.0+ +/* + * Copyright 2025 NXP + */ + +#include "lpddr4_timing.h" + +#include <init.h> +#include <spl.h> +#include <asm/arch/clock.h> +#include <asm/arch/ddr.h> +#include <asm/arch/mu.h> +#include <asm/arch/sys_proto.h> +#include <asm/arch/trdc.h> +#include <asm/mach-imx/boot_mode.h> +#include <asm/mach-imx/ele_api.h> +#include <asm/global_data.h> +#include <asm/sections.h> +#include <dm/device.h> +#include <dm/device-internal.h> +#include <dm/uclass.h> +#include <dm/uclass-internal.h> +#include <linux/delay.h> +#include <power/pca9450.h> +#include <power/pmic.h> + +DECLARE_GLOBAL_DATA_PTR; + +#define SRC_DDRC_SW_CTRL (0x44461020) +#define SRC_DDRPHY_SINGLE_RESET_SW_CTRL (0x44461424) + +static struct _drams { + u8 mr8; + struct dram_timing_info *pdram_timing; + char *name; +} frdm_drams[2] = { + {0x10, &dram_timing_1GB, "1GB DRAM" }, + {0x18, &dram_timing_2GB, "2GB DRAM" }, +}; + +int spl_board_boot_device(enum boot_device boot_dev_spl) +{ + return BOOT_DEVICE_BOOTROM; +} + +void spl_board_init(void) +{ + int ret; + + ret = ele_start_rng(); + if (ret) + printf("Fail to start RNG: %d\n", ret); + + puts("Normal Boot\n"); +} + +void spl_dram_init(void) +{ + int i; + int ret; + + for (i = 0; i < ARRAY_SIZE(frdm_drams); i++) { + struct dram_timing_info *ptiming = frdm_drams[i].pdram_timing; + + printf("DDR: %uMTS\n", ptiming->fsp_msg[0].drate); + ret = ddr_init(ptiming); + if (ret == 0) { + if (lpddr4_mr_read(1, 8) == frdm_drams[i].mr8) { + printf("found DRAM %s matched\n", frdm_drams[i].name); + break; + } + + /* Power down and Power up DDR Mixer */ + + /* Clear PwrOkIn via DDRMIX register */ + setbits_32(SRC_DDRPHY_SINGLE_RESET_SW_CTRL, BIT(0)); + /* Power off the DDRMIX */ + setbits_32(SRC_DDRC_SW_CTRL, BIT(31)); + + udelay(50); + + /* Power up the DDRMIX */ + clrbits_32(SRC_DDRC_SW_CTRL, BIT(31)); + setbits_32(SRC_DDRC_SW_CTRL, BIT(0)); + udelay(10); + clrbits_32(SRC_DDRC_SW_CTRL, BIT(0)); + udelay(10); + } + } +} + +int power_init_board(void) +{ + struct udevice *dev; + int ret; + unsigned int val = 0, buck_val; + + ret = pmic_get("pmic@25", &dev); + if (ret == -ENODEV) { + puts("No pca9450@25\n"); + return 0; + } + if (ret != 0) + return ret; + + /* BUCKxOUT_DVS0/1 control BUCK123 output */ + pmic_reg_write(dev, PCA9450_BUCK123_DVS, 0x29); + + /* Enable DVS control through PMIC_STBY_REQ */ + pmic_reg_write(dev, PCA9450_BUCK1CTRL, 0x59); + + ret = pmic_reg_read(dev, PCA9450_PWR_CTRL); + if (ret < 0) + return ret; + + val = ret; + + if (is_voltage_mode(VOLT_LOW_DRIVE)) { + buck_val = 0x0c; /* 0.8V for Low drive mode */ + printf("PMIC: Low Drive Voltage Mode\n"); + } else if (is_voltage_mode(VOLT_NOMINAL_DRIVE)) { + buck_val = 0x10; /* 0.85V for Nominal drive mode */ + printf("PMIC: Nominal Voltage Mode\n"); + } else { + buck_val = 0x14; /* 0.9V for Over drive mode */ + printf("PMIC: Over Drive Voltage Mode\n"); + } + + if (val & PCA9450_REG_PWRCTRL_TOFF_DEB) { + pmic_reg_write(dev, PCA9450_BUCK1OUT_DVS0, buck_val); + pmic_reg_write(dev, PCA9450_BUCK3OUT_DVS0, buck_val); + } else { + pmic_reg_write(dev, PCA9450_BUCK1OUT_DVS0, buck_val + 0x4); + pmic_reg_write(dev, PCA9450_BUCK3OUT_DVS0, buck_val + 0x4); + } + + /* Set standby voltage to 0.65V */ + if (val & PCA9450_REG_PWRCTRL_TOFF_DEB) + pmic_reg_write(dev, PCA9450_BUCK1OUT_DVS1, 0x0); + else + pmic_reg_write(dev, PCA9450_BUCK1OUT_DVS1, 0x4); + + /* I2C_LT_EN*/ + pmic_reg_write(dev, 0xa, 0x3); + return 0; +} + +void board_init_f(ulong dummy) +{ + int ret; + + /* Clear the BSS. */ + memset(__bss_start, 0, __bss_end - __bss_start); + + timer_init(); + + arch_cpu_init(); + + board_early_init_f(); + + spl_early_init(); + + preloader_console_init(); + + ret = imx9_probe_mu(); + if (ret) { + printf("Fail to init Sentinel API\n"); + } else { + debug("SOC: 0x%x\n", gd->arch.soc_rev); + debug("LC: 0x%x\n", gd->arch.lifecycle); + } + + clock_init_late(); + + power_init_board(); + + if (!is_voltage_mode(VOLT_LOW_DRIVE)) + set_arm_clk(get_cpu_speed_grade_hz()); + + /* Init power of mix */ + soc_power_init(); + + /* Setup TRDC for DDR access */ + trdc_init(); + + /* DDR initialization */ + spl_dram_init(); + + /* Put M33 into CPUWAIT for following kick */ + ret = m33_prepare(); + if (!ret) + printf("M33 prepare ok\n"); + + board_init_r(NULL, 0); +} diff --git a/board/freescale/imx93_qsb/imx93_qsb.c b/board/freescale/imx93_qsb/imx93_qsb.c index 388d99106db..503a8667245 100644 --- a/board/freescale/imx93_qsb/imx93_qsb.c +++ b/board/freescale/imx93_qsb/imx93_qsb.c @@ -9,11 +9,6 @@ #include <netdev.h> #include <asm/arch/sys_proto.h> -int board_init(void) -{ - return 0; -} - int board_late_init(void) { #ifdef CONFIG_ENV_IS_IN_MMC diff --git a/board/freescale/imx95_evk/imx95_evk.c b/board/freescale/imx95_evk/imx95_evk.c index d5f5e310b6b..fe0111be508 100644 --- a/board/freescale/imx95_evk/imx95_evk.c +++ b/board/freescale/imx95_evk/imx95_evk.c @@ -15,11 +15,6 @@ int board_early_init_f(void) return 0; } -int board_init(void) -{ - return 0; -} - int board_late_init(void) { if (IS_ENABLED(CONFIG_ENV_IS_IN_MMC)) diff --git a/board/freescale/mx6memcal/mx6memcal.c b/board/freescale/mx6memcal/mx6memcal.c index 17095c34e92..a58ab93f27d 100644 --- a/board/freescale/mx6memcal/mx6memcal.c +++ b/board/freescale/mx6memcal/mx6memcal.c @@ -13,11 +13,6 @@ DECLARE_GLOBAL_DATA_PTR; -int board_init(void) -{ - return 0; -} - int checkboard(void) { puts("Board: mx6memcal\n"); diff --git a/board/gateworks/venice/eeprom.c b/board/gateworks/venice/eeprom.c index d9a87193434..88bbc2e1af8 100644 --- a/board/gateworks/venice/eeprom.c +++ b/board/gateworks/venice/eeprom.c @@ -356,7 +356,7 @@ static int eeprom_info(bool verbose) return 0; } -int venice_eeprom_init(int quiet) +struct venice_board_info *venice_eeprom_init(int quiet) { char rev_pcb; int rev_bom; @@ -466,10 +466,10 @@ int venice_eeprom_init(int quiet) if (!strncmp(venice_model, "GW7901-SP486", 12) && strcmp(venice_model, "GW7901-SP486-C")) { - return 2048; + som_info.sdram_size++; } - return (16 << som_info.sdram_size); + return &som_info; } void board_gsc_info(void) diff --git a/board/gateworks/venice/eeprom.h b/board/gateworks/venice/eeprom.h index a0f449299aa..817277f6276 100644 --- a/board/gateworks/venice/eeprom.h +++ b/board/gateworks/venice/eeprom.h @@ -18,13 +18,14 @@ struct venice_board_info { u8 sdram_size; /* 0x2B: (16 << n) MB */ u8 sdram_speed; /* 0x2C: (33.333 * n) MHz */ u8 sdram_width; /* 0x2D: (8 << n) bit */ - u8 res3[2]; /* 0x2E */ + u8 sdram_variant; /* 0x2E */ + u8 res3[1]; /* 0x2D */ char model[16]; /* 0x30: model string */ u8 config[14]; /* 0x40: model config */ u8 chksum[2]; /* 0x4E */ }; -int venice_eeprom_init(int quiet); +struct venice_board_info *venice_eeprom_init(int quiet); const char *eeprom_get_model(void); const char *eeprom_get_som_model(void); const char *eeprom_get_baseboard_model(void); diff --git a/board/gateworks/venice/lpddr4_timing.h b/board/gateworks/venice/lpddr4_timing.h index 21997f6fb2a..e4aa8b6821c 100644 --- a/board/gateworks/venice/lpddr4_timing.h +++ b/board/gateworks/venice/lpddr4_timing.h @@ -6,6 +6,7 @@ #ifndef __LPDDR4_TIMING_H__ #define __LPDDR4_TIMING_H__ -extern struct dram_timing_info *spl_dram_init(const char *model, int sizemb); +struct dram_timing_info *spl_dram_init(const char *model, struct venice_board_info *info, + char *dram_desc, size_t sz_desc); #endif /* __LPDDR4_TIMING_H__ */ diff --git a/board/gateworks/venice/lpddr4_timing_imx8mm.c b/board/gateworks/venice/lpddr4_timing_imx8mm.c index 956071c5125..896a5c66eb6 100644 --- a/board/gateworks/venice/lpddr4_timing_imx8mm.c +++ b/board/gateworks/venice/lpddr4_timing_imx8mm.c @@ -10,6 +10,8 @@ #include <asm/arch/ddr.h> #include <asm/arch/lpddr4_define.h> +#include "eeprom.h" + /* ddr phy trained csr */ static struct dram_cfg_param lpddr4_ddrphy_trained_csr[] = { { 0x200b2, 0x0 }, @@ -1890,6 +1892,7 @@ static struct dram_cfg_param lpddr4_ddrc_cfg_1gb[] = { { 0x3d400204, 0x80808 }, { 0x3d400214, 0x7070707 }, { 0x3d400218, 0xf070707 }, + { 0x3d40021c, 0xf0f }, { 0x3d400250, 0x29001701 }, { 0x3d400254, 0x2c }, { 0x3d40025c, 0x4000030 }, @@ -2161,56 +2164,26 @@ static struct dram_cfg_param lpddr4_ddrphy_cfg_1gb[] = { /* P0 message block paremeter for training firmware */ static struct dram_cfg_param lpddr4_fsp0_cfg_1gb[] = { { 0xd0000, 0x0 }, - { 0x54000, 0x0 }, - { 0x54001, 0x0 }, - { 0x54002, 0x0 }, { 0x54003, 0xbb8 }, { 0x54004, 0x2 }, { 0x54005, 0x2228 }, { 0x54006, 0x11 }, - { 0x54007, 0x0 }, { 0x54008, 0x131f }, { 0x54009, 0xc8 }, - { 0x5400a, 0x0 }, { 0x5400b, 0x2 }, - { 0x5400c, 0x0 }, - { 0x5400d, 0x0 }, - { 0x5400e, 0x0 }, - { 0x5400f, 0x0 }, - { 0x54010, 0x0 }, - { 0x54011, 0x0 }, { 0x54012, 0x110 }, - { 0x54013, 0x0 }, - { 0x54014, 0x0 }, - { 0x54015, 0x0 }, - { 0x54016, 0x0 }, - { 0x54017, 0x0 }, - { 0x54018, 0x0 }, { 0x54019, 0x2dd4 }, { 0x5401a, 0x31 }, { 0x5401b, 0x4d66 }, { 0x5401c, 0x4d00 }, - { 0x5401d, 0x0 }, { 0x5401e, 0x16 }, { 0x5401f, 0x2dd4 }, { 0x54020, 0x31 }, { 0x54021, 0x4d66 }, { 0x54022, 0x4d00 }, - { 0x54023, 0x0 }, { 0x54024, 0x16 }, - { 0x54025, 0x0 }, - { 0x54026, 0x0 }, - { 0x54027, 0x0 }, - { 0x54028, 0x0 }, - { 0x54029, 0x0 }, - { 0x5402a, 0x0 }, { 0x5402b, 0x1000 }, { 0x5402c, 0x1 }, - { 0x5402d, 0x0 }, - { 0x5402e, 0x0 }, - { 0x5402f, 0x0 }, - { 0x54030, 0x0 }, - { 0x54031, 0x0 }, { 0x54032, 0xd400 }, { 0x54033, 0x312d }, { 0x54034, 0x6600 }, @@ -2223,69 +2196,33 @@ static struct dram_cfg_param lpddr4_fsp0_cfg_1gb[] = { { 0x5403b, 0x4d }, { 0x5403c, 0x4d }, { 0x5403d, 0x1600 }, - { 0x5403e, 0x0 }, - { 0x5403f, 0x0 }, - { 0x54040, 0x0 }, - { 0x54041, 0x0 }, - { 0x54042, 0x0 }, - { 0x54043, 0x0 }, - { 0x54044, 0x0 }, { 0xd0000, 0x1 }, }; /* P1 message block paremeter for training firmware */ static struct dram_cfg_param lpddr4_fsp1_cfg_1gb[] = { { 0xd0000, 0x0 }, - { 0x54000, 0x0 }, - { 0x54001, 0x0 }, { 0x54002, 0x101 }, { 0x54003, 0x190 }, { 0x54004, 0x2 }, { 0x54005, 0x2228 }, { 0x54006, 0x11 }, - { 0x54007, 0x0 }, { 0x54008, 0x121f }, { 0x54009, 0xc8 }, - { 0x5400a, 0x0 }, { 0x5400b, 0x2 }, - { 0x5400c, 0x0 }, - { 0x5400d, 0x0 }, - { 0x5400e, 0x0 }, - { 0x5400f, 0x0 }, - { 0x54010, 0x0 }, - { 0x54011, 0x0 }, { 0x54012, 0x110 }, - { 0x54013, 0x0 }, - { 0x54014, 0x0 }, - { 0x54015, 0x0 }, - { 0x54016, 0x0 }, - { 0x54017, 0x0 }, - { 0x54018, 0x0 }, { 0x54019, 0x84 }, { 0x5401a, 0x31 }, { 0x5401b, 0x4d66 }, { 0x5401c, 0x4d00 }, - { 0x5401d, 0x0 }, { 0x5401e, 0x16 }, { 0x5401f, 0x84 }, { 0x54020, 0x31 }, { 0x54021, 0x4d66 }, { 0x54022, 0x4d00 }, - { 0x54023, 0x0 }, { 0x54024, 0x16 }, - { 0x54025, 0x0 }, - { 0x54026, 0x0 }, - { 0x54027, 0x0 }, - { 0x54028, 0x0 }, - { 0x54029, 0x0 }, - { 0x5402a, 0x0 }, { 0x5402b, 0x1000 }, { 0x5402c, 0x1 }, - { 0x5402d, 0x0 }, - { 0x5402e, 0x0 }, - { 0x5402f, 0x0 }, - { 0x54030, 0x0 }, - { 0x54031, 0x0 }, { 0x54032, 0x8400 }, { 0x54033, 0x3100 }, { 0x54034, 0x6600 }, @@ -2298,69 +2235,33 @@ static struct dram_cfg_param lpddr4_fsp1_cfg_1gb[] = { { 0x5403b, 0x4d }, { 0x5403c, 0x4d }, { 0x5403d, 0x1600 }, - { 0x5403e, 0x0 }, - { 0x5403f, 0x0 }, - { 0x54040, 0x0 }, - { 0x54041, 0x0 }, - { 0x54042, 0x0 }, - { 0x54043, 0x0 }, - { 0x54044, 0x0 }, { 0xd0000, 0x1 }, }; /* P2 message block paremeter for training firmware */ static struct dram_cfg_param lpddr4_fsp2_cfg_1gb[] = { { 0xd0000, 0x0 }, - { 0x54000, 0x0 }, - { 0x54001, 0x0 }, { 0x54002, 0x102 }, { 0x54003, 0x64 }, { 0x54004, 0x2 }, { 0x54005, 0x2228 }, { 0x54006, 0x11 }, - { 0x54007, 0x0 }, { 0x54008, 0x121f }, { 0x54009, 0xc8 }, - { 0x5400a, 0x0 }, { 0x5400b, 0x2 }, - { 0x5400c, 0x0 }, - { 0x5400d, 0x0 }, - { 0x5400e, 0x0 }, - { 0x5400f, 0x0 }, - { 0x54010, 0x0 }, - { 0x54011, 0x0 }, { 0x54012, 0x110 }, - { 0x54013, 0x0 }, - { 0x54014, 0x0 }, - { 0x54015, 0x0 }, - { 0x54016, 0x0 }, - { 0x54017, 0x0 }, - { 0x54018, 0x0 }, { 0x54019, 0x84 }, { 0x5401a, 0x31 }, { 0x5401b, 0x4d66 }, { 0x5401c, 0x4d00 }, - { 0x5401d, 0x0 }, { 0x5401e, 0x16 }, { 0x5401f, 0x84 }, { 0x54020, 0x31 }, { 0x54021, 0x4d66 }, { 0x54022, 0x4d00 }, - { 0x54023, 0x0 }, { 0x54024, 0x16 }, - { 0x54025, 0x0 }, - { 0x54026, 0x0 }, - { 0x54027, 0x0 }, - { 0x54028, 0x0 }, - { 0x54029, 0x0 }, - { 0x5402a, 0x0 }, { 0x5402b, 0x1000 }, { 0x5402c, 0x1 }, - { 0x5402d, 0x0 }, - { 0x5402e, 0x0 }, - { 0x5402f, 0x0 }, - { 0x54030, 0x0 }, - { 0x54031, 0x0 }, { 0x54032, 0x8400 }, { 0x54033, 0x3100 }, { 0x54034, 0x6600 }, @@ -2373,69 +2274,35 @@ static struct dram_cfg_param lpddr4_fsp2_cfg_1gb[] = { { 0x5403b, 0x4d }, { 0x5403c, 0x4d }, { 0x5403d, 0x1600 }, - { 0x5403e, 0x0 }, - { 0x5403f, 0x0 }, - { 0x54040, 0x0 }, - { 0x54041, 0x0 }, - { 0x54042, 0x0 }, - { 0x54043, 0x0 }, - { 0x54044, 0x0 }, { 0xd0000, 0x1 }, }; /* P0 2D message block paremeter for training firmware */ static struct dram_cfg_param lpddr4_fsp0_2d_cfg_1gb[] = { { 0xd0000, 0x0 }, - { 0x54000, 0x0 }, - { 0x54001, 0x0 }, - { 0x54002, 0x0 }, { 0x54003, 0xbb8 }, { 0x54004, 0x2 }, { 0x54005, 0x2228 }, { 0x54006, 0x11 }, - { 0x54007, 0x0 }, { 0x54008, 0x61 }, { 0x54009, 0xc8 }, - { 0x5400a, 0x0 }, { 0x5400b, 0x2 }, - { 0x5400c, 0x0 }, { 0x5400d, 0x100 }, - { 0x5400e, 0x0 }, { 0x5400f, 0x100 }, { 0x54010, 0x1f7f }, - { 0x54011, 0x0 }, { 0x54012, 0x110 }, - { 0x54013, 0x0 }, - { 0x54014, 0x0 }, - { 0x54015, 0x0 }, - { 0x54016, 0x0 }, - { 0x54017, 0x0 }, - { 0x54018, 0x0 }, { 0x54019, 0x2dd4 }, { 0x5401a, 0x31 }, { 0x5401b, 0x4d66 }, { 0x5401c, 0x4d00 }, - { 0x5401d, 0x0 }, { 0x5401e, 0x16 }, { 0x5401f, 0x2dd4 }, { 0x54020, 0x31 }, { 0x54021, 0x4d66 }, { 0x54022, 0x4d00 }, - { 0x54023, 0x0 }, { 0x54024, 0x16 }, - { 0x54025, 0x0 }, - { 0x54026, 0x0 }, - { 0x54027, 0x0 }, - { 0x54028, 0x0 }, - { 0x54029, 0x0 }, - { 0x5402a, 0x0 }, { 0x5402b, 0x1000 }, { 0x5402c, 0x1 }, - { 0x5402d, 0x0 }, - { 0x5402e, 0x0 }, - { 0x5402f, 0x0 }, - { 0x54030, 0x0 }, - { 0x54031, 0x0 }, { 0x54032, 0xd400 }, { 0x54033, 0x312d }, { 0x54034, 0x6600 }, @@ -2448,13 +2315,6 @@ static struct dram_cfg_param lpddr4_fsp0_2d_cfg_1gb[] = { { 0x5403b, 0x4d }, { 0x5403c, 0x4d }, { 0x5403d, 0x1600 }, - { 0x5403e, 0x0 }, - { 0x5403f, 0x0 }, - { 0x54040, 0x0 }, - { 0x54041, 0x0 }, - { 0x54042, 0x0 }, - { 0x54043, 0x0 }, - { 0x54044, 0x0 }, { 0xd0000, 0x1 }, }; @@ -2549,6 +2409,7 @@ static struct dram_cfg_param lpddr4_ddrc_cfg_4gb[] = { { 0x3d400204, 0x80808 }, { 0x3d400214, 0x7070707 }, { 0x3d400218, 0x7070707 }, + { 0x3d40021c, 0xf0f }, { 0x3d400250, 0x29001701 }, { 0x3d400254, 0x2c }, { 0x3d40025c, 0x4000030 }, @@ -3065,6 +2926,7 @@ static struct dram_cfg_param lpddr4_ddrc_cfg_2gb[] = { { 0x3d400204, 0x80808 }, { 0x3d400214, 0x7070707 }, { 0x3d400218, 0x7070707 }, + { 0x3d40021c, 0xf0f }, { 0x3d400250, 0x29001701 }, { 0x3d400254, 0x2c }, { 0x3d40025c, 0x4000030 }, @@ -3558,9 +3420,36 @@ static struct dram_cfg_param ddr_ddrphy_cfg_alt_patch[] = { { 0x120a5, 0x2 }, }; -struct dram_timing_info *spl_dram_init(const char *model, int sizemb) +/* 4GB single Die patch (MT53E1G32D2FW-046 revC) */ +static struct dram_cfg_param ddr_ddrc_cfg_4gb_single_die_patch[] = { + { 0x3d400000, 0xa1080020 }, + { 0x3d400064, 0x5b011d }, + { 0x3d40011c, 0x402 }, + { 0x3d400138, 0x123 }, + { 0x3d4000f4, 0x699 }, + { 0x3d400200, 0x1f }, + { 0x3d40021c, 0xf07 }, + { 0x3d402064, 0xc0026 }, + { 0x3d40211c, 0x302 }, + { 0x3d402138, 0x27 }, + { 0x3d4020f4, 0x599 }, + { 0x3d403064, 0x3000a }, + { 0x3d40311c, 0x302 }, + { 0x3d403138, 0xa }, + { 0x3d4030f4, 0x599 } +}; + +static struct dram_cfg_param fsp_msg_4gb_single_die_patch[] = { + { 0x00054012, 0x110 }, + { 0x0005402c, 0x1 }, +}; + +struct dram_timing_info *spl_dram_init(const char *model, struct venice_board_info *info, + char *dram_desc, size_t sz_desc) { struct dram_timing_info *dram_timing; + int sizemb = (16 << info->sdram_size); + int i; switch (sizemb) { case 512: @@ -3574,6 +3463,21 @@ struct dram_timing_info *spl_dram_init(const char *model, int sizemb) break; case 4096: dram_timing = &dram_timing_4gb; + if (info->sdram_variant == 1) { + if (dram_desc) + strlcpy(dram_desc, "single-die", sz_desc); + apply_cfg_patch(dram_timing->ddrc_cfg, dram_timing->ddrc_cfg_num, + ddr_ddrc_cfg_4gb_single_die_patch, + ARRAY_SIZE(ddr_ddrc_cfg_4gb_single_die_patch)); + for (i = 0; i < 4; i++) { + apply_cfg_patch(dram_timing->fsp_msg[i].fsp_cfg, + dram_timing->fsp_msg[i].fsp_cfg_num, + fsp_msg_4gb_single_die_patch, + ARRAY_SIZE(fsp_msg_4gb_single_die_patch)); + } + } else if (dram_desc) { + strlcpy(dram_desc, "dual-die", sz_desc); + } break; default: printf("unsupported"); @@ -3593,5 +3497,8 @@ struct dram_timing_info *spl_dram_init(const char *model, int sizemb) ARRAY_SIZE(ddr_ddrphy_cfg_alt_patch)); } + if (ddr_init(dram_timing)) + return NULL; + return dram_timing; } diff --git a/board/gateworks/venice/lpddr4_timing_imx8mn.c b/board/gateworks/venice/lpddr4_timing_imx8mn.c index e7d04822c9c..cad4fc0d31c 100644 --- a/board/gateworks/venice/lpddr4_timing_imx8mn.c +++ b/board/gateworks/venice/lpddr4_timing_imx8mn.c @@ -4,6 +4,8 @@ #include <string.h> #include <asm/arch/ddr.h> +#include "eeprom.h" + /* * Generated code from MX8M_DDR_tool v3.20 using RPAv15 */ @@ -2369,26 +2371,36 @@ static struct dram_timing_info dram_timing_2gb_dual_die = { .fsp_table = { 3200, 400, 100, }, }; -struct dram_timing_info *spl_dram_init(const char *model, int sizemb) +struct dram_timing_info *spl_dram_init(const char *model, struct venice_board_info *info, + char *dram_desc, size_t sz_desc) { struct dram_timing_info *dram_timing; + int sizemb = (16 << info->sdram_size); switch (sizemb) { case 1024: dram_timing = &dram_timing_1gb_single_die; + if (dram_desc) + strlcpy(dram_desc, "single-die", sz_desc); break; case 2048: if (!strcmp(model, "GW7902-SP466-A") || !strcmp(model, "GW7902-SP466-B")) { dram_timing = &dram_timing_2gb_dual_die; + if (dram_desc) + strlcpy(dram_desc, "dual-die", sz_desc); } else { dram_timing = &dram_timing_2gb_single_die; + if (dram_desc) + strlcpy(dram_desc, "single-die", sz_desc); } break; default: printf("unsupported"); dram_timing = &dram_timing_2gb_dual_die; } + if (ddr_init(dram_timing)) + return NULL; return dram_timing; } diff --git a/board/gateworks/venice/lpddr4_timing_imx8mp.c b/board/gateworks/venice/lpddr4_timing_imx8mp.c index 36c4cb147e8..f2d5d9ce565 100644 --- a/board/gateworks/venice/lpddr4_timing_imx8mp.c +++ b/board/gateworks/venice/lpddr4_timing_imx8mp.c @@ -1,8 +1,11 @@ // SPDX-License-Identifier: GPL-2.0+ #include <linux/kernel.h> +#include <string.h> #include <asm/arch/ddr.h> +#include "eeprom.h" + /* * Generated code from MX8M_DDR_tool v3.30 using MX8M_Plus RPAv7 */ @@ -2378,21 +2381,29 @@ static struct dram_timing_info dram_timing_4gb_dual_die = { .fsp_table = { 4000, 400, 100, }, }; -struct dram_timing_info *spl_dram_init(const char *model, int sizemb) +struct dram_timing_info *spl_dram_init(const char *model, struct venice_board_info *info, + char *dram_desc, size_t sz_desc) { struct dram_timing_info *dram_timing; + int sizemb = (16 << info->sdram_size); switch (sizemb) { case 1024: dram_timing = &dram_timing_1gb_single_die; + if (dram_desc) + strlcpy(dram_desc, "single-die", sz_desc); break; case 4096: dram_timing = &dram_timing_4gb_dual_die; + if (dram_desc) + strlcpy(dram_desc, "dual-die", sz_desc); break; default: printf("unsupported"); dram_timing = &dram_timing_4gb_dual_die; } + if (ddr_init(dram_timing)) + return NULL; return dram_timing; } diff --git a/board/gateworks/venice/spl.c b/board/gateworks/venice/spl.c index e813f3e763e..2c303211d32 100644 --- a/board/gateworks/venice/spl.c +++ b/board/gateworks/venice/spl.c @@ -188,9 +188,10 @@ static int power_init_board(const char *model, struct udevice *gsc) void board_init_f(ulong dummy) { struct dram_timing_info *dram_timing; + struct venice_board_info *eeprom; struct udevice *bus, *dev; const char *model; - int dram_szmb; + char dram_desc[32]; int i, ret; arch_cpu_init(); @@ -249,23 +250,89 @@ void board_init_f(ulong dummy) break; mdelay(1); } - dram_szmb = venice_eeprom_init(0); + eeprom = venice_eeprom_init(0); model = eeprom_get_model(); /* PMIC */ power_init_board(model, dev); /* DDR initialization */ - printf("DRAM : LPDDR4 "); - if (dram_szmb > 512) - printf("%d GiB", dram_szmb / 1024); - else - printf("%d MiB", dram_szmb); - dram_timing = spl_dram_init(model, dram_szmb); - printf(" %dMT/s %dMHz\n", - dram_timing->fsp_msg[0].drate, - dram_timing->fsp_msg[0].drate / 2); - ddr_init(dram_timing); + dram_desc[0] = 0; + dram_timing = spl_dram_init(model, eeprom, dram_desc, sizeof(dram_desc)); + if (dram_timing) { + int dram_szmb = (16 << eeprom->sdram_size); + + printf("DRAM : LPDDR4 "); + if (dram_szmb > 512) + printf("%d GiB", dram_szmb / 1024); + else + printf("%d MiB", dram_szmb); + printf(" %dMT/s %dMHz %s", + dram_timing->fsp_msg[0].drate, + dram_timing->fsp_msg[0].drate / 2, + dram_desc[0] ? dram_desc : ""); + +#ifdef DEBUG + u8 mr[9] = { 0 }; + /* Read MR5-MR8 to obtain details about DRAM part (and verify DRAM working) */ + for (i = 5; i < 9; i++) + mr[i] = lpddr4_mr_read(0xf, i) & 0xff; + + printf(" (0x%02x%02x%02x%02x", mr[5], mr[6], mr[7], mr[8]); + /* MR5 MFG_ID */ + switch (mr[5]) { + case 0xff: + printf(" Micron"); + break; + default: + break; + } + /* MR8 OP[7:6] Width */ + i = 0; + switch ((mr[8] >> 6) & 0x3) { + case 0: + i = 16; + break; + case 1: + i = 8; + break; + } + if (i) + printf(" x%d", i); + /* MR8 OP[5:2] Density */ + i = 0; + switch ((mr[8] >> 2) & 0xf) { + case 0: + i = 4; + break; + case 1: + i = 6; + break; + case 2: + i = 8; + break; + case 3: + i = 12; + break; + case 4: + i = 16; + break; + case 5: + i = 24; + break; + case 6: + i = 32; + break; + default: + break; + } + if (i) + printf(" %dGb per die", i); +#endif + puts(")\n"); + } else { + hang(); + } board_init_r(NULL, 0); } diff --git a/board/hisilicon/hikey/hikey.c b/board/hisilicon/hikey/hikey.c index 29165266630..5e60ab9d7b7 100644 --- a/board/hisilicon/hikey/hikey.c +++ b/board/hisilicon/hikey/hikey.c @@ -372,11 +372,6 @@ int misc_init_r(void) return 0; } -int board_init(void) -{ - return 0; -} - #ifdef CONFIG_MMC static int init_dwmmc(void) diff --git a/board/keymile/Kconfig b/board/keymile/Kconfig index 41458813858..b68c10f85e4 100644 --- a/board/keymile/Kconfig +++ b/board/keymile/Kconfig @@ -29,14 +29,6 @@ config KM_PHRAM help Start address of the physical RAM, which is the mounted /var folder. -config KM_RESERVED_PRAM - hex "Reserved RAM" - default 0x0 if MPC83xx - default 0x1000 if MPC85xx || ARCH_LS1021A - depends on !ARCH_SOCFPGA - help - Reserved physical RAM area at the end of memory for special purposes. - config KM_CRAMFS_ADDR hex "CRAMFS Address" default 0x83000000 if ARCH_LS1021A diff --git a/board/keymile/common/common.c b/board/keymile/common/common.c index 25897af2d8a..4bdaf90deff 100644 --- a/board/keymile/common/common.c +++ b/board/keymile/common/common.c @@ -53,7 +53,7 @@ int set_km_env(void) char *p; pnvramaddr = CFG_SYS_SDRAM_BASE + gd->ram_size - - CONFIG_KM_RESERVED_PRAM - CONFIG_KM_PHRAM - CONFIG_KM_PNVRAM; + CONFIG_KM_PHRAM - CONFIG_KM_PNVRAM; sprintf(envval, "0x%x", pnvramaddr); env_set("pnvramaddr", envval); @@ -61,12 +61,10 @@ int set_km_env(void) p = env_get("rootfssize"); if (p) strict_strtoul(p, 16, &rootfssize); - pram = (rootfssize + CONFIG_KM_RESERVED_PRAM + CONFIG_KM_PHRAM + - CONFIG_KM_PNVRAM) / 0x400; + pram = (rootfssize + CONFIG_KM_PHRAM + CONFIG_KM_PNVRAM) / 0x400; env_set_ulong("pram", pram); - varaddr = CFG_SYS_SDRAM_BASE + gd->ram_size - - CONFIG_KM_RESERVED_PRAM - CONFIG_KM_PHRAM; + varaddr = CFG_SYS_SDRAM_BASE + gd->ram_size - CONFIG_KM_PHRAM; env_set_hex("varaddr", varaddr); sprintf(envval, "0x%x", varaddr); env_set("varaddr", envval); diff --git a/board/keymile/common/qrio.c b/board/keymile/common/qrio.c index c8299483299..f8f8d5edede 100644 --- a/board/keymile/common/qrio.c +++ b/board/keymile/common/qrio.c @@ -18,6 +18,11 @@ #define DIRECT_OFF 0x18 #define GPRT_OFF 0x1c +// used to keep track of the user settings for the input/output +static u32 gprt_user[2] = { 0x0, 0x0 }; +// convert the bank offset to the correct static user gprt +#define QRIO_USER_GRPT_BANK(bank) gprt_user[(bank - 0x40) / 0x20] + void show_qrio(void) { void __iomem *qrio_base = (void *)CFG_SYS_QRIO_BASE; @@ -72,12 +77,13 @@ void qrio_set_gpio(u8 port_off, u8 gpio_nr, bool value) mask = 1U << gpio_nr; - gprt = in_be32(qrio_base + port_off + GPRT_OFF); + gprt = QRIO_USER_GRPT_BANK(port_off); if (value) gprt |= mask; else gprt &= ~mask; + QRIO_USER_GRPT_BANK(port_off) = gprt; out_be32(qrio_base + port_off + GPRT_OFF, gprt); } diff --git a/board/keymile/pg-wcom-ls102xa/MAINTAINERS b/board/keymile/pg-wcom-ls102xa/MAINTAINERS index ed5baf269a7..7d80cfbf64f 100644 --- a/board/keymile/pg-wcom-ls102xa/MAINTAINERS +++ b/board/keymile/pg-wcom-ls102xa/MAINTAINERS @@ -1,6 +1,6 @@ Hitachi Power Grids LS102XA BOARD -M: Aleksandar Gerasimovski <aleksandar.gerasimovski@hitachienergy.com> -M: Rainer Boschung <rainer.boschung@hitachienergy.com> +M: Holger Brunck <holger.brunck@hitachienergy.com> +M: Tomas Alvarez Vanoli <tomas.alvarez-vanoli@hitachienergy.com> S: Maintained F: board/keymile/pg-wcom-ls102xa/ F: board/keymile/common/ diff --git a/board/keymile/pg-wcom-ls102xa/pg-wcom-expu1.env b/board/keymile/pg-wcom-ls102xa/pg-wcom-expu1.env index 1054dbf9f54..c1c73b7da49 100644 --- a/board/keymile/pg-wcom-ls102xa/pg-wcom-expu1.env +++ b/board/keymile/pg-wcom-ls102xa/pg-wcom-expu1.env @@ -1,3 +1,4 @@ #include <env/pg-wcom/ls102xa.env> hostname=EXPU1 +netdev=eth2 diff --git a/board/keymile/pg-wcom-ls102xa/pg-wcom-ls102xa.c b/board/keymile/pg-wcom-ls102xa/pg-wcom-ls102xa.c index 409a55ebda6..7db75f4df3e 100644 --- a/board/keymile/pg-wcom-ls102xa/pg-wcom-ls102xa.c +++ b/board/keymile/pg-wcom-ls102xa/pg-wcom-ls102xa.c @@ -38,7 +38,7 @@ static uchar ivm_content[CONFIG_SYS_IVM_EEPROM_MAX_LEN]; int checkboard(void) { show_qrio(); - + i2c_deblock_gpio_cfg(); return 0; } @@ -96,8 +96,6 @@ int board_early_init_f(void) qrio_prstcfg(KM_DBG_ETH_RST, PRSTCFG_POWUP_UNIT_CORE_RST); qrio_prst(KM_DBG_ETH_RST, !qrio_get_pgy_pres_pin(), false); - i2c_deblock_gpio_cfg(); - /* enable the Unit LED (red) & Boot LED (on) */ qrio_set_leds(); diff --git a/board/keymile/pg-wcom-ls102xa/pg-wcom-seli8.env b/board/keymile/pg-wcom-ls102xa/pg-wcom-seli8.env index 1232fe9da8b..bbfa8194a7e 100644 --- a/board/keymile/pg-wcom-ls102xa/pg-wcom-seli8.env +++ b/board/keymile/pg-wcom-ls102xa/pg-wcom-seli8.env @@ -1,3 +1,4 @@ #include <env/pg-wcom/ls102xa.env> hostname=SELI8 +netdev=eth2 diff --git a/board/kontron/sl-mx8mm/sl-mx8mm.c b/board/kontron/sl-mx8mm/sl-mx8mm.c index 8dcc2ea54f6..2e387038395 100644 --- a/board/kontron/sl-mx8mm/sl-mx8mm.c +++ b/board/kontron/sl-mx8mm/sl-mx8mm.c @@ -116,11 +116,6 @@ int ft_board_setup(void *blob, struct bd_info *bd) return fdt_fixup_memory(blob, PHYS_SDRAM, gd->ram_size); } -int board_init(void) -{ - return 0; -} - int board_late_init(void) { if (!fdt_node_check_compatible(gd->fdt_blob, 0, "kontron,imx8mm-n802x-som") || diff --git a/board/kontron/sl28/sl28.c b/board/kontron/sl28/sl28.c index 0baf5c63f18..8a9502037fb 100644 --- a/board/kontron/sl28/sl28.c +++ b/board/kontron/sl28/sl28.c @@ -51,11 +51,6 @@ int board_early_init_f(void) return 0; } -int board_init(void) -{ - return 0; -} - int board_eth_init(struct bd_info *bis) { return pci_eth_init(bis); diff --git a/board/mediatek/mt7622/mt7622_rfb.c b/board/mediatek/mt7622/mt7622_rfb.c index 9d24c8cd412..405f393aade 100644 --- a/board/mediatek/mt7622/mt7622_rfb.c +++ b/board/mediatek/mt7622/mt7622_rfb.c @@ -10,8 +10,3 @@ #include <asm/global_data.h> DECLARE_GLOBAL_DATA_PTR; - -int board_init(void) -{ - return 0; -} diff --git a/board/mediatek/mt7981/mt7981_rfb.c b/board/mediatek/mt7981/mt7981_rfb.c index 846c715ca05..0ca87a88aed 100644 --- a/board/mediatek/mt7981/mt7981_rfb.c +++ b/board/mediatek/mt7981/mt7981_rfb.c @@ -4,7 +4,3 @@ * Author: Sam Shih <sam.shih@mediatek.com> */ -int board_init(void) -{ - return 0; -} diff --git a/board/mediatek/mt7986/mt7986_rfb.c b/board/mediatek/mt7986/mt7986_rfb.c index 846c715ca05..0ca87a88aed 100644 --- a/board/mediatek/mt7986/mt7986_rfb.c +++ b/board/mediatek/mt7986/mt7986_rfb.c @@ -4,7 +4,3 @@ * Author: Sam Shih <sam.shih@mediatek.com> */ -int board_init(void) -{ - return 0; -} diff --git a/board/mediatek/mt7987/mt7987_rfb.c b/board/mediatek/mt7987/mt7987_rfb.c index fcb844deed8..c5cb33f06f7 100644 --- a/board/mediatek/mt7987/mt7987_rfb.c +++ b/board/mediatek/mt7987/mt7987_rfb.c @@ -4,7 +4,3 @@ * Author: Sam Shih <sam.shih@mediatek.com> */ -int board_init(void) -{ - return 0; -} diff --git a/board/mediatek/mt7988/mt7988_rfb.c b/board/mediatek/mt7988/mt7988_rfb.c index 846c715ca05..0ca87a88aed 100644 --- a/board/mediatek/mt7988/mt7988_rfb.c +++ b/board/mediatek/mt7988/mt7988_rfb.c @@ -4,7 +4,3 @@ * Author: Sam Shih <sam.shih@mediatek.com> */ -int board_init(void) -{ - return 0; -} diff --git a/board/mediatek/mt8365_evk/mt8365_evk.c b/board/mediatek/mt8365_evk/mt8365_evk.c index 723a50fec00..41a6febf03d 100644 --- a/board/mediatek/mt8365_evk/mt8365_evk.c +++ b/board/mediatek/mt8365_evk/mt8365_evk.c @@ -6,11 +6,6 @@ #include <asm/armv8/mmu.h> -int board_init(void) -{ - return 0; -} - static struct mm_region mt8365_evk_mem_map[] = { { /* DDR */ diff --git a/board/mediatek/mt8516/mt8516_pumpkin.c b/board/mediatek/mt8516/mt8516_pumpkin.c index 930bfec3483..c383d194357 100644 --- a/board/mediatek/mt8516/mt8516_pumpkin.c +++ b/board/mediatek/mt8516/mt8516_pumpkin.c @@ -6,11 +6,6 @@ #include <dm.h> #include <net.h> -int board_init(void) -{ - return 0; -} - int board_late_init(void) { struct udevice *dev; diff --git a/board/microchip/mpfs_icicle/mpfs_icicle.c b/board/microchip/mpfs_icicle/mpfs_icicle.c index 6b6984eae3f..ba622e38ee5 100644 --- a/board/microchip/mpfs_icicle/mpfs_icicle.c +++ b/board/microchip/mpfs_icicle/mpfs_icicle.c @@ -73,13 +73,22 @@ int board_fit_config_name_match(const char *name) for (int i = 0; i < list_len; i++) { int len, match; const char *compat; + char copy[64]; char *devendored; compat = fdt_stringlist_get(fdt, 0, "compatible", i, &len); if (!compat) return -EINVAL; - strtok((char *)compat, ","); + /* + * The naming scheme for compatibles doesn't produce anything + * close to this long. + */ + if (len >= 64) + return -EINVAL; + + strncpy(copy, compat, 64); + strtok(copy, ","); devendored = strtok(NULL, ","); if (!devendored) diff --git a/board/nuvoton/arbel_evb/arbel_evb.c b/board/nuvoton/arbel_evb/arbel_evb.c index 699e5ca54a7..16dbaa96e8c 100644 --- a/board/nuvoton/arbel_evb/arbel_evb.c +++ b/board/nuvoton/arbel_evb/arbel_evb.c @@ -22,11 +22,6 @@ DECLARE_GLOBAL_DATA_PTR; -int board_init(void) -{ - return 0; -} - phys_size_t get_effective_memsize(void) { /* Use bank0 only */ diff --git a/board/nuvoton/poleg_evb/poleg_evb.c b/board/nuvoton/poleg_evb/poleg_evb.c index 2faa34954eb..0a3c052a019 100644 --- a/board/nuvoton/poleg_evb/poleg_evb.c +++ b/board/nuvoton/poleg_evb/poleg_evb.c @@ -14,11 +14,6 @@ DECLARE_GLOBAL_DATA_PTR; -int board_init(void) -{ - return 0; -} - int dram_init(void) { struct npcm_gcr *gcr = (struct npcm_gcr *)NPCM_GCR_BA; diff --git a/board/openpiton/riscv64/openpiton-riscv64.c b/board/openpiton/riscv64/openpiton-riscv64.c index 4c957e88992..62007f2f81d 100644 --- a/board/openpiton/riscv64/openpiton-riscv64.c +++ b/board/openpiton/riscv64/openpiton-riscv64.c @@ -25,8 +25,3 @@ void board_boot_order(u32 *spl_boot_list) spl_boot_list[i] = boot_devices[i]; } #endif - -int board_init(void) -{ - return 0; -} diff --git a/board/phytec/phycore_am62ax/phycore-am62ax.c b/board/phytec/phycore_am62ax/phycore-am62ax.c index 14b8959c07a..3e1c4102cc1 100644 --- a/board/phytec/phycore_am62ax/phycore-am62ax.c +++ b/board/phytec/phycore_am62ax/phycore-am62ax.c @@ -11,11 +11,6 @@ #include "../common/am6_som_detection.h" -int board_init(void) -{ - return 0; -} - int dram_init(void) { return fdtdec_setup_mem_size_base(); diff --git a/board/phytec/phycore_am62x/phycore-am62x.c b/board/phytec/phycore_am62x/phycore-am62x.c index b199fdaa59b..51da864aa80 100644 --- a/board/phytec/phycore_am62x/phycore-am62x.c +++ b/board/phytec/phycore_am62x/phycore-am62x.c @@ -19,11 +19,6 @@ DECLARE_GLOBAL_DATA_PTR; -int board_init(void) -{ - return 0; -} - static u8 phytec_get_am62_ddr_size_default(void) { int ret; diff --git a/board/phytec/phycore_am64x/phycore-am64x.c b/board/phytec/phycore_am64x/phycore-am64x.c index f14c87f5c72..33c39376ceb 100644 --- a/board/phytec/phycore_am64x/phycore-am64x.c +++ b/board/phytec/phycore_am64x/phycore-am64x.c @@ -19,11 +19,6 @@ DECLARE_GLOBAL_DATA_PTR; -int board_init(void) -{ - return 0; -} - static u8 phytec_get_am64_ddr_size_default(void) { int ret; diff --git a/board/phytec/phycore_imx8mm/phycore_imx8mm.env b/board/phytec/phycore_imx8mm/phycore_imx8mm.env index 402d967ab7d..b3f09154328 100644 --- a/board/phytec/phycore_imx8mm/phycore_imx8mm.env +++ b/board/phytec/phycore_imx8mm/phycore_imx8mm.env @@ -1,65 +1,15 @@ -#include <env/phytec/rauc.env> - -bootcmd= - mmc dev ${mmcdev}; - if mmc rescan; then - if test ${doraucboot} = 1; then - run raucinit; - fi; - if run loadimage; then - run mmcboot; - else - run netboot; - fi; - fi; -console=ttymxc2,115200 +console=ttymxc2,CONFIG_BAUDRATE emmc_dev=2 -fdt_addr_r=0x48000000 fdtfile=CONFIG_DEFAULT_FDT_FILE -image=Image +fdt_addr_r=0x40480000 +fdt_overlay_addr_r=0x404a0000 +kernel_addr_r=0x40a00000 +kernel_comp_addr_r=0x43a00000 +kernel_comp_size=0x1e00000 +pxefile_addr_r=0x45800000 +ramdisk_addr_r=0x45802000 +scriptaddr=0x47600000 +script_offset_f=0x0 +script_size_f=0x2000 ip_dyn=yes -loadimage=fatload mmc ${mmcdev}:${mmcpart} ${loadaddr} ${image} -loadfdt=fatload mmc ${mmcdev}:${mmcpart} ${fdt_addr_r} ${fdtfile} -mmcargs= - setenv bootargs console=${console} - root=/dev/mmcblk${mmcdev}p${mmcroot} ${raucargs} rootwait rw -mmcautodetect=yes -mmcboot= - echo Booting from mmc ...; - run mmcargs; - if run loadfdt; then - if test ${dofitboot} = 1; then - booti ${loadaddr} - ${fdt_addr_r} - else - echo WARN: Cannot load the DT; - fi; - fi; -mmcdev=CONFIG_ENV_MMC_DEVICE_INDEX -mmcpart=1 -mmcroot=2 -netargs= - setenv bootargs console=${console} root=/dev/nfs ip=dhcp - nfsroot=${serverip}:${nfsroot},v3,tcp -netboot= - echo Booting from net ...; - if test ${ip_dyn} = yes; then - setenv get_cmd dhcp; - else - setenv get_cmd tftp; - fi; - ${get_cmd} ${loadaddr} ${image}; - run netargs; - if ${get_cmd} ${fdt_addr_r} ${fdtfile}; then - booti ${loadaddr} - ${fdt_addr_r}; - else - echo WARN: Cannot load the DT; - fi; nfsroot=/srv/nfs -update_bootimg= - mmc dev ${mmcdev}; - if dhcp ${loadaddr} ${update_filepath}/${update_filename}; then - setexpr fw_sz ${filesize} / 0x200; - mmc write ${loadaddr} ${update_offset} ${fw_sz}; - fi; -update_filename=flash.bin -update_offset=0x42 diff --git a/board/phytec/phycore_imx8mp/phycore_imx8mp.env b/board/phytec/phycore_imx8mp/phycore_imx8mp.env index 69690aa92e4..9a129a0a4bf 100644 --- a/board/phytec/phycore_imx8mp/phycore_imx8mp.env +++ b/board/phytec/phycore_imx8mp/phycore_imx8mp.env @@ -1,82 +1,28 @@ -#include <env/phytec/rauc.env> -#include <env/phytec/overlays.env> - bootcmd= if test ${dofastboot} = 1; then fastboot 0; fi; - mmc dev ${mmcdev}; - if mmc rescan; then - run spiprobe; - if test ${doraucboot} = 1; then - run raucinit; - fi; - if run loadimage; then - run mmcboot; - else - run netboot; - fi; - fi; -console=ttymxc0,115200 + bootflow scan -lb; +bootmeths=script efi +boot_targets=mmc2 mmc1 usb ethernet bootenv_addr_r=0x49100000 -fdtoverlay_addr_r=0x49000000 +boot_script_dhcp=boot.scr.uimg +console=ttymxc0,115200 dofastboot=0 -emmc_dev=2 fastboot_raw_partition_all=0 4194304 fastboot_raw_partition_bootloader=64 8128 fdt_addr_r=0x48000000 fdtfile=CONFIG_DEFAULT_FDT_FILE -image=Image +fdtoverlay_addr_r=0x49000000 ip_dyn=yes +kernel_addr_r=0x5A080000 +kernel_comp_addr_r=0x60000000 +kernel_comp_size=0x2000000 mtdparts=30bb0000.spi:3840k(u-boot),128k(env),128k(env_redund),-(none) mtdids=nor0=30bb0000.spi -spiprobe=true -loadfdt=fatload mmc ${mmcdev}:${mmcpart} ${fdt_addr_r} ${fdtfile} -loadimage=fatload mmc ${mmcdev}:${mmcpart} ${loadaddr} ${image} -mmcargs= - setenv bootargs ${mcore_clk} console=${console} - root=/dev/mmcblk${mmcdev}p${mmcroot} ${raucargs} rootwait rw mmcautodetect=yes -mmcboot= - echo Booting from mmc ...; - if test ${no_bootenv} = 0; then - if run mmc_load_bootenv; then - env import -t ${bootenv_addr_r} ${filesize}; - fi; - fi; - run mmcargs; - if run loadfdt; then - run mmc_apply_overlays; - booti ${loadaddr} - ${fdt_addr_r}; - else - echo WARN: Cannot load the DT; - fi; mmcdev=CONFIG_ENV_MMC_DEVICE_INDEX -mmcpart=1 -mmcroot=2 -netargs= - setenv bootargs ${mcore_clk} console=${console} root=/dev/nfs ip=dhcp - nfsroot=${serverip}:${nfsroot},v3,tcp -netboot= - echo Booting from net ...; - if test ${ip_dyn} = yes; then - setenv get_cmd dhcp; - else - setenv get_cmd tftp; - fi; - if test ${no_bootenv} = 0; then - if run net_load_bootenv; then - env import -t ${bootenv_addr_r} ${filesize}; - fi; - fi; - ${get_cmd} ${loadaddr} ${image}; - run netargs; - if ${get_cmd} ${fdt_addr_r} ${fdtfile}; then - run net_apply_overlays; - booti ${loadaddr} - ${fdt_addr_r}; - else - echo WARN: Cannot load the DT; - fi; nfsroot=/srv/nfs -prepare_mcore=setenv mcore_clk clk-imx8mp.mcore_booted -sd_dev=1 +pxefile_addr_r=0x58600000 +ramdisk_addr_r=0x5E000000 +scriptaddr=0x40000000 diff --git a/board/phytec/phycore_imx93/phycore-imx93.c b/board/phytec/phycore_imx93/phycore-imx93.c index a55795e0603..8d2caf8bbef 100644 --- a/board/phytec/phycore_imx93/phycore-imx93.c +++ b/board/phytec/phycore_imx93/phycore-imx93.c @@ -6,10 +6,7 @@ * Copyright (C) 2024 PHYTEC Messtechnik GmbH */ -#include <asm/arch-imx9/ccm_regs.h> #include <asm/arch/sys_proto.h> -#include <asm/arch-imx9/imx93_pins.h> -#include <asm/arch/clock.h> #include <asm/global_data.h> #include <asm/mach-imx/boot_mode.h> #include <env.h> diff --git a/board/phytec/phycore_imx93/spl.c b/board/phytec/phycore_imx93/spl.c index a4d2aaac320..7b5d38d438f 100644 --- a/board/phytec/phycore_imx93/spl.c +++ b/board/phytec/phycore_imx93/spl.c @@ -14,9 +14,7 @@ #include <asm/mach-imx/boot_mode.h> #include <asm/mach-imx/ele_api.h> #include <asm/sections.h> -#include <hang.h> #include <init.h> -#include <log.h> #include <power/pmic.h> #include <power/pca9450.h> #include <spl.h> @@ -25,11 +23,6 @@ DECLARE_GLOBAL_DATA_PTR; -/* - * Will be part of drivers/power/regulator/pca9450.c - * when pca9451a support is added. - */ -#define PCA9450_REG_PWRCTRL_TOFF_DEB BIT(5) #define EEPROM_ADDR 0x50 /* diff --git a/board/phytium/durian/durian.c b/board/phytium/durian/durian.c index 01e210fcdd1..9fc63febdac 100644 --- a/board/phytium/durian/durian.c +++ b/board/phytium/durian/durian.c @@ -37,11 +37,6 @@ int dram_init_banksize(void) return 0; } -int board_init(void) -{ - return 0; -} - void reset_cpu(void) { struct arm_smccc_res res; diff --git a/board/phytium/pe2201/pe2201.c b/board/phytium/pe2201/pe2201.c index fbbf6789b50..6824454cdf4 100644 --- a/board/phytium/pe2201/pe2201.c +++ b/board/phytium/pe2201/pe2201.c @@ -50,11 +50,6 @@ int dram_init_banksize(void) return 0; } -int board_init(void) -{ - return 0; -} - void reset_cpu(void) { struct arm_smccc_res res; diff --git a/board/phytium/pomelo/pomelo.c b/board/phytium/pomelo/pomelo.c index 0ea335e7486..3984ddc4594 100644 --- a/board/phytium/pomelo/pomelo.c +++ b/board/phytium/pomelo/pomelo.c @@ -32,11 +32,6 @@ int dram_init(void) return 0; } -int board_init(void) -{ - return 0; -} - void reset_cpu(void) { struct arm_smccc_res res; diff --git a/board/renesas/r2dplus/r2dplus.c b/board/renesas/r2dplus/r2dplus.c index 78b8cb4ac34..6ea903f2d62 100644 --- a/board/renesas/r2dplus/r2dplus.c +++ b/board/renesas/r2dplus/r2dplus.c @@ -17,11 +17,6 @@ int checkboard(void) return 0; } -int board_init(void) -{ - return 0; -} - int board_late_init(void) { return 0; diff --git a/board/renesas/rzg2l/rzg2l.c b/board/renesas/rzg2l/rzg2l.c index 0f6d6e7f514..509c5dbb156 100644 --- a/board/renesas/rzg2l/rzg2l.c +++ b/board/renesas/rzg2l/rzg2l.c @@ -51,8 +51,3 @@ int ft_board_setup(void *blob, struct bd_info *bd) { return 0; } - -int board_init(void) -{ - return 0; -} diff --git a/board/samsung/e850-96/e850-96.c b/board/samsung/e850-96/e850-96.c index 3bbd95201b5..a6c264d1248 100644 --- a/board/samsung/e850-96/e850-96.c +++ b/board/samsung/e850-96/e850-96.c @@ -4,9 +4,57 @@ * Author: Sam Protsenko <semen.protsenko@linaro.org> */ +#include <efi_loader.h> +#include <env.h> #include <init.h> +#include <mapmem.h> +#include <asm/io.h> #include "fw.h" +/* OTP Controller base address and register offsets */ +#define EXYNOS850_OTP_BASE 0x10000000 +#define OTP_CHIPID0 0x4 +#define OTP_CHIPID1 0x8 + +struct efi_fw_image fw_images[] = { + { + .image_type_id = E850_96_FWBL1_IMAGE_GUID, + .fw_name = u"E850-96-FWBL1", + .image_index = 1, + }, + { + .image_type_id = E850_96_EPBL_IMAGE_GUID, + .fw_name = u"E850-96-EPBL", + .image_index = 2, + }, + { + .image_type_id = E850_96_BL2_IMAGE_GUID, + .fw_name = u"E850-96-BL2", + .image_index = 3, + }, + { + .image_type_id = E850_96_BOOTLOADER_IMAGE_GUID, + .fw_name = u"E850-96-BOOTLOADER", + .image_index = 4, + }, + { + .image_type_id = E850_96_EL3_MON_IMAGE_GUID, + .fw_name = u"E850-96-EL3-MON", + .image_index = 5, + }, +}; + +struct efi_capsule_update_info update_info = { + .dfu_string = "mmc 0=" + "fwbl1.img raw 0x0 0x18 mmcpart 1;" + "epbl.img raw 0x18 0x98 mmcpart 1;" + "bl2.img raw 0xb0 0x200 mmcpart 1;" + "bootloader.img raw 0x438 0x1000 mmcpart 1;" + "el3_mon.img raw 0x1438 0x200 mmcpart 1", + .num_images = ARRAY_SIZE(fw_images), + .images = fw_images, +}; + int dram_init(void) { return fdtdec_setup_mem_size_base(); @@ -17,15 +65,39 @@ int dram_init_banksize(void) return fdtdec_setup_memory_banksize(); } -int board_init(void) +/* Read the unique SoC ID from OTP registers */ +static u64 get_chip_id(void) { - return 0; + void __iomem *otp_base; + u64 val; + + otp_base = map_sysmem(EXYNOS850_OTP_BASE, 12); + val = readl(otp_base + OTP_CHIPID0); + val |= (u64)readl(otp_base + OTP_CHIPID1) << 32UL; + unmap_sysmem(otp_base); + + return val; +} + +static void setup_serial(void) +{ + char serial_str[17] = { 0 }; + u64 serial_num; + + if (env_get("serial#")) + return; + + serial_num = get_chip_id(); + snprintf(serial_str, sizeof(serial_str), "%016llx", serial_num); + env_set("serial#", serial_str); } int board_late_init(void) { int err; + setup_serial(); + /* * Do this in board_late_init() to make sure MMC is not probed before * efi_init_early(). diff --git a/board/samsung/e850-96/e850-96.env b/board/samsung/e850-96/e850-96.env index 5ac76bcef02..aed7a71046d 100644 --- a/board/samsung/e850-96/e850-96.env +++ b/board/samsung/e850-96/e850-96.env @@ -7,5 +7,49 @@ pxefile_addr_r=0x8c200000 ramdisk_addr_r=0x8c300000 fdtfile=CONFIG_DEFAULT_FDT_FILE +dfu_alt_info= + rawemmc raw 0 0x747c000 mmcpart 1; + esp part 0 1; + rootfs part 0 2; + fwbl1 raw 0x0 0x18 mmcpart 1; + epbl raw 0x18 0x98 mmcpart 1; + bl2 raw 0xb0 0x200 mmcpart 1; + dram_train raw 0x2b0 0x20 mmcpart 1; + ect_test raw 0x2d0 0x64 mmcpart 1; + acpm_test raw 0x334 0x104 mmcpart 1; + bootloader raw 0x438 0x1000 mmcpart 1; + el3_mon raw 0x1438 0x200 mmcpart 1 + partitions=name=esp,start=512K,size=128M,bootable,type=system; partitions+=name=rootfs,size=-,bootable,type=linux + +partitions_android=name=esp,start=512K,size=128M,bootable,type=system; +partitions_android+=name=efs,size=20M,uuid=${uuid_gpt_efs}; +partitions_android+=name=env,size=16K,uuid=${uuid_gpt_env}; +partitions_android+=name=kernel,size=30M,uuid=${uuid_gpt_kernel}; +partitions_android+=name=ramdisk,size=26M,uuid=${uuid_gpt_ramdisk}; +partitions_android+=name=dtbo_a,size=1M,uuid=${uuid_gpt_dtbo}; +partitions_android+=name=dtbo_b,size=1M,uuid=${uuid_gpt_dtbo}; +partitions_android+=name=ldfw,size=4016K,uuid=${uuid_gpt_ldfw}; +partitions_android+=name=keystorage,size=8K,uuid=${uuid_gpt_keystorage}; +partitions_android+=name=tzsw,size=1M,uuid=${uuid_gpt_tzsw}; +partitions_android+=name=harx,size=2M,uuid=${uuid_gpt_harx}; +partitions_android+=name=harx_rkp,size=2M,uuid=${uuid_gpt_harx_rkp}; +partitions_android+=name=logo,size=40M,uuid=${uuid_gpt_logo}; +partitions_android+=name=super,size=3600M,uuid=${uuid_gpt_super}; +partitions_android+=name=cache,size=300M,uuid=${uuid_gpt_cache}; +partitions_android+=name=modem,size=100M,uuid=${uuid_gpt_modem}; +partitions_android+=name=boot_a,size=100M,uuid=${uuid_gpt_boot}; +partitions_android+=name=boot_b,size=100M,uuid=${uuid_gpt_boot}; +partitions_android+=name=persist,size=30M,uuid=${uuid_gpt_persist}; +partitions_android+=name=recovery_a,size=40M,uuid=${uuid_gpt_recovery}; +partitions_android+=name=recovery_b,size=40M,uuid=${uuid_gpt_recovery}; +partitions_android+=name=misc,size=40M,uuid=${uuid_gpt_misc}; +partitions_android+=name=mnv,size=20M,uuid=${uuid_gpt_mnv}; +partitions_android+=name=frp,size=512K,uuid=${uuid_gpt_frp}; +partitions_android+=name=vbmeta_a,size=64K,uuid=${uuid_gpt_vbmeta}; +partitions_android+=name=vbmeta_b,size=64K,uuid=${uuid_gpt_vbmeta}; +partitions_android+=name=metadata,size=16M,uuid=${uuid_gpt_metadata}; +partitions_android+=name=dtb_a,size=1M,uuid=${uuid_gpt_dtb}; +partitions_android+=name=dtb_b,size=1M,uuid=${uuid_gpt_dtb}; +partitions_android+=name=userdata,size=-,uuid=${uuid_gpt_userdata} diff --git a/board/sandbox/sandbox.c b/board/sandbox/sandbox.c index 43f4edc39e9..0dc23a27dfc 100644 --- a/board/sandbox/sandbox.c +++ b/board/sandbox/sandbox.c @@ -104,11 +104,6 @@ int dram_init(void) return 0; } -int board_init(void) -{ - return 0; -} - int ft_board_setup(void *fdt, struct bd_info *bd) { /* Create an arbitrary reservation to allow testing OF_BOARD_SETUP.*/ diff --git a/board/siemens/capricorn/MAINTAINERS b/board/siemens/capricorn/MAINTAINERS index 3b4bd64dd00..9c8c7a6ecdc 100644 --- a/board/siemens/capricorn/MAINTAINERS +++ b/board/siemens/capricorn/MAINTAINERS @@ -1,6 +1,5 @@ CAPRICORN BOARD M: Alexander Sverdlin <alexander.sverdlin@siemens.com> -M: Anatolij Gustschin <agust@denx.de> M: Heiko Schocher <hs@denx.de> M: Walter Schweizer <walter.schweizer@siemens.com> S: Maintained diff --git a/board/siemens/iot2050/board.c b/board/siemens/iot2050/board.c index 161210c60a9..c75f4a0d084 100644 --- a/board/siemens/iot2050/board.c +++ b/board/siemens/iot2050/board.c @@ -367,11 +367,6 @@ static void m2_connector_setup(void) m2_overlay_prepare(); } -int board_init(void) -{ - return 0; -} - int dram_init(void) { struct udevice *sysinfo; diff --git a/board/sipeed/maix/maix.c b/board/sipeed/maix/maix.c index 08077a1f9e1..f76e1ae75a1 100644 --- a/board/sipeed/maix/maix.c +++ b/board/sipeed/maix/maix.c @@ -43,8 +43,3 @@ int board_early_init_f(void) { return sram_init(); } - -int board_init(void) -{ - return 0; -} diff --git a/board/sophgo/licheerv_nano/board.c b/board/sophgo/licheerv_nano/board.c index eaa47be1739..e6099d35dbf 100644 --- a/board/sophgo/licheerv_nano/board.c +++ b/board/sophgo/licheerv_nano/board.c @@ -3,7 +3,3 @@ * Copyright (c) 2024, Kongyang Liu <seashell11234455@gmail.com> */ -int board_init(void) -{ - return 0; -} diff --git a/board/spacemit/bananapi-f3/board.c b/board/spacemit/bananapi-f3/board.c index 2631cdd49e0..ea416621544 100644 --- a/board/spacemit/bananapi-f3/board.c +++ b/board/spacemit/bananapi-f3/board.c @@ -3,7 +3,3 @@ * Copyright (c) 2024, Kongyang Liu <seashell11234455@gmail.com> */ -int board_init(void) -{ - return 0; -} diff --git a/board/st/stih410-b2260/board.c b/board/st/stih410-b2260/board.c index 8ad593cccdd..f5174720434 100644 --- a/board/st/stih410-b2260/board.c +++ b/board/st/stih410-b2260/board.c @@ -32,11 +32,6 @@ void enable_caches(void) } #endif -int board_init(void) -{ - return 0; -} - #ifdef CONFIG_USB_DWC3 int g_dnl_board_usb_cable_connected(void) { diff --git a/board/st/stm32f429-discovery/stm32f429-discovery.c b/board/st/stm32f429-discovery/stm32f429-discovery.c index 22d751b44d3..4b0defda1ec 100644 --- a/board/st/stm32f429-discovery/stm32f429-discovery.c +++ b/board/st/stm32f429-discovery/stm32f429-discovery.c @@ -45,11 +45,6 @@ int dram_init_banksize(void) return 0; } -int board_init(void) -{ - return 0; -} - #ifdef CONFIG_MISC_INIT_R int misc_init_r(void) { diff --git a/board/st/stm32f429-evaluation/stm32f429-evaluation.c b/board/st/stm32f429-evaluation/stm32f429-evaluation.c index db59ebb838e..88c825334a8 100644 --- a/board/st/stm32f429-evaluation/stm32f429-evaluation.c +++ b/board/st/stm32f429-evaluation/stm32f429-evaluation.c @@ -39,11 +39,6 @@ int dram_init_banksize(void) return 0; } -int board_init(void) -{ - return 0; -} - #ifdef CONFIG_MISC_INIT_R int misc_init_r(void) { diff --git a/board/st/stm32f469-discovery/stm32f469-discovery.c b/board/st/stm32f469-discovery/stm32f469-discovery.c index 134d207d95d..7aab7f71d0c 100644 --- a/board/st/stm32f469-discovery/stm32f469-discovery.c +++ b/board/st/stm32f469-discovery/stm32f469-discovery.c @@ -39,11 +39,6 @@ int dram_init_banksize(void) return 0; } -int board_init(void) -{ - return 0; -} - #ifdef CONFIG_MISC_INIT_R int misc_init_r(void) { diff --git a/board/st/stm32h743-disco/stm32h743-disco.c b/board/st/stm32h743-disco/stm32h743-disco.c index 35ef9ff9e28..d00f55379c5 100644 --- a/board/st/stm32h743-disco/stm32h743-disco.c +++ b/board/st/stm32h743-disco/stm32h743-disco.c @@ -34,8 +34,3 @@ int dram_init_banksize(void) return 0; } - -int board_init(void) -{ - return 0; -} diff --git a/board/st/stm32h743-eval/stm32h743-eval.c b/board/st/stm32h743-eval/stm32h743-eval.c index 35ef9ff9e28..d00f55379c5 100644 --- a/board/st/stm32h743-eval/stm32h743-eval.c +++ b/board/st/stm32h743-eval/stm32h743-eval.c @@ -34,8 +34,3 @@ int dram_init_banksize(void) return 0; } - -int board_init(void) -{ - return 0; -} diff --git a/board/st/stm32h747-disco/stm32h747-disco.c b/board/st/stm32h747-disco/stm32h747-disco.c index be0884bdeb4..645685a64f1 100644 --- a/board/st/stm32h747-disco/stm32h747-disco.c +++ b/board/st/stm32h747-disco/stm32h747-disco.c @@ -35,8 +35,3 @@ int dram_init_banksize(void) return 0; } - -int board_init(void) -{ - return 0; -} diff --git a/board/st/stm32h750-art-pi/stm32h750-art-pi.c b/board/st/stm32h750-art-pi/stm32h750-art-pi.c index 75aa4d139fb..31c85c6816e 100644 --- a/board/st/stm32h750-art-pi/stm32h750-art-pi.c +++ b/board/st/stm32h750-art-pi/stm32h750-art-pi.c @@ -44,8 +44,3 @@ int board_late_init(void) { return 0; } - -int board_init(void) -{ - return 0; -} diff --git a/board/terasic/de1-soc/MAINTAINERS b/board/terasic/de1-soc/MAINTAINERS index 1e726e93603..6e7eee9c3e3 100644 --- a/board/terasic/de1-soc/MAINTAINERS +++ b/board/terasic/de1-soc/MAINTAINERS @@ -1,5 +1,5 @@ DE1-SoC BOARD -M: Anatolij Gustschin <agust@denx.de> +M: Anatolij Gustschin <ag.dev.uboot@gmail.com> S: Maintained F: board/terasic/de1-soc/ F: include/configs/socfpga_de1_soc.h diff --git a/board/ti/am62ax/evm.c b/board/ti/am62ax/evm.c index 3351544c5b3..a445f983255 100644 --- a/board/ti/am62ax/evm.c +++ b/board/ti/am62ax/evm.c @@ -16,11 +16,6 @@ #include "../common/fdt_ops.h" -int board_init(void) -{ - return 0; -} - #if defined(CONFIG_XPL_BUILD) void spl_perform_fixups(struct spl_image_info *spl_image) { diff --git a/board/ti/am62px/evm.c b/board/ti/am62px/evm.c index 379d1a5b316..2e85363cf5f 100644 --- a/board/ti/am62px/evm.c +++ b/board/ti/am62px/evm.c @@ -41,11 +41,6 @@ struct efi_capsule_update_info update_info = { .images = fw_images, }; -int board_init(void) -{ - return 0; -} - #if defined(CONFIG_XPL_BUILD) void spl_perform_fixups(struct spl_image_info *spl_image) { diff --git a/board/ti/am62x/evm.c b/board/ti/am62x/evm.c index 3051a0a27a1..d7b07a0d34d 100644 --- a/board/ti/am62x/evm.c +++ b/board/ti/am62x/evm.c @@ -74,11 +74,6 @@ struct efi_capsule_update_info update_info = { .images = fw_images, }; -int board_init(void) -{ - return 0; -} - #ifdef CONFIG_BOARD_LATE_INIT int board_late_init(void) { diff --git a/board/ti/am64x/evm.c b/board/ti/am64x/evm.c index 35fd30dbceb..8e89b3b15df 100644 --- a/board/ti/am64x/evm.c +++ b/board/ti/am64x/evm.c @@ -54,11 +54,6 @@ struct efi_capsule_update_info update_info = { .images = fw_images, }; -int board_init(void) -{ - return 0; -} - #if defined(CONFIG_SPL_LOAD_FIT) int board_fit_config_name_match(const char *name) { diff --git a/board/ti/am65x/evm.c b/board/ti/am65x/evm.c index 6658794a137..5c45a33eac9 100644 --- a/board/ti/am65x/evm.c +++ b/board/ti/am65x/evm.c @@ -45,11 +45,6 @@ enum { DECLARE_GLOBAL_DATA_PTR; -int board_init(void) -{ - return 0; -} - phys_addr_t board_get_usable_ram_top(phys_size_t total_size) { #ifdef CONFIG_PHYS_64BIT diff --git a/board/ti/j721e/evm.c b/board/ti/j721e/evm.c index b1ed29af001..1527eaf1e16 100644 --- a/board/ti/j721e/evm.c +++ b/board/ti/j721e/evm.c @@ -66,11 +66,6 @@ struct efi_capsule_update_info update_info = { .images = fw_images, }; -int board_init(void) -{ - return 0; -} - phys_addr_t board_get_usable_ram_top(phys_size_t total_size) { #ifdef CONFIG_PHYS_64BIT diff --git a/board/ti/j721s2/evm.c b/board/ti/j721s2/evm.c index 8c8f8e2a265..5d3b84607d8 100644 --- a/board/ti/j721s2/evm.c +++ b/board/ti/j721s2/evm.c @@ -28,11 +28,6 @@ DECLARE_GLOBAL_DATA_PTR; -int board_init(void) -{ - return 0; -} - phys_addr_t board_get_usable_ram_top(phys_size_t total_size) { #ifdef CONFIG_PHYS_64BIT diff --git a/board/ti/j722s/evm.c b/board/ti/j722s/evm.c index f085ecfd37e..d2b94913c12 100644 --- a/board/ti/j722s/evm.c +++ b/board/ti/j722s/evm.c @@ -15,11 +15,6 @@ #include <asm/arch/k3-ddr.h> #include "../common/fdt_ops.h" -int board_init(void) -{ - return 0; -} - #if defined(CONFIG_XPL_BUILD) void spl_perform_fixups(struct spl_image_info *spl_image) { diff --git a/board/ti/j784s4/evm.c b/board/ti/j784s4/evm.c index c8d01bf0ca8..6335676081a 100644 --- a/board/ti/j784s4/evm.c +++ b/board/ti/j784s4/evm.c @@ -41,11 +41,6 @@ struct efi_capsule_update_info update_info = { .images = fw_images, }; -int board_init(void) -{ - return 0; -} - #if defined(CONFIG_XPL_BUILD) void spl_perform_fixups(struct spl_image_info *spl_image) { diff --git a/board/toradex/common/tdx-cfg-block.c b/board/toradex/common/tdx-cfg-block.c index a89c5bf2c19..869656eee7a 100644 --- a/board/toradex/common/tdx-cfg-block.c +++ b/board/toradex/common/tdx-cfg-block.c @@ -183,6 +183,7 @@ const struct toradex_som toradex_modules[] = { { AQUILA_AM69O_16GB_IT, "Aquila AM69 Octa 16GB IT", TARGET_IS_ENABLED(AQUILA_AM69_A72) }, { AQUILA_AM69O_8GB_WB_IT, "Aquila AM69 Octa 8GB WB IT", TARGET_IS_ENABLED(AQUILA_AM69_A72) }, { AQUILA_AM69O_8GB_IT, "Aquila AM69 Octa 8GB IT", TARGET_IS_ENABLED(AQUILA_AM69_A72) }, + { VERDIN_IMX8MMQ_WB_IT_64G, "Verdin iMX8M Mini Quad 2GB WB IT", TARGET_IS_ENABLED(VERDIN_IMX8MM) }, }; struct pid4list { diff --git a/board/toradex/common/tdx-cfg-block.h b/board/toradex/common/tdx-cfg-block.h index db612811c5c..d002b969bdf 100644 --- a/board/toradex/common/tdx-cfg-block.h +++ b/board/toradex/common/tdx-cfg-block.h @@ -141,6 +141,7 @@ enum { AQUILA_AM69O_16GB_IT, AQUILA_AM69O_8GB_WB_IT, AQUILA_AM69O_8GB_IT, /* 215 */ + VERDIN_IMX8MMQ_WB_IT_64G, }; enum { diff --git a/board/toradex/smarc-imx8mp/smarc-imx8mp.c b/board/toradex/smarc-imx8mp/smarc-imx8mp.c index bbe371516cc..915b413b15e 100644 --- a/board/toradex/smarc-imx8mp/smarc-imx8mp.c +++ b/board/toradex/smarc-imx8mp/smarc-imx8mp.c @@ -10,11 +10,6 @@ DECLARE_GLOBAL_DATA_PTR; -int board_init(void) -{ - return 0; -} - int board_phys_sdram_size(phys_size_t *size) { if (!size) diff --git a/board/toradex/verdin-am62/verdin-am62.c b/board/toradex/verdin-am62/verdin-am62.c index eca2cc8bc7f..069aa6c7909 100644 --- a/board/toradex/verdin-am62/verdin-am62.c +++ b/board/toradex/verdin-am62/verdin-am62.c @@ -22,11 +22,6 @@ DECLARE_GLOBAL_DATA_PTR; -int board_init(void) -{ - return 0; -} - int dram_init(void) { gd->ram_size = get_ram_size((long *)CFG_SYS_SDRAM_BASE, CFG_SYS_SDRAM_SIZE); @@ -95,7 +90,7 @@ static void select_dt_from_module_version(void) else strlcpy(&variant[0], "nonwifi", sizeof(variant)); - if (strcmp(variant, env_variant)) { + if (!env_variant || strcmp(variant, env_variant)) { printf("Setting variant to %s\n", variant); env_set("variant", variant); } diff --git a/board/toradex/verdin-am62p/verdin-am62p.c b/board/toradex/verdin-am62p/verdin-am62p.c index 43d1c9312fe..7c631f380ff 100644 --- a/board/toradex/verdin-am62p/verdin-am62p.c +++ b/board/toradex/verdin-am62p/verdin-am62p.c @@ -55,11 +55,6 @@ static void read_hw_cfg(void) printf("0x%02x\n", hw_cfg); } -int board_init(void) -{ - return 0; -} - int dram_init(void) { gd->ram_size = get_ram_size((long *)CFG_SYS_SDRAM_BASE, CFG_SYS_SDRAM_SIZE); @@ -124,7 +119,7 @@ static void select_dt_from_module_version(void) else strlcpy(&variant[0], "nonwifi", sizeof(variant)); - if (strcmp(variant, env_variant)) { + if (!env_variant || strcmp(variant, env_variant)) { printf("Setting variant to %s\n", variant); env_set("variant", variant); } diff --git a/board/toradex/verdin-imx8mm/verdin-imx8mm.c b/board/toradex/verdin-imx8mm/verdin-imx8mm.c index 066e8db678f..b4402415845 100644 --- a/board/toradex/verdin-imx8mm/verdin-imx8mm.c +++ b/board/toradex/verdin-imx8mm/verdin-imx8mm.c @@ -85,7 +85,8 @@ static void select_dt_from_module_version(void) is_wifi = (tdx_hw_tag.prodid == VERDIN_IMX8MMQ_WIFI_BT_IT) || (tdx_hw_tag.prodid == VERDIN_IMX8MMDL_WIFI_BT_IT) || (tdx_hw_tag.prodid == VERDIN_IMX8MMQ_WIFI_BT_IT_NO_CAN) || - (tdx_hw_tag.prodid == VERDIN_IMX8MMQ_4G_WIFI_BT_ET); + (tdx_hw_tag.prodid == VERDIN_IMX8MMQ_4G_WIFI_BT_ET) || + (tdx_hw_tag.prodid == VERDIN_IMX8MMQ_WB_IT_64G); } switch (get_pcb_revision()) { @@ -100,7 +101,7 @@ static void select_dt_from_module_version(void) break; } - if (strcmp(variant, env_variant)) { + if (!env_variant || strcmp(variant, env_variant)) { printf("Setting variant to %s\n", variant); env_set("variant", variant); } diff --git a/board/toradex/verdin-imx8mp/verdin-imx8mp.c b/board/toradex/verdin-imx8mp/verdin-imx8mp.c index e57ec3b6896..34ce25512e8 100644 --- a/board/toradex/verdin-imx8mp/verdin-imx8mp.c +++ b/board/toradex/verdin-imx8mp/verdin-imx8mp.c @@ -90,7 +90,7 @@ static void select_dt_from_module_version(void) else strlcpy(&variant[0], "nonwifi", sizeof(variant)); - if (strcmp(variant, env_variant)) { + if (!env_variant || strcmp(variant, env_variant)) { printf("Setting variant to %s\n", variant); env_set("variant", variant); } diff --git a/board/variscite/imx8mn_var_som/imx8mn_var_som.c b/board/variscite/imx8mn_var_som/imx8mn_var_som.c index 80c84e64241..14aa93c527b 100644 --- a/board/variscite/imx8mn_var_som/imx8mn_var_som.c +++ b/board/variscite/imx8mn_var_som/imx8mn_var_som.c @@ -44,11 +44,6 @@ struct var_imx8_eeprom_info { u8 partnumber2[5]; /* Part number 2 */ } __packed; -int board_init(void) -{ - return 0; -} - int board_mmc_get_env_dev(int devno) { return devno; diff --git a/board/xen/xenguest_arm64/xenguest_arm64.c b/board/xen/xenguest_arm64/xenguest_arm64.c index 216a022aa15..174752f6b07 100644 --- a/board/xen/xenguest_arm64/xenguest_arm64.c +++ b/board/xen/xenguest_arm64/xenguest_arm64.c @@ -33,11 +33,6 @@ DECLARE_GLOBAL_DATA_PTR; #define GUEST_VIRTIO_MMIO_BASE 0x2000000 #define GUEST_VIRTIO_MMIO_SIZE 0x100000 -int board_init(void) -{ - return 0; -} - /* * Use fdt provided by Xen: according to * https://www.kernel.org/doc/Documentation/arm64/booting.txt diff --git a/board/xilinx/mbv/board.c b/board/xilinx/mbv/board.c index c478f7e04a0..ed3fe16af7b 100644 --- a/board/xilinx/mbv/board.c +++ b/board/xilinx/mbv/board.c @@ -7,11 +7,6 @@ #include <spl.h> -int board_init(void) -{ - return 0; -} - #ifdef CONFIG_SPL u32 spl_boot_device(void) { diff --git a/board/xilinx/zynqmp_r5/board.c b/board/xilinx/zynqmp_r5/board.c index 0c62b0013c4..c34a7c5ecae 100644 --- a/board/xilinx/zynqmp_r5/board.c +++ b/board/xilinx/zynqmp_r5/board.c @@ -7,11 +7,6 @@ #include <init.h> #include <linux/errno.h> -int board_init(void) -{ - return 0; -} - int dram_init_banksize(void) { return fdtdec_setup_memory_banksize(); diff --git a/boot/bootdev-uclass.c b/boot/bootdev-uclass.c index 3791ebfcb42..3f8dc2c3c4e 100644 --- a/boot/bootdev-uclass.c +++ b/boot/bootdev-uclass.c @@ -213,10 +213,12 @@ void bootdev_list(bool probe) device_active(dev) ? '+' : ' ', ret ? simple_itoa(-ret) : "OK", dev_get_uclass_name(dev_get_parent(dev)), dev->name); - if (probe) + if (probe) { ret = uclass_next_device_check(&dev); - else - ret = uclass_find_next_device(&dev); + } else { + uclass_find_next_device(&dev); + ret = 0; + } } printf("--- ------ ------ -------- ------------------\n"); printf("(%d bootdev%s)\n", i, i != 1 ? "s" : ""); diff --git a/boot/bootmeth_rauc.c b/boot/bootmeth_rauc.c index fc60e6e355d..cc6180221ed 100644 --- a/boot/bootmeth_rauc.c +++ b/boot/bootmeth_rauc.c @@ -79,18 +79,17 @@ static int distro_rauc_check(struct udevice *dev, struct bootflow_iter *iter) return 0; } -static int distro_rauc_scan_boot_part(struct bootflow *bflow) +static int distro_rauc_scan_parts(struct bootflow *bflow) { struct blk_desc *desc; struct distro_rauc_priv *priv; char *boot_order; const char **boot_order_list; - bool exists; int ret; int i; - int j; - desc = dev_get_uclass_plat(bflow->blk); + if (bflow->blk) + desc = dev_get_uclass_plat(bflow->blk); priv = bflow->bootmeth_priv; if (!priv || !priv->slots) @@ -99,20 +98,21 @@ static int distro_rauc_scan_boot_part(struct bootflow *bflow) boot_order = env_get("BOOT_ORDER"); boot_order_list = str_to_list(boot_order); for (i = 0; boot_order_list[i]; i++) { - exists = false; - for (j = 0; script_names[j]; j++) { - const struct distro_rauc_slot *slot; + const struct distro_rauc_slot *slot; - slot = get_slot(priv, boot_order_list[i]); - if (!slot) - return log_msg_ret("env", -ENOENT); + slot = get_slot(priv, boot_order_list[i]); + if (!slot) + return log_msg_ret("slot", -EINVAL); + if (desc) { ret = fs_set_blk_dev_with_part(desc, slot->boot_part); if (ret) - return log_msg_ret("blk", ret); - exists |= fs_exists(script_names[j]); + return log_msg_ret("part", ret); + fs_close(); + ret = fs_set_blk_dev_with_part(desc, slot->root_part); + if (ret) + return log_msg_ret("part", ret); + fs_close(); } - if (!exists) - return log_msg_ret("fs", -ENOENT); } str_free_list(boot_order_list); @@ -168,20 +168,24 @@ static int distro_rauc_read_bootflow(struct udevice *dev, struct bootflow *bflow (slot = strsep(&boot_order_copy, " ")); i++) { struct distro_rauc_slot *s; + struct distro_rauc_slot **new_slots; s = calloc(1, sizeof(struct distro_rauc_slot)); s->name = strdup(slot); s->boot_part = simple_strtoul(strsep(&parts, ","), NULL, 10); s->root_part = simple_strtoul(strsep(&parts, ","), NULL, 10); - priv->slots = realloc(priv->slots, (i + 1) * - sizeof(struct distro_rauc_slot)); + new_slots = realloc(priv->slots, (i + 1) * + sizeof(struct distro_rauc_slot)); + if (!new_slots) + return log_msg_ret("buf", -ENOMEM); + priv->slots = new_slots; priv->slots[i - 1] = s; - priv->slots[i]->name = NULL; + priv->slots[i] = NULL; } bflow->bootmeth_priv = priv; - ret = distro_rauc_scan_boot_part(bflow); + ret = distro_rauc_scan_parts(bflow); if (ret < 0) { for (i = 0; priv->slots[i]->name; i++) { free(priv->slots[i]->name); diff --git a/cmd/fpga.c b/cmd/fpga.c index 9dc7b63db5d..d51c380d7b3 100644 --- a/cmd/fpga.c +++ b/cmd/fpga.c @@ -28,7 +28,7 @@ static long do_fpga_get_device(char *arg) if (dev == FPGA_INVALID_DEVICE && arg) dev = simple_strtol(arg, NULL, 16); - debug("%s: device = %ld\n", __func__, dev); + log_debug("device = %ld\n", dev); return dev; } @@ -40,26 +40,26 @@ static int do_fpga_check_params(long *dev, long *fpga_data, size_t *data_size, size_t local_data_size; long local_fpga_data; - debug("%s %d, %d\n", __func__, argc, cmdtp->maxargs); + log_debug("%d, %d\n", argc, cmdtp->maxargs); if (argc != cmdtp->maxargs) { - debug("fpga: incorrect parameters passed\n"); - return CMD_RET_USAGE; + log_err("Incorrect number of parameters passed\n"); + return CMD_RET_FAILURE; } *dev = do_fpga_get_device(argv[0]); local_fpga_data = simple_strtol(argv[1], NULL, 16); if (!local_fpga_data) { - debug("fpga: zero fpga_data address\n"); - return CMD_RET_USAGE; + log_err("Zero fpga_data address\n"); + return CMD_RET_FAILURE; } *fpga_data = local_fpga_data; local_data_size = hextoul(argv[2], NULL); if (!local_data_size) { - debug("fpga: zero size\n"); - return CMD_RET_USAGE; + log_err("Zero size\n"); + return CMD_RET_FAILURE; } *data_size = local_data_size; @@ -70,51 +70,52 @@ static int do_fpga_check_params(long *dev, long *fpga_data, size_t *data_size, static int do_fpga_loads(struct cmd_tbl *cmdtp, int flag, int argc, char *const argv[]) { + struct fpga_secure_info fpga_sec_info; + const int pos_userkey = 5; size_t data_size = 0; long fpga_data, dev; int ret; - struct fpga_secure_info fpga_sec_info; memset(&fpga_sec_info, 0, sizeof(fpga_sec_info)); - if (argc < 5) { - debug("fpga: incorrect parameters passed\n"); - return CMD_RET_USAGE; + if (argc < pos_userkey) { + log_err("Too few parameters passed\n"); + return CMD_RET_FAILURE; } - if (argc == 6) + if (argc == pos_userkey + 1) fpga_sec_info.userkey_addr = (u8 *)(uintptr_t) - simple_strtoull(argv[5], + simple_strtoull(argv[pos_userkey], NULL, 16); else /* * If 6th parameter is not passed then do_fpga_check_params * will get 5 instead of expected 6 which means that function - * return CMD_RET_USAGE. Increase number of params +1 to pass + * return CMD_RET_FAILURE. Increase number of params +1 to pass * this. */ argc++; + ret = do_fpga_check_params(&dev, &fpga_data, &data_size, + cmdtp, argc, argv); + if (ret) + return ret; + fpga_sec_info.encflag = (u8)hextoul(argv[4], NULL); fpga_sec_info.authflag = (u8)hextoul(argv[3], NULL); if (fpga_sec_info.authflag >= FPGA_NO_ENC_OR_NO_AUTH && fpga_sec_info.encflag >= FPGA_NO_ENC_OR_NO_AUTH) { - debug("fpga: Use <fpga load> for NonSecure bitstream\n"); - return CMD_RET_USAGE; + log_err("Use <fpga load> for NonSecure bitstream\n"); + return CMD_RET_FAILURE; } if (fpga_sec_info.encflag == FPGA_ENC_USR_KEY && !fpga_sec_info.userkey_addr) { - debug("fpga: User key not provided\n"); - return CMD_RET_USAGE; + log_err("User key not provided\n"); + return CMD_RET_FAILURE; } - ret = do_fpga_check_params(&dev, &fpga_data, &data_size, - cmdtp, argc, argv); - if (ret) - return ret; - return fpga_loads(dev, (void *)fpga_data, data_size, &fpga_sec_info); } #endif @@ -245,23 +246,23 @@ static int do_fpga_loadmk(struct cmd_tbl *cmdtp, int flag, int argc, ulong dev = do_fpga_get_device(argv[0]); char *datastr = env_get("fpgadata"); - debug("fpga: argc %x, dev %lx, datastr %s\n", argc, dev, datastr); + log_debug("argc %x, dev %lx, datastr %s\n", argc, dev, datastr); if (dev == FPGA_INVALID_DEVICE) { - debug("fpga: Invalid fpga device\n"); - return CMD_RET_USAGE; + log_err("Invalid fpga device\n"); + return CMD_RET_FAILURE; } if (argc == 0 && !datastr) { - debug("fpga: No datastr passed\n"); - return CMD_RET_USAGE; + log_err("No datastr passed\n"); + return CMD_RET_FAILURE; } if (argc == 2) { datastr = argv[1]; - debug("fpga: Full command with two args\n"); + log_debug("Full command with two args\n"); } else if (argc == 1 && !datastr) { - debug("fpga: Dev is setup - fpgadata passed\n"); + log_debug("Dev is setup - fpgadata passed\n"); datastr = argv[0]; } @@ -269,20 +270,20 @@ static int do_fpga_loadmk(struct cmd_tbl *cmdtp, int flag, int argc, if (fit_parse_subimage(datastr, (ulong)fpga_data, &fit_addr, &fit_uname)) { fpga_data = (void *)fit_addr; - debug("* fpga: subimage '%s' from FIT image ", - fit_uname); - debug("at 0x%08lx\n", fit_addr); + log_debug("* fpga: subimage '%s' from FIT image ", + fit_uname); + log_debug("at 0x%08lx\n", fit_addr); } else #endif { fpga_data = (void *)hextoul(datastr, NULL); - debug("* fpga: cmdline image address = 0x%08lx\n", - (ulong)fpga_data); + log_debug("* fpga: cmdline image address = 0x%08lx\n", + (ulong)fpga_data); } - debug("%s: fpga_data = 0x%lx\n", __func__, (ulong)fpga_data); + log_debug("fpga_data = 0x%lx\n", (ulong)fpga_data); if (!fpga_data) { - puts("Zero fpga_data address\n"); - return CMD_RET_USAGE; + log_err("Zero fpga_data address\n"); + return CMD_RET_FAILURE; } switch (genimg_get_format(fpga_data)) { @@ -301,15 +302,15 @@ static int do_fpga_loadmk(struct cmd_tbl *cmdtp, int flag, int argc, data = image_get_load(hdr); - if (gunzip((void *)data, ~0UL, (void *)image_buf, + if (gunzip((void *)data, ~0U, (void *)image_buf, &image_size) != 0) { - puts("GUNZIP: error\n"); + log_err("Gunzip error\n"); return CMD_RET_FAILURE; } data_size = image_size; #else - puts("Gunzip image is not supported\n"); - return 1; + log_err("Gunzip image is not supported\n"); + return CMD_RET_FAILURE; #endif } else { data = (ulong)image_get_data(hdr); @@ -327,12 +328,12 @@ static int do_fpga_loadmk(struct cmd_tbl *cmdtp, int flag, int argc, const void *fit_data; if (!fit_uname) { - puts("No FIT subimage unit name\n"); + log_err("No FIT subimage unit name\n"); return CMD_RET_FAILURE; } if (fit_check_format(fit_hdr, IMAGE_SIZE_INVAL)) { - puts("Bad FIT image format\n"); + log_err("Bad FIT image format\n"); return CMD_RET_FAILURE; } @@ -348,7 +349,7 @@ static int do_fpga_loadmk(struct cmd_tbl *cmdtp, int flag, int argc, } #endif default: - puts("** Unknown image type\n"); + log_err("Unknown image type\n"); return CMD_RET_FAILURE; } } @@ -390,16 +391,16 @@ static int do_fpga_wrapper(struct cmd_tbl *cmdtp, int flag, int argc, fpga_cmd = find_cmd_tbl(argv[1], fpga_commands, ARRAY_SIZE(fpga_commands)); if (!fpga_cmd) { - debug("fpga: non existing command\n"); - return CMD_RET_USAGE; + log_err("Non existing command\n"); + return CMD_RET_FAILURE; } argc -= 2; argv += 2; if (argc > fpga_cmd->maxargs) { - debug("fpga: more parameters passed\n"); - return CMD_RET_USAGE; + log_err("Too many parameters passed\n"); + return CMD_RET_FAILURE; } ret = fpga_cmd->cmd(fpga_cmd, flag, argc, argv); diff --git a/cmd/gpt.c b/cmd/gpt.c index 27aea2df197..e18e5036a06 100644 --- a/cmd/gpt.c +++ b/cmd/gpt.c @@ -911,8 +911,9 @@ static int do_rename_gpt_parts(struct blk_desc *dev_desc, char *subcomm, goto out; if (!strcmp(subcomm, "swap")) { - if ((strlen(name1) > PART_NAME_LEN) || (strlen(name2) > PART_NAME_LEN)) { - printf("Names longer than %d characters are truncated.\n", PART_NAME_LEN); + if ((strlen(name1) >= PART_NAME_LEN) || (strlen(name2) >= PART_NAME_LEN)) { + printf("Names longer than %d characters are truncated.\n", + PART_NAME_LEN - 1); ret = -EINVAL; goto out; } @@ -967,8 +968,9 @@ static int do_rename_gpt_parts(struct blk_desc *dev_desc, char *subcomm, *first = *second; *second = tmp_part; } else { /* rename */ - if (strlen(name2) > PART_NAME_LEN) { - printf("Names longer than %d characters are truncated.\n", PART_NAME_LEN); + if (strlen(name2) >= PART_NAME_LEN) { + printf("Names longer than %d characters are truncated.\n", + PART_NAME_LEN - 1); ret = -EINVAL; goto out; } diff --git a/cmd/i2c.c b/cmd/i2c.c index 7246c4fa3e7..f0aae93073f 100644 --- a/cmd/i2c.c +++ b/cmd/i2c.c @@ -917,9 +917,9 @@ static int do_i2c_probe(struct cmd_tbl *cmdtp, int flag, int argc, #endif /* NOPROBES */ int ret; #if CONFIG_IS_ENABLED(DM_I2C) - struct udevice *bus, *dev; + struct udevice *cur_bus, *dev; - if (i2c_get_cur_bus(&bus)) + if (i2c_get_cur_bus(&cur_bus)) return CMD_RET_FAILURE; #endif @@ -943,7 +943,7 @@ static int do_i2c_probe(struct cmd_tbl *cmdtp, int flag, int argc, continue; #endif #if CONFIG_IS_ENABLED(DM_I2C) - ret = dm_i2c_probe(bus, j, 0, &dev); + ret = dm_i2c_probe(cur_bus, j, 0, &dev); #else ret = i2c_probe(j); #endif diff --git a/cmd/regulator.c b/cmd/regulator.c index da298090bb7..8d743c8d269 100644 --- a/cmd/regulator.c +++ b/cmd/regulator.c @@ -96,11 +96,11 @@ static int do_list(struct cmd_tbl *cmdtp, int flag, int argc, LIMIT_OFNAME, LIMIT_OFNAME, "regulator-name", "Parent"); - for (ret = uclass_find_first_device(UCLASS_REGULATOR, &dev); dev; - ret = uclass_find_next_device(&dev)) { - if (ret) - continue; + ret = uclass_find_first_device(UCLASS_REGULATOR, &dev); + if (ret) + return ret; + for (; dev; uclass_find_next_device(&dev)) { uc_pdata = dev_get_uclass_plat(dev); printf("| %-*.*s| %-*.*s| %s\n", LIMIT_DEVNAME, LIMIT_DEVNAME, dev->name, diff --git a/common/spl/Kconfig b/common/spl/Kconfig index f69eff21107..ac25fcea21d 100644 --- a/common/spl/Kconfig +++ b/common/spl/Kconfig @@ -371,6 +371,13 @@ config SPL_IMX_CONTAINER_USE_TRAMPOLINE help Enable SPL load reader to load data to a trampoline buffer. +config IMX_PQC_SUPPORT + bool "Enable to support i.MX ROM PQC Container" + depends on SPL && SPL_LOAD_IMX_CONTAINER + help + Support i.MX ROM new PQC container format. If your chip does not use + PQC container, say 'n'. + config IMX_CONTAINER_CFG string "i.MX8 Container config file" depends on SPL && SPL_LOAD_IMX_CONTAINER diff --git a/common/spl/spl_imx_container.c b/common/spl/spl_imx_container.c index b3565efb225..79d021f81dc 100644 --- a/common/spl/spl_imx_container.c +++ b/common/spl/spl_imx_container.c @@ -31,7 +31,7 @@ static struct boot_img_t *read_auth_image(struct spl_image_info *spl_image, ulong container_offset) { struct boot_img_t *images; - ulong offset, overhead, size; + ulong offset, size; void *buf, *trampoline; if (image_index > container->num_images) { @@ -54,7 +54,7 @@ static struct boot_img_t *read_auth_image(struct spl_image_info *spl_image, debug("%s: container: %p offset: %lu size: %lu\n", __func__, container, offset, size); - buf = map_sysmem(images[image_index].dst - overhead, images[image_index].size); + buf = map_sysmem(images[image_index].dst, images[image_index].size); if (IS_ENABLED(CONFIG_SPL_IMX_CONTAINER_USE_TRAMPOLINE) && arch_check_dst_in_secure(buf, size)) { trampoline = arch_get_container_trampoline(); diff --git a/configs/am62ax_evm_r5_defconfig b/configs/am62ax_evm_r5_defconfig index 52df6e0ca3f..64886986c42 100644 --- a/configs/am62ax_evm_r5_defconfig +++ b/configs/am62ax_evm_r5_defconfig @@ -27,6 +27,7 @@ CONFIG_SPL_LIBDISK_SUPPORT=y CONFIG_SPL_LOAD_FIT=y CONFIG_SPL_LOAD_FIT_ADDRESS=0x80080000 # CONFIG_DISPLAY_CPUINFO is not set +# CONFIG_BOARD_INIT is not set CONFIG_SPL_SIZE_LIMIT_SUBTRACT_GD=y CONFIG_SPL_SIZE_LIMIT_SUBTRACT_MALLOC=y CONFIG_SPL_MAX_SIZE=0x3B000 diff --git a/configs/am62px_evm_r5_defconfig b/configs/am62px_evm_r5_defconfig index 21a381e8113..c9592d7b6c4 100644 --- a/configs/am62px_evm_r5_defconfig +++ b/configs/am62px_evm_r5_defconfig @@ -32,6 +32,7 @@ CONFIG_SPL_SPI=y CONFIG_SPL_LOAD_FIT=y CONFIG_SPL_LOAD_FIT_ADDRESS=0x80080000 # CONFIG_DISPLAY_CPUINFO is not set +# CONFIG_BOARD_INIT is not set CONFIG_SPL_SIZE_LIMIT_SUBTRACT_GD=y CONFIG_SPL_SIZE_LIMIT_SUBTRACT_MALLOC=y CONFIG_SPL_MAX_SIZE=0x3B000 diff --git a/configs/am62x_a53_usbdfu.config b/configs/am62x_a53_usbdfu.config index 373b1d0ed64..04f360668b6 100644 --- a/configs/am62x_a53_usbdfu.config +++ b/configs/am62x_a53_usbdfu.config @@ -1,3 +1,4 @@ +# CONFIG_BOARD_INIT is not set CONFIG_SPL_ENV_SUPPORT=y CONFIG_SPL_RAM_SUPPORT=y CONFIG_SPL_RAM_DEVICE=y diff --git a/configs/am62x_beagleplay_r5_defconfig b/configs/am62x_beagleplay_r5_defconfig index 099a4828a7f..ce503000e4c 100644 --- a/configs/am62x_beagleplay_r5_defconfig +++ b/configs/am62x_beagleplay_r5_defconfig @@ -31,6 +31,7 @@ CONFIG_SPL_SPI=y CONFIG_SPL_LOAD_FIT=y CONFIG_SPL_LOAD_FIT_ADDRESS=0x80080000 # CONFIG_DISPLAY_CPUINFO is not set +# CONFIG_BOARD_INIT is not set CONFIG_SPL_SIZE_LIMIT_SUBTRACT_GD=y CONFIG_SPL_SIZE_LIMIT_SUBTRACT_MALLOC=y CONFIG_SPL_MAX_SIZE=0x3B000 diff --git a/configs/am62x_evm_r5_defconfig b/configs/am62x_evm_r5_defconfig index ba6396c9dfc..18ffc991b25 100644 --- a/configs/am62x_evm_r5_defconfig +++ b/configs/am62x_evm_r5_defconfig @@ -34,6 +34,7 @@ CONFIG_SPL_SPI=y CONFIG_SPL_LOAD_FIT=y CONFIG_SPL_LOAD_FIT_ADDRESS=0x80080000 # CONFIG_DISPLAY_CPUINFO is not set +# CONFIG_BOARD_INIT is not set CONFIG_SPL_SIZE_LIMIT_SUBTRACT_GD=y CONFIG_SPL_SIZE_LIMIT_SUBTRACT_MALLOC=y CONFIG_SPL_MAX_SIZE=0x3B000 diff --git a/configs/am64x_evm_a53_defconfig b/configs/am64x_evm_a53_defconfig index fd2b28a1c6e..ae261f2fa01 100644 --- a/configs/am64x_evm_a53_defconfig +++ b/configs/am64x_evm_a53_defconfig @@ -37,6 +37,7 @@ CONFIG_SPL_LOAD_FIT=y CONFIG_SPL_LOAD_FIT_ADDRESS=0x81000000 CONFIG_BOOTSTD_FULL=y CONFIG_BOOTCOMMAND="run envboot; bootflow scan -lb" +# CONFIG_BOARD_INIT is not set CONFIG_BOARD_LATE_INIT=y CONFIG_SPL_MAX_SIZE=0x180000 CONFIG_SPL_BOARD_INIT=y diff --git a/configs/am64x_evm_r5_defconfig b/configs/am64x_evm_r5_defconfig index fdf5d7803bb..491e0dd102e 100644 --- a/configs/am64x_evm_r5_defconfig +++ b/configs/am64x_evm_r5_defconfig @@ -33,6 +33,7 @@ CONFIG_SPL_SPI=y CONFIG_SPL_LOAD_FIT=y CONFIG_SPL_LOAD_FIT_ADDRESS=0x80080000 # CONFIG_DISPLAY_CPUINFO is not set +# CONFIG_BOARD_INIT is not set CONFIG_SPL_SIZE_LIMIT_SUBTRACT_GD=y CONFIG_SPL_SIZE_LIMIT_SUBTRACT_MALLOC=y CONFIG_SPL_MAX_SIZE=0x180000 diff --git a/configs/am65x_evm_a53_defconfig b/configs/am65x_evm_a53_defconfig index 438ec8a1c56..bf44c19befe 100644 --- a/configs/am65x_evm_a53_defconfig +++ b/configs/am65x_evm_a53_defconfig @@ -39,6 +39,7 @@ CONFIG_BOOTSTD_BOOTCOMMAND=y CONFIG_DISTRO_DEFAULTS=y CONFIG_OF_SYSTEM_SETUP=y CONFIG_LOGLEVEL=7 +# CONFIG_BOARD_INIT is not set CONFIG_SPL_MAX_SIZE=0x58000 CONFIG_SPL_SYS_MALLOC_SIMPLE=y CONFIG_SPL_SYS_MALLOC=y diff --git a/configs/am65x_evm_r5_defconfig b/configs/am65x_evm_r5_defconfig index 7d3eb6f8c93..6733dcfdd85 100644 --- a/configs/am65x_evm_r5_defconfig +++ b/configs/am65x_evm_r5_defconfig @@ -33,6 +33,7 @@ CONFIG_SPL_SPI=y CONFIG_SPL_LOAD_FIT=y CONFIG_USE_BOOTCOMMAND=y # CONFIG_DISPLAY_CPUINFO is not set +# CONFIG_BOARD_INIT is not set CONFIG_SPL_SIZE_LIMIT_SUBTRACT_GD=y CONFIG_SPL_SIZE_LIMIT_SUBTRACT_MALLOC=y CONFIG_SPL_MAX_SIZE=0x58000 diff --git a/configs/am65x_evm_r5_usbmsc_defconfig b/configs/am65x_evm_r5_usbmsc_defconfig index 63ba94ff90e..37b5c6a43e7 100644 --- a/configs/am65x_evm_r5_usbmsc_defconfig +++ b/configs/am65x_evm_r5_usbmsc_defconfig @@ -29,6 +29,7 @@ CONFIG_SPL_LIBDISK_SUPPORT=y CONFIG_SPL_LOAD_FIT=y CONFIG_USE_BOOTCOMMAND=y # CONFIG_DISPLAY_CPUINFO is not set +# CONFIG_BOARD_INIT is not set CONFIG_SPL_SIZE_LIMIT_SUBTRACT_GD=y CONFIG_SPL_SIZE_LIMIT_SUBTRACT_MALLOC=y CONFIG_SPL_MAX_SIZE=0x58000 diff --git a/configs/am67a_beagley_ai_a53_defconfig b/configs/am67a_beagley_ai_a53_defconfig index 013529d26da..4693f3bc9b3 100644 --- a/configs/am67a_beagley_ai_a53_defconfig +++ b/configs/am67a_beagley_ai_a53_defconfig @@ -32,6 +32,7 @@ CONFIG_AUTOBOOT_PROMPT="Press SPACE to abort autoboot in %d seconds\n" CONFIG_AUTOBOOT_DELAY_STR="d" CONFIG_AUTOBOOT_STOP_STR=" " CONFIG_BOOTCOMMAND="run set_led_state_start_load; run envboot; bootflow scan -lb; run set_led_state_fail_load" +# CONFIG_BOARD_INIT is not set CONFIG_BOARD_LATE_INIT=y CONFIG_SPL_MAX_SIZE=0x58000 CONFIG_SPL_PAD_TO=0x0 diff --git a/configs/am67a_beagley_ai_r5_defconfig b/configs/am67a_beagley_ai_r5_defconfig index b0a95da1086..00c6ba6e2b5 100644 --- a/configs/am67a_beagley_ai_r5_defconfig +++ b/configs/am67a_beagley_ai_r5_defconfig @@ -30,6 +30,7 @@ CONFIG_SPL_SPI=y CONFIG_SPL_LOAD_FIT=y CONFIG_SPL_LOAD_FIT_ADDRESS=0x80080000 # CONFIG_DISPLAY_CPUINFO is not set +# CONFIG_BOARD_INIT is not set CONFIG_SPL_SIZE_LIMIT_SUBTRACT_GD=y CONFIG_SPL_SIZE_LIMIT_SUBTRACT_MALLOC=y CONFIG_SPL_MAX_SIZE=0x6ce00 diff --git a/configs/arbel_evb_defconfig b/configs/arbel_evb_defconfig index 34c4e9a3f74..8572ad204d8 100644 --- a/configs/arbel_evb_defconfig +++ b/configs/arbel_evb_defconfig @@ -25,6 +25,7 @@ CONFIG_FIT=y CONFIG_FIT_VERBOSE=y CONFIG_USE_BOOTCOMMAND=y CONFIG_BOOTCOMMAND="run common_bootargs; run romboot" +# CONFIG_BOARD_INIT is not set CONFIG_HUSH_PARSER=y CONFIG_SYS_PROMPT="U-Boot>" CONFIG_SYS_MAXARGS=32 diff --git a/configs/bananapi-f3_defconfig b/configs/bananapi-f3_defconfig index a8b4cc675ab..a726ce84775 100644 --- a/configs/bananapi-f3_defconfig +++ b/configs/bananapi-f3_defconfig @@ -14,6 +14,7 @@ CONFIG_SUPPORT_RAW_INITRD=y CONFIG_OF_BOARD_SETUP=y CONFIG_SYS_CBSIZE=256 CONFIG_SYS_PBSIZE=276 +# CONFIG_BOARD_INIT is not set CONFIG_HUSH_PARSER=y CONFIG_ENV_OVERWRITE=y CONFIG_PINCTRL=y diff --git a/configs/bcm7260_defconfig b/configs/bcm7260_defconfig index 040ef695fec..ca09351384d 100644 --- a/configs/bcm7260_defconfig +++ b/configs/bcm7260_defconfig @@ -20,6 +20,7 @@ CONFIG_USE_PREBOOT=y CONFIG_PREBOOT="fdt addr ${fdtcontroladdr};fdt move ${fdtcontroladdr} ${fdtsaveaddr};fdt addr ${fdtsaveaddr};" CONFIG_SYS_CBSIZE=512 CONFIG_SYS_PBSIZE=536 +# CONFIG_BOARD_INIT is not set CONFIG_BOARD_LATE_INIT=y CONFIG_HUSH_PARSER=y CONFIG_SYS_PROMPT="U-Boot>" diff --git a/configs/bcm7445_defconfig b/configs/bcm7445_defconfig index 1eafadf2535..185d6e24bd4 100644 --- a/configs/bcm7445_defconfig +++ b/configs/bcm7445_defconfig @@ -21,6 +21,7 @@ CONFIG_USE_PREBOOT=y CONFIG_PREBOOT="fdt addr ${fdtcontroladdr};fdt move ${fdtcontroladdr} ${fdtsaveaddr};fdt addr ${fdtsaveaddr};" CONFIG_SYS_CBSIZE=512 CONFIG_SYS_PBSIZE=536 +# CONFIG_BOARD_INIT is not set CONFIG_BOARD_LATE_INIT=y CONFIG_HUSH_PARSER=y CONFIG_SYS_PROMPT="U-Boot>" diff --git a/configs/bcm947622_defconfig b/configs/bcm947622_defconfig index 566f9f2920f..1481e03f980 100644 --- a/configs/bcm947622_defconfig +++ b/configs/bcm947622_defconfig @@ -15,6 +15,7 @@ CONFIG_IDENT_STRING=" Broadcom BCM47622" CONFIG_ENV_VARS_UBOOT_CONFIG=y CONFIG_OF_STDOUT_VIA_ALIAS=y CONFIG_DISPLAY_BOARDINFO_LATE=y +# CONFIG_BOARD_INIT is not set CONFIG_HUSH_PARSER=y CONFIG_CMD_NAND=y CONFIG_CMD_CACHE=y diff --git a/configs/bcm94908_defconfig b/configs/bcm94908_defconfig index a19b112f86a..90eaacd8878 100644 --- a/configs/bcm94908_defconfig +++ b/configs/bcm94908_defconfig @@ -15,6 +15,7 @@ CONFIG_IDENT_STRING=" Broadcom BCM4908" CONFIG_ENV_VARS_UBOOT_CONFIG=y CONFIG_OF_STDOUT_VIA_ALIAS=y CONFIG_DISPLAY_BOARDINFO_LATE=y +# CONFIG_BOARD_INIT is not set CONFIG_HUSH_PARSER=y CONFIG_CMD_NAND=y CONFIG_CMD_CACHE=y diff --git a/configs/bcm94912_defconfig b/configs/bcm94912_defconfig index 46bbfb67980..859bb78c248 100644 --- a/configs/bcm94912_defconfig +++ b/configs/bcm94912_defconfig @@ -15,6 +15,7 @@ CONFIG_IDENT_STRING=" Broadcom BCM4912" CONFIG_ENV_VARS_UBOOT_CONFIG=y CONFIG_OF_STDOUT_VIA_ALIAS=y CONFIG_DISPLAY_BOARDINFO_LATE=y +# CONFIG_BOARD_INIT is not set CONFIG_HUSH_PARSER=y CONFIG_CMD_NAND=y CONFIG_CMD_CACHE=y diff --git a/configs/bcm963138_defconfig b/configs/bcm963138_defconfig index aa582b79bc8..f59e4e245ea 100644 --- a/configs/bcm963138_defconfig +++ b/configs/bcm963138_defconfig @@ -15,6 +15,7 @@ CONFIG_IDENT_STRING=" Broadcom BCM63138" CONFIG_ENV_VARS_UBOOT_CONFIG=y CONFIG_OF_STDOUT_VIA_ALIAS=y CONFIG_DISPLAY_BOARDINFO_LATE=y +# CONFIG_BOARD_INIT is not set CONFIG_HUSH_PARSER=y CONFIG_CMD_NAND=y CONFIG_CMD_CACHE=y diff --git a/configs/bcm963146_defconfig b/configs/bcm963146_defconfig index 239a8a10fa5..5deea27ee34 100644 --- a/configs/bcm963146_defconfig +++ b/configs/bcm963146_defconfig @@ -15,6 +15,7 @@ CONFIG_IDENT_STRING=" Broadcom BCM63146" CONFIG_ENV_VARS_UBOOT_CONFIG=y CONFIG_OF_STDOUT_VIA_ALIAS=y CONFIG_DISPLAY_BOARDINFO_LATE=y +# CONFIG_BOARD_INIT is not set CONFIG_HUSH_PARSER=y CONFIG_CMD_NAND=y CONFIG_CMD_CACHE=y diff --git a/configs/bcm963148_defconfig b/configs/bcm963148_defconfig index 48bc620e181..8b8a46c321c 100644 --- a/configs/bcm963148_defconfig +++ b/configs/bcm963148_defconfig @@ -16,6 +16,7 @@ CONFIG_IDENT_STRING=" Broadcom BCM63148" CONFIG_ENV_VARS_UBOOT_CONFIG=y CONFIG_OF_STDOUT_VIA_ALIAS=y CONFIG_DISPLAY_BOARDINFO_LATE=y +# CONFIG_BOARD_INIT is not set CONFIG_HUSH_PARSER=y CONFIG_CMD_NAND=y CONFIG_CMD_CACHE=y diff --git a/configs/bcm963158_defconfig b/configs/bcm963158_defconfig index a6cfea6cd79..df78621c1e7 100644 --- a/configs/bcm963158_defconfig +++ b/configs/bcm963158_defconfig @@ -15,6 +15,7 @@ CONFIG_IDENT_STRING=" Broadcom BCM63158" CONFIG_ENV_VARS_UBOOT_CONFIG=y CONFIG_OF_STDOUT_VIA_ALIAS=y CONFIG_DISPLAY_BOARDINFO_LATE=y +# CONFIG_BOARD_INIT is not set CONFIG_HUSH_PARSER=y CONFIG_CMD_NAND=y CONFIG_CMD_CACHE=y diff --git a/configs/bcm963178_defconfig b/configs/bcm963178_defconfig index 95c9c8e396e..2015b71f36e 100644 --- a/configs/bcm963178_defconfig +++ b/configs/bcm963178_defconfig @@ -16,6 +16,7 @@ CONFIG_IDENT_STRING=" Broadcom BCM63178" CONFIG_ENV_VARS_UBOOT_CONFIG=y CONFIG_OF_STDOUT_VIA_ALIAS=y CONFIG_DISPLAY_BOARDINFO_LATE=y +# CONFIG_BOARD_INIT is not set CONFIG_HUSH_PARSER=y CONFIG_CMD_NAND=y CONFIG_CMD_CACHE=y diff --git a/configs/bcm96756_defconfig b/configs/bcm96756_defconfig index bfd309c25f5..0bd4ccb377a 100644 --- a/configs/bcm96756_defconfig +++ b/configs/bcm96756_defconfig @@ -16,6 +16,7 @@ CONFIG_IDENT_STRING=" Broadcom BCM6756" CONFIG_ENV_VARS_UBOOT_CONFIG=y CONFIG_OF_STDOUT_VIA_ALIAS=y CONFIG_DISPLAY_BOARDINFO_LATE=y +# CONFIG_BOARD_INIT is not set CONFIG_HUSH_PARSER=y CONFIG_CMD_NAND=y CONFIG_CMD_CACHE=y diff --git a/configs/bcm96813_defconfig b/configs/bcm96813_defconfig index 7f165231648..a3909c67474 100644 --- a/configs/bcm96813_defconfig +++ b/configs/bcm96813_defconfig @@ -15,6 +15,7 @@ CONFIG_IDENT_STRING=" Broadcom BCM6813" CONFIG_ENV_VARS_UBOOT_CONFIG=y CONFIG_OF_STDOUT_VIA_ALIAS=y CONFIG_DISPLAY_BOARDINFO_LATE=y +# CONFIG_BOARD_INIT is not set CONFIG_HUSH_PARSER=y CONFIG_CMD_NAND=y CONFIG_CMD_CACHE=y diff --git a/configs/bcm96846_defconfig b/configs/bcm96846_defconfig index 8bc6ac18be9..d26e4db2a96 100644 --- a/configs/bcm96846_defconfig +++ b/configs/bcm96846_defconfig @@ -16,6 +16,7 @@ CONFIG_IDENT_STRING=" Broadcom BCM6846" CONFIG_ENV_VARS_UBOOT_CONFIG=y CONFIG_OF_STDOUT_VIA_ALIAS=y CONFIG_DISPLAY_BOARDINFO_LATE=y +# CONFIG_BOARD_INIT is not set CONFIG_HUSH_PARSER=y CONFIG_CMD_BOOTZ=y CONFIG_CMD_NAND=y diff --git a/configs/bcm96855_defconfig b/configs/bcm96855_defconfig index 342be0a0e17..de113ef4746 100644 --- a/configs/bcm96855_defconfig +++ b/configs/bcm96855_defconfig @@ -16,6 +16,7 @@ CONFIG_IDENT_STRING=" Broadcom BCM6855" CONFIG_ENV_VARS_UBOOT_CONFIG=y CONFIG_OF_STDOUT_VIA_ALIAS=y CONFIG_DISPLAY_BOARDINFO_LATE=y +# CONFIG_BOARD_INIT is not set CONFIG_HUSH_PARSER=y CONFIG_CMD_NAND=y CONFIG_CMD_CACHE=y diff --git a/configs/bcm96856_defconfig b/configs/bcm96856_defconfig index 5f22186966f..710440f9c79 100644 --- a/configs/bcm96856_defconfig +++ b/configs/bcm96856_defconfig @@ -15,6 +15,7 @@ CONFIG_IDENT_STRING=" Broadcom BCM6856" CONFIG_ENV_VARS_UBOOT_CONFIG=y CONFIG_OF_STDOUT_VIA_ALIAS=y CONFIG_DISPLAY_BOARDINFO_LATE=y +# CONFIG_BOARD_INIT is not set CONFIG_HUSH_PARSER=y CONFIG_CMD_NAND=y CONFIG_CMD_CACHE=y diff --git a/configs/bcm96858_defconfig b/configs/bcm96858_defconfig index 682cb14e898..62e767fc830 100644 --- a/configs/bcm96858_defconfig +++ b/configs/bcm96858_defconfig @@ -15,6 +15,7 @@ CONFIG_IDENT_STRING=" Broadcom BCM6858" CONFIG_ENV_VARS_UBOOT_CONFIG=y CONFIG_OF_STDOUT_VIA_ALIAS=y CONFIG_DISPLAY_BOARDINFO_LATE=y +# CONFIG_BOARD_INIT is not set CONFIG_HUSH_PARSER=y CONFIG_CMD_NAND=y CONFIG_CMD_CACHE=y diff --git a/configs/bcm96878_defconfig b/configs/bcm96878_defconfig index ad65187c30c..9689c6a9a15 100644 --- a/configs/bcm96878_defconfig +++ b/configs/bcm96878_defconfig @@ -16,6 +16,7 @@ CONFIG_IDENT_STRING=" Broadcom BCM6878" CONFIG_ENV_VARS_UBOOT_CONFIG=y CONFIG_OF_STDOUT_VIA_ALIAS=y CONFIG_DISPLAY_BOARDINFO_LATE=y +# CONFIG_BOARD_INIT is not set CONFIG_HUSH_PARSER=y CONFIG_CMD_NAND=y CONFIG_CMD_CACHE=y diff --git a/configs/bcmns_defconfig b/configs/bcmns_defconfig index c53c6fffbc4..21e7c684a47 100644 --- a/configs/bcmns_defconfig +++ b/configs/bcmns_defconfig @@ -20,6 +20,7 @@ CONFIG_OF_STDOUT_VIA_ALIAS=y CONFIG_USE_BOOTCOMMAND=y CONFIG_BOOTCOMMAND="run bootcmd_dlink_dir8xxl" CONFIG_DISPLAY_BOARDINFO_LATE=y +# CONFIG_BOARD_INIT is not set CONFIG_HUSH_PARSER=y CONFIG_SYS_PROMPT="northstar> " CONFIG_CMD_BOOTZ=y diff --git a/configs/brppt2_defconfig b/configs/brppt2_defconfig index 04defac9a71..7774f7b2388 100644 --- a/configs/brppt2_defconfig +++ b/configs/brppt2_defconfig @@ -80,7 +80,7 @@ CONFIG_BOOTCOUNT_ALTBOOTCMD="setenv b_mode 0; run b_default;" CONFIG_SYS_I2C_MXC=y CONFIG_MMC_BROKEN_CD=y # CONFIG_SPL_DM_MMC is not set -CONFIG_FSL_ESDHC=y +CONFIG_FSL_ESDHC_IMX=y CONFIG_MTD=y CONFIG_DM_SPI_FLASH=y CONFIG_SPI_FLASH_STMICRO=y diff --git a/configs/corstone1000_defconfig b/configs/corstone1000_defconfig index 80163580f85..527a679b785 100644 --- a/configs/corstone1000_defconfig +++ b/configs/corstone1000_defconfig @@ -26,6 +26,7 @@ CONFIG_SYS_CBSIZE=512 CONFIG_LOGLEVEL=7 # CONFIG_DISPLAY_CPUINFO is not set # CONFIG_DISPLAY_BOARDINFO is not set +# CONFIG_BOARD_INIT is not set CONFIG_BOARD_LATE_INIT=y CONFIG_SYS_PROMPT="corstone1000# " # CONFIG_CMD_CONSOLE is not set diff --git a/configs/durian_defconfig b/configs/durian_defconfig index 336c7a5269e..448332d4667 100644 --- a/configs/durian_defconfig +++ b/configs/durian_defconfig @@ -22,6 +22,7 @@ CONFIG_SYS_CBSIZE=256 CONFIG_SYS_PBSIZE=280 # CONFIG_DISPLAY_CPUINFO is not set # CONFIG_DISPLAY_BOARDINFO is not set +# CONFIG_BOARD_INIT is not set CONFIG_SYS_PROMPT="durian#" # CONFIG_CMD_LZMADEC is not set # CONFIG_CMD_UNZIP is not set diff --git a/configs/e850-96_defconfig b/configs/e850-96_defconfig index f0e9ff7c447..b4066d87460 100644 --- a/configs/e850-96_defconfig +++ b/configs/e850-96_defconfig @@ -3,7 +3,7 @@ CONFIG_ARCH_CPU_INIT=y CONFIG_ARM_SMCCC=y CONFIG_ARCH_EXYNOS=y CONFIG_TEXT_BASE=0xf8800000 -CONFIG_SYS_MALLOC_LEN=0x81f000 +CONFIG_SYS_MALLOC_LEN=0x2000000 CONFIG_SYS_MALLOC_F_LEN=0x4000 CONFIG_ARCH_EXYNOS9=y CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y @@ -15,15 +15,19 @@ CONFIG_SYS_LOAD_ADDR=0x80000000 CONFIG_ENV_OFFSET_REDUND=0x10000 # CONFIG_PSCI_RESET is not set CONFIG_EFI_SET_TIME=y -CONFIG_ANDROID_BOOT_IMAGE=y +CONFIG_EFI_RUNTIME_UPDATE_CAPSULE=y +CONFIG_EFI_CAPSULE_ON_DISK=y +CONFIG_EFI_CAPSULE_FIRMWARE_RAW=y CONFIG_BOOTSTD_FULL=y CONFIG_DEFAULT_FDT_FILE="exynos850-e850-96.dtb" # CONFIG_DISPLAY_CPUINFO is not set +# CONFIG_BOARD_INIT is not set CONFIG_BOARD_LATE_INIT=y CONFIG_CMD_BOOTEFI_SELFTEST=y CONFIG_CMD_ABOOTIMG=y CONFIG_CMD_NVEDIT_EFI=y CONFIG_CMD_CLK=y +CONFIG_CMD_DFU=y CONFIG_CMD_GPT=y CONFIG_CMD_MMC=y CONFIG_CMD_EFIDEBUG=y @@ -39,8 +43,18 @@ CONFIG_ENV_RELOC_GD_ENV_ADDR=y CONFIG_ENV_MMC_EMMC_HW_PARTITION=2 CONFIG_NO_NET=y CONFIG_CLK_EXYNOS850=y +CONFIG_DFU_MMC=y +CONFIG_USB_FUNCTION_FASTBOOT=y +CONFIG_FASTBOOT_BUF_ADDR=0x8a000000 +CONFIG_FASTBOOT_BUF_SIZE=0x30000000 +CONFIG_FASTBOOT_FLASH=y +CONFIG_FASTBOOT_FLASH_MMC_DEV=0 +CONFIG_FASTBOOT_MMC_BOOT_SUPPORT=y +CONFIG_FASTBOOT_CMD_OEM_FORMAT=y CONFIG_SUPPORT_EMMC_BOOT=y CONFIG_MMC_DW=y +CONFIG_PHY=y +CONFIG_PHY_EXYNOS_USBDRD=y CONFIG_DM_RTC=y CONFIG_RTC_EMULATION=y CONFIG_SOC_SAMSUNG=y @@ -48,3 +62,11 @@ CONFIG_EXYNOS_PMU=y CONFIG_EXYNOS_USI=y CONFIG_SYSRESET=y CONFIG_SYSRESET_SYSCON=y +CONFIG_USB=y +CONFIG_DM_USB_GADGET=y +CONFIG_USB_DWC3=y +CONFIG_USB_DWC3_GENERIC=y +CONFIG_USB_GADGET=y +CONFIG_USB_GADGET_MANUFACTURER="Samsung" +CONFIG_USB_GADGET_VENDOR_NUM=0x18d1 +CONFIG_USB_GADGET_PRODUCT_NUM=0x0002 diff --git a/configs/hikey_defconfig b/configs/hikey_defconfig index 59c2101110e..476bfc3af10 100644 --- a/configs/hikey_defconfig +++ b/configs/hikey_defconfig @@ -21,6 +21,7 @@ CONFIG_SYS_PBSIZE=532 # CONFIG_DISPLAY_CPUINFO is not set # CONFIG_DISPLAY_BOARDINFO is not set CONFIG_BOARD_EARLY_INIT_F=y +# CONFIG_BOARD_INIT is not set CONFIG_MISC_INIT_R=y CONFIG_CMD_GPIO=y CONFIG_CMD_MMC=y diff --git a/configs/imx6dl_sielaff_defconfig b/configs/imx6dl_sielaff_defconfig index 6673e1e6915..a4271ea071a 100644 --- a/configs/imx6dl_sielaff_defconfig +++ b/configs/imx6dl_sielaff_defconfig @@ -14,7 +14,7 @@ CONFIG_ENV_SECT_SIZE=0x10000 CONFIG_MX6S=y CONFIG_TARGET_MX6S_SIELAFF=y CONFIG_DM_GPIO=y -CONFIG_DEFAULT_DEVICE_TREE="imx6dl-sielaff" +CONFIG_DEFAULT_DEVICE_TREE="nxp/imx/imx6dl-sielaff" CONFIG_SPL_MMC=y CONFIG_SPL_SERIAL=y CONFIG_SF_DEFAULT_BUS=1 @@ -61,6 +61,7 @@ CONFIG_CMD_UBI=y CONFIG_EFI_PARTITION=y # CONFIG_SPL_EFI_PARTITION is not set CONFIG_OF_CONTROL=y +CONFIG_OF_UPSTREAM=y CONFIG_ENV_IS_IN_SPI_FLASH=y CONFIG_ENV_RELOC_GD_ENV_ADDR=y CONFIG_ENV_VARS_UBOOT_RUNTIME_CONFIG=y @@ -114,5 +115,6 @@ CONFIG_USB_GADGET_MANUFACTURER="FSL" CONFIG_USB_GADGET_VENDOR_NUM=0x0525 CONFIG_USB_GADGET_PRODUCT_NUM=0xa4a5 CONFIG_CI_UDC=y +CONFIG_SDP_LOADADDR=0x17ffffc0 CONFIG_SPL_USB_SDP_SUPPORT=y CONFIG_IMX_WATCHDOG=y diff --git a/configs/imx8m_data_modul.config b/configs/imx8m_data_modul.config index 07390037c46..4634a0972f0 100644 --- a/configs/imx8m_data_modul.config +++ b/configs/imx8m_data_modul.config @@ -11,6 +11,7 @@ CONFIG_ARCH_IMX8M=y CONFIG_ARCH_MISC_INIT=y CONFIG_ARM=y +# CONFIG_BOARD_INIT is not set CONFIG_BOARD_LATE_INIT=y CONFIG_BOOTCOMMAND="run dmo_update_env ; load ${devtype} ${devnum}:${devpart} ${loadaddr} boot/fitImage && source ${loadaddr}:bootscr-boot.cmd ; reset" CONFIG_BOOTCOUNT_ALTBOOTCMD="run bootcmd" diff --git a/configs/imx8mm-phygate-tauri-l_defconfig b/configs/imx8mm-phygate-tauri-l_defconfig index 7c8a2060b1a..7369c0a05ac 100644 --- a/configs/imx8mm-phygate-tauri-l_defconfig +++ b/configs/imx8mm-phygate-tauri-l_defconfig @@ -9,7 +9,6 @@ CONFIG_ENV_SIZE=0x10000 CONFIG_ENV_OFFSET=0x3C0000 CONFIG_DM_GPIO=y CONFIG_DEFAULT_DEVICE_TREE="freescale/imx8mm-phygate-tauri-l" -CONFIG_IMX8M_OPTEE_LOAD_ADDR=0x56000000 CONFIG_TARGET_PHYCORE_IMX8MM=y CONFIG_SYS_MONITOR_LEN=524288 CONFIG_SPL_MMC=y @@ -20,16 +19,15 @@ CONFIG_SPL_TEXT_BASE=0x7E1000 CONFIG_SPL_HAS_BSS_LINKER_SECTION=y CONFIG_SPL_BSS_START_ADDR=0x910000 CONFIG_SPL_BSS_MAX_SIZE=0x2000 -CONFIG_SYS_LOAD_ADDR=0x40480000 +CONFIG_SYS_LOAD_ADDR=0x47602000 CONFIG_SPL=y CONFIG_ENV_OFFSET_REDUND=0x3E0000 CONFIG_FIT=y CONFIG_FIT_EXTERNAL_OFFSET=0x3000 CONFIG_SPL_LOAD_FIT=y +CONFIG_BOOTSTD_FULL=y CONFIG_OF_SYSTEM_SETUP=y -CONFIG_USE_BOOTCOMMAND=y -CONFIG_BOOTCOMMAND="mmc dev ${mmcdev}; if mmc rescan; then if run loadimage; then run mmcboot; else run netboot; fi; fi;" -CONFIG_DEFAULT_FDT_FILE="oftree" +CONFIG_DEFAULT_FDT_FILE="imx8mm-phygate-tauri-l" CONFIG_SYS_CBSIZE=2048 CONFIG_SYS_PBSIZE=2074 CONFIG_BOARD_LATE_INIT=y @@ -44,7 +42,6 @@ CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR=0x300 CONFIG_SPL_I2C=y CONFIG_SPL_POWER=y CONFIG_SPL_WATCHDOG=y -CONFIG_HUSH_PARSER=y CONFIG_SYS_PROMPT="u-boot=> " # CONFIG_CMD_EXPORTENV is not set # CONFIG_CMD_IMPORTENV is not set @@ -60,15 +57,9 @@ CONFIG_CMD_FUSE=y CONFIG_CMD_GPIO=y CONFIG_CMD_I2C=y CONFIG_CMD_MMC=y -CONFIG_CMD_DHCP=y -CONFIG_CMD_MII=y -CONFIG_CMD_PING=y CONFIG_CMD_CACHE=y CONFIG_CMD_REGULATOR=y -CONFIG_CMD_EXT2=y -CONFIG_CMD_EXT4=y CONFIG_CMD_EXT4_WRITE=y -CONFIG_CMD_FAT=y CONFIG_OF_CONTROL=y CONFIG_SPL_OF_CONTROL=y CONFIG_ENV_OVERWRITE=y diff --git a/configs/imx8mm_beacon_defconfig b/configs/imx8mm_beacon_defconfig index 06cc4bb7dde..7c520f6e4b5 100644 --- a/configs/imx8mm_beacon_defconfig +++ b/configs/imx8mm_beacon_defconfig @@ -34,6 +34,7 @@ CONFIG_BOOTCOMMAND="mmc dev ${mmcdev}; if mmc rescan; then if run loadbootscript CONFIG_DEFAULT_FDT_FILE="imx8mm-beacon-kit.dtb" CONFIG_SYS_CBSIZE=2048 CONFIG_SYS_PBSIZE=2074 +# CONFIG_BOARD_INIT is not set # CONFIG_SPL_SHARES_INIT_SP_ADDR is not set CONFIG_SPL_HAVE_INIT_STACK=y CONFIG_SPL_SYS_MALLOC=y diff --git a/configs/imx8mm_beacon_fspi_defconfig b/configs/imx8mm_beacon_fspi_defconfig index 5e60c9d3a08..0cefcadff6a 100644 --- a/configs/imx8mm_beacon_fspi_defconfig +++ b/configs/imx8mm_beacon_fspi_defconfig @@ -33,6 +33,7 @@ CONFIG_BOOTCOMMAND="mmc dev ${mmcdev}; if mmc rescan; then if run loadbootscript CONFIG_DEFAULT_FDT_FILE="imx8mm-beacon-kit.dtb" CONFIG_SYS_CBSIZE=2048 CONFIG_SYS_PBSIZE=2074 +# CONFIG_BOARD_INIT is not set CONFIG_SPL_MAX_SIZE=0x25000 CONFIG_SPL_PAD_TO=0x0 CONFIG_SPL_BOARD_INIT=y diff --git a/configs/imx8mn_beacon_2g_defconfig b/configs/imx8mn_beacon_2g_defconfig index b71cdbb2e4e..c757a2180c0 100644 --- a/configs/imx8mn_beacon_2g_defconfig +++ b/configs/imx8mn_beacon_2g_defconfig @@ -40,6 +40,7 @@ CONFIG_BOOTCOMMAND="mmc dev ${mmcdev}; if mmc rescan; then if run loadbootscript CONFIG_DEFAULT_FDT_FILE="imx8mn-beacon-kit.dtb" CONFIG_SYS_CBSIZE=2048 CONFIG_SYS_PBSIZE=2074 +# CONFIG_BOARD_INIT is not set CONFIG_SPL_MAX_SIZE=0x25000 CONFIG_SPL_BOARD_INIT=y CONFIG_SPL_BOOTROM_SUPPORT=y diff --git a/configs/imx8mn_beacon_defconfig b/configs/imx8mn_beacon_defconfig index bb483653db2..ddaea0c68bd 100644 --- a/configs/imx8mn_beacon_defconfig +++ b/configs/imx8mn_beacon_defconfig @@ -40,6 +40,7 @@ CONFIG_BOOTCOMMAND="mmc dev ${mmcdev}; if mmc rescan; then if run loadbootscript CONFIG_DEFAULT_FDT_FILE="imx8mn-beacon-kit.dtb" CONFIG_SYS_CBSIZE=2048 CONFIG_SYS_PBSIZE=2074 +# CONFIG_BOARD_INIT is not set CONFIG_SPL_MAX_SIZE=0x25000 CONFIG_SPL_BOARD_INIT=y CONFIG_SPL_BOOTROM_SUPPORT=y diff --git a/configs/imx8mn_beacon_fspi_defconfig b/configs/imx8mn_beacon_fspi_defconfig index f163871bfaa..4a49355195a 100644 --- a/configs/imx8mn_beacon_fspi_defconfig +++ b/configs/imx8mn_beacon_fspi_defconfig @@ -39,6 +39,7 @@ CONFIG_BOOTCOMMAND="mmc dev ${mmcdev}; if mmc rescan; then if run loadbootscript CONFIG_DEFAULT_FDT_FILE="imx8mn-beacon-kit.dtb" CONFIG_SYS_CBSIZE=2048 CONFIG_SYS_PBSIZE=2074 +# CONFIG_BOARD_INIT is not set CONFIG_SPL_MAX_SIZE=0x25000 CONFIG_SPL_BOARD_INIT=y CONFIG_SPL_BOOTROM_SUPPORT=y diff --git a/configs/imx8mn_bsh_smm_s2_defconfig b/configs/imx8mn_bsh_smm_s2_defconfig index c83f6a99a7e..dafef23650a 100644 --- a/configs/imx8mn_bsh_smm_s2_defconfig +++ b/configs/imx8mn_bsh_smm_s2_defconfig @@ -31,7 +31,7 @@ CONFIG_OF_SYSTEM_SETUP=y CONFIG_DEFAULT_FDT_FILE="freescale/imx8mn-bsh-smm-s2.dtb" CONFIG_SYS_CBSIZE=2048 CONFIG_SYS_PBSIZE=2067 -CONFIG_ARCH_MISC_INIT=y +# CONFIG_BOARD_INIT is not set CONFIG_BOARD_LATE_INIT=y CONFIG_SPL_MAX_SIZE=0x25000 CONFIG_SPL_BOARD_INIT=y diff --git a/configs/imx8mn_bsh_smm_s2pro_defconfig b/configs/imx8mn_bsh_smm_s2pro_defconfig index 58550c6c332..ee12de0deea 100644 --- a/configs/imx8mn_bsh_smm_s2pro_defconfig +++ b/configs/imx8mn_bsh_smm_s2pro_defconfig @@ -32,7 +32,7 @@ CONFIG_OF_SYSTEM_SETUP=y CONFIG_DEFAULT_FDT_FILE="freescale/imx8mn-bsh-smm-s2pro.dtb" CONFIG_SYS_CBSIZE=2048 CONFIG_SYS_PBSIZE=2067 -CONFIG_ARCH_MISC_INIT=y +# CONFIG_BOARD_INIT is not set CONFIG_BOARD_LATE_INIT=y CONFIG_SPL_MAX_SIZE=0x25000 CONFIG_SPL_BOARD_INIT=y diff --git a/configs/imx8mn_var_som_defconfig b/configs/imx8mn_var_som_defconfig index 875ddcaaaa4..b9f3b9b8999 100644 --- a/configs/imx8mn_var_som_defconfig +++ b/configs/imx8mn_var_som_defconfig @@ -36,7 +36,7 @@ CONFIG_DEFAULT_FDT_FILE="freescale/imx8mn-var-som-symphony.dtb" CONFIG_SYS_CBSIZE=2048 CONFIG_SYS_PBSIZE=2067 CONFIG_BOARD_TYPES=y -CONFIG_ARCH_MISC_INIT=y +# CONFIG_BOARD_INIT is not set CONFIG_SPL_MAX_SIZE=0x25000 CONFIG_SPL_BOARD_INIT=y CONFIG_SPL_BOOTROM_SUPPORT=y diff --git a/configs/imx8mp_dhsom.config b/configs/imx8mp_dhsom.config index 226c58c0277..406529346c5 100644 --- a/configs/imx8mp_dhsom.config +++ b/configs/imx8mp_dhsom.config @@ -3,6 +3,7 @@ CONFIG_TARGET_IMX8MP_DH_DHCOM_PDK2=y # CONFIG_INPUT is not set CONFIG_ARCH_MISC_INIT=y +# CONFIG_BOARD_INIT is not set CONFIG_BOARD_LATE_INIT=y CONFIG_BOOTCOMMAND="run dh_update_env distro_bootcmd ; reset" CONFIG_NR_DRAM_BANKS=2 diff --git a/configs/imx8mp_evk_defconfig b/configs/imx8mp_evk_defconfig index 46039fd0c03..0ad1acb94b6 100644 --- a/configs/imx8mp_evk_defconfig +++ b/configs/imx8mp_evk_defconfig @@ -36,6 +36,7 @@ CONFIG_BOOTCOMMAND="bootflow scan -lb; run bsp_bootcmd" CONFIG_DEFAULT_FDT_FILE="imx8mp-evk.dtb" CONFIG_SYS_CBSIZE=2048 CONFIG_SYS_PBSIZE=2074 +# CONFIG_BOARD_INIT is not set CONFIG_BOARD_LATE_INIT=y CONFIG_SPL_MAX_SIZE=0x26000 CONFIG_SPL_BOARD_INIT=y diff --git a/configs/imx8mp_navqp_defconfig b/configs/imx8mp_navqp_defconfig index 552665d27ca..216831b0ede 100644 --- a/configs/imx8mp_navqp_defconfig +++ b/configs/imx8mp_navqp_defconfig @@ -31,6 +31,7 @@ CONFIG_OF_SYSTEM_SETUP=y CONFIG_DEFAULT_FDT_FILE="imx8mp-navqp.dtb" CONFIG_SYS_CBSIZE=2048 CONFIG_SYS_PBSIZE=2074 +# CONFIG_BOARD_INIT is not set CONFIG_SPL_MAX_SIZE=0x26000 CONFIG_SPL_BOARD_INIT=y CONFIG_SPL_BOOTROM_SUPPORT=y diff --git a/configs/imx91_11x11_evk_defconfig b/configs/imx91_11x11_evk_defconfig index b92754074a0..809885c0873 100644 --- a/configs/imx91_11x11_evk_defconfig +++ b/configs/imx91_11x11_evk_defconfig @@ -35,7 +35,7 @@ CONFIG_BOOTCOMMAND="bootflow scan -lb; run bsp_bootcmd" CONFIG_DEFAULT_FDT_FILE="imx91-11x11-evk.dtb" CONFIG_SYS_CBSIZE=2048 CONFIG_SYS_PBSIZE=2074 -CONFIG_ARCH_MISC_INIT=y +# CONFIG_BOARD_INIT is not set CONFIG_BOARD_LATE_INIT=y CONFIG_SPL_MAX_SIZE=0x26000 CONFIG_SPL_BOARD_INIT=y diff --git a/configs/imx91_11x11_evk_inline_ecc_defconfig b/configs/imx91_11x11_evk_inline_ecc_defconfig index 8a5222b6540..e7fa6b2f730 100644 --- a/configs/imx91_11x11_evk_inline_ecc_defconfig +++ b/configs/imx91_11x11_evk_inline_ecc_defconfig @@ -35,7 +35,7 @@ CONFIG_BOOTCOMMAND="bootflow scan -lb; run bsp_bootcmd" CONFIG_DEFAULT_FDT_FILE="imx91-11x11-evk.dtb" CONFIG_SYS_CBSIZE=2048 CONFIG_SYS_PBSIZE=2074 -CONFIG_ARCH_MISC_INIT=y +# CONFIG_BOARD_INIT is not set CONFIG_BOARD_LATE_INIT=y CONFIG_SPL_MAX_SIZE=0x26000 CONFIG_SPL_BOARD_INIT=y diff --git a/configs/imx93_9x9_qsb_defconfig b/configs/imx93_9x9_qsb_defconfig index 99c349a9295..be250abb0b1 100644 --- a/configs/imx93_9x9_qsb_defconfig +++ b/configs/imx93_9x9_qsb_defconfig @@ -32,6 +32,7 @@ CONFIG_BOOTCOMMAND="bootflow scan -lb; run bsp_bootcmd" CONFIG_DEFAULT_FDT_FILE="imx93-9x9-qsb.dtb" CONFIG_SYS_CBSIZE=2048 CONFIG_SYS_PBSIZE=2074 +# CONFIG_BOARD_INIT is not set CONFIG_BOARD_LATE_INIT=y CONFIG_SPL_MAX_SIZE=0x26000 CONFIG_SPL_BOARD_INIT=y diff --git a/configs/imx93_9x9_qsb_inline_ecc_defconfig b/configs/imx93_9x9_qsb_inline_ecc_defconfig index 0966f166ec6..3cb9ee3daf3 100644 --- a/configs/imx93_9x9_qsb_inline_ecc_defconfig +++ b/configs/imx93_9x9_qsb_inline_ecc_defconfig @@ -32,6 +32,7 @@ CONFIG_BOOTCOMMAND="bootflow scan -lb; run bsp_bootcmd" CONFIG_DEFAULT_FDT_FILE="imx93-9x9-qsb.dtb" CONFIG_SYS_CBSIZE=2048 CONFIG_SYS_PBSIZE=2074 +# CONFIG_BOARD_INIT is not set CONFIG_BOARD_LATE_INIT=y CONFIG_SPL_MAX_SIZE=0x26000 CONFIG_SPL_BOARD_INIT=y diff --git a/configs/imx93_frdm_defconfig b/configs/imx93_frdm_defconfig new file mode 100644 index 00000000000..4f837ca9282 --- /dev/null +++ b/configs/imx93_frdm_defconfig @@ -0,0 +1,124 @@ +CONFIG_ARM=y +CONFIG_ARCH_IMX9=y +CONFIG_TEXT_BASE=0x80200000 +CONFIG_SYS_MALLOC_LEN=0x2000000 +CONFIG_SYS_MALLOC_F_LEN=0x18000 +CONFIG_SPL_LIBCOMMON_SUPPORT=y +CONFIG_SPL_LIBGENERIC_SUPPORT=y +CONFIG_NR_DRAM_BANKS=2 +CONFIG_ENV_SIZE=0x4000 +CONFIG_ENV_OFFSET=0x700000 +CONFIG_IMX_CONFIG="arch/arm/mach-imx/imx9/imximage.cfg" +CONFIG_DM_GPIO=y +CONFIG_DEFAULT_DEVICE_TREE="imx93-11x11-frdm" +CONFIG_TARGET_IMX93_FRDM=y +CONFIG_SYS_MONITOR_LEN=524288 +CONFIG_SPL_SERIAL=y +CONFIG_SPL_DRIVERS_MISC=y +CONFIG_SPL_STACK=0x20519dd0 +CONFIG_SPL_TEXT_BASE=0x2049A000 +CONFIG_SPL_HAS_BSS_LINKER_SECTION=y +CONFIG_SPL_BSS_START_ADDR=0x2051a000 +CONFIG_SPL_BSS_MAX_SIZE=0x2000 +CONFIG_SYS_LOAD_ADDR=0x80400000 +CONFIG_SPL=y +CONFIG_SPL_IMX_ROMAPI_LOADADDR=0x88000000 +CONFIG_SYS_MEMTEST_START=0x80000000 +CONFIG_SYS_MEMTEST_END=0x90000000 +CONFIG_REMAKE_ELF=y +CONFIG_EFI_VAR_BUF_SIZE=139264 +CONFIG_EFI_RUNTIME_UPDATE_CAPSULE=y +CONFIG_EFI_CAPSULE_ON_DISK=y +CONFIG_EFI_CAPSULE_FIRMWARE_RAW=y +CONFIG_BOOTCOMMAND="bootflow scan -lb; run bsp_bootcmd" +CONFIG_DEFAULT_FDT_FILE="imx93-11x11-frdm.dtb" +CONFIG_SYS_CBSIZE=2048 +CONFIG_SYS_PBSIZE=2074 +CONFIG_BOARD_EARLY_INIT_F=y +CONFIG_BOARD_LATE_INIT=y +CONFIG_SPL_MAX_SIZE=0x26000 +CONFIG_SPL_BOARD_INIT=y +CONFIG_SPL_BOOTROM_SUPPORT=y +CONFIG_SPL_LOAD_IMX_CONTAINER=y +CONFIG_IMX_CONTAINER_CFG="arch/arm/mach-imx/imx9/container.cfg" +# CONFIG_SPL_SHARES_INIT_SP_ADDR is not set +CONFIG_SPL_HAVE_INIT_STACK=y +CONFIG_SPL_SYS_MALLOC=y +CONFIG_SPL_HAS_CUSTOM_MALLOC_START=y +CONFIG_SPL_CUSTOM_SYS_MALLOC_ADDR=0x83200000 +CONFIG_SPL_SYS_MALLOC_SIZE=0x80000 +CONFIG_SPL_SYS_MMCSD_RAW_MODE=y +CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR=0x1040 +CONFIG_SPL_I2C=y +CONFIG_SPL_POWER=y +CONFIG_SPL_WATCHDOG=y +CONFIG_SYS_PROMPT="u-boot=> " +CONFIG_CMD_CPU=y +CONFIG_CMD_ERASEENV=y +CONFIG_CMD_NVEDIT_EFI=y +# CONFIG_CMD_CRC32 is not set +CONFIG_CMD_MEMTEST=y +CONFIG_CMD_CLK=y +CONFIG_CMD_DFU=y +CONFIG_CMD_FUSE=y +CONFIG_CMD_GPIO=y +CONFIG_CMD_GPT=y +CONFIG_CMD_I2C=y +CONFIG_CMD_MMC=y +CONFIG_CMD_POWEROFF=y +CONFIG_CMD_SNTP=y +CONFIG_CMD_CACHE=y +CONFIG_CMD_EFIDEBUG=y +CONFIG_CMD_TIME=y +CONFIG_CMD_GETTIME=y +CONFIG_CMD_TIMER=y +CONFIG_CMD_REGULATOR=y +CONFIG_CMD_HASH=y +CONFIG_CMD_EXT4_WRITE=y +CONFIG_CMD_SPAWN=y +CONFIG_OF_CONTROL=y +CONFIG_SPL_OF_CONTROL=y +CONFIG_ENV_OVERWRITE=y +CONFIG_ENV_IS_NOWHERE=y +CONFIG_ENV_IS_IN_MMC=y +CONFIG_ENV_RELOC_GD_ENV_ADDR=y +CONFIG_ENV_VARS_UBOOT_RUNTIME_CONFIG=y +CONFIG_SPL_DM=y +CONFIG_REGMAP=y +CONFIG_SYSCON=y +CONFIG_ADC=y +CONFIG_ADC_IMX93=y +CONFIG_SPL_CLK_IMX93=y +CONFIG_CLK_IMX93=y +CONFIG_DFU_MMC=y +CONFIG_IMX_RGPIO2P=y +CONFIG_DM_PCA953X=y +CONFIG_DM_I2C=y +CONFIG_SYS_I2C_IMX_LPI2C=y +CONFIG_SUPPORT_EMMC_RPMB=y +CONFIG_SUPPORT_EMMC_BOOT=y +CONFIG_MMC_IO_VOLTAGE=y +CONFIG_MMC_UHS_SUPPORT=y +CONFIG_MMC_HS400_ES_SUPPORT=y +CONFIG_MMC_HS400_SUPPORT=y +CONFIG_FSL_USDHC=y +CONFIG_PINCTRL=y +CONFIG_SPL_PINCTRL=y +CONFIG_PINCTRL_IMX93=y +CONFIG_DM_PMIC=y +CONFIG_SPL_DM_PMIC_PCA9450=y +CONFIG_DM_REGULATOR=y +CONFIG_DM_REGULATOR_FIXED=y +CONFIG_DM_REGULATOR_GPIO=y +CONFIG_DM_SERIAL=y +CONFIG_FSL_LPUART=y +CONFIG_SYSRESET=y +CONFIG_SYSRESET_CMD_POWEROFF=y +CONFIG_SYSRESET_PSCI=y +CONFIG_DM_THERMAL=y +CONFIG_ULP_WATCHDOG=y +CONFIG_WDT=y +CONFIG_SHA384=y +CONFIG_LZO=y +CONFIG_BZIP2=y +CONFIG_UTHREAD=y diff --git a/configs/imx95_19x19_evk_defconfig b/configs/imx95_19x19_evk_defconfig index 814570ee2ae..73818a82627 100644 --- a/configs/imx95_19x19_evk_defconfig +++ b/configs/imx95_19x19_evk_defconfig @@ -38,8 +38,8 @@ CONFIG_BOOTCOMMAND="bootflow scan -l; run bsp_bootcmd" CONFIG_DEFAULT_FDT_FILE="imx95-19x19-evk.dtb" CONFIG_SYS_CBSIZE=2048 CONFIG_SYS_PBSIZE=2074 -CONFIG_ARCH_MISC_INIT=y CONFIG_BOARD_EARLY_INIT_F=y +# CONFIG_BOARD_INIT is not set CONFIG_BOARD_LATE_INIT=y CONFIG_PCI_INIT_R=y CONFIG_SPL_MAX_SIZE=0x20000 diff --git a/configs/iot2050_defconfig b/configs/iot2050_defconfig index a88e697d9fa..077992b5fab 100644 --- a/configs/iot2050_defconfig +++ b/configs/iot2050_defconfig @@ -46,6 +46,7 @@ CONFIG_OF_SYSTEM_SETUP=y CONFIG_BOOTCOMMAND="run start_watchdog; run distro_bootcmd" CONFIG_SYS_PBSIZE=1050 # CONFIG_DISPLAY_CPUINFO is not set +# CONFIG_BOARD_INIT is not set CONFIG_SPL_MAX_SIZE=0x58000 CONFIG_SPL_BOARD_INIT=y CONFIG_SPL_SYS_MALLOC_SIMPLE=y diff --git a/configs/j7200_evm_a72_defconfig b/configs/j7200_evm_a72_defconfig index 3987bab5679..36274804881 100644 --- a/configs/j7200_evm_a72_defconfig +++ b/configs/j7200_evm_a72_defconfig @@ -39,6 +39,7 @@ CONFIG_OF_BOARD_SETUP=y CONFIG_OF_SYSTEM_SETUP=y CONFIG_BOOTCOMMAND="run envboot; bootflow scan -lb" CONFIG_LOGLEVEL=7 +# CONFIG_BOARD_INIT is not set CONFIG_SPL_MAX_SIZE=0xc0000 CONFIG_SPL_BOARD_INIT=y CONFIG_SPL_SYS_MALLOC_SIMPLE=y diff --git a/configs/j7200_evm_r5_defconfig b/configs/j7200_evm_r5_defconfig index dca757fe057..d97d331fdbd 100644 --- a/configs/j7200_evm_r5_defconfig +++ b/configs/j7200_evm_r5_defconfig @@ -35,6 +35,7 @@ CONFIG_SPL_LOAD_FIT=y CONFIG_SPL_LOAD_FIT_ADDRESS=0x80080000 CONFIG_USE_BOOTCOMMAND=y # CONFIG_DISPLAY_CPUINFO is not set +# CONFIG_BOARD_INIT is not set CONFIG_SPL_MAX_SIZE=0xc0000 CONFIG_SPL_BOARD_INIT=y CONFIG_SPL_SEPARATE_BSS=y diff --git a/configs/j721e_beagleboneai64_a72_defconfig b/configs/j721e_beagleboneai64_a72_defconfig index 00ed3d91242..e7f708a60c5 100644 --- a/configs/j721e_beagleboneai64_a72_defconfig +++ b/configs/j721e_beagleboneai64_a72_defconfig @@ -37,6 +37,7 @@ CONFIG_AUTOBOOT_STOP_STR=" " CONFIG_OF_SYSTEM_SETUP=y CONFIG_BOOTCOMMAND="run set_led_state_start_load; run envboot; bootflow scan -lb;run set_led_state_fail_load" CONFIG_LOGLEVEL=7 +# CONFIG_BOARD_INIT is not set CONFIG_BOARD_LATE_INIT=y CONFIG_SPL_MAX_SIZE=0xc0000 CONFIG_SPL_SYS_MALLOC_SIMPLE=y diff --git a/configs/j721e_beagleboneai64_r5_defconfig b/configs/j721e_beagleboneai64_r5_defconfig index 99e96c90ef9..50a9d95d7bf 100644 --- a/configs/j721e_beagleboneai64_r5_defconfig +++ b/configs/j721e_beagleboneai64_r5_defconfig @@ -32,6 +32,7 @@ CONFIG_SPL_LOAD_FIT=y CONFIG_SPL_LOAD_FIT_ADDRESS=0x80080000 CONFIG_USE_BOOTCOMMAND=y # CONFIG_DISPLAY_CPUINFO is not set +# CONFIG_BOARD_INIT is not set CONFIG_SPL_SIZE_LIMIT_SUBTRACT_GD=y CONFIG_SPL_SIZE_LIMIT_SUBTRACT_MALLOC=y CONFIG_SPL_MAX_SIZE=0xf59f0 diff --git a/configs/j721e_evm_a72_defconfig b/configs/j721e_evm_a72_defconfig index 02e3ac343d9..42e1dd21d0b 100644 --- a/configs/j721e_evm_a72_defconfig +++ b/configs/j721e_evm_a72_defconfig @@ -36,6 +36,7 @@ CONFIG_OF_BOARD_SETUP=y CONFIG_OF_SYSTEM_SETUP=y CONFIG_BOOTCOMMAND="run envboot; bootflow scan -lb" CONFIG_LOGLEVEL=7 +# CONFIG_BOARD_INIT is not set CONFIG_SPL_MAX_SIZE=0xc0000 CONFIG_SPL_BOARD_INIT=y CONFIG_SPL_SYS_MALLOC_SIMPLE=y diff --git a/configs/j721e_evm_r5_defconfig b/configs/j721e_evm_r5_defconfig index 3a54a4c97d1..ceb2e273b54 100644 --- a/configs/j721e_evm_r5_defconfig +++ b/configs/j721e_evm_r5_defconfig @@ -37,6 +37,7 @@ CONFIG_SPL_LOAD_FIT_ADDRESS=0x80080000 CONFIG_OF_BOARD_SETUP=y CONFIG_USE_BOOTCOMMAND=y # CONFIG_DISPLAY_CPUINFO is not set +# CONFIG_BOARD_INIT is not set CONFIG_SPL_SIZE_LIMIT_SUBTRACT_GD=y CONFIG_SPL_SIZE_LIMIT_SUBTRACT_MALLOC=y CONFIG_SPL_MAX_SIZE=0xf59f0 diff --git a/configs/j721s2_evm_a72_defconfig b/configs/j721s2_evm_a72_defconfig index ac584f50b94..8ea9decf15b 100644 --- a/configs/j721s2_evm_a72_defconfig +++ b/configs/j721s2_evm_a72_defconfig @@ -36,6 +36,7 @@ CONFIG_BOOTSTD_FULL=y CONFIG_OF_SYSTEM_SETUP=y CONFIG_BOOTCOMMAND="run envboot; bootflow scan -lb" CONFIG_LOGLEVEL=7 +# CONFIG_BOARD_INIT is not set CONFIG_SPL_MAX_SIZE=0xc0000 CONFIG_SPL_BOARD_INIT=y CONFIG_SPL_SYS_MALLOC_SIMPLE=y diff --git a/configs/j721s2_evm_r5_defconfig b/configs/j721s2_evm_r5_defconfig index f4c0862d0a8..aaf8fd32879 100644 --- a/configs/j721s2_evm_r5_defconfig +++ b/configs/j721s2_evm_r5_defconfig @@ -36,6 +36,7 @@ CONFIG_SPL_LOAD_FIT=y CONFIG_SPL_LOAD_FIT_ADDRESS=0x80080000 CONFIG_USE_BOOTCOMMAND=y # CONFIG_DISPLAY_CPUINFO is not set +# CONFIG_BOARD_INIT is not set CONFIG_SPL_SIZE_LIMIT_SUBTRACT_GD=y CONFIG_SPL_SIZE_LIMIT_SUBTRACT_MALLOC=y CONFIG_SPL_MAX_SIZE=0xc0000 diff --git a/configs/j722s_evm_a53_defconfig b/configs/j722s_evm_a53_defconfig index 19f4a3b0e92..83ac99c922a 100644 --- a/configs/j722s_evm_a53_defconfig +++ b/configs/j722s_evm_a53_defconfig @@ -32,6 +32,7 @@ CONFIG_SPL_LOAD_FIT=y CONFIG_SPL_LOAD_FIT_ADDRESS=0x81000000 CONFIG_BOOTSTD_FULL=y CONFIG_BOOTCOMMAND="run envboot; bootflow scan -lb" +# CONFIG_BOARD_INIT is not set CONFIG_BOARD_LATE_INIT=y CONFIG_SPL_MAX_SIZE=0x58000 CONFIG_SPL_PAD_TO=0x0 diff --git a/configs/j722s_evm_r5_defconfig b/configs/j722s_evm_r5_defconfig index f4562bd0d68..8e2741c8d42 100644 --- a/configs/j722s_evm_r5_defconfig +++ b/configs/j722s_evm_r5_defconfig @@ -33,6 +33,7 @@ CONFIG_SPL_SPI=y CONFIG_SPL_LOAD_FIT=y CONFIG_SPL_LOAD_FIT_ADDRESS=0x80080000 # CONFIG_DISPLAY_CPUINFO is not set +# CONFIG_BOARD_INIT is not set CONFIG_SPL_SIZE_LIMIT_SUBTRACT_GD=y CONFIG_SPL_SIZE_LIMIT_SUBTRACT_MALLOC=y CONFIG_SPL_MAX_SIZE=0x6ce00 diff --git a/configs/j784s4_evm_a72_defconfig b/configs/j784s4_evm_a72_defconfig index 6b1306cf7af..67aa18a16da 100644 --- a/configs/j784s4_evm_a72_defconfig +++ b/configs/j784s4_evm_a72_defconfig @@ -34,6 +34,7 @@ CONFIG_SPL_LOAD_FIT_ADDRESS=0x81000000 CONFIG_BOOTSTD_FULL=y CONFIG_BOOTCOMMAND="run envboot; bootflow scan -lb" CONFIG_LOGLEVEL=7 +# CONFIG_BOARD_INIT is not set CONFIG_SPL_MAX_SIZE=0xc0000 CONFIG_SPL_BOARD_INIT=y CONFIG_SPL_SYS_MALLOC_SIMPLE=y diff --git a/configs/j784s4_evm_r5_defconfig b/configs/j784s4_evm_r5_defconfig index 9e4170028f4..cc340a2fe76 100644 --- a/configs/j784s4_evm_r5_defconfig +++ b/configs/j784s4_evm_r5_defconfig @@ -35,6 +35,7 @@ CONFIG_SPL_SPI=y CONFIG_SPL_LOAD_FIT=y CONFIG_SPL_LOAD_FIT_ADDRESS=0x80080000 CONFIG_USE_BOOTCOMMAND=y +# CONFIG_BOARD_INIT is not set CONFIG_SPL_SIZE_LIMIT_SUBTRACT_GD=y CONFIG_SPL_SIZE_LIMIT_SUBTRACT_MALLOC=y CONFIG_SPL_MAX_SIZE=0xc0000 diff --git a/configs/k230_canmv_defconfig b/configs/k230_canmv_defconfig index 47fa1add2a9..a43412f0290 100644 --- a/configs/k230_canmv_defconfig +++ b/configs/k230_canmv_defconfig @@ -7,6 +7,7 @@ CONFIG_DEFAULT_DEVICE_TREE="k230-canmv" CONFIG_SYS_LOAD_ADDR=0xc000000 CONFIG_TARGET_K230_CANMV=y CONFIG_ARCH_RV64I=y +# CONFIG_BOARD_INIT is not set CONFIG_HUSH_PARSER=y CONFIG_SYS_PROMPT="K230# " CONFIG_CMD_USB=y diff --git a/configs/kontron-sl-mx8mm_defconfig b/configs/kontron-sl-mx8mm_defconfig index cdf8e406483..4f08f2c572c 100644 --- a/configs/kontron-sl-mx8mm_defconfig +++ b/configs/kontron-sl-mx8mm_defconfig @@ -41,6 +41,7 @@ CONFIG_OF_BOARD_SETUP=y CONFIG_SYS_CBSIZE=2048 CONFIG_SYS_PBSIZE=276 CONFIG_BOARD_TYPES=y +# CONFIG_BOARD_INIT is not set CONFIG_BOARD_LATE_INIT=y CONFIG_SPL_BOARD_INIT=y # CONFIG_SPL_SHARES_INIT_SP_ADDR is not set diff --git a/configs/kontron_sl28_defconfig b/configs/kontron_sl28_defconfig index 6ddd21bd295..e97534ecc0a 100644 --- a/configs/kontron_sl28_defconfig +++ b/configs/kontron_sl28_defconfig @@ -47,6 +47,7 @@ CONFIG_OF_STDOUT_VIA_ALIAS=y CONFIG_USE_BOOTARGS=y CONFIG_SYS_CBSIZE=256 CONFIG_SYS_PBSIZE=276 +# CONFIG_BOARD_INIT is not set CONFIG_BOARD_LATE_INIT=y # CONFIG_HWCONFIG is not set CONFIG_PCI_INIT_R=y diff --git a/configs/microchip_mpfs_icicle_defconfig b/configs/microchip_mpfs_icicle_defconfig index bb110225488..6937aa224a1 100644 --- a/configs/microchip_mpfs_icicle_defconfig +++ b/configs/microchip_mpfs_icicle_defconfig @@ -7,6 +7,7 @@ CONFIG_ENV_SIZE=0x2000 CONFIG_DEFAULT_DEVICE_TREE="microchip/mpfs-icicle-kit" CONFIG_SYS_LOAD_ADDR=0x80200000 CONFIG_SYS_MEM_TOP_HIDE=0x400000 +# CONFIG_DEBUG_UART is not set CONFIG_TARGET_MICROCHIP_ICICLE=y CONFIG_ARCH_RV64I=y CONFIG_RISCV_SMODE=y diff --git a/configs/mt7622_rfb_defconfig b/configs/mt7622_rfb_defconfig index 08a88e1f33d..7213c878830 100644 --- a/configs/mt7622_rfb_defconfig +++ b/configs/mt7622_rfb_defconfig @@ -16,6 +16,7 @@ CONFIG_DEFAULT_FDT_FILE="mt7622-rfb" CONFIG_SYS_PBSIZE=1049 CONFIG_LOGLEVEL=7 CONFIG_LOG=y +# CONFIG_BOARD_INIT is not set CONFIG_SYS_PROMPT="MT7622> " CONFIG_SYS_MAXARGS=8 CONFIG_CMD_BOOTMENU=y diff --git a/configs/mt7981_emmc_rfb_defconfig b/configs/mt7981_emmc_rfb_defconfig index dac7d341131..4f96cc50b40 100644 --- a/configs/mt7981_emmc_rfb_defconfig +++ b/configs/mt7981_emmc_rfb_defconfig @@ -20,6 +20,7 @@ CONFIG_SYS_CBSIZE=512 CONFIG_SYS_PBSIZE=1049 CONFIG_LOGLEVEL=7 CONFIG_LOG=y +# CONFIG_BOARD_INIT is not set CONFIG_SYS_PROMPT="MT7981> " # CONFIG_BOOTM_NETBSD is not set # CONFIG_BOOTM_PLAN9 is not set diff --git a/configs/mt7981_rfb_defconfig b/configs/mt7981_rfb_defconfig index 80f7a7ff924..3b950a0db84 100644 --- a/configs/mt7981_rfb_defconfig +++ b/configs/mt7981_rfb_defconfig @@ -17,6 +17,7 @@ CONFIG_SYS_CBSIZE=512 CONFIG_SYS_PBSIZE=1049 CONFIG_LOGLEVEL=7 CONFIG_LOG=y +# CONFIG_BOARD_INIT is not set CONFIG_SYS_PROMPT="MT7981> " # CONFIG_BOOTM_NETBSD is not set # CONFIG_BOOTM_PLAN9 is not set diff --git a/configs/mt7981_sd_rfb_defconfig b/configs/mt7981_sd_rfb_defconfig index 47203ff4e64..0f56ca8a37c 100644 --- a/configs/mt7981_sd_rfb_defconfig +++ b/configs/mt7981_sd_rfb_defconfig @@ -20,6 +20,7 @@ CONFIG_SYS_CBSIZE=512 CONFIG_SYS_PBSIZE=1049 CONFIG_LOGLEVEL=7 CONFIG_LOG=y +# CONFIG_BOARD_INIT is not set CONFIG_SYS_PROMPT="MT7981> " # CONFIG_BOOTM_NETBSD is not set # CONFIG_BOOTM_PLAN9 is not set diff --git a/configs/mt7986_rfb_defconfig b/configs/mt7986_rfb_defconfig index 696741d4264..9d7554c5da7 100644 --- a/configs/mt7986_rfb_defconfig +++ b/configs/mt7986_rfb_defconfig @@ -17,6 +17,7 @@ CONFIG_SYS_CBSIZE=512 CONFIG_SYS_PBSIZE=1049 CONFIG_LOGLEVEL=7 CONFIG_LOG=y +# CONFIG_BOARD_INIT is not set CONFIG_SYS_PROMPT="MT7986> " # CONFIG_BOOTM_NETBSD is not set # CONFIG_BOOTM_PLAN9 is not set diff --git a/configs/mt7986a_bpir3_emmc_defconfig b/configs/mt7986a_bpir3_emmc_defconfig index ef6a4822c18..153c1934bd0 100644 --- a/configs/mt7986a_bpir3_emmc_defconfig +++ b/configs/mt7986a_bpir3_emmc_defconfig @@ -20,6 +20,7 @@ CONFIG_SYS_CBSIZE=512 CONFIG_SYS_PBSIZE=1049 CONFIG_LOGLEVEL=7 CONFIG_LOG=y +# CONFIG_BOARD_INIT is not set CONFIG_SYS_PROMPT="BPI-R3> " # CONFIG_BOOTM_NETBSD is not set # CONFIG_BOOTM_PLAN9 is not set diff --git a/configs/mt7986a_bpir3_sd_defconfig b/configs/mt7986a_bpir3_sd_defconfig index 3d971f5c313..ad9711da614 100644 --- a/configs/mt7986a_bpir3_sd_defconfig +++ b/configs/mt7986a_bpir3_sd_defconfig @@ -20,6 +20,7 @@ CONFIG_SYS_CBSIZE=512 CONFIG_SYS_PBSIZE=1049 CONFIG_LOGLEVEL=7 CONFIG_LOG=y +# CONFIG_BOARD_INIT is not set CONFIG_SYS_PROMPT="BPI-R3> " # CONFIG_BOOTM_NETBSD is not set # CONFIG_BOOTM_PLAN9 is not set diff --git a/configs/mt7987_emmc_rfb_defconfig b/configs/mt7987_emmc_rfb_defconfig index 022ca32169b..26be8ea4491 100644 --- a/configs/mt7987_emmc_rfb_defconfig +++ b/configs/mt7987_emmc_rfb_defconfig @@ -20,6 +20,7 @@ CONFIG_SYS_CBSIZE=512 CONFIG_SYS_PBSIZE=1049 CONFIG_LOGLEVEL=7 CONFIG_LOG=y +# CONFIG_BOARD_INIT is not set CONFIG_SYS_PROMPT="MT7987> " # CONFIG_BOOTM_NETBSD is not set # CONFIG_BOOTM_PLAN9 is not set diff --git a/configs/mt7987_rfb_defconfig b/configs/mt7987_rfb_defconfig index c6a88e7e9d3..ea43483d7ed 100644 --- a/configs/mt7987_rfb_defconfig +++ b/configs/mt7987_rfb_defconfig @@ -19,6 +19,7 @@ CONFIG_SYS_CBSIZE=512 CONFIG_SYS_PBSIZE=1049 CONFIG_LOGLEVEL=7 CONFIG_LOG=y +# CONFIG_BOARD_INIT is not set CONFIG_SYS_PROMPT="MT7987> " # CONFIG_BOOTM_NETBSD is not set # CONFIG_BOOTM_PLAN9 is not set diff --git a/configs/mt7987_sd_rfb_defconfig b/configs/mt7987_sd_rfb_defconfig index ca7714b1242..70eb5afb999 100644 --- a/configs/mt7987_sd_rfb_defconfig +++ b/configs/mt7987_sd_rfb_defconfig @@ -20,6 +20,7 @@ CONFIG_SYS_CBSIZE=512 CONFIG_SYS_PBSIZE=1049 CONFIG_LOGLEVEL=7 CONFIG_LOG=y +# CONFIG_BOARD_INIT is not set CONFIG_SYS_PROMPT="MT7987> " # CONFIG_BOOTM_NETBSD is not set # CONFIG_BOOTM_PLAN9 is not set diff --git a/configs/mt7988_rfb_defconfig b/configs/mt7988_rfb_defconfig index eebf7fb43ba..f492ad8da58 100644 --- a/configs/mt7988_rfb_defconfig +++ b/configs/mt7988_rfb_defconfig @@ -18,6 +18,7 @@ CONFIG_SYS_CBSIZE=512 CONFIG_SYS_PBSIZE=1049 CONFIG_LOGLEVEL=7 CONFIG_LOG=y +# CONFIG_BOARD_INIT is not set CONFIG_SYS_PROMPT="MT7988> " # CONFIG_BOOTM_NETBSD is not set # CONFIG_BOOTM_PLAN9 is not set diff --git a/configs/mt7988_sd_rfb_defconfig b/configs/mt7988_sd_rfb_defconfig index 99469985c5c..a07362c84fc 100644 --- a/configs/mt7988_sd_rfb_defconfig +++ b/configs/mt7988_sd_rfb_defconfig @@ -18,6 +18,7 @@ CONFIG_SYS_CBSIZE=512 CONFIG_SYS_PBSIZE=1049 CONFIG_LOGLEVEL=7 CONFIG_LOG=y +# CONFIG_BOARD_INIT is not set CONFIG_SYS_PROMPT="MT7988> " # CONFIG_BOOTM_NETBSD is not set # CONFIG_BOOTM_PLAN9 is not set diff --git a/configs/mt8365_evk_defconfig b/configs/mt8365_evk_defconfig index 6ec3aa834b1..9d8ea72370e 100644 --- a/configs/mt8365_evk_defconfig +++ b/configs/mt8365_evk_defconfig @@ -10,6 +10,7 @@ CONFIG_TARGET_MT8365=y CONFIG_SYS_LOAD_ADDR=0x4c000000 CONFIG_IDENT_STRING=" mt8365-evk" CONFIG_DEFAULT_FDT_FILE="mt8365-evk" +# CONFIG_BOARD_INIT is not set CONFIG_CLK=y CONFIG_MMC_MTK=y CONFIG_BAUDRATE=921600 diff --git a/configs/mt8516_pumpkin_defconfig b/configs/mt8516_pumpkin_defconfig index 756d974278a..72ff8c79153 100644 --- a/configs/mt8516_pumpkin_defconfig +++ b/configs/mt8516_pumpkin_defconfig @@ -23,6 +23,7 @@ CONFIG_DEFAULT_FDT_FILE="mt8516-pumpkin" CONFIG_SYS_CBSIZE=256 CONFIG_SYS_PBSIZE=276 # CONFIG_DISPLAY_BOARDINFO is not set +# CONFIG_BOARD_INIT is not set CONFIG_BOARD_LATE_INIT=y CONFIG_HUSH_PARSER=y # CONFIG_CMD_BDI is not set diff --git a/configs/mx6memcal_defconfig b/configs/mx6memcal_defconfig index 4011b8ef7ff..53e9804b0dd 100644 --- a/configs/mx6memcal_defconfig +++ b/configs/mx6memcal_defconfig @@ -14,6 +14,7 @@ CONFIG_SYS_MEMTEST_START=0x10000000 CONFIG_SYS_MEMTEST_END=0x20000000 CONFIG_SUPPORT_RAW_INITRD=y CONFIG_SYS_PBSIZE=528 +# CONFIG_BOARD_INIT is not set CONFIG_SPL_SYS_MALLOC=y CONFIG_SPL_WATCHDOG=y CONFIG_HUSH_PARSER=y diff --git a/configs/octeontx2_95xx_defconfig b/configs/octeontx2_95xx_defconfig index 92592ad2195..381fa6bb3dd 100644 --- a/configs/octeontx2_95xx_defconfig +++ b/configs/octeontx2_95xx_defconfig @@ -37,6 +37,7 @@ CONFIG_BOOTARGS="console=ttyAMA0,115200n8 earlycon=pl011,0x87e028000000 maxcpus= CONFIG_SYS_PBSIZE=1050 # CONFIG_DISPLAY_CPUINFO is not set CONFIG_BOARD_EARLY_INIT_R=y +# CONFIG_BOARD_INIT is not set CONFIG_HUSH_PARSER=y CONFIG_SYS_PROMPT="Marvell> " CONFIG_CMD_MD5SUM=y diff --git a/configs/octeontx2_96xx_defconfig b/configs/octeontx2_96xx_defconfig index f77d515706b..fc7ad18656e 100644 --- a/configs/octeontx2_96xx_defconfig +++ b/configs/octeontx2_96xx_defconfig @@ -37,6 +37,7 @@ CONFIG_BOOTARGS="console=ttyAMA0,115200n8 earlycon=pl011,0x87e028000000 maxcpus= CONFIG_SYS_PBSIZE=1050 # CONFIG_DISPLAY_CPUINFO is not set CONFIG_BOARD_EARLY_INIT_R=y +# CONFIG_BOARD_INIT is not set CONFIG_HUSH_PARSER=y CONFIG_SYS_PROMPT="Marvell> " CONFIG_CMD_MD5SUM=y diff --git a/configs/odroid-go-ultra_defconfig b/configs/odroid-go-ultra_defconfig index 97c44b1115b..f2c8b1d237c 100644 --- a/configs/odroid-go-ultra_defconfig +++ b/configs/odroid-go-ultra_defconfig @@ -23,6 +23,7 @@ CONFIG_FIT_VERBOSE=y CONFIG_LEGACY_IMAGE_FORMAT=y CONFIG_OF_BOARD_SETUP=y # CONFIG_DISPLAY_CPUINFO is not set +# CONFIG_BOARD_INIT is not set CONFIG_SYS_MAXARGS=32 # CONFIG_CMD_BDI is not set # CONFIG_CMD_IMI is not set diff --git a/configs/openpiton_riscv64_defconfig b/configs/openpiton_riscv64_defconfig index 1e693c621eb..31b0dd58c17 100644 --- a/configs/openpiton_riscv64_defconfig +++ b/configs/openpiton_riscv64_defconfig @@ -23,6 +23,7 @@ CONFIG_USE_BOOTCOMMAND=y CONFIG_BOOTCOMMAND="fdt addr ${fdtcontroladdr}; fdt move ${fdtcontroladdr} ${fdt_addr_r}; load mmc ${mmcdev}:${mmcpart} ${kernel_addr_r} ${image}; booti ${kernel_addr_r} - ${fdt_addr_r}; " CONFIG_SYS_CBSIZE=256 CONFIG_SYS_PBSIZE=284 +# CONFIG_BOARD_INIT is not set CONFIG_SYS_PROMPT="openpiton$ " # CONFIG_CMD_CPU is not set CONFIG_CMD_BOOTZ=y diff --git a/configs/openpiton_riscv64_spl_defconfig b/configs/openpiton_riscv64_spl_defconfig index 13d956aea32..92f4c16ff76 100644 --- a/configs/openpiton_riscv64_spl_defconfig +++ b/configs/openpiton_riscv64_spl_defconfig @@ -29,6 +29,7 @@ CONFIG_USE_BOOTCOMMAND=y CONFIG_BOOTCOMMAND="fdt addr ${fdtcontroladdr}; fdt move ${fdtcontroladdr} ${fdt_addr_r}; load mmc ${mmcdev}:${mmcpart} ${kernel_addr_r} ${image}; booti ${kernel_addr_r} - ${fdt_addr_r}; " CONFIG_SYS_CBSIZE=256 CONFIG_SYS_PBSIZE=284 +# CONFIG_BOARD_INIT is not set CONFIG_SPL_MAX_SIZE=0x100000 # CONFIG_SPL_LEGACY_IMAGE_FORMAT is not set CONFIG_SPL_SYS_MALLOC_SIMPLE=y diff --git a/configs/pe2201_defconfig b/configs/pe2201_defconfig index 020a2d49e60..9cc0710aaf5 100644 --- a/configs/pe2201_defconfig +++ b/configs/pe2201_defconfig @@ -19,6 +19,7 @@ CONFIG_BOOTARGS="earlycon=pl011,0x2800c000 root=/dev/sda2 rw" # CONFIG_DISPLAY_CPUINFO is not set # CONFIG_DISPLAY_BOARDINFO is not set CONFIG_BOARD_EARLY_INIT_F=y +# CONFIG_BOARD_INIT is not set CONFIG_SYS_PROMPT="pe2201#" CONFIG_CMD_BOOTMETH=y # CONFIG_CMD_LZMADEC is not set diff --git a/configs/phycore-imx8mm_defconfig b/configs/phycore-imx8mm_defconfig index 96eacec1d23..4d6bce26f07 100644 --- a/configs/phycore-imx8mm_defconfig +++ b/configs/phycore-imx8mm_defconfig @@ -11,7 +11,7 @@ CONFIG_ENV_SIZE=0x10000 CONFIG_ENV_OFFSET=0x3C0000 CONFIG_DM_GPIO=y CONFIG_DEFAULT_DEVICE_TREE="freescale/imx8mm-phyboard-polis-rdk" -CONFIG_IMX8M_OPTEE_LOAD_ADDR=0x56000000 +CONFIG_IMX8M_OPTEE_LOAD_ADDR=0x7e000000 CONFIG_TARGET_PHYCORE_IMX8MM=y CONFIG_DM_RESET=y CONFIG_SYS_MONITOR_LEN=524288 @@ -23,7 +23,7 @@ CONFIG_SPL_TEXT_BASE=0x7E1000 CONFIG_SPL_HAS_BSS_LINKER_SECTION=y CONFIG_SPL_BSS_START_ADDR=0x910000 CONFIG_SPL_BSS_MAX_SIZE=0x2000 -CONFIG_SYS_LOAD_ADDR=0x40480000 +CONFIG_SYS_LOAD_ADDR=0x47602000 CONFIG_SF_DEFAULT_BUS=3 CONFIG_SPL=y CONFIG_ENV_OFFSET_REDUND=0x3E0000 @@ -31,8 +31,9 @@ CONFIG_PCI=y CONFIG_FIT=y CONFIG_FIT_EXTERNAL_OFFSET=0x3000 CONFIG_SPL_LOAD_FIT=y +CONFIG_BOOTSTD_FULL=y CONFIG_OF_SYSTEM_SETUP=y -CONFIG_DEFAULT_FDT_FILE="oftree" +CONFIG_DEFAULT_FDT_FILE="imx8mm-phyboard-polis-rdk" CONFIG_SYS_CBSIZE=2048 CONFIG_SYS_PBSIZE=2074 CONFIG_BOARD_LATE_INIT=y @@ -48,7 +49,6 @@ CONFIG_SPL_I2C=y CONFIG_SPL_POWER=y CONFIG_SPL_SPI_FLASH_MTD=y CONFIG_SPL_WATCHDOG=y -CONFIG_HUSH_PARSER=y CONFIG_SYS_PROMPT="u-boot=> " # CONFIG_CMD_EXPORTENV is not set # CONFIG_CMD_IMPORTENV is not set @@ -66,15 +66,9 @@ CONFIG_CMD_I2C=y CONFIG_CMD_MMC=y CONFIG_CMD_PCI=y CONFIG_CMD_SF_TEST=y -CONFIG_CMD_DHCP=y -CONFIG_CMD_MII=y -CONFIG_CMD_PING=y CONFIG_CMD_CACHE=y CONFIG_CMD_REGULATOR=y -CONFIG_CMD_EXT2=y -CONFIG_CMD_EXT4=y CONFIG_CMD_EXT4_WRITE=y -CONFIG_CMD_FAT=y CONFIG_OF_CONTROL=y CONFIG_SPL_OF_CONTROL=y CONFIG_ENV_OVERWRITE=y diff --git a/configs/phycore-imx8mp_defconfig b/configs/phycore-imx8mp_defconfig index cb38898a245..975d061e7ba 100644 --- a/configs/phycore-imx8mp_defconfig +++ b/configs/phycore-imx8mp_defconfig @@ -31,10 +31,13 @@ CONFIG_IMX_BOOTAUX=y CONFIG_SPL_IMX_ROMAPI_LOADADDR=0x48000000 CONFIG_FIT=y CONFIG_FIT_EXTERNAL_OFFSET=0x3000 +CONFIG_FIT_SIGNATURE=y CONFIG_SPL_LOAD_FIT=y +CONFIG_BOOTSTD_FULL=y CONFIG_OF_BOARD_SETUP=y CONFIG_OF_SYSTEM_SETUP=y CONFIG_FDT_FIXUP_PARTITIONS=y +# CONFIG_USE_BOOTCOMMAND is not set CONFIG_DEFAULT_FDT_FILE="oftree" CONFIG_SYS_CBSIZE=2048 CONFIG_SYS_PBSIZE=2074 @@ -57,9 +60,11 @@ CONFIG_SPL_NOR_SUPPORT=y CONFIG_SPL_POWER=y CONFIG_SPL_SPI_FLASH_MTD=y CONFIG_SPL_WATCHDOG=y -CONFIG_HUSH_PARSER=y CONFIG_SYS_PROMPT="u-boot=> " +# CONFIG_CMD_VBE is not set +CONFIG_CMD_BOOTEFI_SELFTEST=y CONFIG_CMD_ERASEENV=y +CONFIG_CMD_NVEDIT_EFI=y # CONFIG_CMD_CRC32 is not set CONFIG_CMD_EEPROM=y CONFIG_SYS_I2C_EEPROM_ADDR_LEN=2 @@ -76,17 +81,12 @@ CONFIG_CMD_SF_TEST=y CONFIG_CMD_USB=y CONFIG_CMD_USB_SDP=y CONFIG_CMD_USB_MASS_STORAGE=y -CONFIG_CMD_DHCP=y -CONFIG_CMD_MII=y -CONFIG_CMD_PING=y CONFIG_CMD_CACHE=y +CONFIG_CMD_EFIDEBUG=y CONFIG_CMD_REGULATOR=y -CONFIG_CMD_EXT2=y -CONFIG_CMD_EXT4=y CONFIG_CMD_EXT4_WRITE=y -CONFIG_CMD_FAT=y -CONFIG_CMD_FS_GENERIC=y CONFIG_CMD_MTDPARTS=y +# CONFIG_SPL_EFI_PARTITION is not set CONFIG_OF_CONTROL=y CONFIG_SPL_OF_CONTROL=y CONFIG_ENV_OVERWRITE=y @@ -172,7 +172,6 @@ CONFIG_USB_XHCI_DWC3_OF_SIMPLE=y CONFIG_USB_EHCI_HCD=y CONFIG_USB_DWC3=y CONFIG_USB_DWC3_GENERIC=y -CONFIG_USB_STORAGE=y CONFIG_USB_GADGET=y CONFIG_USB_GADGET_MANUFACTURER="PHYTEC" CONFIG_USB_GADGET_VENDOR_NUM=0x0525 diff --git a/configs/phycore_am62ax_a53_defconfig b/configs/phycore_am62ax_a53_defconfig index bdd7e288aa4..05849d05be4 100644 --- a/configs/phycore_am62ax_a53_defconfig +++ b/configs/phycore_am62ax_a53_defconfig @@ -42,6 +42,7 @@ CONFIG_BOOTSTD_FULL=y CONFIG_OF_BOARD_SETUP=y CONFIG_BOOTCOMMAND="bootflow scan -lb; run ${boot}boot" CONFIG_DEFAULT_FDT_FILE="oftree" +# CONFIG_BOARD_INIT is not set CONFIG_BOARD_LATE_INIT=y CONFIG_SPL_MAX_SIZE=0x58000 CONFIG_SPL_PAD_TO=0x0 diff --git a/configs/phycore_am62ax_r5_defconfig b/configs/phycore_am62ax_r5_defconfig index 8ee6ed73adc..01d100842de 100644 --- a/configs/phycore_am62ax_r5_defconfig +++ b/configs/phycore_am62ax_r5_defconfig @@ -30,6 +30,7 @@ CONFIG_SPL_SPI=y CONFIG_SPL_LOAD_FIT=y CONFIG_SPL_LOAD_FIT_ADDRESS=0x80080000 # CONFIG_DISPLAY_CPUINFO is not set +# CONFIG_BOARD_INIT is not set CONFIG_SPL_SIZE_LIMIT_SUBTRACT_GD=y CONFIG_SPL_SIZE_LIMIT_SUBTRACT_MALLOC=y CONFIG_SPL_MAX_SIZE=0x3B000 diff --git a/configs/phycore_am62x_a53_defconfig b/configs/phycore_am62x_a53_defconfig index 92a159e7466..978604b0232 100644 --- a/configs/phycore_am62x_a53_defconfig +++ b/configs/phycore_am62x_a53_defconfig @@ -46,6 +46,7 @@ CONFIG_BOOTSTD_FULL=y CONFIG_OF_BOARD_SETUP=y CONFIG_BOOTCOMMAND="bootflow scan -lb; run ${boot}boot" CONFIG_DEFAULT_FDT_FILE="oftree" +# CONFIG_BOARD_INIT is not set CONFIG_BOARD_LATE_INIT=y CONFIG_SPL_MAX_SIZE=0x58000 CONFIG_SPL_SYS_REPORT_STACK_F_USAGE=y diff --git a/configs/phycore_am62x_r5_defconfig b/configs/phycore_am62x_r5_defconfig index 73517e04d0a..0368d4ef474 100644 --- a/configs/phycore_am62x_r5_defconfig +++ b/configs/phycore_am62x_r5_defconfig @@ -35,6 +35,7 @@ CONFIG_SPL_SPI=y CONFIG_SPL_LOAD_FIT=y CONFIG_SPL_LOAD_FIT_ADDRESS=0x80080000 # CONFIG_DISPLAY_CPUINFO is not set +# CONFIG_BOARD_INIT is not set CONFIG_SPL_SIZE_LIMIT_SUBTRACT_GD=y CONFIG_SPL_SIZE_LIMIT_SUBTRACT_MALLOC=y CONFIG_SPL_MAX_SIZE=0x3B000 diff --git a/configs/phycore_am64x_a53_defconfig b/configs/phycore_am64x_a53_defconfig index 9f98b3522dc..62c9eec971d 100644 --- a/configs/phycore_am64x_a53_defconfig +++ b/configs/phycore_am64x_a53_defconfig @@ -41,6 +41,7 @@ CONFIG_BOOTSTD_FULL=y CONFIG_OF_BOARD_SETUP=y CONFIG_BOOTCOMMAND="bootflow scan -lb; run ${boot}boot" CONFIG_DEFAULT_FDT_FILE="oftree" +# CONFIG_BOARD_INIT is not set CONFIG_BOARD_LATE_INIT=y CONFIG_SPL_MAX_SIZE=0x180000 CONFIG_SPL_BOARD_INIT=y diff --git a/configs/phycore_am64x_r5_defconfig b/configs/phycore_am64x_r5_defconfig index 189d0706ce5..d1ac992dc7a 100644 --- a/configs/phycore_am64x_r5_defconfig +++ b/configs/phycore_am64x_r5_defconfig @@ -35,6 +35,7 @@ CONFIG_SPL_SPI=y CONFIG_SPL_LOAD_FIT=y CONFIG_SPL_LOAD_FIT_ADDRESS=0x80080000 # CONFIG_DISPLAY_CPUINFO is not set +# CONFIG_BOARD_INIT is not set CONFIG_SPL_SIZE_LIMIT_SUBTRACT_GD=y CONFIG_SPL_SIZE_LIMIT_SUBTRACT_MALLOC=y CONFIG_SPL_MAX_SIZE=0x180000 diff --git a/configs/poleg_evb_defconfig b/configs/poleg_evb_defconfig index 365f6434f83..a87e918117c 100644 --- a/configs/poleg_evb_defconfig +++ b/configs/poleg_evb_defconfig @@ -23,6 +23,7 @@ CONFIG_USE_BOOTCOMMAND=y CONFIG_BOOTCOMMAND="run common_bootargs; run romboot" CONFIG_SYS_CBSIZE=256 CONFIG_SYS_PBSIZE=280 +# CONFIG_BOARD_INIT is not set CONFIG_SYS_PROMPT="U-Boot>" CONFIG_SYS_MAXARGS=32 CONFIG_CMD_FUSE=y diff --git a/configs/pomelo_defconfig b/configs/pomelo_defconfig index f7070543260..87e8e2271ff 100644 --- a/configs/pomelo_defconfig +++ b/configs/pomelo_defconfig @@ -17,6 +17,7 @@ CONFIG_SYS_CBSIZE=256 CONFIG_SYS_PBSIZE=280 # CONFIG_DISPLAY_CPUINFO is not set CONFIG_BOARD_EARLY_INIT_F=y +# CONFIG_BOARD_INIT is not set CONFIG_SYS_PROMPT="pomelo#" CONFIG_OF_CONTROL=y CONFIG_ENV_RELOC_GD_ENV_ADDR=y diff --git a/configs/qemu-arm-sbsa_defconfig b/configs/qemu-arm-sbsa_defconfig index 3819670defe..76e07cac7b6 100644 --- a/configs/qemu-arm-sbsa_defconfig +++ b/configs/qemu-arm-sbsa_defconfig @@ -5,6 +5,7 @@ CONFIG_TARGET_QEMU_ARM_SBSA=y CONFIG_EFI_VARIABLE_NO_STORE=y CONFIG_USE_BOOTCOMMAND=y CONFIG_BOOTCOMMAND="bootflow scan" +# CONFIG_BOARD_INIT is not set CONFIG_EFI_PARTITION=y CONFIG_PARTITION_TYPE_GUID=y CONFIG_EFI_MEDIA=y diff --git a/configs/qemu-riscv32_defconfig b/configs/qemu-riscv32_defconfig index cdffda26281..bf39a1da723 100644 --- a/configs/qemu-riscv32_defconfig +++ b/configs/qemu-riscv32_defconfig @@ -12,6 +12,7 @@ CONFIG_FIT=y CONFIG_DISTRO_DEFAULTS=y CONFIG_DISPLAY_CPUINFO=y CONFIG_DISPLAY_BOARDINFO=y +# CONFIG_BOARD_INIT is not set CONFIG_CMD_BOOTEFI_SELFTEST=y CONFIG_CMD_NVEDIT_EFI=y # CONFIG_CMD_MII is not set diff --git a/configs/qemu-riscv32_smode_defconfig b/configs/qemu-riscv32_smode_defconfig index 3d065b6a9fb..2a876aefecd 100644 --- a/configs/qemu-riscv32_smode_defconfig +++ b/configs/qemu-riscv32_smode_defconfig @@ -13,6 +13,7 @@ CONFIG_FIT=y CONFIG_DISTRO_DEFAULTS=y CONFIG_DISPLAY_CPUINFO=y CONFIG_DISPLAY_BOARDINFO=y +# CONFIG_BOARD_INIT is not set CONFIG_CMD_BOOTEFI_SELFTEST=y CONFIG_CMD_NVEDIT_EFI=y # CONFIG_CMD_MII is not set diff --git a/configs/qemu-riscv32_spl_defconfig b/configs/qemu-riscv32_spl_defconfig index 15f1a5d973d..36f8b457586 100644 --- a/configs/qemu-riscv32_spl_defconfig +++ b/configs/qemu-riscv32_spl_defconfig @@ -17,6 +17,7 @@ CONFIG_SPL_LOAD_FIT_ADDRESS=0x80200000 CONFIG_DISTRO_DEFAULTS=y CONFIG_DISPLAY_CPUINFO=y CONFIG_DISPLAY_BOARDINFO=y +# CONFIG_BOARD_INIT is not set CONFIG_SPL_MAX_SIZE=0x100000 CONFIG_SPL_SYS_MALLOC=y # CONFIG_CMD_MII is not set diff --git a/configs/qemu-riscv64_defconfig b/configs/qemu-riscv64_defconfig index bf9a0b07400..a9ff831be91 100644 --- a/configs/qemu-riscv64_defconfig +++ b/configs/qemu-riscv64_defconfig @@ -12,6 +12,7 @@ CONFIG_FIT=y CONFIG_DISTRO_DEFAULTS=y CONFIG_DISPLAY_CPUINFO=y CONFIG_DISPLAY_BOARDINFO=y +# CONFIG_BOARD_INIT is not set CONFIG_CMD_BOOTEFI_SELFTEST=y CONFIG_CMD_NVEDIT_EFI=y # CONFIG_CMD_MII is not set diff --git a/configs/qemu-riscv64_smode_defconfig b/configs/qemu-riscv64_smode_defconfig index 6cc42817970..8384fe78a31 100644 --- a/configs/qemu-riscv64_smode_defconfig +++ b/configs/qemu-riscv64_smode_defconfig @@ -15,6 +15,7 @@ CONFIG_USE_PREBOOT=y CONFIG_PREBOOT="setenv fdt_addr ${fdtcontroladdr}; fdt addr ${fdtcontroladdr};" CONFIG_DISPLAY_CPUINFO=y CONFIG_DISPLAY_BOARDINFO=y +# CONFIG_BOARD_INIT is not set CONFIG_CMD_BOOTEFI_SELFTEST=y CONFIG_CMD_NVEDIT_EFI=y # CONFIG_CMD_MII is not set diff --git a/configs/qemu-riscv64_spl_defconfig b/configs/qemu-riscv64_spl_defconfig index 1c7cef056c4..34e14b8f8df 100644 --- a/configs/qemu-riscv64_spl_defconfig +++ b/configs/qemu-riscv64_spl_defconfig @@ -16,6 +16,7 @@ CONFIG_SPL_LOAD_FIT_ADDRESS=0x80200000 CONFIG_DISTRO_DEFAULTS=y CONFIG_DISPLAY_CPUINFO=y CONFIG_DISPLAY_BOARDINFO=y +# CONFIG_BOARD_INIT is not set CONFIG_SPL_MAX_SIZE=0x100000 CONFIG_SPL_SYS_MALLOC=y # CONFIG_CMD_MII is not set diff --git a/configs/qemu_arm64_defconfig b/configs/qemu_arm64_defconfig index 39afb837e41..358bb1aeeb9 100644 --- a/configs/qemu_arm64_defconfig +++ b/configs/qemu_arm64_defconfig @@ -25,6 +25,7 @@ CONFIG_LEGACY_IMAGE_FORMAT=y CONFIG_USE_PREBOOT=y # CONFIG_DISPLAY_CPUINFO is not set # CONFIG_DISPLAY_BOARDINFO is not set +# CONFIG_BOARD_INIT is not set CONFIG_PCI_INIT_R=y CONFIG_BLOBLIST=y CONFIG_CMD_SMBIOS=y diff --git a/configs/qemu_arm_defconfig b/configs/qemu_arm_defconfig index 92ba48f6af9..d5890bf87fb 100644 --- a/configs/qemu_arm_defconfig +++ b/configs/qemu_arm_defconfig @@ -27,6 +27,7 @@ CONFIG_LEGACY_IMAGE_FORMAT=y CONFIG_USE_PREBOOT=y # CONFIG_DISPLAY_CPUINFO is not set # CONFIG_DISPLAY_BOARDINFO is not set +# CONFIG_BOARD_INIT is not set CONFIG_PCI_INIT_R=y CONFIG_CMD_BOOTEFI_SELFTEST=y CONFIG_CMD_NVEDIT_EFI=y diff --git a/configs/renesas_rzg2l_smarc_defconfig b/configs/renesas_rzg2l_smarc_defconfig index e7c0a7e1eae..c2bdc521018 100644 --- a/configs/renesas_rzg2l_smarc_defconfig +++ b/configs/renesas_rzg2l_smarc_defconfig @@ -19,6 +19,7 @@ CONFIG_SUPPORT_RAW_INITRD=y CONFIG_USE_BOOTARGS=y CONFIG_SYS_PBSIZE=2068 # CONFIG_BOARD_EARLY_INIT_F is not set +# CONFIG_BOARD_INIT is not set CONFIG_SYS_MALLOC_BOOTPARAMS=y CONFIG_HUSH_PARSER=y CONFIG_CMD_CLK=y diff --git a/configs/sandbox64_defconfig b/configs/sandbox64_defconfig index 374dcb1d5ba..fc027b6d0fd 100644 --- a/configs/sandbox64_defconfig +++ b/configs/sandbox64_defconfig @@ -27,6 +27,7 @@ CONFIG_CONSOLE_RECORD=y CONFIG_CONSOLE_RECORD_OUT_SIZE=0x6000 CONFIG_PRE_CONSOLE_BUFFER=y CONFIG_DISPLAY_BOARDINFO_LATE=y +# CONFIG_BOARD_INIT is not set CONFIG_ANDROID_AB=y CONFIG_CMD_CPU=y CONFIG_CMD_LICENSE=y diff --git a/configs/sandbox_defconfig b/configs/sandbox_defconfig index 2eba02e1f07..0c030f4a792 100644 --- a/configs/sandbox_defconfig +++ b/configs/sandbox_defconfig @@ -49,6 +49,7 @@ CONFIG_LOG_MAX_LEVEL=9 CONFIG_LOG_DEFAULT_LEVEL=6 CONFIG_LOGF_FUNC=y CONFIG_DISPLAY_BOARDINFO_LATE=y +# CONFIG_BOARD_INIT is not set CONFIG_STACKPROTECTOR=y CONFIG_ANDROID_AB=y CONFIG_CMD_CPU=y @@ -77,6 +78,11 @@ CONFIG_CMD_MX_CYCLIC=y CONFIG_CMD_MEMTEST=y CONFIG_CMD_CLK=y CONFIG_CMD_DEMO=y +CONFIG_CMD_FPGA_LOADP=y +CONFIG_CMD_FPGA_LOADBP=y +CONFIG_CMD_FPGA_LOADFS=y +CONFIG_CMD_FPGA_LOADMK=y +CONFIG_CMD_FPGA_LOAD_SECURE=y CONFIG_CMD_GPIO=y CONFIG_CMD_GPIO_READ=y CONFIG_CMD_PWM=y @@ -197,6 +203,20 @@ CONFIG_SANDBOX_DMA=y CONFIG_FASTBOOT_FLASH=y CONFIG_FASTBOOT_FLASH_MMC_DEV=0 CONFIG_ARM_FFA_TRANSPORT=y +CONFIG_FPGA_ALTERA=y +CONFIG_FPGA_STRATIX_II=y +CONFIG_FPGA_STRATIX_V=y +CONFIG_FPGA_ACEX1K=y +CONFIG_FPGA_CYCLON2=y +CONFIG_FPGA_LATTICE=y +CONFIG_FPGA_XILINX=y +CONFIG_FPGA_SPARTAN2=y +CONFIG_FPGA_SPARTAN3=y +CONFIG_FPGA_VIRTEX2=y +CONFIG_SYS_FPGA_CHECK_BUSY=y +CONFIG_SYS_FPGA_CHECK_CTRLC=y +CONFIG_DM_FPGA=y +CONFIG_SANDBOX_FPGA=y CONFIG_GPIO_HOG=y CONFIG_DM_GPIO_LOOKUP_LABEL=y CONFIG_QCOM_PMIC_GPIO=y diff --git a/configs/sandbox_flattree_defconfig b/configs/sandbox_flattree_defconfig index e81941fb14f..b9c378cf696 100644 --- a/configs/sandbox_flattree_defconfig +++ b/configs/sandbox_flattree_defconfig @@ -26,6 +26,7 @@ CONFIG_BOOTSTAGE_STASH_SIZE=0x4096 CONFIG_CONSOLE_RECORD=y CONFIG_CONSOLE_RECORD_OUT_SIZE=0x6000 CONFIG_DISPLAY_BOARDINFO_LATE=y +# CONFIG_BOARD_INIT is not set CONFIG_CMD_CPU=y CONFIG_CMD_LICENSE=y CONFIG_CMD_BOOTZ=y diff --git a/configs/sandbox_noinst_defconfig b/configs/sandbox_noinst_defconfig index a0702d6f6e1..806ca6334d4 100644 --- a/configs/sandbox_noinst_defconfig +++ b/configs/sandbox_noinst_defconfig @@ -33,6 +33,7 @@ CONFIG_BOOTSTAGE_STASH_SIZE=0x4096 CONFIG_CONSOLE_RECORD=y CONFIG_CONSOLE_RECORD_OUT_SIZE=0x1000 CONFIG_DISPLAY_BOARDINFO_LATE=y +# CONFIG_BOARD_INIT is not set CONFIG_SPL_NO_BSS_LIMIT=y CONFIG_HANDOFF=y CONFIG_SPL_BOARD_INIT=y diff --git a/configs/sandbox_spl_defconfig b/configs/sandbox_spl_defconfig index f1c48c84b62..dca5ed956a2 100644 --- a/configs/sandbox_spl_defconfig +++ b/configs/sandbox_spl_defconfig @@ -28,6 +28,7 @@ CONFIG_BOOTSTAGE_STASH_SIZE=0x4096 CONFIG_CONSOLE_RECORD=y CONFIG_CONSOLE_RECORD_OUT_SIZE=0x1000 CONFIG_DISPLAY_BOARDINFO_LATE=y +# CONFIG_BOARD_INIT is not set CONFIG_SPL_NO_BSS_LIMIT=y CONFIG_HANDOFF=y CONFIG_SPL_BOARD_INIT=y diff --git a/configs/sandbox_vpl_defconfig b/configs/sandbox_vpl_defconfig index 9d75bb5f933..e1e11ca222f 100644 --- a/configs/sandbox_vpl_defconfig +++ b/configs/sandbox_vpl_defconfig @@ -39,6 +39,7 @@ CONFIG_BOOTSTAGE_STASH_SIZE=0x4096 CONFIG_CONSOLE_RECORD=y CONFIG_CONSOLE_RECORD_OUT_SIZE=0x1000 CONFIG_DISPLAY_BOARDINFO_LATE=y +# CONFIG_BOARD_INIT is not set CONFIG_BLOBLIST_SIZE=0x5000 CONFIG_SPL_NO_BSS_LIMIT=y CONFIG_HANDOFF=y diff --git a/configs/sipeed_licheerv_nano_defconfig b/configs/sipeed_licheerv_nano_defconfig index 14fefa968c6..fc7f82e878a 100644 --- a/configs/sipeed_licheerv_nano_defconfig +++ b/configs/sipeed_licheerv_nano_defconfig @@ -18,6 +18,7 @@ CONFIG_SD_BOOT=y CONFIG_BOOTCOMMAND="run distro_bootcmd" CONFIG_SYS_CBSIZE=512 CONFIG_SYS_PBSIZE=544 +# CONFIG_BOARD_INIT is not set CONFIG_SYS_PROMPT="licheerv_nano# " # CONFIG_CMD_BOOTDEV is not set CONFIG_CMD_MBR=y diff --git a/configs/sipeed_maix_bitm_defconfig b/configs/sipeed_maix_bitm_defconfig index b2e21c7d7ae..9fcdfb4a8fe 100644 --- a/configs/sipeed_maix_bitm_defconfig +++ b/configs/sipeed_maix_bitm_defconfig @@ -16,6 +16,7 @@ CONFIG_BOOTCOMMAND="run k210_bootcmd" CONFIG_SYS_CBSIZE=256 CONFIG_SYS_PBSIZE=276 CONFIG_BOARD_EARLY_INIT_F=y +# CONFIG_BOARD_INIT is not set CONFIG_HUSH_PARSER=y CONFIG_MTDIDS_DEFAULT="nor0=spi3:0" CONFIG_MTDPARTS_DEFAULT="nor0:1M(u-boot),0x1000@0xfff000(env)" diff --git a/configs/sipeed_maix_smode_defconfig b/configs/sipeed_maix_smode_defconfig index d838b252d53..11d78688780 100644 --- a/configs/sipeed_maix_smode_defconfig +++ b/configs/sipeed_maix_smode_defconfig @@ -17,6 +17,7 @@ CONFIG_USE_BOOTCOMMAND=y CONFIG_BOOTCOMMAND="run k210_bootcmd" CONFIG_SYS_CBSIZE=256 CONFIG_SYS_PBSIZE=276 +# CONFIG_BOARD_INIT is not set CONFIG_HUSH_PARSER=y CONFIG_MTDIDS_DEFAULT="nor0=spi3:0" CONFIG_MTDPARTS_DEFAULT="nor0:1M(u-boot),0x1000@0xfff000(env)" diff --git a/configs/stih410-b2260_defconfig b/configs/stih410-b2260_defconfig index c0992f397f6..8282271d0ed 100644 --- a/configs/stih410-b2260_defconfig +++ b/configs/stih410-b2260_defconfig @@ -20,6 +20,7 @@ CONFIG_USE_BOOTARGS=y CONFIG_BOOTARGS="console=ttyAS1,115200 CONSOLE=/dev/ttyAS1 consoleblank=0 root=/dev/mmcblk0p2 rootfstype=ext4 rw rootwait mem=992M@0x40000000 vmalloc=256m" CONFIG_SYS_PBSIZE=1058 # CONFIG_DISPLAY_CPUINFO is not set +# CONFIG_BOARD_INIT is not set CONFIG_SYS_PROMPT="stih410-b2260 => " CONFIG_CMD_ASKENV=y CONFIG_CMD_GPT=y diff --git a/configs/stm32f429-discovery_defconfig b/configs/stm32f429-discovery_defconfig index 36e57edbb4d..45dc8bb0cee 100644 --- a/configs/stm32f429-discovery_defconfig +++ b/configs/stm32f429-discovery_defconfig @@ -19,6 +19,7 @@ CONFIG_BOOTARGS="console=ttySTM0,115200 earlyprintk consoleblank=0 ignore_loglev CONFIG_SYS_PBSIZE=1050 # CONFIG_DISPLAY_CPUINFO is not set # CONFIG_DISPLAY_BOARDINFO is not set +# CONFIG_BOARD_INIT is not set CONFIG_MISC_INIT_R=y CONFIG_HUSH_PARSER=y CONFIG_SYS_PROMPT="U-Boot > " diff --git a/configs/stm32f429-evaluation_defconfig b/configs/stm32f429-evaluation_defconfig index a2ce8c80e20..02fc2dc521a 100644 --- a/configs/stm32f429-evaluation_defconfig +++ b/configs/stm32f429-evaluation_defconfig @@ -14,6 +14,7 @@ CONFIG_DISTRO_DEFAULTS=y CONFIG_BOOTDELAY=3 CONFIG_SYS_PBSIZE=1050 # CONFIG_DISPLAY_CPUINFO is not set +# CONFIG_BOARD_INIT is not set CONFIG_MISC_INIT_R=y CONFIG_SYS_PROMPT="U-Boot > " CONFIG_CMD_IMLS=y diff --git a/configs/stm32f469-discovery_defconfig b/configs/stm32f469-discovery_defconfig index 7a1fe576cc3..f0aab073bae 100644 --- a/configs/stm32f469-discovery_defconfig +++ b/configs/stm32f469-discovery_defconfig @@ -15,6 +15,7 @@ CONFIG_BOOTDELAY=3 CONFIG_SYS_PBSIZE=1050 # CONFIG_DISPLAY_CPUINFO is not set CONFIG_CYCLIC_MAX_CPU_TIME_US=50000 +# CONFIG_BOARD_INIT is not set CONFIG_MISC_INIT_R=y CONFIG_SYS_PROMPT="U-Boot > " CONFIG_CMD_IMLS=y diff --git a/configs/stm32h743-disco_defconfig b/configs/stm32h743-disco_defconfig index 38312e9a5f1..5818e68ff7e 100644 --- a/configs/stm32h743-disco_defconfig +++ b/configs/stm32h743-disco_defconfig @@ -20,6 +20,7 @@ CONFIG_DEFAULT_FDT_FILE="stm32h743i-disco" CONFIG_SYS_CBSIZE=256 CONFIG_SYS_PBSIZE=282 # CONFIG_DISPLAY_CPUINFO is not set +# CONFIG_BOARD_INIT is not set CONFIG_SYS_PROMPT="U-Boot > " CONFIG_CMD_GPT=y CONFIG_CMD_MMC=y diff --git a/configs/stm32h743-eval_defconfig b/configs/stm32h743-eval_defconfig index fcbf7177690..3ee8d082da8 100644 --- a/configs/stm32h743-eval_defconfig +++ b/configs/stm32h743-eval_defconfig @@ -20,6 +20,7 @@ CONFIG_DEFAULT_FDT_FILE="stm32h743i-eval" CONFIG_SYS_CBSIZE=256 CONFIG_SYS_PBSIZE=282 # CONFIG_DISPLAY_CPUINFO is not set +# CONFIG_BOARD_INIT is not set CONFIG_SYS_PROMPT="U-Boot > " CONFIG_CMD_GPT=y CONFIG_CMD_MMC=y diff --git a/configs/stm32h747-disco_defconfig b/configs/stm32h747-disco_defconfig index 5bb87eee510..bea1fa5a809 100644 --- a/configs/stm32h747-disco_defconfig +++ b/configs/stm32h747-disco_defconfig @@ -20,6 +20,7 @@ CONFIG_DEFAULT_FDT_FILE="stm32h747i-disco" CONFIG_SYS_CBSIZE=256 CONFIG_SYS_PBSIZE=282 # CONFIG_DISPLAY_CPUINFO is not set +# CONFIG_BOARD_INIT is not set CONFIG_SYS_PROMPT="U-Boot > " CONFIG_CMD_GPT=y CONFIG_CMD_MMC=y diff --git a/configs/stm32h750-art-pi_defconfig b/configs/stm32h750-art-pi_defconfig index 8a7c45f74a4..971d5c00d88 100644 --- a/configs/stm32h750-art-pi_defconfig +++ b/configs/stm32h750-art-pi_defconfig @@ -25,6 +25,7 @@ CONFIG_SYS_CBSIZE=256 CONFIG_SYS_PBSIZE=282 # CONFIG_DISPLAY_CPUINFO is not set CONFIG_BOARD_EARLY_INIT_F=y +# CONFIG_BOARD_INIT is not set CONFIG_BOARD_LATE_INIT=y CONFIG_SYS_PROMPT="U-Boot > " CONFIG_CMD_GPT=y diff --git a/configs/stm32mp15-icore-stm32mp1-ctouch2_defconfig b/configs/stm32mp15-icore-stm32mp1-ctouch2_defconfig index cfbe5a4ae91..2e86abac801 100644 --- a/configs/stm32mp15-icore-stm32mp1-ctouch2_defconfig +++ b/configs/stm32mp15-icore-stm32mp1-ctouch2_defconfig @@ -20,6 +20,7 @@ CONFIG_FIT=y CONFIG_DISTRO_DEFAULTS=y CONFIG_BOOTCOMMAND="run bootcmd_stm32mp" CONFIG_SYS_PBSIZE=1050 +# CONFIG_BOARD_INIT is not set CONFIG_SPL_FOOTPRINT_LIMIT=y CONFIG_SPL_MAX_FOOTPRINT=0x3db00 # CONFIG_SPL_SHARES_INIT_SP_ADDR is not set diff --git a/configs/stm32mp15-icore-stm32mp1-edimm2.2_defconfig b/configs/stm32mp15-icore-stm32mp1-edimm2.2_defconfig index f6ca1700a5f..b800b4c4073 100644 --- a/configs/stm32mp15-icore-stm32mp1-edimm2.2_defconfig +++ b/configs/stm32mp15-icore-stm32mp1-edimm2.2_defconfig @@ -20,6 +20,7 @@ CONFIG_FIT=y CONFIG_DISTRO_DEFAULTS=y CONFIG_BOOTCOMMAND="run bootcmd_stm32mp" CONFIG_SYS_PBSIZE=1050 +# CONFIG_BOARD_INIT is not set CONFIG_SPL_FOOTPRINT_LIMIT=y CONFIG_SPL_MAX_FOOTPRINT=0x3db00 # CONFIG_SPL_SHARES_INIT_SP_ADDR is not set diff --git a/configs/stm32mp15-microgea-stm32mp1-microdev2-of7_defconfig b/configs/stm32mp15-microgea-stm32mp1-microdev2-of7_defconfig index 16524245ce1..870e17e451a 100644 --- a/configs/stm32mp15-microgea-stm32mp1-microdev2-of7_defconfig +++ b/configs/stm32mp15-microgea-stm32mp1-microdev2-of7_defconfig @@ -20,6 +20,7 @@ CONFIG_FIT=y CONFIG_DISTRO_DEFAULTS=y CONFIG_BOOTCOMMAND="run bootcmd_stm32mp" CONFIG_SYS_PBSIZE=1050 +# CONFIG_BOARD_INIT is not set CONFIG_SPL_FOOTPRINT_LIMIT=y CONFIG_SPL_MAX_FOOTPRINT=0x3db00 # CONFIG_SPL_SHARES_INIT_SP_ADDR is not set diff --git a/configs/stm32mp15-microgea-stm32mp1-microdev2_defconfig b/configs/stm32mp15-microgea-stm32mp1-microdev2_defconfig index 3348b3f0546..88ee89aa13a 100644 --- a/configs/stm32mp15-microgea-stm32mp1-microdev2_defconfig +++ b/configs/stm32mp15-microgea-stm32mp1-microdev2_defconfig @@ -20,6 +20,7 @@ CONFIG_FIT=y CONFIG_DISTRO_DEFAULTS=y CONFIG_BOOTCOMMAND="run bootcmd_stm32mp" CONFIG_SYS_PBSIZE=1050 +# CONFIG_BOARD_INIT is not set CONFIG_SPL_FOOTPRINT_LIMIT=y CONFIG_SPL_MAX_FOOTPRINT=0x3db00 # CONFIG_SPL_SHARES_INIT_SP_ADDR is not set diff --git a/configs/th1520_lpi4a_defconfig b/configs/th1520_lpi4a_defconfig index 78e3b25ab82..2763cbb428a 100644 --- a/configs/th1520_lpi4a_defconfig +++ b/configs/th1520_lpi4a_defconfig @@ -76,7 +76,7 @@ CONFIG_MMC_SPEED_MODE_SET=y CONFIG_PARTITION_TYPE_GUID=y CONFIG_ENV_RELOC_GD_ENV_ADDR=y CONFIG_VERSION_VARIABLE=y -CONFIG_NO_NET=y +CONFIG_NET_RANDOM_ETHADDR=y # CONFIG_BLOCK_CACHE is not set CONFIG_DWAPB_GPIO=y # CONFIG_I2C is not set @@ -90,6 +90,11 @@ CONFIG_MMC_SDHCI=y CONFIG_MMC_SDHCI_ADMA=y CONFIG_MMC_SDHCI_SNPS=y # CONFIG_MTD is not set +CONFIG_PHY_REALTEK=y +CONFIG_DM_MDIO=y +CONFIG_DM_ETH_PHY=y +CONFIG_ETH_DESIGNWARE=y +CONFIG_ETH_DESIGNWARE_THEAD=y CONFIG_PINCTRL=y # CONFIG_POWER is not set CONFIG_RAM=y diff --git a/configs/thunderx_88xx_defconfig b/configs/thunderx_88xx_defconfig index 7dd75bfe365..7fe0d87a3e2 100644 --- a/configs/thunderx_88xx_defconfig +++ b/configs/thunderx_88xx_defconfig @@ -23,6 +23,7 @@ CONFIG_SYS_CBSIZE=512 CONFIG_SYS_PBSIZE=544 # CONFIG_DISPLAY_CPUINFO is not set # CONFIG_DISPLAY_BOARDINFO is not set +# CONFIG_BOARD_INIT is not set CONFIG_HUSH_PARSER=y # CONFIG_AUTO_COMPLETE is not set CONFIG_SYS_PROMPT="ThunderX_88XX> " diff --git a/configs/tools-only_defconfig b/configs/tools-only_defconfig index c90dfe517d6..42ec5957510 100644 --- a/configs/tools-only_defconfig +++ b/configs/tools-only_defconfig @@ -22,6 +22,7 @@ CONFIG_CMD_BOOTI=n CONFIG_CMD_ELF=n CONFIG_CMD_EXTENSION=n CONFIG_CMD_DATE=n +CONFIG_BOARD_INIT=n CONFIG_OF_CONTROL=y CONFIG_ENV_RELOC_GD_ENV_ADDR=y CONFIG_NO_NET=y diff --git a/configs/toradex-smarc-imx8mp_defconfig b/configs/toradex-smarc-imx8mp_defconfig index 0489f444115..f8a984f1e6b 100644 --- a/configs/toradex-smarc-imx8mp_defconfig +++ b/configs/toradex-smarc-imx8mp_defconfig @@ -46,7 +46,7 @@ CONFIG_SYS_PBSIZE=2081 CONFIG_LOG=y # CONFIG_DISPLAY_BOARDINFO is not set CONFIG_DISPLAY_BOARDINFO_LATE=y -CONFIG_ARCH_MISC_INIT=y +# CONFIG_BOARD_INIT is not set CONFIG_SPL_MAX_SIZE=0x26000 CONFIG_SPL_BOARD_INIT=y CONFIG_SPL_BOOTROM_SUPPORT=y diff --git a/configs/total_compute_defconfig b/configs/total_compute_defconfig index cce58d31994..74dcc455f7a 100644 --- a/configs/total_compute_defconfig +++ b/configs/total_compute_defconfig @@ -23,6 +23,7 @@ CONFIG_SYS_CBSIZE=512 CONFIG_SYS_PBSIZE=544 # CONFIG_DISPLAY_CPUINFO is not set # CONFIG_DISPLAY_BOARDINFO is not set +# CONFIG_BOARD_INIT is not set CONFIG_BLOBLIST=y CONFIG_BLOBLIST_PASSAGE_MANDATORY=y CONFIG_SYS_PROMPT="TOTAL_COMPUTE# " diff --git a/configs/verdin-am62_a53_defconfig b/configs/verdin-am62_a53_defconfig index e36b55faec1..9fc5184e74a 100644 --- a/configs/verdin-am62_a53_defconfig +++ b/configs/verdin-am62_a53_defconfig @@ -41,6 +41,7 @@ CONFIG_PREBOOT="test -n ${fdtfile} || setenv fdtfile k3-am625-verdin-${variant}- CONFIG_LOG=y # CONFIG_DISPLAY_BOARDINFO is not set CONFIG_DISPLAY_BOARDINFO_LATE=y +# CONFIG_BOARD_INIT is not set CONFIG_BOARD_LATE_INIT=y CONFIG_SPL_MAX_SIZE=0x58000 CONFIG_SPL_SYS_REPORT_STACK_F_USAGE=y diff --git a/configs/verdin-am62_r5_defconfig b/configs/verdin-am62_r5_defconfig index 5cc7d050c33..efba857ad70 100644 --- a/configs/verdin-am62_r5_defconfig +++ b/configs/verdin-am62_r5_defconfig @@ -28,6 +28,7 @@ CONFIG_SPL_LIBDISK_SUPPORT=y CONFIG_SPL_LOAD_FIT=y CONFIG_SPL_LOAD_FIT_ADDRESS=0x80080000 # CONFIG_DISPLAY_CPUINFO is not set +# CONFIG_BOARD_INIT is not set CONFIG_SPL_SIZE_LIMIT_SUBTRACT_GD=y CONFIG_SPL_SIZE_LIMIT_SUBTRACT_MALLOC=y CONFIG_SPL_MAX_SIZE=0x3B000 diff --git a/configs/verdin-am62p_a53_defconfig b/configs/verdin-am62p_a53_defconfig index 7e6132cde53..3daf22ff8ff 100644 --- a/configs/verdin-am62p_a53_defconfig +++ b/configs/verdin-am62p_a53_defconfig @@ -42,6 +42,7 @@ CONFIG_PREBOOT="test -n ${fdtfile} || setenv fdtfile k3-am62p5-verdin-${variant} CONFIG_LOG=y # CONFIG_DISPLAY_BOARDINFO is not set CONFIG_DISPLAY_BOARDINFO_LATE=y +# CONFIG_BOARD_INIT is not set CONFIG_BOARD_LATE_INIT=y CONFIG_SPL_MAX_SIZE=0x80000 CONFIG_SPL_SYS_REPORT_STACK_F_USAGE=y diff --git a/configs/verdin-am62p_r5_defconfig b/configs/verdin-am62p_r5_defconfig index 42361523ab3..a8b0e942b61 100644 --- a/configs/verdin-am62p_r5_defconfig +++ b/configs/verdin-am62p_r5_defconfig @@ -28,6 +28,7 @@ CONFIG_SPL_LIBDISK_SUPPORT=y CONFIG_SPL_LOAD_FIT=y CONFIG_SPL_LOAD_FIT_ADDRESS=0x80080000 # CONFIG_DISPLAY_CPUINFO is not set +# CONFIG_BOARD_INIT is not set CONFIG_SPL_SIZE_LIMIT_SUBTRACT_GD=y CONFIG_SPL_SIZE_LIMIT_SUBTRACT_MALLOC=y CONFIG_SPL_MAX_SIZE=0x3B000 diff --git a/configs/xenguest_arm64_defconfig b/configs/xenguest_arm64_defconfig index e9a5219a7c4..161fa1a6eff 100644 --- a/configs/xenguest_arm64_defconfig +++ b/configs/xenguest_arm64_defconfig @@ -12,6 +12,7 @@ CONFIG_IDENT_STRING=" xenguest" CONFIG_BOOTDELAY=10 CONFIG_OF_SYSTEM_SETUP=y CONFIG_SYS_PBSIZE=1051 +# CONFIG_BOARD_INIT is not set CONFIG_SYS_PROMPT="xenguest# " # CONFIG_CMD_BDI is not set # CONFIG_CMD_BOOTD is not set diff --git a/configs/xenguest_arm64_virtio_defconfig b/configs/xenguest_arm64_virtio_defconfig index acf131fc837..ebd2c9b483a 100644 --- a/configs/xenguest_arm64_virtio_defconfig +++ b/configs/xenguest_arm64_virtio_defconfig @@ -14,6 +14,7 @@ CONFIG_PCI=y CONFIG_BOOTDELAY=10 CONFIG_OF_SYSTEM_SETUP=y CONFIG_SYS_PBSIZE=1051 +# CONFIG_BOARD_INIT is not set CONFIG_PCI_INIT_R=y CONFIG_SYS_PROMPT="xenguest# " # CONFIG_CMD_BDI is not set diff --git a/configs/xilinx_mbv32_defconfig b/configs/xilinx_mbv32_defconfig index 7dde2fc0a8f..92f7aa04ec0 100644 --- a/configs/xilinx_mbv32_defconfig +++ b/configs/xilinx_mbv32_defconfig @@ -24,6 +24,7 @@ CONFIG_SPL_LOAD_FIT_ADDRESS=0x80200000 CONFIG_DISTRO_DEFAULTS=y CONFIG_DISPLAY_CPUINFO=y CONFIG_DISPLAY_BOARDINFO=y +# CONFIG_BOARD_INIT is not set # CONFIG_BOARD_LATE_INIT is not set CONFIG_SPL_MAX_SIZE=0x40000 # CONFIG_SPL_SHARES_INIT_SP_ADDR is not set diff --git a/configs/xilinx_mbv32_smode_defconfig b/configs/xilinx_mbv32_smode_defconfig index b96b02c6125..b61ec90d096 100644 --- a/configs/xilinx_mbv32_smode_defconfig +++ b/configs/xilinx_mbv32_smode_defconfig @@ -25,6 +25,7 @@ CONFIG_SPL_LOAD_FIT_ADDRESS=0x80200000 CONFIG_DISTRO_DEFAULTS=y CONFIG_DISPLAY_CPUINFO=y CONFIG_DISPLAY_BOARDINFO=y +# CONFIG_BOARD_INIT is not set # CONFIG_BOARD_LATE_INIT is not set CONFIG_SPL_MAX_SIZE=0x40000 # CONFIG_SPL_SHARES_INIT_SP_ADDR is not set diff --git a/configs/xilinx_mbv64_defconfig b/configs/xilinx_mbv64_defconfig index 77fcf4d6865..c4d458370b6 100644 --- a/configs/xilinx_mbv64_defconfig +++ b/configs/xilinx_mbv64_defconfig @@ -25,6 +25,7 @@ CONFIG_SPL_LOAD_FIT_ADDRESS=0x80200000 CONFIG_DISTRO_DEFAULTS=y CONFIG_DISPLAY_CPUINFO=y CONFIG_DISPLAY_BOARDINFO=y +# CONFIG_BOARD_INIT is not set # CONFIG_BOARD_LATE_INIT is not set CONFIG_SPL_MAX_SIZE=0x40000 # CONFIG_SPL_SHARES_INIT_SP_ADDR is not set diff --git a/configs/xilinx_mbv64_smode_defconfig b/configs/xilinx_mbv64_smode_defconfig index e53c0771baf..2d7227c9e33 100644 --- a/configs/xilinx_mbv64_smode_defconfig +++ b/configs/xilinx_mbv64_smode_defconfig @@ -26,6 +26,7 @@ CONFIG_SPL_LOAD_FIT_ADDRESS=0x80200000 CONFIG_DISTRO_DEFAULTS=y CONFIG_DISPLAY_CPUINFO=y CONFIG_DISPLAY_BOARDINFO=y +# CONFIG_BOARD_INIT is not set # CONFIG_BOARD_LATE_INIT is not set CONFIG_SPL_MAX_SIZE=0x40000 # CONFIG_SPL_SHARES_INIT_SP_ADDR is not set diff --git a/configs/xilinx_zynqmp_mini_defconfig b/configs/xilinx_zynqmp_mini_defconfig index f164580c501..41444271f0d 100644 --- a/configs/xilinx_zynqmp_mini_defconfig +++ b/configs/xilinx_zynqmp_mini_defconfig @@ -11,6 +11,7 @@ CONFIG_DEFAULT_DEVICE_TREE="zynqmp-mini" CONFIG_SYS_LOAD_ADDR=0x8000000 CONFIG_XILINX_MINI=y CONFIG_SYS_MEM_RSVD_FOR_MMU=y +# CONFIG_PSCI_RESET is not set CONFIG_SYS_MEMTEST_START=0x00000000 CONFIG_SYS_MEMTEST_END=0x00001000 CONFIG_REMAKE_ELF=y diff --git a/configs/xilinx_zynqmp_mini_emmc0_defconfig b/configs/xilinx_zynqmp_mini_emmc0_defconfig index 8a8a9b0b463..369d480fd1f 100644 --- a/configs/xilinx_zynqmp_mini_emmc0_defconfig +++ b/configs/xilinx_zynqmp_mini_emmc0_defconfig @@ -16,6 +16,7 @@ CONFIG_SPL_BSS_MAX_SIZE=0x80000 CONFIG_SYS_LOAD_ADDR=0x8000000 CONFIG_SPL=y CONFIG_XILINX_MINI=y +# CONFIG_PSCI_RESET is not set CONFIG_REMAKE_ELF=y # CONFIG_MP is not set # CONFIG_EFI_LOADER is not set diff --git a/configs/xilinx_zynqmp_mini_emmc1_defconfig b/configs/xilinx_zynqmp_mini_emmc1_defconfig index 3fc4f2f9b86..2b415b8f727 100644 --- a/configs/xilinx_zynqmp_mini_emmc1_defconfig +++ b/configs/xilinx_zynqmp_mini_emmc1_defconfig @@ -16,6 +16,7 @@ CONFIG_SPL_BSS_MAX_SIZE=0x80000 CONFIG_SYS_LOAD_ADDR=0x8000000 CONFIG_SPL=y CONFIG_XILINX_MINI=y +# CONFIG_PSCI_RESET is not set CONFIG_REMAKE_ELF=y # CONFIG_MP is not set # CONFIG_EFI_LOADER is not set diff --git a/configs/xilinx_zynqmp_mini_nand_defconfig b/configs/xilinx_zynqmp_mini_nand_defconfig index cfcb4321b1f..c7271899bdf 100644 --- a/configs/xilinx_zynqmp_mini_nand_defconfig +++ b/configs/xilinx_zynqmp_mini_nand_defconfig @@ -11,6 +11,7 @@ CONFIG_ENV_SIZE=0x80 CONFIG_DEFAULT_DEVICE_TREE="zynqmp-mini-nand" CONFIG_SYS_LOAD_ADDR=0x8000000 CONFIG_XILINX_MINI=y +# CONFIG_PSCI_RESET is not set CONFIG_REMAKE_ELF=y # CONFIG_MP is not set CONFIG_FIT=y diff --git a/configs/xilinx_zynqmp_mini_nand_single_defconfig b/configs/xilinx_zynqmp_mini_nand_single_defconfig index 9af0b717ba9..bb9cd882340 100644 --- a/configs/xilinx_zynqmp_mini_nand_single_defconfig +++ b/configs/xilinx_zynqmp_mini_nand_single_defconfig @@ -11,6 +11,7 @@ CONFIG_ENV_SIZE=0x80 CONFIG_DEFAULT_DEVICE_TREE="zynqmp-mini-nand" CONFIG_SYS_LOAD_ADDR=0x8000000 CONFIG_XILINX_MINI=y +# CONFIG_PSCI_RESET is not set CONFIG_REMAKE_ELF=y # CONFIG_MP is not set CONFIG_FIT=y diff --git a/configs/xilinx_zynqmp_r5_defconfig b/configs/xilinx_zynqmp_r5_defconfig index d4ec2b59b71..81ea0e175ff 100644 --- a/configs/xilinx_zynqmp_r5_defconfig +++ b/configs/xilinx_zynqmp_r5_defconfig @@ -18,6 +18,7 @@ CONFIG_BOOTSTAGE=y CONFIG_SYS_CBSIZE=256 CONFIG_SYS_PBSIZE=284 # CONFIG_DISPLAY_CPUINFO is not set +# CONFIG_BOARD_INIT is not set CONFIG_SYS_PROMPT="ZynqMP r5> " CONFIG_SYS_MAXARGS=32 # CONFIG_CMD_SETEXPR is not set diff --git a/doc/README.pxe b/doc/README.pxe deleted file mode 100644 index ba189080e8c..00000000000 --- a/doc/README.pxe +++ /dev/null @@ -1,292 +0,0 @@ -SPDX-License-Identifier: GPL-2.0+ -/* - * Copyright 2010-2011 Calxeda, Inc. - */ - -The 'pxe' commands provide a near subset of the functionality provided by -the PXELINUX boot loader. This allows U-Boot based systems to be controlled -remotely using the same PXE based techniques that many non U-Boot based servers -use. - -Commands -======== - -pxe get -------- - syntax: pxe get - - follows PXELINUX's rules for retrieving configuration files from a tftp - server, and supports a subset of PXELINUX's config file syntax. - - Environment - ----------- - 'pxe get' requires two environment variables to be set: - - pxefile_addr_r - should be set to a location in RAM large enough to hold - pxe files while they're being processed. Up to 16 config files may be - held in memory at once. The exact number and size of the files varies with - how the system is being used. A typical config file is a few hundred bytes - long. - - bootfile,serverip - these two are typically set in the DHCP response - handler, and correspond to fields in the DHCP response. - - 'pxe get' optionally supports these two environment variables being set: - - ethaddr - this is the standard MAC address for the ethernet adapter in use. - 'pxe get' uses it to look for a configuration file specific to a system's - MAC address. - - pxeuuid - this is a UUID in standard form using lower case hexadecimal - digits, for example, 550e8400-e29b-41d4-a716-446655440000. 'pxe get' uses - it to look for a configuration file based on the system's UUID. - - File Paths - ---------- - 'pxe get' repeatedly tries to download config files until it either - successfully downloads one or runs out of paths to try. The order and - contents of paths it tries mirrors exactly that of PXELINUX - you can - read in more detail about it at: - - http://syslinux.zytor.com/wiki/index.php/Doc/pxelinux - -pxe boot --------- - syntax: pxe boot [pxefile_addr_r] - - Interprets a pxe file stored in memory. - - pxefile_addr_r is an optional argument giving the location of the pxe file. - The file must be terminated with a NUL byte. - - Environment - ----------- - There are some environment variables that may need to be set, depending - on conditions. - - pxefile_addr_r - if the optional argument pxefile_addr_r is not supplied, - an environment variable named pxefile_addr_r must be supplied. This is - typically the same value as is used for the 'pxe get' command. - - bootfile - typically set in the DHCP response handler based on the - same field in the DHCP respone, this path is used to generate the base - directory that all other paths to files retrieved by 'pxe boot' will use. - If no bootfile is specified, paths used in pxe files will be used as is. - - serverip - typically set in the DHCP response handler, this is the IP - address of the tftp server from which other files will be retrieved. - - kernel_addr_r, initrd_addr_r - locations in RAM at which 'pxe boot' will - store the kernel(or FIT image) and initrd it retrieves from tftp. These - locations will be passed to the bootm command to boot the kernel. These - environment variables are required to be set. - - fdt_addr_r - location in RAM at which 'pxe boot' will store the fdt blob it - retrieves from tftp. The retrieval is possible if 'fdt' label is defined in - pxe file and 'fdt_addr_r' is set. If retrieval is possible, 'fdt_addr_r' - will be passed to bootm command to boot the kernel. - - fdt_addr - the location of a fdt blob. 'fdt_addr' will be passed to bootm - command if it is set and 'fdt_addr_r' is not passed to bootm command. - - fdtoverlay_addr_r - location in RAM at which 'pxe boot' will temporarily store - fdt overlay(s) before applying them to the fdt blob stored at 'fdt_addr_r'. - - pxe_label_override - override label to be used, if exists, instead of the - default label. This will allow consumers to choose a pxe label at - runtime instead of having to prompt the user. If "pxe_label_override" is set - but does not exist in the pxe menu, pxe would fallback to the default label if - given, and no failure is returned but rather a warning message. - -pxe file format -=============== -The pxe file format is nearly a subset of the PXELINUX file format; see -http://syslinux.zytor.com/wiki/index.php/PXELINUX. It's composed of one line -commands - global commands, and commands specific to labels. Lines begining -with # are treated as comments. White space between and at the beginning of -lines is ignored. - -The size of pxe files and the number of labels is only limited by the amount -of RAM available to U-Boot. Memory for labels is dynamically allocated as -they're parsed, and memory for pxe files is statically allocated, and its -location is given by the pxefile_addr_r environment variable. The pxe code is -not aware of the size of the pxefile memory and will outgrow it if pxe files -are too large. - -Supported global commands -------------------------- -Unrecognized commands are ignored. - -default <label> - the label named here is treated as the default and is - the first label 'pxe boot' attempts to boot. - -fallback <label> - the label named here is treated as a fallback option that - may be attempted should it be detected that booting of - the default has failed to complete, for example via - U-Boot's boot count limit functionality. - -menu title <string> - sets a title for the menu of labels being displayed. - -menu include <path> - use tftp to retrieve the pxe file at <path>, which - is then immediately parsed as if the start of its - contents were the next line in the current file. nesting - of include up to 16 files deep is supported. - -prompt <flag> - if 1, always prompt the user to enter a label to boot - from. if 0, only prompt the user if timeout expires. - -timeout <num> - wait for user input for <num>/10 seconds before - auto-booting a node. - -label <name> - begin a label definition. labels continue until - a command not recognized as a label command is seen, - or EOF is reached. - -Supported label commands ------------------------- -labels end when a command not recognized as a label command is reached, or EOF. - -menu default - set this label as the default label to boot; this is - the same behavior as the global default command but - specified in a different way - -kernel <path> - if this label is chosen, use tftp to retrieve the kernel - (or FIT image) at <path>. it will be stored at the address - indicated in the kernel_addr_r environment variable, and - that address will be passed to bootm to boot this kernel. - For FIT image, The configuration specification can be - appended to the file name, with the format: - <path>#<conf>[#<extra-conf[#...]] - It will passed to bootm with that address. - (see: doc/uImage.FIT/command_syntax_extensions.txt) - It useful for overlay selection in pxe file - (see: doc/usage/fit/overlay-fdt-boot.rst). - -fdtoverlays <path> [...] - if this label is chosen, use tftp to retrieve the DT - overlay(s) at <path>. it will be temporarily stored at the - address indicated in the fdtoverlay_addr_r environment variable, - and then applied in the load order to the fdt blob stored at the - address indicated in the fdt_addr_r environment variable. - -devicetree-overlay <path> [...] - if this label is chosen, use tftp to retrieve the DT - overlay(s) at <path>. it will be temporarily stored at the - address indicated in the fdtoverlay_addr_r environment variable, - and then applied in the load order to the fdt blob stored at the - address indicated in the fdt_addr_r environment variable. - Alias for fdtoverlays. - -kaslrseed - set this label to request random number from hwrng as kaslr seed. - -append <string> - use <string> as the kernel command line when booting this - label. Environment variable references like ${var} are - substituted before boot. - -initrd <path> - if this label is chosen, use tftp to retrieve the initrd - at <path>. it will be stored at the address indicated in - the initrd_addr_r environment variable, and that address - will be passed to bootm. - For FIT image, the initrd can be provided with the same value than - kernel, including configuration: - <path>#<conf>[#<extra-conf[#...]] - In this case, kernel_addr_r is passed to bootm. - -fdt <path> - if this label is chosen, use tftp to retrieve the fdt blob - at <path>. it will be stored at the address indicated in - the fdt_addr_r environment variable, and that address will - be passed to bootm. - For FIT image, the device tree can be provided with the same value - than kernel, including configuration: - <path>#<conf>[#<extra-conf[#...]] - In this case, kernel_addr_r is passed to bootm. - -devicetree <path> - if this label is chosen, use tftp to retrieve the fdt blob - at <path>. it will be stored at the address indicated in - the fdt_addr_r environment variable, and that address will - be passed to bootm. Alias for fdt. - -fdtdir <path> - if this label is chosen, use tftp to retrieve a fdt blob - relative to <path>. If the fdtfile environment variable - is set, <path>/<fdtfile> is retrieved. Otherwise, the - filename is generated from the soc and board environment - variables, i.e. <path>/<soc>-<board>.dtb is retrieved. - If the fdt command is specified, fdtdir is ignored. - -localboot <flag> - Run the command defined by "localcmd" in the environment. - <flag> is ignored and is only here to match the syntax of - PXELINUX config files. - -Example -------- -Here's a couple of example files to show how this works. - -------------/tftpboot/pxelinux.cfg/menus/base.menu----------- -menu title Linux selections - -# This is the default label -label install - menu label Default Install Image - kernel kernels/install.bin - append console=ttyAMA0,38400 debug earlyprintk - initrd initrds/uzInitrdDebInstall - -# Just another label -label linux-2.6.38 - kernel kernels/linux-2.6.38.bin - append root=/dev/sdb1 - -# The locally installed kernel -label local - menu label Locally installed kernel - append root=/dev/sdb1 - localboot 1 -------------------------------------------------------------- - -------------/tftpboot/pxelinux.cfg/default------------------- -menu include pxelinux.cfg/menus/base.menu -timeout 500 - -default linux-2.6.38 -------------------------------------------------------------- - -When a pxe client retrieves and boots the default pxe file, -'pxe boot' will wait for user input for 5 seconds before booting -the linux-2.6.38 label, which will cause /tftpboot/kernels/linux-2.6.38.bin -to be downloaded, and boot with the command line "root=/dev/sdb1" - -Differences with PXELINUX -========================= -The biggest difference between U-Boot's pxe and PXELINUX is that since -U-Boot's pxe support is written entirely in C, it can run on any platform -with network support in U-Boot. Here are some other differences between -PXELINUX and U-Boot's pxe support. - -- U-Boot's pxe does not support the PXELINUX DHCP option codes specified - in RFC 5071, but could be extended to do so. - -- when U-Boot's pxe fails to boot, it will return control to U-Boot, - allowing another command to run, other U-Boot command, instead of resetting - the machine like PXELINUX. - -- U-Boot's pxe doesn't rely on or provide an UNDI/PXE stack in memory, it - only uses U-Boot. - -- U-Boot's pxe doesn't provide the full menu implementation that PXELINUX - does, only a simple text based menu using the commands described in - this README. With PXELINUX, it's possible to have a graphical boot - menu, submenus, passwords, etc. U-Boot's pxe could be extended to support - a more robust menuing system like that of PXELINUX's. - -- U-Boot's pxe expects U-Boot uimg's as kernels. Anything that would work - with the 'bootm' command in U-Boot could work with the 'pxe boot' command. - -- U-Boot's pxe only recognizes a single file on the initrd command line. It - could be extended to support multiple. - -- in U-Boot's pxe, the localboot command doesn't necessarily cause a local - disk boot - it will do whatever is defined in the 'localcmd' env - variable. And since it doesn't support a full UNDI/PXE stack, the - type field is ignored. - -- the interactive prompt in U-Boot's pxe only allows you to choose a label - from the menu. If you want to boot something not listed, you can ctrl+c - out of 'pxe boot' and use existing U-Boot commands to accomplish it. diff --git a/doc/android/fastboot.rst b/doc/android/fastboot.rst index 6f92cd28eb1..19e2ee9d407 100644 --- a/doc/android/fastboot.rst +++ b/doc/android/fastboot.rst @@ -32,7 +32,7 @@ The following OEM commands are supported (if enabled): - ``oem console`` - this dumps U-Boot console record buffer - ``oem board`` - this executes a custom board function which is defined by the vendor -Support for both eMMC and NAND devices is included. +Support for eMMC, NAND and SPI flash memory devices is included. Client installation ------------------- @@ -97,8 +97,9 @@ Raw partition descriptors ^^^^^^^^^^^^^^^^^^^^^^^^^ In cases where no partition table is present, a raw partition descriptor can be -defined, specifying the offset, size, and optionally the MMC hardware partition -number for a given partition name. +defined, specifying the memory offset and size. + +Currently, this support is available only for eMMC and SPI flash memory devices. This is useful when using fastboot to flash files (e.g. SPL or U-Boot) to a specific offset in the eMMC boot partition, without having to update the entire @@ -106,6 +107,15 @@ boot partition. To define a raw partition descriptor, add an environment variable similar to:: + fastboot_raw_partition_<raw partition name>=<offset> <size> + +for example:: + + fastboot_raw_partition_boot=0x100 0x1f00 + +Optionally, in the eMMC case, the hardware partition number can also be +specified for a given partition name:: + fastboot_raw_partition_<raw partition name>=<offset> <size> [mmcpart <num>] for example:: diff --git a/doc/board/nxp/imx93_frdm.rst b/doc/board/nxp/imx93_frdm.rst new file mode 100644 index 00000000000..a1f526fd4cc --- /dev/null +++ b/doc/board/nxp/imx93_frdm.rst @@ -0,0 +1,75 @@ +.. SPDX-License-Identifier: GPL-2.0+ + +imx93_frdm +========== + +U-Boot for the NXP i.MX93 FRDM board + +Quick Start +----------- + +- Get and Build the ARM Trusted firmware +- Get the DDR firmware +- Get ahab-container.img +- Build U-Boot +- Boot from the SD card + +Get and Build the ARM Trusted firmware +-------------------------------------- + +Note: srctree is U-Boot source directory +Get ATF from: https://github.com/nxp-imx/imx-atf/ +branch: lf_v2.8 + +.. code-block:: bash + + $ unset LDFLAGS + $ make PLAT=imx93 bl31 + $ cp build/imx93/release/bl31.bin $(srctree) + +Get the DDR firmware +-------------------- + +.. code-block:: bash + + $ wget https://www.nxp.com/lgfiles/NMG/MAD/YOCTO/firmware-imx-8.21.bin + $ chmod +x firmware-imx-8.21.bin + $ ./firmware-imx-8.21.bin + $ cp firmware-imx-8.21/firmware/ddr/synopsys/lpddr4*.bin $(srctree) + +Get ahab-container.img +---------------------- + +.. code-block:: bash + + $ wget https://www.nxp.com/lgfiles/NMG/MAD/YOCTO/firmware-sentinel-0.11.bin + $ chmod +x firmware-sentinel-0.11.bin + $ ./firmware-sentinel-0.11.bin + $ cp firmware-sentinel-0.11/mx93a1-ahab-container.img $(srctree) + +Build U-Boot +------------ + +.. code-block:: bash + + $ export CROSS_COMPILE=aarch64-poky-linux- + $ make imx93_frdm_defconfig + $ make + +Copy the flash.bin binary to the MicroSD card at offset 32KB: + +.. code-block:: bash + + $ dd if=flash.bin of=/dev/sd[x] bs=1k seek=32; sync + +Boot from the SD card +--------------------- + +- Configure SW1 boot switches to SD boot mode: + 0011 SW1[3:0] - ("USDHC2 4-bit SD3.0" Boot Mode) +- Insert the SD card in the SD slot (P13) of the board. +- Connect a USB Type-C cable into the P16 Debug USB Port and connect + using a terminal emulator at 115200 bps, 8n1. The console will show up + at /dev/ttyACM0. +- Power on the board by connecting a USB Type-C cable into the P1 + Power USB Port. diff --git a/doc/board/nxp/imx95_evk.rst b/doc/board/nxp/imx95_evk.rst index 9121f7561ab..27cd15eb7c9 100644 --- a/doc/board/nxp/imx95_evk.rst +++ b/doc/board/nxp/imx95_evk.rst @@ -23,9 +23,9 @@ Note: srctree is U-Boot source directory .. code-block:: bash - $ wget https://www.nxp.com/lgfiles/NMG/MAD/YOCTO/firmware-ele-imx-1.3.0-17945fc.bin - $ sh firmware-ele-imx-1.3.0-17945fc.bin --auto-accept - $ cp firmware-ele-imx-1.3.0-17945fc/mx95a0-ahab-container.img $(srctree) + $ wget https://www.nxp.com/lgfiles/NMG/MAD/YOCTO/firmware-ele-imx-2.0.2-89161a8.bin + $ sh firmware-ele-imx-2.0.2-89161a8.bin --auto-accept + $ cp firmware-ele-imx-2.0.2-89161a8/mx95b0-ahab-container.img $(srctree) Get DDR PHY Firmware Images -------------------------------------- @@ -34,9 +34,9 @@ Note: srctree is U-Boot source directory .. code-block:: bash - $ wget https://www.nxp.com/lgfiles/NMG/MAD/YOCTO/firmware-imx-8.26-d4c33ab.bin - $ sh firmware-imx-8.26-d4c33ab.bin --auto-accept - $ cp firmware-imx-8.26-d4c33ab/firmware/ddr/synopsys/lpddr5*v202311.bin $(srctree) + $ wget https://www.nxp.com/lgfiles/NMG/MAD/YOCTO/firmware-imx-8.28-994fa14.bin + $ sh firmware-imx-8.28-994fa14.bin --auto-accept + $ cp firmware-imx-8.28-994fa14/firmware/ddr/synopsys/lpddr5*v202409.bin $(srctree) Get and Build OEI Images -------------------------------------- diff --git a/doc/board/nxp/index.rst b/doc/board/nxp/index.rst index e7ec725cc04..aa7d857346d 100644 --- a/doc/board/nxp/index.rst +++ b/doc/board/nxp/index.rst @@ -15,6 +15,7 @@ NXP Semiconductors imx91_11x11_evk imx93_9x9_qsb imx93_11x11_evk + imx93_frdm imx95_evk imxrt1020-evk imxrt1050-evk diff --git a/doc/board/qualcomm/index.rst b/doc/board/qualcomm/index.rst index ccf834208e9..3238a68e859 100644 --- a/doc/board/qualcomm/index.rst +++ b/doc/board/qualcomm/index.rst @@ -6,10 +6,11 @@ Qualcomm .. toctree:: :maxdepth: 2 + board + debugging dragonboard410c - rb3gen2 dragonwing - board + rb3gen2 + iq8 phones - debugging rdp diff --git a/doc/board/qualcomm/iq8.rst b/doc/board/qualcomm/iq8.rst new file mode 100644 index 00000000000..f3df0ee00bc --- /dev/null +++ b/doc/board/qualcomm/iq8.rst @@ -0,0 +1,43 @@ +.. SPDX-License-Identifier: GPL-2.0 +.. sectionauthor:: Balaji Selvanathan <balaji.selvanathan@oss.qualcomm.com> + +Qualcomm DragonWing IQ8 +======================================== + +The Dragonwing IQ8 Series (which includes QCS8300) powers computeheavy and AI-based devices, and is designed +to operate in an expanded temperature range with available built-in safety features. +Dragonwing IQ8 Series delivers industrial-grade AI performance of up to 40 TOPS, an octa-core +Qualcomm Kryo Gen 6 CPU, a powerful Qualcomm Adreno 623 GPU, support for +up to 12 concurrent cameras, and 4K video encode and decode alongside multiple displays. + +More information can be found on the `Qualcomm's IQ8 product page`_. + +.. _Qualcomm's IQ8 product page: https://docs.qualcomm.com/bundle/publicresource/87-83839-1_REV_A_Qualcomm_IQ8_Series_Product_Brief________.pdf + +Installation +------------ +First, setup ``CROSS_COMPILE`` for aarch64. Then, build U-Boot for ``QCS8300``:: + + $ export CROSS_COMPILE=<aarch64 toolchain prefix> + $ make qcom_qcs8300_defconfig + $ make -j8 u-boot.mbn + +This will build the signed ``u-boot.mbn`` in the configured output directory. +The firmware expects firmware ELF images to be "signed". The signature +does not provide any security in this case, but it provides the firmware +with some required metadata. + +Then flash the resulting ``u-boot.mbn`` to the ``uefi_a`` partition +on your device with ``fastboot flash uefi_a u-boot.mbn``. + +U-Boot should be running after a reboot (``fastboot reboot``). + +Note that fastboot is not yet supported in U-Boot on Dragonwing IQ8, as a result, to flash +back the original firmware, or new versoins of the U-Boot, EDL mode must be used. + +A tool like bkerler's `edl`_ can be used for flashing. + +$ edl.py --loader /path/to/prog_firehose_ddr.elf w uefi_a u-boot.mbn + +.. _qtestsign: https://github.com/msm8916-mainline/qtestsign +.. _edl: https://github.com/bkerler/edl diff --git a/doc/board/samsung/e850-96.rst b/doc/board/samsung/e850-96.rst index 0a7b6fc0c9d..b435fa8b353 100644 --- a/doc/board/samsung/e850-96.rst +++ b/doc/board/samsung/e850-96.rst @@ -43,17 +43,19 @@ Legend: BL31 in terms of ARM boot flow * ``LDFW``: Loadable Firmware -Build Procedure +Unbricking Note --------------- -.. warning:: - At the moment USB is not enabled in U-Boot for this board. Although eMMC is - enabled, you won't be able to flash images over USB (fastboot). So flashing - U-Boot binary **WILL** effectively brick your board. The ``dltool`` [8]_ can - be used then to perform USB boot and flash LittleKernel bootloader binary [7]_ - to unbrick and revive the board. Flashing U-Boot binary might be helpful for - developers or anybody who want to check current state of U-Boot enablement on - E850-96 (which is mostly serial console, eMMC and related blocks). +In case the board is bricked for some reason, the ``dltool`` [8]_ can be used to +unbrick and revive it. This tool performs USB boot, and uploads the LittleKernel +bootloader over USB, which is then being executed on the board. The loaded +bootloader further enters fastboot mode, so that the user can flash the +functional bootloader binary (U-Boot or LittleKernel [7]_) to eMMC using +``fastboot`` tool. Please read the ``dltool`` README file for more details about +the procedure. + +Build Procedure +--------------- Build U-Boot binary from source code (using AArch64 baremetal GCC toolchain): @@ -64,8 +66,9 @@ Build U-Boot binary from source code (using AArch64 baremetal GCC toolchain): make e850-96_defconfig make -Boot E850-96 board into fastboot mode as described in board software doc [9]_, -and flash U-Boot binary into ``bootloader`` eMMC partition: +The original E850-96 board is shipped with LittleKernel-based bootloader flashed +in eMMC. To replace it with U-Boot, boot into fastboot mode (as described in +the board software documentation [9]_), and flash U-Boot binary: .. prompt:: bash $ @@ -74,6 +77,66 @@ and flash U-Boot binary into ``bootloader`` eMMC partition: U-Boot will boot up to the shell. +Flashing +-------- + +User area of eMMC contains GPT partition table (either Linux or Android). Boot +Partition A (``mmc0boot0``) contains all firmware/bootloaders. Boot Partition +B (``mmc0boot1``) contains U-Boot environment. + +First make sure to format eMMC accordingly. Prepare the initial environment: + +.. prompt:: bash => + + env default -f -a + env save + +For Linux, just format eMMC using default ``$partitions`` definitions: + +.. prompt:: bash => + + gpt write mmc 0 $partitions + +For Android, use ``$partitions_android`` instead: + +.. prompt:: bash => + + setenv partitions_linux $partitions + setenv partitions $partitions_android + env save + gpt write mmc 0 $partitions + +In case of Linux, there are two partitions available: ``esp`` (EFI System +Partition) and ``rootfs``. It is recommended to use fastboot to flash images to +those partitions. Enter fastboot mode on your device: + +.. prompt:: bash => + + fastboot usb 0 + +And then flash the images: + +.. prompt:: bash $ + + fastboot flash esp esp.img + fastboot flash rootfs rootfs.img + +To update the firmware, it's easier to use DFU. Enter DFU mode on the board: + +.. prompt:: bash => + + dfu 0 mmc 0 + +To update U-Boot: + +.. prompt:: bash $ + + dfu-util -D u-boot.bin -a bootloader + +It's also possible to use fastboot to flash the whole ``mmc0boot0`` HW +partition, but it's not so straightforward, as one have to prepare the image for +the whole ``boot0`` partition containing all firmware binaries first. + References ---------- diff --git a/doc/git-mailrc b/doc/git-mailrc index 1982785f60e..747ceda3307 100644 --- a/doc/git-mailrc +++ b/doc/git-mailrc @@ -13,7 +13,7 @@ alias u-boot uboot alias abiessmann Andreas Bießmann <andreas@biessmann.org> alias abrodkin Alexey Brodkin <alexey.brodkin@synopsys.com> alias afleming Andy Fleming <afleming@gmail.com> -alias ag Anatolij Gustschin <agust@denx.de> +alias ag Anatolij Gustschin <ag.dev.uboot@gmail.com> alias agraf Alexander Graf <agraf@csgraf.de> alias alexnemirovsky Alex Nemirovsky <alex.nemirovsky@cortina-access.com> alias alisonwang Alison Wang <alison.wang@nxp.com> diff --git a/doc/sphinx/requirements.txt b/doc/sphinx/requirements.txt index 12c5772684d..8572c15ef68 100644 --- a/doc/sphinx/requirements.txt +++ b/doc/sphinx/requirements.txt @@ -10,7 +10,7 @@ MarkupSafe==3.0.2 packaging==24.1 pip==24.2 Pygments==2.18.0 -requests==2.32.3 +requests==2.32.4 six==1.16.0 snowballstemmer==2.2.0 Sphinx==8.1.3 @@ -24,4 +24,4 @@ sphinxcontrib-jquery==4.1 sphinxcontrib-jsmath==1.0.1 sphinxcontrib-qthelp==2.0.0 sphinxcontrib-serializinghtml==2.0.0 -urllib3==2.2.3 +urllib3==2.5.0 diff --git a/doc/usage/fit/x86-fit-boot.rst b/doc/usage/fit/x86-fit-boot.rst index 9e3e32204d5..18704af3bac 100644 --- a/doc/usage/fit/x86-fit-boot.rst +++ b/doc/usage/fit/x86-fit-boot.rst @@ -259,11 +259,12 @@ Why Bother? References ---------- -In the Linux kernel, Documentation/x86/boot.txt defines the boot protocol for +In the Linux kernel, `Documentation/arch/x86/boot.rst +<https://docs.kernel.org/arch/x86/boot.html>`_ defines the boot protocol for the kernel including the setup.bin format. This is handled in U-Boot in arch/x86/lib/zimage.c and arch/x86/lib/bootm.c. -Various files in the same directory as this file describe the FIT format. - +The FIT file format is described in the `Flattened Image Tree Specification +<https://fitspec.osfw.foundation/>`_. .. sectionauthor:: Simon Glass <sjg@chromium.org> 7-Oct-2014 diff --git a/doc/usage/index.rst b/doc/usage/index.rst index e9e0bd04e05..b9de87a6ed9 100644 --- a/doc/usage/index.rst +++ b/doc/usage/index.rst @@ -12,6 +12,7 @@ Use U-Boot fit/index netconsole partitions + pxe cmdline semihosting measured_boot diff --git a/doc/usage/pxe.rst b/doc/usage/pxe.rst new file mode 100644 index 00000000000..c2dc11f218d --- /dev/null +++ b/doc/usage/pxe.rst @@ -0,0 +1,346 @@ +.. SPDX-License-Identifier: GPL-2.0+ + Copyright 2010-2011 Calxeda, Inc. + +PXE Boot and extlinux.conf +========================== + +The ``pxe`` commands provide a near subset of the functionality +provided by the PXELINUX boot loader. This allows U-Boot based systems +to be controlled remotely using the same PXE based techniques that +many non U-Boot based servers use. + +The ``sysboot`` command and Extlinux boot method use the same file +format as PXE boot for ``extlinux.conf``. + +Commands +-------- + +``pxe get`` + **Syntax:** ``pxe get`` + + follows PXELINUX's rules for retrieving configuration files + from a tftp server, and supports a subset of PXELINUX's config + file syntax. It requires certain environment variables to be + set, see the Environment section below. + + **File Paths** + + ``pxe get`` repeatedly tries to download config files until it + either successfully downloads one or runs out of paths to + try. The order and contents of paths it tries mirrors exactly + that of PXELINUX - you can read in more detail about it at: + + http://syslinux.zytor.com/wiki/index.php/Doc/pxelinux + +``pxe boot`` + **Syntax:** ``pxe boot [pxefile_addr_r]`` + + Interprets a pxe file stored in memory. + + ``pxefile_addr_r`` is an optional argument giving the location + of the pxe file. The file must be terminated with a NUL byte. + + There are some environment variables that may need to be set, + depending on conditions, see the Environment section below. + +``sysboot`` + **Syntax:** ``sysboot [-p] <interface> <dev[:part]> <ext2|fat|any> [addr] [filename]`` + + Load and boot an ``extlinux.conf`` file from a local + filesystem. Paths in the ``extlinux.conf`` file (kernel, + initrd, FDT and overlays) will be interpreted within that + filesystem. + + Example: + + ``sysboot mmc 0.0:2 any ${pxefile_addr_r} /boot/extlinux.conf`` + +Environment +----------- + +``pxefile_addr_r`` + Should be set to a location in RAM large enough to hold pxe + files while they're being processed. Up to 16 config files may + be held in memory at once. The exact number and size of the + files varies with how the system is being used. A typical + config file is a few hundred bytes long. Required for ``pxe + get``, for ``pxe boot`` if the optional argument + ``pxefile_addr_r`` is not supplied. + +``bootfile`` + Typically set in the DHCP response handler, required for ``pxe + get``. For ``pxe boot``, this path is used to generate the + base directory that all other paths to files retrieved by + ``pxe boot`` will use. If no bootfile is specified, paths used + in pxe files will be used as is. + +``serverip`` + Typically set in the DHCP response handler, this is the IP + address of the tftp server from which other files will be + retrieved. Required for ``pxe get``. + +``kernel_addr_r``, ``initrd_addr_r`` + Locations in RAM to store the kernel (or FIT image) and + initrd. These locations will be passed to the ``bootm`` + command to boot the kernel. These environment variables are + required to be set. + +``fdt_addr_r`` + Location in RAM to store the retrieved fdt blob. Retrieval is + possible if ``fdt`` label is defined in pxe file and + ``fdt_addr_r`` is set. If retrieval is possible, + ``fdt_addr_r`` will be passed to ``bootm`` command to boot the + kernel. + +``fdt_addr`` + Location of a fdt blob. ``fdt_addr`` will be passed to + ``bootm`` command if it is set and ``fdt_addr_r`` is not + passed to bootm command. + +``fdtoverlay_addr_r`` + Location in RAM to temporarily store fdt overlay(s) before + applying them to the fdt blob stored at + ``fdt_addr_r``. Required to use the ``fdtoverlays`` command in + the PXE file. + +``pxe_label_override`` + Override label to be used, if exists, instead of the default + label. This will allow consumers to choose a pxe label at + runtime instead of having to prompt the user. If + ``pxe_label_override`` is set but does not exist in the pxe + menu, pxe would fallback to the default label if given, and no + failure is returned but rather a warning message. + +``ethaddr`` + This is the standard MAC address for the ethernet adapter in + use. ``pxe get`` uses it to look for a configuration file + specific to a system's MAC address. + +``pxeuuid`` + This is a UUID in standard form using lower case hexadecimal + digits, for example, + 550e8400-e29b-41d4-a716-446655440000. ``pxe get`` uses it to + look for a configuration file based on the system's UUID. + +pxe file format +--------------- + +The pxe file format is nearly a subset of the PXELINUX file format; +see http://syslinux.zytor.com/wiki/index.php/PXELINUX. It's composed +of one line commands - global commands, and commands specific to +labels. Lines beginning with # are treated as comments. White space +between and at the beginning of lines is ignored. + +The size of pxe files and the number of labels is only limited by the amount +of RAM available to U-Boot. Memory for labels is dynamically allocated as +they're parsed, and memory for pxe files is statically allocated, and its +location is given by the pxefile_addr_r environment variable. The pxe code is +not aware of the size of the pxefile memory and will outgrow it if pxe files +are too large. + +Supported global commands +^^^^^^^^^^^^^^^^^^^^^^^^^ +Unrecognized commands are ignored. + +``default <label>`` + The label named here is treated as the default and is the + first label 'pxe boot' attempts to boot. + +``fallback <label>`` + The label named here is treated as a fallback option that may + be attempted should it be detected that booting of the default + has failed to complete, for example via U-Boot's boot count + limit functionality. + +``menu title <string>`` + Sets a title for the menu of labels being displayed. + +``menu include <path>`` + Use tftp to retrieve the pxe file at ``<path>``, which is then + immediately parsed as if the start of its contents were the + next line in the current file. nesting of include up to 16 + files deep is supported. + +``prompt <flag>`` + If 1, always prompt the user to enter a label to boot from. If + 0, only prompt the user if timeout expires. + +``timeout <num>`` + Wait for user input for <num>/10 seconds before auto-booting a + node. + +``label <name>`` + Begin a label definition. Labels continue until a command not + recognized as a label command is seen, or EOF is reached. + +Supported label commands +^^^^^^^^^^^^^^^^^^^^^^^^ +Labels end when a command not recognized as a label command is reached, or EOF. + +``menu default`` + set this label as the default label to boot; this is the same + behavior as the global default command but specified in a + different way + +``kernel <path>`` + If this label is chosen, use tftp to retrieve the kernel (or + FIT image) at ``<path>``. it will be stored at the address + indicated in the ``kernel_addr_r`` environment variable, and + that address will be passed to ``bootm`` to boot this + kernel. For FIT image, the configuration specification can be + appended to the file name, with the format: + + ``<path>#<conf>[#<extra-conf[#...]]`` + + It will be passed to bootm with that address (see: + doc/uImage.FIT/command_syntax_extensions.txt). It is useful + for overlay selection in pxe file (see + :doc:`./fit/overlay-fdt-boot`). + +``fdtoverlays <path> [...]`` + If this label is chosen, use tftp to retrieve the DT + overlay(s) at ``<path>``. It will be temporarily stored at the + address indicated in the ``fdtoverlay_addr_r`` environment + variable, and then applied in the load order to the fdt blob + stored at the address indicated in the ``fdt_addr_r`` + environment variable. + +``devicetree-overlay <path> [...]`` + if this label is chosen, use tftp to retrieve the DT + overlay(s) at ``<path>``. It will be temporarily stored at the + address indicated in the ``fdtoverlay_addr_r`` environment + variable, and then applied in the load order to the fdt blob + stored at the address indicated in the ``fdt_addr_r`` + environment variable. Alias for fdtoverlays. + +``kaslrseed`` + set this label to request random number from hwrng as kaslr seed. + +``append <string>`` + Use ``<string>`` as the kernel command line when booting this + label. Environment variable references like ``${var}`` are + substituted before boot. + +``initrd <path>`` + If this label is chosen, use tftp to retrieve the initrd at + ``<path>``. it will be stored at the address indicated in the + ``initrd_addr_r`` environment variable, and that address will + be passed to ``bootm``. For FIT image, the initrd can be + provided with the same value than kernel, including + configuration: + + ``<path>#<conf>[#<extra-conf[#...]]`` + + In this case, ``kernel_addr_r`` is passed to ``bootm``. + +``fdt <path>`` + If this label is chosen, use tftp to retrieve the fdt blob at + ``<path>``. It will be stored at the address indicated in the + ``fdt_addr_r`` environment variable, and that address will be + passed to ``bootm``. For FIT image, the device tree can be + provided with the same value than kernel, including + configuration: + + ``<path>#<conf>[#<extra-conf[#...]]`` + + In this case, ``kernel_addr_r`` is passed to ``bootm``. + +``devicetree <path>`` + If this label is chosen, use tftp to retrieve the fdt blob at + ``<path>``. it will be stored at the address indicated in the + ``fdt_addr_r`` environment variable, and that address will be + passed to ``bootm``. Alias for fdt. + +``fdtdir <path>`` + If this label is chosen, use tftp to retrieve a fdt blob + relative to ``<path>``. If the ``fdtfile`` environment + variable is set, ``<path>/<fdtfile>`` is retrieved. Otherwise, + the filename is generated from the ``soc`` and ``board`` + environment variables, i.e. ``<path>/<soc>-<board>.dtb`` is + retrieved. If the ``fdt`` command is specified, ``fdtdir`` is + ignored. + +``localboot <flag>`` + Run the command defined by ``localcmd`` in the + environment. ``<flag>`` is ignored and is only here to match + the syntax of PXELINUX config files. + +Example +------- +Here's a couple of example files to show how this works. + +.. code-block:: + :caption: /tftpboot/pxelinux.cfg/menus/base.menu + + menu title Linux selections + + # This is the default label + label install + menu label Default Install Image + kernel kernels/install.bin + append console=ttyAMA0,38400 debug earlyprintk + initrd initrds/uzInitrdDebInstall + + # Just another label + label linux-2.6.38 + kernel kernels/linux-2.6.38.bin + append root=/dev/sdb1 + + # The locally installed kernel + label local + menu label Locally installed kernel + append root=/dev/sdb1 + localboot 1 + +.. code-block:: + :caption: /tftpboot/pxelinux.cfg/default + + menu include pxelinux.cfg/menus/base.menu + timeout 500 + + default linux-2.6.38 + +When a pxe client retrieves and boots the default pxe file, ``pxe +boot`` will wait for user input for 5 seconds before booting the +``linux-2.6.38`` label, which will cause +``/tftpboot/kernels/linux-2.6.38.bin`` to be downloaded, and boot with +the command line ``root=/dev/sdb1`` + +Differences with PXELINUX +------------------------- + +The biggest difference between U-Boot's pxe and PXELINUX is that since +U-Boot's pxe support is written entirely in C, it can run on any platform +with network support in U-Boot. Here are some other differences between +PXELINUX and U-Boot's pxe support. + +- U-Boot's pxe does not support the PXELINUX DHCP option codes specified + in RFC 5071, but could be extended to do so. + +- when U-Boot's pxe fails to boot, it will return control to U-Boot, + allowing another command to run, other U-Boot command, instead of resetting + the machine like PXELINUX. + +- U-Boot's pxe doesn't rely on or provide an UNDI/PXE stack in memory, it + only uses U-Boot. + +- U-Boot's pxe doesn't provide the full menu implementation that PXELINUX + does, only a simple text based menu using the commands described in + this README. With PXELINUX, it's possible to have a graphical boot + menu, submenus, passwords, etc. U-Boot's pxe could be extended to support + a more robust menuing system like that of PXELINUX's. + +- U-Boot's pxe expects U-Boot uimg's as kernels. Anything that would work + with the 'bootm' command in U-Boot could work with the 'pxe boot' command. + +- U-Boot's pxe only recognizes a single file on the initrd command line. It + could be extended to support multiple. + +- in U-Boot's pxe, the localboot command doesn't necessarily cause a local + disk boot - it will do whatever is defined in the 'localcmd' env + variable. And since it doesn't support a full UNDI/PXE stack, the + type field is ignored. + +- the interactive prompt in U-Boot's pxe only allows you to choose a label + from the menu. If you want to boot something not listed, you can ctrl+c + out of 'pxe boot' and use existing U-Boot commands to accomplish it. diff --git a/drivers/adc/imx93-adc.c b/drivers/adc/imx93-adc.c index f593fb6447b..d671df79f68 100644 --- a/drivers/adc/imx93-adc.c +++ b/drivers/adc/imx93-adc.c @@ -221,7 +221,7 @@ static int imx93_adc_stop(struct udevice *dev) static int imx93_adc_probe(struct udevice *dev) { struct imx93_adc_priv *adc = dev_get_priv(dev); - unsigned int ret; + int ret; ret = imx93_adc_calibration(adc); if (ret < 0) @@ -238,7 +238,7 @@ static int imx93_adc_of_to_plat(struct udevice *dev) { struct adc_uclass_plat *uc_pdata = dev_get_uclass_plat(dev); struct imx93_adc_priv *adc = dev_get_priv(dev); - unsigned int ret; + int ret; adc->regs = dev_read_addr_ptr(dev); if (adc->regs == (struct imx93_adc *)FDT_ADDR_T_NONE) { diff --git a/drivers/block/blk-uclass.c b/drivers/block/blk-uclass.c index f3ac8db9464..73c24fd9176 100644 --- a/drivers/block/blk-uclass.c +++ b/drivers/block/blk-uclass.c @@ -611,30 +611,6 @@ static int blk_flags_check(struct udevice *dev, enum blk_flag_t req_flags) return flags & req_flags ? 0 : 1; } -int blk_find_first(enum blk_flag_t flags, struct udevice **devp) -{ - int ret; - - for (ret = uclass_find_first_device(UCLASS_BLK, devp); - *devp && !blk_flags_check(*devp, flags); - ret = uclass_find_next_device(devp)) - return 0; - - return -ENODEV; -} - -int blk_find_next(enum blk_flag_t flags, struct udevice **devp) -{ - int ret; - - for (ret = uclass_find_next_device(devp); - *devp && !blk_flags_check(*devp, flags); - ret = uclass_find_next_device(devp)) - return 0; - - return -ENODEV; -} - int blk_first_device_err(enum blk_flag_t flags, struct udevice **devp) { for (uclass_first_device(UCLASS_BLK, devp); diff --git a/drivers/clk/thead/clk-th1520-ap.c b/drivers/clk/thead/clk-th1520-ap.c index b80ad05b8ad..822cf0809d5 100644 --- a/drivers/clk/thead/clk-th1520-ap.c +++ b/drivers/clk/thead/clk-th1520-ap.c @@ -32,6 +32,7 @@ struct ccu_internal { struct ccu_div_internal { u8 shift; u8 width; + unsigned long flags; }; struct ccu_common { @@ -79,6 +80,7 @@ struct ccu_pll { { \ .shift = _shift, \ .width = _width, \ + .flags = _flags, \ } #define CCU_GATE(_clkid, _struct, _name, _parent, _reg, _gate, _flags) \ @@ -182,7 +184,7 @@ static unsigned long ccu_div_get_rate(struct clk *clk) val = val >> cd->div.shift; val &= GENMASK(cd->div.width - 1, 0); rate = divider_recalc_rate(clk, clk_get_parent_rate(clk), val, NULL, - 0, cd->div.width); + cd->div.flags, cd->div.width); return rate; } diff --git a/drivers/core/uclass.c b/drivers/core/uclass.c index ce5e61bbaa6..5365ac68f9e 100644 --- a/drivers/core/uclass.c +++ b/drivers/core/uclass.c @@ -261,17 +261,14 @@ int uclass_find_first_device(enum uclass_id id, struct udevice **devp) return 0; } -int uclass_find_next_device(struct udevice **devp) +void uclass_find_next_device(struct udevice **devp) { struct udevice *dev = *devp; *devp = NULL; - if (list_is_last(&dev->uclass_node, &dev->uclass->dev_head)) - return 0; - - *devp = list_entry(dev->uclass_node.next, struct udevice, uclass_node); - - return 0; + if (!list_is_last(&dev->uclass_node, &dev->uclass->dev_head)) + *devp = list_entry(dev->uclass_node.next, struct udevice, + uclass_node); } int uclass_find_device_by_namelen(enum uclass_id id, const char *name, int len, @@ -675,11 +672,8 @@ int uclass_first_device_check(enum uclass_id id, struct udevice **devp) int uclass_next_device_check(struct udevice **devp) { - int ret; + uclass_find_next_device(devp); - ret = uclass_find_next_device(devp); - if (ret) - return ret; if (!*devp) return 0; diff --git a/drivers/fastboot/Kconfig b/drivers/fastboot/Kconfig index 70207573de2..843171902ae 100644 --- a/drivers/fastboot/Kconfig +++ b/drivers/fastboot/Kconfig @@ -91,7 +91,7 @@ config FASTBOOT_USB_DEV config FASTBOOT_FLASH bool "Enable FASTBOOT FLASH command" default y if ARCH_SUNXI || ARCH_ROCKCHIP - depends on MMC || (MTD_RAW_NAND && CMD_MTDPARTS) + depends on MMC || (MTD_RAW_NAND && CMD_MTDPARTS) || DM_SPI_FLASH select IMAGE_SPARSE help The fastboot protocol includes a "flash" command for writing @@ -119,6 +119,10 @@ config FASTBOOT_FLASH_NAND bool "FASTBOOT on NAND" depends on MTD_RAW_NAND && CMD_MTDPARTS +config FASTBOOT_FLASH_SPI + bool "FASTBOOT on SPI flash" + depends on DM_SPI_FLASH + endchoice config FASTBOOT_FLASH_MMC_DEV diff --git a/drivers/fastboot/Makefile b/drivers/fastboot/Makefile index 048af5aa823..adedba0bf24 100644 --- a/drivers/fastboot/Makefile +++ b/drivers/fastboot/Makefile @@ -5,3 +5,4 @@ obj-y += fb_getvar.o obj-y += fb_command.o obj-$(CONFIG_FASTBOOT_FLASH_MMC) += fb_mmc.o obj-$(CONFIG_FASTBOOT_FLASH_NAND) += fb_nand.o +obj-$(CONFIG_FASTBOOT_FLASH_SPI) += fb_spi_flash.o diff --git a/drivers/fastboot/fb_command.c b/drivers/fastboot/fb_command.c index 2cdbac50ac4..791088bc094 100644 --- a/drivers/fastboot/fb_command.c +++ b/drivers/fastboot/fb_command.c @@ -10,6 +10,7 @@ #include <fastboot-internal.h> #include <fb_mmc.h> #include <fb_nand.h> +#include <fb_spi_flash.h> #include <part.h> #include <stdlib.h> #include <vsprintf.h> @@ -344,6 +345,10 @@ static void __maybe_unused flash(char *cmd_parameter, char *response) if (IS_ENABLED(CONFIG_FASTBOOT_FLASH_NAND)) fastboot_nand_flash_write(cmd_parameter, fastboot_buf_addr, image_size, response); + + if (IS_ENABLED(CONFIG_FASTBOOT_FLASH_SPI)) + fastboot_spi_flash_write(cmd_parameter, fastboot_buf_addr, + image_size, response); } /** @@ -362,6 +367,9 @@ static void __maybe_unused erase(char *cmd_parameter, char *response) if (IS_ENABLED(CONFIG_FASTBOOT_FLASH_NAND)) fastboot_nand_erase(cmd_parameter, response); + + if (IS_ENABLED(CONFIG_FASTBOOT_FLASH_SPI)) + fastboot_spi_flash_erase(cmd_parameter, response); } /** @@ -405,7 +413,7 @@ static void __maybe_unused run_acmd(char *cmd_parameter, char *response) return; } - if (strlen(cmd_parameter) > sizeof(g_a_cmd_buff)) { + if (strlen(cmd_parameter) >= sizeof(g_a_cmd_buff)) { pr_err("too long command\n"); fastboot_fail("too long command", response); return; diff --git a/drivers/fastboot/fb_getvar.c b/drivers/fastboot/fb_getvar.c index 9c2ce65a4e5..6775ea397ab 100644 --- a/drivers/fastboot/fb_getvar.c +++ b/drivers/fastboot/fb_getvar.c @@ -8,6 +8,7 @@ #include <fastboot-internal.h> #include <fb_mmc.h> #include <fb_nand.h> +#include <fb_spi_flash.h> #include <fs.h> #include <part.h> #include <version.h> @@ -123,6 +124,11 @@ static int getvar_get_part_info(const char *part_name, char *response, r = fastboot_nand_get_part_info(part_name, &part_info, response); if (r >= 0 && size) *size = part_info->size; + } else if (IS_ENABLED(CONFIG_FASTBOOT_FLASH_SPI)) { + r = fastboot_spi_flash_get_part_info(part_name, &disk_part, + response); + if (r >= 0 && size) + *size = disk_part.size * disk_part.blksz; } else { fastboot_fail("this storage is not supported in bootloader", response); r = -ENODEV; diff --git a/drivers/fastboot/fb_spi_flash.c b/drivers/fastboot/fb_spi_flash.c new file mode 100644 index 00000000000..691be7c7ef7 --- /dev/null +++ b/drivers/fastboot/fb_spi_flash.c @@ -0,0 +1,251 @@ +// SPDX-License-Identifier: GPL-2.0+ +/* + * Copyright 2025 Collabora Ltd. + */ + +#include <blk.h> +#include <config.h> +#include <env.h> +#include <fastboot.h> +#include <image-sparse.h> +#include <spi.h> +#include <spi_flash.h> +#include <dm.h> +#include <dm/device-internal.h> + +static struct spi_flash *flash; + +__weak int board_fastboot_spi_flash_write_setup(void) +{ + return 0; +} + +__weak int board_fastboot_spi_flash_erase_setup(void) +{ + return 0; +} + +static int raw_part_get_info_by_name(const char *name, + struct disk_partition *part_info) +{ + /* strlen("fastboot_raw_partition_") + PART_NAME_LEN + 1 */ + char env_desc_name[23 + PART_NAME_LEN + 1]; + char *raw_part_desc; + const char *argv[2]; + const char **parg = argv; + + /* check for raw partition descriptor */ + strcpy(env_desc_name, "fastboot_raw_partition_"); + strlcat(env_desc_name, name, sizeof(env_desc_name)); + raw_part_desc = strdup(env_get(env_desc_name)); + if (!raw_part_desc) + return -ENODEV; + + /* parse partition descriptor: <start> <size> */ + for (; parg < argv + sizeof(argv) / sizeof(*argv); ++parg) { + *parg = strsep(&raw_part_desc, " "); + if (!*parg) { + pr_err("Invalid number of arguments.\n"); + return -ENODEV; + } + } + + part_info->start = simple_strtoul(argv[0], NULL, 0); + part_info->size = simple_strtoul(argv[1], NULL, 0); + strlcpy((char *)part_info->name, name, PART_NAME_LEN); + + return 0; +} + +static int fastboot_spi_flash_probe(void) +{ + unsigned int bus = CONFIG_SF_DEFAULT_BUS; + unsigned int cs = CONFIG_SF_DEFAULT_CS; + struct udevice *new, *bus_dev; + int ret; + + /* Remove the old device, otherwise probe will just be a nop */ + ret = spi_find_bus_and_cs(bus, cs, &bus_dev, &new); + if (!ret) + device_remove(new, DM_REMOVE_NORMAL); + + spi_flash_probe_bus_cs(bus, cs, &new); + flash = dev_get_uclass_priv(new); + if (!flash) { + printf("Failed to initialize SPI flash at %u:%u (error %d)\n", + bus, cs, ret); + return 1; + } + + return 0; +} + +static int fastboot_spi_flash_unlock(struct spi_flash *flash, + struct disk_partition *part_info) +{ + int ret = spi_flash_protect(flash, part_info->start, part_info->size, + false); + + if (ret && ret != -EOPNOTSUPP) { + printf("Failed to unlock SPI flash (%d)\n", ret); + return ret; + } + + return 0; +} + +static lbaint_t fb_spi_flash_sparse_write(struct sparse_storage *info, + lbaint_t blk, lbaint_t blkcnt, + const void *buffer) +{ + size_t len = blkcnt * info->blksz; + u32 offset = blk * info->blksz; + int ret; + + ret = spi_flash_erase(flash, offset, ROUND(len, flash->erase_size)); + if (ret < 0) { + printf("Failed to erase sparse chunk (%d)\n", ret); + return ret; + } + + ret = spi_flash_write(flash, offset, len, buffer); + if (ret < 0) { + printf("Failed to write sparse chunk (%d)\n", ret); + return ret; + } + + return blkcnt; +} + +static lbaint_t fb_spi_flash_sparse_reserve(struct sparse_storage *info, + lbaint_t blk, lbaint_t blkcnt) +{ + return blkcnt; +} + +/** + * fastboot_spi_flash_get_part_info() - Lookup SPI partition by name + * + * @part_name: Named device to lookup + * @part_info: Pointer to returned struct disk_partition + * @response: Pointer to fastboot response buffer + * Return: 0 if OK, -ENOENT if no partition name was given, -ENODEV on invalid + * raw partition descriptor + */ +int fastboot_spi_flash_get_part_info(const char *part_name, + struct disk_partition *part_info, + char *response) +{ + int ret; + + if (!part_name || !strcmp(part_name, "")) { + fastboot_fail("partition not given", response); + return -ENOENT; + } + + /* TODO: Support partitions on the device */ + ret = raw_part_get_info_by_name(part_name, part_info); + if (ret < 0) + fastboot_fail("invalid partition or device", response); + + return ret; +} + +/** + * fastboot_spi_flash_write() - Write image to SPI for fastboot + * + * @cmd: Named device to write image to + * @download_buffer: Pointer to image data + * @download_bytes: Size of image data + * @response: Pointer to fastboot response buffer + */ +void fastboot_spi_flash_write(const char *cmd, void *download_buffer, + u32 download_bytes, char *response) +{ + struct disk_partition part_info; + int ret; + + if (fastboot_spi_flash_get_part_info(cmd, &part_info, response)) + return; + + if (fastboot_spi_flash_probe()) + return; + + if (board_fastboot_spi_flash_write_setup()) + return; + + if (fastboot_spi_flash_unlock(flash, &part_info)) + return; + + if (is_sparse_image(download_buffer)) { + struct sparse_storage sparse; + + sparse.blksz = flash->sector_size; + sparse.start = part_info.start / sparse.blksz; + sparse.size = part_info.size / sparse.blksz; + sparse.write = fb_spi_flash_sparse_write; + sparse.reserve = fb_spi_flash_sparse_reserve; + sparse.mssg = fastboot_fail; + + printf("Flashing sparse image at offset " LBAFU "\n", + sparse.start); + + ret = write_sparse_image(&sparse, cmd, download_buffer, + response); + } else { + printf("Flashing raw image at offset " LBAFU "\n", + part_info.start); + + ret = spi_flash_erase(flash, part_info.start, + ROUND(download_bytes, flash->erase_size)); + if (ret < 0) { + printf("Failed to erase raw image (%d)\n", ret); + return; + } + ret = spi_flash_write(flash, part_info.start, download_bytes, + download_buffer); + if (ret < 0) { + printf("Failed to write raw image (%d)\n", ret); + return; + } + printf("........ wrote %u bytes\n", download_bytes); + } + + if (ret) + fastboot_fail("error writing the image", response); + else + fastboot_okay(NULL, response); +} + +/** + * fastboot_spi_flash_erase() - Erase SPI for fastboot + * + * @cmd: Named device to erase + * @response: Pointer to fastboot response buffer + */ +void fastboot_spi_flash_erase(const char *cmd, char *response) +{ + struct disk_partition part_info; + int ret; + + if (fastboot_spi_flash_get_part_info(cmd, &part_info, response)) + return; + + if (fastboot_spi_flash_probe()) + return; + + if (board_fastboot_spi_flash_erase_setup()) + return; + + if (fastboot_spi_flash_unlock(flash, &part_info)) + return; + + ret = spi_flash_erase(flash, part_info.start, part_info.size); + if (ret < 0) { + pr_err("failed erasing from SPI flash"); + fastboot_fail("failed erasing from SPI flash", response); + return; + } + + fastboot_okay(NULL, response); +} diff --git a/drivers/firmware/firmware-zynqmp.c b/drivers/firmware/firmware-zynqmp.c index d18ae523b6b..e07ec3929b2 100644 --- a/drivers/firmware/firmware-zynqmp.c +++ b/drivers/firmware/firmware-zynqmp.c @@ -500,11 +500,8 @@ static int zynqmp_firmware_bind(struct udevice *dev) if (!smc_call_handler) return -EINVAL; - if ((IS_ENABLED(CONFIG_XPL_BUILD) && - IS_ENABLED(CONFIG_SPL_POWER_DOMAIN) && - IS_ENABLED(CONFIG_ZYNQMP_POWER_DOMAIN)) || - (!IS_ENABLED(CONFIG_XPL_BUILD) && - IS_ENABLED(CONFIG_ZYNQMP_POWER_DOMAIN))) { + if (CONFIG_IS_ENABLED(POWER_DOMAIN) && + IS_ENABLED(CONFIG_ZYNQMP_POWER_DOMAIN)) { ret = device_bind_driver_to_node(dev, "zynqmp_power_domain", "zynqmp_power_domain", dev_ofnode(dev), &child); diff --git a/drivers/fpga/ACEX1K.c b/drivers/fpga/ACEX1K.c index 3de9011ac06..e1514fc56d0 100644 --- a/drivers/fpga/ACEX1K.c +++ b/drivers/fpga/ACEX1K.c @@ -14,6 +14,7 @@ #include <log.h> #include <ACEX1K.h> /* ACEX device family */ #include <linux/delay.h> +#include <time.h> /* Note: The assumption is that we cannot possibly run fast enough to * overrun the device (the Slave Parallel mode can free run at 50MHz). diff --git a/drivers/fpga/Kconfig b/drivers/fpga/Kconfig index 62cb77b098c..9456ca3149a 100644 --- a/drivers/fpga/Kconfig +++ b/drivers/fpga/Kconfig @@ -15,6 +15,7 @@ config FPGA_ALTERA config FPGA_SOCFPGA bool "Enable Gen5 and Arria10 common FPGA drivers" + depends on ARCH_SOCFPGA select FPGA_ALTERA help Say Y here to enable the Gen5 and Arria10 common FPGA driver diff --git a/drivers/fpga/fpga.c b/drivers/fpga/fpga.c index f88267e01b6..2297fefd149 100644 --- a/drivers/fpga/fpga.c +++ b/drivers/fpga/fpga.c @@ -16,20 +16,6 @@ static int next_desc = FPGA_INVALID_DEVICE; static fpga_desc desc_table[CONFIG_MAX_FPGA_DEVICES]; -/* - * fpga_no_sup - * 'no support' message function - */ -static void fpga_no_sup(char *fn, char *msg) -{ - if (fn && msg) - printf("%s: No support for %s.\n", fn, msg); - else if (msg) - printf("No support for %s.\n", msg); - else - printf("No FPGA support!\n"); -} - /* fpga_get_desc * map a device number to a descriptor */ @@ -39,8 +25,8 @@ const fpga_desc *fpga_get_desc(int devnum) if ((devnum >= 0) && (devnum < next_desc)) { desc = &desc_table[devnum]; - debug("%s: found fpga descriptor #%d @ 0x%p\n", - __func__, devnum, desc); + log_debug("found fpga descriptor #%d @ 0x%p\n", + devnum, desc); } return desc; @@ -51,15 +37,15 @@ const fpga_desc *fpga_get_desc(int devnum) * generic parameter checking code */ const fpga_desc *fpga_validate(int devnum, const void *buf, - size_t bsize, char *fn) + size_t bsize) { const fpga_desc *desc = fpga_get_desc(devnum); if (!desc) - printf("%s: Invalid device number %d\n", fn, devnum); + log_err("Invalid device number %d\n", devnum); if (!buf) { - printf("%s: Null buffer.\n", fn); + log_err("Null buffer.\n"); return NULL; } return desc; @@ -75,40 +61,40 @@ static int fpga_dev_info(int devnum) const fpga_desc *desc = fpga_get_desc(devnum); if (desc) { - debug("%s: Device Descriptor @ 0x%p\n", - __func__, desc->devdesc); + log_info("Device Descriptor @ 0x%p\n", + desc->devdesc); switch (desc->devtype) { case fpga_xilinx: #if defined(CONFIG_FPGA_XILINX) - printf("Xilinx Device\nDescriptor @ 0x%p\n", desc); + log_info("Xilinx Device\nDescriptor @ 0x%p\n", desc); ret_val = xilinx_info(desc->devdesc); #else - fpga_no_sup((char *)__func__, "Xilinx devices"); + log_err("No support for Xilinx devices.\n"); #endif break; case fpga_altera: #if defined(CONFIG_FPGA_ALTERA) - printf("Altera Device\nDescriptor @ 0x%p\n", desc); + log_info("Altera Device\nDescriptor @ 0x%p\n", desc); ret_val = altera_info(desc->devdesc); #else - fpga_no_sup((char *)__func__, "Altera devices"); + log_err("No support for Altera devices.\n"); #endif break; case fpga_lattice: #if defined(CONFIG_FPGA_LATTICE) - printf("Lattice Device\nDescriptor @ 0x%p\n", desc); + log_info("Lattice Device\nDescriptor @ 0x%p\n", desc); ret_val = lattice_info(desc->devdesc); #else - fpga_no_sup((char *)__func__, "Lattice devices"); + log_err("No support for Lattice devices.\n"); #endif break; default: - printf("%s: Invalid or unsupported device type %d\n", - __func__, desc->devtype); + log_err("Invalid or unsupported device type %d\n", + desc->devtype); } } else { - printf("%s: Invalid device number %d\n", __func__, devnum); + log_err("Invalid device number %d\n", devnum); } return ret_val; @@ -144,23 +130,22 @@ int fpga_add(fpga_type devtype, void *desc) int devnum = FPGA_INVALID_DEVICE; if (!desc) { - printf("%s: NULL device descriptor\n", __func__); + log_err("NULL device descriptor\n"); return devnum; } if (next_desc < 0) { - printf("%s: FPGA support not initialized!\n", __func__); + log_err("FPGA support not initialized!\n"); } else if ((devtype > fpga_min_type) && (devtype < fpga_undefined)) { if (next_desc < CONFIG_MAX_FPGA_DEVICES) { devnum = next_desc; desc_table[next_desc].devtype = devtype; desc_table[next_desc++].devdesc = desc; } else { - printf("%s: Exceeded Max FPGA device count\n", - __func__); + log_err("Exceeded Max FPGA device count\n"); } } else { - printf("%s: Unsupported FPGA type %d\n", __func__, devtype); + log_err("Unsupported FPGA type %d\n", devtype); } return devnum; @@ -181,7 +166,7 @@ int __weak fpga_is_partial_data(int devnum, size_t img_len) int __weak fpga_loadbitstream(int devnum, char *fpgadata, size_t size, bitstream_type bstype) { - printf("Bitstream support not implemented for this FPGA device\n"); + log_err("Bitstream support not implemented for this FPGA device\n"); return FPGA_FAIL; } @@ -190,8 +175,7 @@ int fpga_fsload(int devnum, const void *buf, size_t size, fpga_fs_info *fpga_fsinfo) { int ret_val = FPGA_FAIL; /* assume failure */ - const fpga_desc *desc = fpga_validate(devnum, buf, size, - (char *)__func__); + const fpga_desc *desc = fpga_validate(devnum, buf, size); if (desc) { switch (desc->devtype) { @@ -200,12 +184,12 @@ int fpga_fsload(int devnum, const void *buf, size_t size, ret_val = xilinx_loadfs(desc->devdesc, buf, size, fpga_fsinfo); #else - fpga_no_sup((char *)__func__, "Xilinx devices"); + log_err("No support for Xilinx devices.\n"); #endif break; default: - printf("%s: Invalid or unsupported device type %d\n", - __func__, desc->devtype); + log_err("Invalid or unsupported device type %d\n", + desc->devtype); } } @@ -219,8 +203,7 @@ int fpga_loads(int devnum, const void *buf, size_t size, { int ret_val = FPGA_FAIL; - const fpga_desc *desc = fpga_validate(devnum, buf, size, - (char *)__func__); + const fpga_desc *desc = fpga_validate(devnum, buf, size); if (desc) { switch (desc->devtype) { @@ -229,12 +212,12 @@ int fpga_loads(int devnum, const void *buf, size_t size, ret_val = xilinx_loads(desc->devdesc, buf, size, fpga_sec_info); #else - fpga_no_sup((char *)__func__, "Xilinx devices"); + log_err("No support for Xilinx devices.\n"); #endif break; default: - printf("%s: Invalid or unsupported device type %d\n", - __func__, desc->devtype); + log_err("Invalid or unsupported device type %d\n", + desc->devtype); } } @@ -265,8 +248,7 @@ int fpga_load(int devnum, const void *buf, size_t bsize, bitstream_type bstype, { int ret_val = FPGA_FAIL; /* assume failure */ int ret_notify; - const fpga_desc *desc = fpga_validate(devnum, buf, bsize, - (char *)__func__); + const fpga_desc *desc = fpga_validate(devnum, buf, bsize); if (desc) { switch (desc->devtype) { @@ -275,26 +257,26 @@ int fpga_load(int devnum, const void *buf, size_t bsize, bitstream_type bstype, ret_val = xilinx_load(desc->devdesc, buf, bsize, bstype, flags); #else - fpga_no_sup((char *)__func__, "Xilinx devices"); + log_err("No support for Xilinx devices.\n"); #endif break; case fpga_altera: #if defined(CONFIG_FPGA_ALTERA) ret_val = altera_load(desc->devdesc, buf, bsize); #else - fpga_no_sup((char *)__func__, "Altera devices"); + log_err("No support for Altera devices.\n"); #endif break; case fpga_lattice: #if defined(CONFIG_FPGA_LATTICE) ret_val = lattice_load(desc->devdesc, buf, bsize); #else - fpga_no_sup((char *)__func__, "Lattice devices"); + log_err("No support for Lattice devices.\n"); #endif break; default: - printf("%s: Invalid or unsupported device type %d\n", - __func__, desc->devtype); + log_err("Invalid or unsupported device type %d\n", + desc->devtype); } } @@ -312,8 +294,7 @@ int fpga_load(int devnum, const void *buf, size_t bsize, bitstream_type bstype, int fpga_dump(int devnum, const void *buf, size_t bsize) { int ret_val = FPGA_FAIL; /* assume failure */ - const fpga_desc *desc = fpga_validate(devnum, buf, bsize, - (char *)__func__); + const fpga_desc *desc = fpga_validate(devnum, buf, bsize); if (desc) { switch (desc->devtype) { @@ -321,26 +302,26 @@ int fpga_dump(int devnum, const void *buf, size_t bsize) #if defined(CONFIG_FPGA_XILINX) ret_val = xilinx_dump(desc->devdesc, buf, bsize); #else - fpga_no_sup((char *)__func__, "Xilinx devices"); + log_err("No support for Xilinx devices.\n"); #endif break; case fpga_altera: #if defined(CONFIG_FPGA_ALTERA) ret_val = altera_dump(desc->devdesc, buf, bsize); #else - fpga_no_sup((char *)__func__, "Altera devices"); + log_err("No support for Altera devices.\n"); #endif break; case fpga_lattice: #if defined(CONFIG_FPGA_LATTICE) ret_val = lattice_dump(desc->devdesc, buf, bsize); #else - fpga_no_sup((char *)__func__, "Lattice devices"); + log_err("No support for Lattice devices.\n"); #endif break; default: - printf("%s: Invalid or unsupported device type %d\n", - __func__, desc->devtype); + log_err("Invalid or unsupported device type %d\n", + desc->devtype); } } @@ -363,7 +344,7 @@ int fpga_info(int devnum) return FPGA_SUCCESS; } else { - printf("%s: No FPGA devices available.\n", __func__); + log_err("No FPGA devices available.\n"); return FPGA_FAIL; } } diff --git a/drivers/fpga/ivm_core.c b/drivers/fpga/ivm_core.c index 3c9a01e5110..37d5c5ec9ec 100644 --- a/drivers/fpga/ivm_core.c +++ b/drivers/fpga/ivm_core.c @@ -33,6 +33,7 @@ #include <linux/string.h> #include <malloc.h> #include <lattice.h> +#include <vsprintf.h> #define vme_out_char(c) printf("%c", c) #define vme_out_hex(c) printf("%x", c) @@ -291,7 +292,7 @@ unsigned short g_usLVDSPairCount; */ static signed char ispVMDataCode(void); -static long int ispVMDataSize(void); +static long ispVMDataSize(void); static void ispVMData(unsigned char *Data); static signed char ispVMShift(signed char Code); static signed char ispVMAmble(signed char Code); @@ -589,7 +590,7 @@ void ispVMFreeMem(void) * */ -long int ispVMDataSize() +long ispVMDataSize(void) { /* 09/11/07 NN added local variables initialization */ long int iSize = 0; @@ -614,7 +615,7 @@ long int ispVMDataSize() * */ -signed char ispVMCode() +signed char ispVMCode(void) { /* 09/11/07 NN added local variables initialization */ unsigned short iRepeatSize = 0; @@ -1113,7 +1114,7 @@ signed char ispVMCode() * */ -signed char ispVMDataCode() +signed char ispVMDataCode(void) { /* 09/11/07 NN added local variables initialization */ signed char cDataByte = 0; @@ -2475,7 +2476,7 @@ void ispVMStateMachine(signed char cNextJTAGState) * */ -void ispVMStart() +void ispVMStart(void) { #ifdef DEBUG printf("// ISPVM EMBEDDED ADDED\n"); @@ -2504,7 +2505,7 @@ void ispVMStart() * */ -void ispVMEnd() +void ispVMEnd(void) { #ifdef DEBUG printf("// ISPVM EMBEDDED ADDED\n"); diff --git a/drivers/fpga/lattice.c b/drivers/fpga/lattice.c index 3f481e38565..29cf2f60974 100644 --- a/drivers/fpga/lattice.c +++ b/drivers/fpga/lattice.c @@ -350,8 +350,8 @@ int lattice_info(Lattice_desc *desc) printf("Unsupported interface type, %d\n", desc->iface); } - printf("Device Size: \t%d bytes\n", - desc->size); + printf("Device Size: \t%zu bytes\n", + desc->size); if (desc->iface_fns) { printf("Device Function Table @ 0x%p\n", diff --git a/drivers/fpga/spartan2.c b/drivers/fpga/spartan2.c index 906649ea181..792e4033428 100644 --- a/drivers/fpga/spartan2.c +++ b/drivers/fpga/spartan2.c @@ -9,6 +9,7 @@ #include <config.h> /* core U-Boot definitions */ #include <log.h> #include <spartan2.h> /* Spartan-II device family */ +#include <time.h> /* Note: The assumption is that we cannot possibly run fast enough to * overrun the device (the Slave Parallel mode can free run at 50MHz). diff --git a/drivers/fpga/stratixII.c b/drivers/fpga/stratixII.c index 73fecd9dca5..3f984385316 100644 --- a/drivers/fpga/stratixII.c +++ b/drivers/fpga/stratixII.c @@ -5,92 +5,41 @@ */ #include <altera.h> +#include <stratixII.h> #include <linux/delay.h> -int StratixII_ps_fpp_load (Altera_desc * desc, void *buf, size_t bsize, - int isSerial, int isSecure); -int StratixII_ps_fpp_dump (Altera_desc * desc, void *buf, size_t bsize); - /****************************************************************/ /* Stratix II Generic Implementation */ -int StratixII_load (Altera_desc * desc, void *buf, size_t bsize) -{ - int ret_val = FPGA_FAIL; - - switch (desc->iface) { - case passive_serial: - ret_val = StratixII_ps_fpp_load (desc, buf, bsize, 1, 0); - break; - case fast_passive_parallel: - ret_val = StratixII_ps_fpp_load (desc, buf, bsize, 0, 0); - break; - case fast_passive_parallel_security: - ret_val = StratixII_ps_fpp_load (desc, buf, bsize, 0, 1); - break; - - /* Add new interface types here */ - default: - printf ("%s: Unsupported interface type, %d\n", __FUNCTION__, - desc->iface); - } - return ret_val; -} - -int StratixII_dump (Altera_desc * desc, void *buf, size_t bsize) -{ - int ret_val = FPGA_FAIL; - - switch (desc->iface) { - case passive_serial: - case fast_passive_parallel: - case fast_passive_parallel_security: - ret_val = StratixII_ps_fpp_dump (desc, buf, bsize); - break; - /* Add new interface types here */ - default: - printf ("%s: Unsupported interface type, %d\n", __FUNCTION__, - desc->iface); - } - return ret_val; -} - -int StratixII_info (Altera_desc * desc) -{ - return FPGA_SUCCESS; -} - -int StratixII_ps_fpp_dump (Altera_desc * desc, void *buf, size_t bsize) +int StratixII_ps_fpp_dump(Altera_desc *desc, const void *buf, size_t bsize) { - printf ("Stratix II Fast Passive Parallel dump is not implemented\n"); + printf("Stratix II Fast Passive Parallel dump is not implemented\n"); return FPGA_FAIL; } -int StratixII_ps_fpp_load (Altera_desc * desc, void *buf, size_t bsize, - int isSerial, int isSecure) +int StratixII_ps_fpp_load(Altera_desc *desc, const void *buf, size_t bsize, + int isSerial, int isSecure) { altera_board_specific_func *fns; int cookie; int ret_val = FPGA_FAIL; int bytecount; - char *buff = buf; + const char *buff = buf; int i; if (!desc) { - printf ("%s(%d) Altera_desc missing\n", __FUNCTION__, __LINE__); + log_err("Altera_desc missing\n"); return FPGA_FAIL; } if (!buff) { - printf ("%s(%d) buffer is missing\n", __FUNCTION__, __LINE__); + log_err("buffer is missing\n"); return FPGA_FAIL; } if (!bsize) { - printf ("%s(%d) size is zero\n", __FUNCTION__, __LINE__); + log_err("size is zero\n"); return FPGA_FAIL; } if (!desc->iface_fns) { - printf - ("%s(%d) Altera_desc function interface table is missing\n", - __FUNCTION__, __LINE__); + log_err("Altera_desc function interface table is missing\n"); return FPGA_FAIL; } fns = (altera_board_specific_func *) (desc->iface_fns); @@ -99,9 +48,7 @@ int StratixII_ps_fpp_load (Altera_desc * desc, void *buf, size_t bsize, if (! (fns->config && fns->status && fns->done && fns->data && fns->abort)) { - printf - ("%s(%d) Missing some function in the function interface table\n", - __FUNCTION__, __LINE__); + log_err("Missing some function in the function interface table\n"); return FPGA_FAIL; } @@ -124,13 +71,12 @@ int StratixII_ps_fpp_load (Altera_desc * desc, void *buf, size_t bsize, bytecount = 0; fns->clk (0, 1, cookie); - printf ("loading to fpga "); + printf("loading to fpga "); while (bytecount < bsize) { /* 3.1 check stratix has not signaled us an error */ if (fns->status (cookie) != 1) { - printf - ("\n%s(%d) Stratix failed (byte transferred till failure 0x%x)\n", - __FUNCTION__, __LINE__, bytecount); + log_err("\nStratix failed (byte transferred till failure 0x%x)\n", + bytecount); fns->abort (cookie); return FPGA_FAIL; } @@ -162,7 +108,7 @@ int StratixII_ps_fpp_load (Altera_desc * desc, void *buf, size_t bsize, /* 3.5 while clk is deasserted it is safe to print some progress indication */ if ((bytecount % (bsize / 100)) == 0) { - printf ("\b\b\b%02d\%", bytecount * 100 / bsize); + printf("\b\b\b%02zu\%%", bytecount * 100 / bsize); } } @@ -170,11 +116,11 @@ int StratixII_ps_fpp_load (Altera_desc * desc, void *buf, size_t bsize, fns->clk (1, 1, cookie); udelay(100); if (!fns->done (cookie)) { - printf (" error!.\n"); + printf(" error!.\n"); fns->abort (cookie); return FPGA_FAIL; } else { - printf ("\b\b\b done.\n"); + printf("\b\b\b done.\n"); } /* 5. call lower layer post configuration */ @@ -187,3 +133,47 @@ int StratixII_ps_fpp_load (Altera_desc * desc, void *buf, size_t bsize, return FPGA_SUCCESS; } + +int StratixII_load(Altera_desc *desc, const void *buf, size_t size) +{ + int ret_val = FPGA_FAIL; + + switch (desc->iface) { + case passive_serial: + ret_val = StratixII_ps_fpp_load(desc, buf, size, 1, 0); + break; + case fast_passive_parallel: + ret_val = StratixII_ps_fpp_load(desc, buf, size, 0, 0); + break; + case fast_passive_parallel_security: + ret_val = StratixII_ps_fpp_load(desc, buf, size, 0, 1); + break; + + /* Add new interface types here */ + default: + log_err("Unsupported interface type, %d\n", desc->iface); + } + return ret_val; +} + +int StratixII_dump(Altera_desc *desc, const void *buf, size_t bsize) +{ + int ret_val = FPGA_FAIL; + + switch (desc->iface) { + case passive_serial: + case fast_passive_parallel: + case fast_passive_parallel_security: + ret_val = StratixII_ps_fpp_dump(desc, buf, bsize); + break; + /* Add new interface types here */ + default: + log_err("Unsupported interface type, %d\n", desc->iface); + } + return ret_val; +} + +int StratixII_info(Altera_desc *desc) +{ + return FPGA_SUCCESS; +} diff --git a/drivers/fpga/stratixv.c b/drivers/fpga/stratixv.c index 372f16d92d1..4b251994598 100644 --- a/drivers/fpga/stratixv.c +++ b/drivers/fpga/stratixv.c @@ -48,7 +48,7 @@ int stratixv_load(Altera_desc *desc, const void *rbf_data, size_t rbf_size) int spi_dev; int ret = 0; - if ((u32)rbf_data & 0x3) { + if ((size_t)rbf_data & 0x3) { puts("FPGA: Unaligned data, realign to 32bit boundary.\n"); return -EINVAL; } diff --git a/drivers/fpga/versalpl.c b/drivers/fpga/versalpl.c index d691f135e89..624493ad838 100644 --- a/drivers/fpga/versalpl.c +++ b/drivers/fpga/versalpl.c @@ -6,7 +6,6 @@ #include <cpu_func.h> #include <log.h> -#include <asm/arch/sys_proto.h> #include <memalign.h> #include <versalpl.h> #include <zynqmp_firmware.h> diff --git a/drivers/fpga/virtex2.c b/drivers/fpga/virtex2.c index 8e2c12bb58b..805cbac8082 100644 --- a/drivers/fpga/virtex2.c +++ b/drivers/fpga/virtex2.c @@ -19,6 +19,7 @@ #include <log.h> #include <virtex2.h> #include <linux/delay.h> +#include <time.h> /* * If the SelectMap interface can be overrun by the processor, enable @@ -301,6 +302,7 @@ static int virtex2_ssm_load(xilinx_desc *desc, const void *buf, size_t bsize) size_t bytecount = 0; unsigned char *data = (unsigned char *)buf; int cookie = desc->cookie; + unsigned long ts; ret_val = virtex2_slave_pre(fn, cookie); if (ret_val != FPGA_SUCCESS) diff --git a/drivers/fpga/xilinx.c b/drivers/fpga/xilinx.c index c46513226d9..28c68faba55 100644 --- a/drivers/fpga/xilinx.c +++ b/drivers/fpga/xilinx.c @@ -49,7 +49,7 @@ int fpga_loadbitstream(int devnum, char *fpgadata, size_t size, dataptr = (unsigned char *)fpgadata; /* Find out fpga_description */ - desc = fpga_validate(devnum, dataptr, 0, (char *)__func__); + desc = fpga_validate(devnum, dataptr, 0); /* Assign xilinx device description */ xdesc = desc->devdesc; diff --git a/drivers/fpga/zynqmppl.c b/drivers/fpga/zynqmppl.c index 2b62bbbe3cf..1199b249e36 100644 --- a/drivers/fpga/zynqmppl.c +++ b/drivers/fpga/zynqmppl.c @@ -191,8 +191,8 @@ static int zynqmp_validate_bitstream(xilinx_desc *desc, const void *buf, } if ((ulong)buf < SZ_1M) { - printf("%s: Bitstream has to be placed up to 1MB (%px)\n", - __func__, buf); + log_err("Bitstream has to be placed above 1MB (%px)\n", + buf); return FPGA_FAIL; } diff --git a/drivers/fpga/zynqpl.c b/drivers/fpga/zynqpl.c index 3e86d854a01..5a37a33b0a7 100644 --- a/drivers/fpga/zynqpl.c +++ b/drivers/fpga/zynqpl.c @@ -360,8 +360,8 @@ static int zynq_validate_bitstream(xilinx_desc *desc, const void *buf, } if ((u32)buf < SZ_1M) { - printf("%s: Bitstream has to be placed up to 1MB (%x)\n", - __func__, (u32)buf); + log_err("Bitstream has to be placed above 1MB (%x)\n", + (u32)buf); return FPGA_FAIL; } diff --git a/drivers/gpio/Kconfig b/drivers/gpio/Kconfig index c7da1f8a52a..58e464106a3 100644 --- a/drivers/gpio/Kconfig +++ b/drivers/gpio/Kconfig @@ -719,5 +719,10 @@ config SPL_ADP5585_GPIO depends on SPL_DM_GPIO && SPL_I2C help Support ADP5585 GPIO expander in SPL. +config MPFS_GPIO + bool "Enable Polarfire SoC GPIO driver" + depends on DM_GPIO + help + Enable to support the GPIO driver on Polarfire SoC endif diff --git a/drivers/gpio/Makefile b/drivers/gpio/Makefile index a5ef1c9e0d8..83e10c79b91 100644 --- a/drivers/gpio/Makefile +++ b/drivers/gpio/Makefile @@ -80,3 +80,4 @@ obj-$(CONFIG_SLG7XL45106_I2C_GPO) += gpio_slg7xl45106.o obj-$(CONFIG_FTGPIO010) += ftgpio010.o obj-$(CONFIG_$(PHASE_)ADP5585_GPIO) += adp5585_gpio.o obj-$(CONFIG_RZG2L_GPIO) += rzg2l-gpio.o +obj-$(CONFIG_MPFS_GPIO) += mpfs_gpio.o diff --git a/drivers/gpio/mpfs_gpio.c b/drivers/gpio/mpfs_gpio.c new file mode 100644 index 00000000000..9bbeada4ef5 --- /dev/null +++ b/drivers/gpio/mpfs_gpio.c @@ -0,0 +1,198 @@ +// SPDX-License-Identifier: GPL-2.0+ +/* + * Copyright (C) 2025 Microchip Technology Inc. + * Eoin Dickson <eoin.dickson@microchip.com> + */ + +#include <dm.h> +#include <asm-generic/gpio.h> +#include <asm/io.h> +#include <errno.h> +#include <asm/gpio.h> +#include <linux/bitops.h> + +#define MPFS_INP_REG 0x84 +#define COREGPIO_INP_REG 0x90 +#define MPFS_OUTP_REG 0x88 +#define COREGPIO_OUTP_REG 0xA0 +#define MPFS_GPIO_CTRL(i) (0x4 * (i)) +#define MPFS_MAX_NUM_GPIO 32 +#define MPFS_GPIO_EN_OUT_BUF BIT(2) +#define MPFS_GPIO_EN_IN BIT(1) +#define MPFS_GPIO_EN_OUT BIT(0) + +struct mpfs_gpio_reg_offsets { + u8 inp; + u8 outp; +}; + +struct mchp_gpio_plat { + void *base; + const struct mpfs_gpio_reg_offsets *regs; +}; + +static void mchp_update_gpio_reg(void *bptr, u32 offset, bool value) +{ + void __iomem *ptr = (void __iomem *)bptr; + + u32 old = readl(ptr); + + if (value) + writel(old | offset, ptr); + else + writel(old & ~offset, ptr); +} + +static int mchp_gpio_direction_input(struct udevice *dev, u32 offset) +{ + struct mchp_gpio_plat *plat = dev_get_plat(dev); + struct gpio_dev_priv *uc_priv = dev_get_uclass_priv(dev); + + if (offset > uc_priv->gpio_count) + return -EINVAL; + + mchp_update_gpio_reg(plat->base + MPFS_GPIO_CTRL(offset), MPFS_GPIO_EN_IN, true); + mchp_update_gpio_reg(plat->base + MPFS_GPIO_CTRL(offset), MPFS_GPIO_EN_OUT, false); + mchp_update_gpio_reg(plat->base + MPFS_GPIO_CTRL(offset), MPFS_GPIO_EN_OUT_BUF, false); + + return 0; +} + +static int mchp_gpio_direction_output(struct udevice *dev, u32 offset, int value) +{ + struct mchp_gpio_plat *plat = dev_get_plat(dev); + struct gpio_dev_priv *uc_priv = dev_get_uclass_priv(dev); + + if (offset > uc_priv->gpio_count) + return -EINVAL; + + mchp_update_gpio_reg(plat->base + MPFS_GPIO_CTRL(offset), MPFS_GPIO_EN_IN, false); + mchp_update_gpio_reg(plat->base + MPFS_GPIO_CTRL(offset), MPFS_GPIO_EN_OUT, true); + mchp_update_gpio_reg(plat->base + MPFS_GPIO_CTRL(offset), MPFS_GPIO_EN_OUT_BUF, true); + + mchp_update_gpio_reg(plat->base + plat->regs->outp, BIT(offset), value); + + return 0; +} + +static bool mchp_gpio_get_value(struct udevice *dev, u32 offset) +{ + struct mchp_gpio_plat *plat = dev_get_plat(dev); + struct gpio_dev_priv *uc_priv = dev_get_uclass_priv(dev); + int val, input; + + if (offset > uc_priv->gpio_count) + return -EINVAL; + + input = readl(plat->base + MPFS_GPIO_CTRL(offset)) & MPFS_GPIO_EN_IN; + + if (input) + val = (readl(plat->base + plat->regs->inp) & BIT(offset)); + else + val = (readl(plat->base + plat->regs->outp) & BIT(offset)); + + return val >> offset; +} + +static int mchp_gpio_set_value(struct udevice *dev, u32 offset, int value) +{ + struct mchp_gpio_plat *plat = dev_get_plat(dev); + struct gpio_dev_priv *uc_priv = dev_get_uclass_priv(dev); + + if (offset > uc_priv->gpio_count) + return -EINVAL; + + mchp_update_gpio_reg(plat->base + plat->regs->outp, BIT(offset), value); + + return 0; +} + +static int mchp_gpio_get_function(struct udevice *dev, unsigned int offset) +{ + struct mchp_gpio_plat *plat = dev_get_plat(dev); + struct gpio_dev_priv *uc_priv = dev_get_uclass_priv(dev); + u32 outdir, indir, val; + + if (offset > uc_priv->gpio_count) + return -EINVAL; + + /* Get direction of the pin */ + outdir = readl(plat->base + MPFS_GPIO_CTRL(offset)) & MPFS_GPIO_EN_OUT; + indir = readl(plat->base + MPFS_GPIO_CTRL(offset)) & MPFS_GPIO_EN_IN; + + if (outdir) + val = GPIOF_OUTPUT; + else if (indir) + val = GPIOF_INPUT; + else + val = GPIOF_UNUSED; + + return val; +} + +static int mchp_gpio_probe(struct udevice *dev) +{ + struct mchp_gpio_plat *plat = dev_get_plat(dev); + struct gpio_dev_priv *uc_priv = dev_get_uclass_priv(dev); + char name[18], *str; + + plat->regs = dev_get_driver_data(dev); + sprintf(name, "gpio@%4lx_", (uintptr_t)plat->base); + str = strdup(name); + if (!str) + return -ENOMEM; + uc_priv->bank_name = str; + uc_priv->gpio_count = dev_read_u32_default(dev, "ngpios", MPFS_MAX_NUM_GPIO); + + return 0; +} + +static const struct mpfs_gpio_reg_offsets mpfs_reg_offsets = { + .inp = MPFS_INP_REG, + .outp = MPFS_OUTP_REG, +}; + +static const struct mpfs_gpio_reg_offsets coregpio_reg_offsets = { + .inp = COREGPIO_INP_REG, + .outp = COREGPIO_OUTP_REG, +}; + +static const struct udevice_id mchp_gpio_match[] = { + { + .compatible = "microchip,mpfs-gpio", + .data = &mpfs_reg_offsets, + }, { + .compatible = "microchip,coregpio-rtl-v3", + .data = &coregpio_reg_offsets, + }, + { /* end of list */ } +}; + +static const struct dm_gpio_ops mchp_gpio_ops = { + .direction_input = mchp_gpio_direction_input, + .direction_output = mchp_gpio_direction_output, + .get_value = mchp_gpio_get_value, + .set_value = mchp_gpio_set_value, + .get_function = mchp_gpio_get_function, +}; + +static int mchp_gpio_of_to_plat(struct udevice *dev) +{ + struct mchp_gpio_plat *plat = dev_get_plat(dev); + + plat->base = dev_read_addr_ptr(dev); + if (!plat->base) + return -EINVAL; + + return 0; +} + +U_BOOT_DRIVER(gpio_mpfs) = { + .name = "gpio_mpfs", + .id = UCLASS_GPIO, + .of_match = mchp_gpio_match, + .of_to_plat = of_match_ptr(mchp_gpio_of_to_plat), + .plat_auto = sizeof(struct mchp_gpio_plat), + .ops = &mchp_gpio_ops, + .probe = mchp_gpio_probe, +}; diff --git a/drivers/gpio/zynq_gpio.c b/drivers/gpio/zynq_gpio.c index 7db58c70663..ef4f33f84e9 100644 --- a/drivers/gpio/zynq_gpio.c +++ b/drivers/gpio/zynq_gpio.c @@ -184,6 +184,7 @@ static const struct zynq_platform_data zynq_gpio_def = { * pin * @bank_pin_num: an output parameter used to return pin number within a bank * for the given gpio pin + * @dev: Pointer to our device structure. * * Returns the bank number and pin offset within the bank. */ diff --git a/drivers/i2c/Kconfig b/drivers/i2c/Kconfig index 775b2b4e9af..108b24b3dd2 100644 --- a/drivers/i2c/Kconfig +++ b/drivers/i2c/Kconfig @@ -181,6 +181,7 @@ config SYS_I2C_IPROC config SYS_I2C_FSL bool "Freescale I2C bus driver" + depends on M68K || PPC help Add support for Freescale I2C busses as used on MPC8240, MPC8245, and MPC85xx processors. @@ -240,7 +241,7 @@ config SYS_I2C_DW config SYS_I2C_DW_PCI bool "Designware PCI I2C Controller" - depends on SYS_I2C_DW && PCI && ACPIGEN + depends on SYS_I2C_DW && PCI && ACPIGEN && X86 default y help Say yes here to select the Designware PCI I2C Host Controller. @@ -277,6 +278,7 @@ config SYS_I2C_INTEL config SYS_I2C_IMX_LPI2C bool "NXP i.MX LPI2C driver" + depends on MACH_IMX help Add support for the NXP i.MX LPI2C driver. @@ -314,6 +316,7 @@ config SYS_I2C_MICROCHIP config SYS_I2C_MXC bool "NXP MXC I2C driver" + depends on ARCH_LS1021A || FSL_LSCH2 || FSL_LSCH3 || MACH_IMX help Add support for the NXP I2C driver. This supports up to four bus channels and operating on standard mode up to 100 kbits/s and fast @@ -485,7 +488,7 @@ endif config SYS_I2C_NEXELL bool "Nexell I2C driver" - depends on DM_I2C + depends on DM_I2C && ARCH_NEXELL help Add support for the Nexell I2C driver. This is used with various Nexell parts such as S5Pxx18 series SoCs. All chips @@ -494,6 +497,7 @@ config SYS_I2C_NEXELL config SYS_I2C_NPCM bool "Nuvoton NPCM I2C driver" + depends on ARCH_NPCM help Support for Nuvoton I2C controller driver. @@ -533,7 +537,7 @@ config SYS_I2C_RCAR_IIC config SYS_I2C_ROCKCHIP bool "Rockchip I2C driver" - depends on DM_I2C + depends on DM_I2C && ARCH_ROCKCHIP help Add support for the Rockchip I2C driver. This is used with various Rockchip parts such as RK3126, RK3128, RK3036 and RK3288. All chips @@ -751,6 +755,7 @@ config SYS_I2C_MV config SYS_I2C_MVTWSI bool "Marvell I2C driver" + depends on ARCH_KIRKWOOD || ARCH_MVEBU || ARCH_SUNXI help Support for Marvell I2C controllers as used on the orion5x and kirkwood SoC families. diff --git a/drivers/i2c/iproc_i2c.c b/drivers/i2c/iproc_i2c.c index 6570f64fe77..8f94dfe117e 100644 --- a/drivers/i2c/iproc_i2c.c +++ b/drivers/i2c/iproc_i2c.c @@ -8,6 +8,7 @@ #include <asm/io.h> #include <config.h> #include <dm.h> +#include <linux/delay.h> #include <linux/printk.h> #include "errno.h" #include <i2c.h> diff --git a/drivers/i2c/muxes/Kconfig b/drivers/i2c/muxes/Kconfig index cd5579aa55a..65319bb6fd8 100644 --- a/drivers/i2c/muxes/Kconfig +++ b/drivers/i2c/muxes/Kconfig @@ -25,6 +25,13 @@ config I2C_ARB_GPIO_CHALLENGE response mechanism where masters have to claim the bus by asserting a GPIO. +config I2C_MUX_PCA9541 + tristate "NXP PCA9541 I2C Master Selector" + depends on I2C_MUX + help + If you say yes here you get support for the NXP PCA9541 + I2C Master Selector. + config I2C_MUX_PCA954x tristate "TI PCA954x I2C Mux/switches" depends on I2C_MUX diff --git a/drivers/i2c/muxes/Makefile b/drivers/i2c/muxes/Makefile index b690821199f..844d4520e43 100644 --- a/drivers/i2c/muxes/Makefile +++ b/drivers/i2c/muxes/Makefile @@ -3,5 +3,6 @@ # Copyright (c) 2015 Google, Inc obj-$(CONFIG_I2C_ARB_GPIO_CHALLENGE) += i2c-arb-gpio-challenge.o obj-$(CONFIG_I2C_MUX) += i2c-mux-uclass.o +obj-$(CONFIG_I2C_MUX_PCA9541) += pca9541.o obj-$(CONFIG_I2C_MUX_PCA954x) += pca954x.o obj-$(CONFIG_I2C_MUX_GPIO) += i2c-mux-gpio.o diff --git a/drivers/i2c/muxes/pca9541.c b/drivers/i2c/muxes/pca9541.c new file mode 100644 index 00000000000..021088acaee --- /dev/null +++ b/drivers/i2c/muxes/pca9541.c @@ -0,0 +1,297 @@ +// SPDX-License-Identifier: GPL-2.0 +/* + * Copyright (c) 2008-2009 Rodolfo Giometti <giometti@linux.it> + * Copyright (c) 2008-2009 Eurotech S.p.A. <info@eurotech.it> + * Copyright (c) 2010 Ericsson AB. + * Copyright (c) 2025 Advanced Micro Devices, Inc. + */ + +#include <dm.h> +#include <errno.h> +#include <i2c.h> +#include <log.h> +#include <malloc.h> +#include <linux/delay.h> + +/* + * The PCA9541 is a bus master selector. It supports two I2C masters connected + * to a single slave bus. + * + * Before each bus transaction, a master has to acquire bus ownership. After the + * transaction is complete, bus ownership has to be released. This fits well + * into the I2C multiplexer framework, which provides select and release + * functions for this purpose. For this reason, this driver is modeled as + * single-channel I2C bus multiplexer. + * + * This driver assumes that the two bus masters are controlled by two different + * hosts. If a single host controls both masters, platform code has to ensure + * that only one of the masters is instantiated at any given time. + */ + +#define PCA9541_CONTROL 0x01 +#define PCA9541_ISTAT 0x02 + +#define PCA9541_CTL_MYBUS BIT(0) +#define PCA9541_CTL_NMYBUS BIT(1) +#define PCA9541_CTL_BUSON BIT(2) +#define PCA9541_CTL_NBUSON BIT(3) +#define PCA9541_CTL_BUSINIT BIT(4) +#define PCA9541_CTL_TESTON BIT(6) +#define PCA9541_CTL_NTESTON BIT(7) + +#define PCA9541_ISTAT_INTIN BIT(0) +#define PCA9541_ISTAT_BUSINIT BIT(1) +#define PCA9541_ISTAT_BUSOK BIT(2) +#define PCA9541_ISTAT_BUSLOST BIT(3) +#define PCA9541_ISTAT_MYTEST BIT(6) +#define PCA9541_ISTAT_NMYTEST BIT(7) + +#define BUSON (PCA9541_CTL_BUSON | PCA9541_CTL_NBUSON) +#define MYBUS (PCA9541_CTL_MYBUS | PCA9541_CTL_NMYBUS) + +/* arbitration timeouts, in jiffies */ +#define ARB_TIMEOUT_US 125000 /* 125 ms until forcing bus ownership */ +#define ARB2_TIMEOUT_US 250000 /* 250 ms until acquisition failure */ + +/* arbitration retry delays, in us */ +#define SELECT_DELAY_SHORT 50 +#define SELECT_DELAY_LONG 1000 + +struct pca9541_plat { + u32 addr; +}; + +struct pca9541_priv { + u32 addr; + unsigned long select_timeout; + long arb_timeout; +}; + +static inline int mybus(int x) +{ + return !(x & MYBUS) || ((x & MYBUS) == MYBUS); +} + +static inline int busoff(int x) +{ + return !(x & BUSON) || ((x & BUSON) == BUSON); +} + +static int pca9541_reg_write(struct udevice *mux, struct pca9541_priv *client, + u8 command, u8 val) +{ + return dm_i2c_write(mux, command, &val, 1); +} + +static int pca9541_reg_read(struct udevice *mux, struct pca9541_priv *client, + u8 command) +{ + int ret; + uchar byte; + + ret = dm_i2c_read(mux, command, &byte, 1); + + return ret ?: byte; +} + +/* + * Arbitration management functions + */ + +/* Release bus. Also reset NTESTON and BUSINIT if it was set. */ +static void pca9541_release_bus(struct udevice *mux, struct pca9541_priv *client) +{ + int reg; + + reg = pca9541_reg_read(mux, client, PCA9541_CONTROL); + if (reg >= 0 && !busoff(reg) && mybus(reg)) + pca9541_reg_write(mux, client, PCA9541_CONTROL, + (reg & PCA9541_CTL_NBUSON) >> 1); +} + +/* + * Arbitration is defined as a two-step process. A bus master can only activate + * the slave bus if it owns it; otherwise it has to request ownership first. + * This multi-step process ensures that access contention is resolved + * gracefully. + * + * Bus Ownership Other master Action + * state requested access + * ---------------------------------------------------- + * off - yes wait for arbitration timeout or + * for other master to drop request + * off no no take ownership + * off yes no turn on bus + * on yes - done + * on no - wait for arbitration timeout or + * for other master to release bus + * + * The main contention point occurs if the slave bus is off and both masters + * request ownership at the same time. In this case, one master will turn on + * the slave bus, believing that it owns it. The other master will request + * bus ownership. Result is that the bus is turned on, and master which did + * _not_ own the slave bus before ends up owning it. + */ + +/* Control commands per PCA9541 datasheet */ +static const u8 pca9541_control[16] = { + 4, 0, 1, 5, 4, 4, 5, 5, 0, 0, 1, 1, 0, 4, 5, 1 +}; + +/* + * Channel arbitration + * + * Return values: + * <0: error + * 0 : bus not acquired + * 1 : bus acquired + */ +static int pca9541_arbitrate(struct udevice *mux, struct pca9541_priv *client) +{ + int reg, ret = 0; + + reg = pca9541_reg_read(mux, client, PCA9541_CONTROL); + if (reg < 0) + return reg; + + if (busoff(reg)) { + int istat; + + /* + * Bus is off. Request ownership or turn it on unless + * other master requested ownership. + */ + istat = pca9541_reg_read(mux, client, PCA9541_ISTAT); + if (!(istat & PCA9541_ISTAT_NMYTEST) || + client->arb_timeout <= 0) { + /* + * Other master did not request ownership, + * or arbitration timeout expired. Take the bus. + */ + pca9541_reg_write(mux, client, PCA9541_CONTROL, + pca9541_control[reg & 0x0f] + | PCA9541_CTL_NTESTON); + client->select_timeout = SELECT_DELAY_SHORT; + } else { + /* + * Other master requested ownership. + * Set extra long timeout to give it time to acquire it. + */ + client->select_timeout = SELECT_DELAY_LONG * 2; + } + } else if (mybus(reg)) { + /* + * Bus is on, and we own it. We are done with acquisition. + * Reset NTESTON and BUSINIT, then return success. + */ + if (reg & (PCA9541_CTL_NTESTON | PCA9541_CTL_BUSINIT)) + pca9541_reg_write(mux, client, PCA9541_CONTROL, + reg & ~(PCA9541_CTL_NTESTON + | PCA9541_CTL_BUSINIT)); + ret = 1; + } else { + /* + * Other master owns the bus. + * If arbitration timeout has expired, force ownership. + * Otherwise request it. + */ + client->select_timeout = SELECT_DELAY_LONG; + if (client->arb_timeout <= 0) { + /* Time is up, take the bus and reset it. */ + pca9541_reg_write(mux, client, PCA9541_CONTROL, + pca9541_control[reg & 0x0f] + | PCA9541_CTL_BUSINIT + | PCA9541_CTL_NTESTON); + } else { + /* Request bus ownership if needed */ + if (!(reg & PCA9541_CTL_NTESTON)) + pca9541_reg_write(mux, client, PCA9541_CONTROL, + reg | PCA9541_CTL_NTESTON); + } + } + + return ret; +} + +static int pca9541_select_chan(struct udevice *mux, struct udevice *bus, + uint channel) +{ + struct pca9541_priv *priv = dev_get_priv(mux); + int ret; + long timeout = ARB2_TIMEOUT_US; /* Give up after this time */ + + /* Force bus ownership after this time */ + priv->arb_timeout = ARB_TIMEOUT_US; + do { + ret = pca9541_arbitrate(mux, priv); + if (ret) + return ret < 0 ? ret : 0; + + udelay(priv->select_timeout); + timeout -= priv->select_timeout; + priv->arb_timeout -= priv->select_timeout; + } while (timeout > 0); + + debug("I2C Arbitration select timeout\n"); + + return -ETIMEDOUT; +} + +static int pca9541_release_chan(struct udevice *mux, struct udevice *bus, + uint channel) +{ + struct pca9541_priv *priv = dev_get_priv(mux); + + pca9541_release_bus(mux, priv); + + return 0; +} + +/* + * I2C init/probing/exit functions + */ +static int pca9541_of_to_plat(struct udevice *dev) +{ + struct pca9541_plat *plat = dev_get_plat(dev); + + plat->addr = dev_read_u32_default(dev, "reg", 0); + if (!plat->addr) { + debug("Reg property is not found\n"); + return -ENODEV; + } + + debug("Device %s at 0x%x\n", dev->name, plat->addr); + + return 0; +} + +static int pca9541_probe(struct udevice *dev) +{ + struct pca9541_plat *plat = dev_get_plat(dev); + struct pca9541_priv *priv = dev_get_priv(dev); + + priv->addr = plat->addr; + + return 0; +} + +static const struct i2c_mux_ops pca9541_ops = { + .select = pca9541_select_chan, + .deselect = pca9541_release_chan, +}; + +static const struct udevice_id pca9541_ids[] = { + { .compatible = "nxp,pca9541", }, + { } +}; + +U_BOOT_DRIVER(pca9541) = { + .name = "pca9541", + .id = UCLASS_I2C_MUX, + .of_match = pca9541_ids, + .probe = pca9541_probe, + .ops = &pca9541_ops, + .of_to_plat = pca9541_of_to_plat, + .plat_auto = sizeof(struct pca9541_plat), + .priv_auto = sizeof(struct pca9541_priv), +}; diff --git a/drivers/i2c/muxes/pca954x.c b/drivers/i2c/muxes/pca954x.c index 9dd26972703..d13947a0d9c 100644 --- a/drivers/i2c/muxes/pca954x.c +++ b/drivers/i2c/muxes/pca954x.c @@ -22,6 +22,7 @@ enum pca_type { MAX7369, PCA9543, PCA9544, + PCA9545, PCA9546, PCA9547, PCA9548, @@ -79,6 +80,10 @@ static const struct chip_desc chips[] = { .muxtype = pca954x_ismux, .width = 4, }, + [PCA9545] = { + .muxtype = pca954x_isswi, + .width = 4, + }, [PCA9546] = { .muxtype = pca954x_isswi, .width = 4, @@ -141,6 +146,7 @@ static const struct udevice_id pca954x_ids[] = { { .compatible = "maxim,max7369", .data = MAX7369 }, { .compatible = "nxp,pca9543", .data = PCA9543 }, { .compatible = "nxp,pca9544", .data = PCA9544 }, + { .compatible = "nxp,pca9545", .data = PCA9545 }, { .compatible = "nxp,pca9546", .data = PCA9546 }, { .compatible = "nxp,pca9547", .data = PCA9547 }, { .compatible = "nxp,pca9548", .data = PCA9548 }, diff --git a/drivers/input/Kconfig b/drivers/input/Kconfig index c09f0ae795e..47ce0ea690f 100644 --- a/drivers/input/Kconfig +++ b/drivers/input/Kconfig @@ -98,6 +98,7 @@ config I8042_KEYB config TEGRA_KEYBOARD bool "NVIDIA Tegra internal matrix keyboard controller support" + depends on ARCH_TEGRA help A matrix keyboard connected directly to the internal keyboard controller on Tegra SoCs. diff --git a/drivers/misc/Kconfig b/drivers/misc/Kconfig index cbc45ed7b97..0f753b9dbb9 100644 --- a/drivers/misc/Kconfig +++ b/drivers/misc/Kconfig @@ -290,40 +290,10 @@ config CROS_EC_SPI provides a faster and more robust interface than I2C but the bugs are less interesting. -config DS4510 - bool "Enable support for DS4510 CPU supervisor" - help - Enable support for the Maxim DS4510 CPU supervisor. It has an - integrated 64-byte EEPROM, four programmable non-volatile I/O pins - and a configurable timer for the supervisor function. The device is - connected over I2C. - config FSL_IIM bool "Enable FSL IC Identification Module (IIM) driver" depends on ARCH_MX5 -config FSL_SEC_MON - bool "Enable FSL SEC_MON Driver" - help - Freescale Security Monitor block is responsible for monitoring - system states. - Security Monitor can be transitioned on any security failures, - like software violations or hardware security violations. - -choice - prompt "Security monitor interaction endianess" - depends on FSL_SEC_MON - default SYS_FSL_SEC_MON_BE if PPC - default SYS_FSL_SEC_MON_LE - -config SYS_FSL_SEC_MON_LE - bool "Security monitor interactions are little endian" - -config SYS_FSL_SEC_MON_BE - bool "Security monitor interactions are big endian" - -endchoice - config IRQ bool "Interrupt controller" help @@ -458,19 +428,6 @@ config SPL_PWRSEQ device. When the device is started up, its power sequence can be initiated. -config PCA9551_LED - bool "Enable PCA9551 LED driver" - help - Enable driver for PCA9551 LED controller. This controller - is connected via I2C. So I2C needs to be enabled. - -config PCA9551_I2C_ADDR - hex "I2C address of PCA9551 LED controller" - depends on PCA9551_LED - default 0x60 - help - The I2C address of the PCA9551 LED controller. - config STM32MP_FUSE bool "Enable STM32MP fuse wrapper providing the fuse API" depends on ARCH_STM32MP && MISC @@ -672,7 +629,7 @@ config GDSYS_SOC config IHS_FPGA bool "Enable IHS FPGA driver" - depends on MISC + depends on MISC && (GDSYS_LEGACY_DRIVERS || SYS_FPGA_FLAVOR_GAZERBEAM) help Support IHS (Integrated Hardware Systems) FPGA, the main FPGAs on gdsys devices, which supply the majority of the functionality offered diff --git a/drivers/misc/Makefile b/drivers/misc/Makefile index 279dbcbdd30..f7422c8e95a 100644 --- a/drivers/misc/Makefile +++ b/drivers/misc/Makefile @@ -32,7 +32,6 @@ endif obj-$(CONFIG_ALTERA_SYSID) += altera_sysid.o obj-$(CONFIG_ATSHA204A) += atsha204a-i2c.o obj-$(CONFIG_CBMEM_CONSOLE) += cbmem_console.o -obj-$(CONFIG_DS4510) += ds4510.o obj-$(CONFIG_FSL_DEVICE_DISABLE) += fsl_devdis.o obj-$(CONFIG_FSL_IFC) += fsl_ifc.o obj-$(CONFIG_FSL_IIM) += fsl_iim.o @@ -59,7 +58,6 @@ obj-$(CONFIG_NPCM_OTP) += npcm_otp.o obj-$(CONFIG_NPCM_HOST) += npcm_host_intf.o obj-$(CONFIG_NUVOTON_NCT6102D) += nuvoton_nct6102d.o obj-$(CONFIG_P2SB) += p2sb-uclass.o -obj-$(CONFIG_PCA9551_LED) += pca9551_led.o obj-$(CONFIG_$(PHASE_)PWRSEQ) += pwrseq-uclass.o ifdef CONFIG_QFW obj-y += qfw.o diff --git a/drivers/misc/ds4510.c b/drivers/misc/ds4510.c deleted file mode 100644 index 302015e2793..00000000000 --- a/drivers/misc/ds4510.c +++ /dev/null @@ -1,379 +0,0 @@ -// SPDX-License-Identifier: GPL-2.0 -/* - * Copyright 2008 Extreme Engineering Solutions, Inc. - */ - -/* - * Driver for DS4510, a CPU supervisor with integrated EEPROM, SRAM, - * and 4 programmable non-volatile GPIO pins. - */ - -#include <i2c.h> -#include <command.h> -#include <linux/delay.h> -#include "ds4510.h" - -enum { - DS4510_CMD_INFO, - DS4510_CMD_DEVICE, - DS4510_CMD_NV, - DS4510_CMD_RSTDELAY, - DS4510_CMD_OUTPUT, - DS4510_CMD_INPUT, - DS4510_CMD_PULLUP, - DS4510_CMD_EEPROM, - DS4510_CMD_SEEPROM, - DS4510_CMD_SRAM, -}; - -/* - * Write to DS4510, taking page boundaries into account - */ -static int ds4510_mem_write(uint8_t chip, int offset, uint8_t *buf, int count) -{ - int wrlen; - int i = 0; - - do { - wrlen = DS4510_EEPROM_PAGE_SIZE - - DS4510_EEPROM_PAGE_OFFSET(offset); - if (count < wrlen) - wrlen = count; - if (i2c_write(chip, offset, 1, &buf[i], wrlen)) - return -1; - - /* - * This delay isn't needed for SRAM writes but shouldn't delay - * things too much, so do it unconditionally for simplicity - */ - udelay(DS4510_EEPROM_PAGE_WRITE_DELAY_MS * 1000); - count -= wrlen; - offset += wrlen; - i += wrlen; - } while (count > 0); - - return 0; -} - -/* - * General read from DS4510 - */ -static int ds4510_mem_read(uint8_t chip, int offset, uint8_t *buf, int count) -{ - return i2c_read(chip, offset, 1, buf, count); -} - -/* - * Write SEE bit in config register. - * nv = 0 - Writes to SEEPROM registers behave like EEPROM - * nv = 1 - Writes to SEEPROM registers behave like SRAM - */ -static int ds4510_see_write(uint8_t chip, uint8_t nv) -{ - uint8_t data; - - if (i2c_read(chip, DS4510_CFG, 1, &data, 1)) - return -1; - - if (nv) /* Treat SEEPROM bits as EEPROM */ - data &= ~DS4510_CFG_SEE; - else /* Treat SEEPROM bits as SRAM */ - data |= DS4510_CFG_SEE; - - return ds4510_mem_write(chip, DS4510_CFG, &data, 1); -} - -/* - * Write de-assertion of reset signal delay - */ -static int ds4510_rstdelay_write(uint8_t chip, uint8_t delay) -{ - uint8_t data; - - if (i2c_read(chip, DS4510_RSTDELAY, 1, &data, 1)) - return -1; - - data &= ~DS4510_RSTDELAY_MASK; - data |= delay & DS4510_RSTDELAY_MASK; - - return ds4510_mem_write(chip, DS4510_RSTDELAY, &data, 1); -} - -/* - * Write pullup characteristics of IO pins - */ -static int ds4510_pullup_write(uint8_t chip, uint8_t val) -{ - val &= DS4510_IO_MASK; - - return ds4510_mem_write(chip, DS4510_PULLUP, (uint8_t *)&val, 1); -} - -/* - * Read pullup characteristics of IO pins - */ -static int ds4510_pullup_read(uint8_t chip) -{ - uint8_t val; - - if (i2c_read(chip, DS4510_PULLUP, 1, &val, 1)) - return -1; - - return val & DS4510_IO_MASK; -} - -/* - * Write drive level of IO pins - */ -static int ds4510_gpio_write(uint8_t chip, uint8_t val) -{ - uint8_t data; - int i; - - for (i = 0; i < DS4510_NUM_IO; i++) { - if (i2c_read(chip, DS4510_IO0 - i, 1, &data, 1)) - return -1; - - if (val & (0x1 << i)) - data |= 0x1; - else - data &= ~0x1; - - if (ds4510_mem_write(chip, DS4510_IO0 - i, &data, 1)) - return -1; - } - - return 0; -} - -/* - * Read drive level of IO pins - */ -static int ds4510_gpio_read(uint8_t chip) -{ - uint8_t data; - int val = 0; - int i; - - for (i = 0; i < DS4510_NUM_IO; i++) { - if (i2c_read(chip, DS4510_IO0 - i, 1, &data, 1)) - return -1; - - if (data & 1) - val |= (1 << i); - } - - return val; -} - -/* - * Read physical level of IO pins - */ -static int ds4510_gpio_read_val(uint8_t chip) -{ - uint8_t val; - - if (i2c_read(chip, DS4510_IO_STATUS, 1, &val, 1)) - return -1; - - return val & DS4510_IO_MASK; -} - -/* - * Display DS4510 information - */ -static int ds4510_info(uint8_t chip) -{ - int i; - int tmp; - uint8_t data; - - printf("DS4510 @ 0x%x:\n\n", chip); - - if (i2c_read(chip, DS4510_RSTDELAY, 1, &data, 1)) - return -1; - printf("rstdelay = 0x%x\n\n", data & DS4510_RSTDELAY_MASK); - - if (i2c_read(chip, DS4510_CFG, 1, &data, 1)) - return -1; - printf("config = 0x%x\n", data); - printf(" /ready = %d\n", data & DS4510_CFG_READY ? 1 : 0); - printf(" trip pt = %d\n", data & DS4510_CFG_TRIP_POINT ? 1 : 0); - printf(" rst sts = %d\n", data & DS4510_CFG_RESET ? 1 : 0); - printf(" /see = %d\n", data & DS4510_CFG_SEE ? 1 : 0); - printf(" swrst = %d\n\n", data & DS4510_CFG_SWRST ? 1 : 0); - - printf("gpio pins: 3210\n"); - printf("---------------\n"); - printf("pullup "); - - tmp = ds4510_pullup_read(chip); - if (tmp == -1) - return tmp; - for (i = DS4510_NUM_IO - 1; i >= 0; i--) - printf("%d", (tmp & (1 << i)) ? 1 : 0); - printf("\n"); - - printf("driven "); - tmp = ds4510_gpio_read(chip); - if (tmp == -1) - return -1; - for (i = DS4510_NUM_IO - 1; i >= 0; i--) - printf("%d", (tmp & (1 << i)) ? 1 : 0); - printf("\n"); - - printf("read "); - tmp = ds4510_gpio_read_val(chip); - if (tmp == -1) - return -1; - for (i = DS4510_NUM_IO - 1; i >= 0; i--) - printf("%d", (tmp & (1 << i)) ? 1 : 0); - printf("\n"); - - return 0; -} - -struct cmd_tbl cmd_ds4510[] = { - U_BOOT_CMD_MKENT(device, 3, 0, (void *)DS4510_CMD_DEVICE, "", ""), - U_BOOT_CMD_MKENT(nv, 3, 0, (void *)DS4510_CMD_NV, "", ""), - U_BOOT_CMD_MKENT(output, 4, 0, (void *)DS4510_CMD_OUTPUT, "", ""), - U_BOOT_CMD_MKENT(input, 3, 0, (void *)DS4510_CMD_INPUT, "", ""), - U_BOOT_CMD_MKENT(pullup, 4, 0, (void *)DS4510_CMD_PULLUP, "", ""), - U_BOOT_CMD_MKENT(info, 2, 0, (void *)DS4510_CMD_INFO, "", ""), - U_BOOT_CMD_MKENT(rstdelay, 3, 0, (void *)DS4510_CMD_RSTDELAY, "", ""), - U_BOOT_CMD_MKENT(eeprom, 6, 0, (void *)DS4510_CMD_EEPROM, "", ""), - U_BOOT_CMD_MKENT(seeprom, 6, 0, (void *)DS4510_CMD_SEEPROM, "", ""), - U_BOOT_CMD_MKENT(sram, 6, 0, (void *)DS4510_CMD_SRAM, "", ""), -}; - -int do_ds4510(struct cmd_tbl *cmdtp, int flag, int argc, char *const argv[]) -{ - static uint8_t chip = 0x51; - struct cmd_tbl *c; - ulong ul_arg2 = 0; - ulong ul_arg3 = 0; - int tmp; - ulong addr; - ulong off; - ulong cnt; - int end; - int (*rw_func)(uint8_t, int, uint8_t *, int); - - c = find_cmd_tbl(argv[1], cmd_ds4510, ARRAY_SIZE(cmd_ds4510)); - - /* All commands but "device" require 'maxargs' arguments */ - if (!c || !((argc == (c->maxargs)) || - (((int)c->cmd == DS4510_CMD_DEVICE) && - (argc == (c->maxargs - 1))))) { - return cmd_usage(cmdtp); - } - - /* arg2 used as chip addr and pin number */ - if (argc > 2) - ul_arg2 = hextoul(argv[2], NULL); - - /* arg3 used as output/pullup value */ - if (argc > 3) - ul_arg3 = hextoul(argv[3], NULL); - - switch ((int)c->cmd) { - case DS4510_CMD_DEVICE: - if (argc == 3) - chip = ul_arg2; - printf("Current device address: 0x%x\n", chip); - return 0; - case DS4510_CMD_NV: - return ds4510_see_write(chip, ul_arg2); - case DS4510_CMD_OUTPUT: - tmp = ds4510_gpio_read(chip); - if (tmp == -1) - return -1; - if (ul_arg3) - tmp |= (1 << ul_arg2); - else - tmp &= ~(1 << ul_arg2); - return ds4510_gpio_write(chip, tmp); - case DS4510_CMD_INPUT: - tmp = ds4510_gpio_read_val(chip); - if (tmp == -1) - return -1; - return (tmp & (1 << ul_arg2)) != 0; - case DS4510_CMD_PULLUP: - tmp = ds4510_pullup_read(chip); - if (tmp == -1) - return -1; - if (ul_arg3) - tmp |= (1 << ul_arg2); - else - tmp &= ~(1 << ul_arg2); - return ds4510_pullup_write(chip, tmp); - case DS4510_CMD_INFO: - return ds4510_info(chip); - case DS4510_CMD_RSTDELAY: - return ds4510_rstdelay_write(chip, ul_arg2); - case DS4510_CMD_EEPROM: - end = DS4510_EEPROM + DS4510_EEPROM_SIZE; - off = DS4510_EEPROM; - break; - case DS4510_CMD_SEEPROM: - end = DS4510_SEEPROM + DS4510_SEEPROM_SIZE; - off = DS4510_SEEPROM; - break; - case DS4510_CMD_SRAM: - end = DS4510_SRAM + DS4510_SRAM_SIZE; - off = DS4510_SRAM; - break; - default: - /* We should never get here... */ - return 1; - } - - /* Only eeprom, seeprom, and sram commands should make it here */ - if (strcmp(argv[2], "read") == 0) - rw_func = ds4510_mem_read; - else if (strcmp(argv[2], "write") == 0) - rw_func = ds4510_mem_write; - else - return cmd_usage(cmdtp); - - addr = hextoul(argv[3], NULL); - off += hextoul(argv[4], NULL); - cnt = hextoul(argv[5], NULL); - - if ((off + cnt) > end) { - printf("ERROR: invalid len\n"); - return -1; - } - - return rw_func(chip, off, (uint8_t *)addr, cnt); -} - -U_BOOT_CMD( - ds4510, 6, 1, do_ds4510, - "ds4510 eeprom/seeprom/sram/gpio access", - "device [dev]\n" - " - show or set current device address\n" - "ds4510 info\n" - " - display ds4510 info\n" - "ds4510 output pin 0|1\n" - " - set pin low or high-Z\n" - "ds4510 input pin\n" - " - read value of pin\n" - "ds4510 pullup pin 0|1\n" - " - disable/enable pullup on specified pin\n" - "ds4510 nv 0|1\n" - " - make gpio and seeprom writes volatile/non-volatile" - "\n" - "ds4510 rstdelay 0-3\n" - " - set reset output delay" - "\n" - "ds4510 eeprom read addr off cnt\n" - "ds4510 eeprom write addr off cnt\n" - " - read/write 'cnt' bytes at EEPROM offset 'off'\n" - "ds4510 seeprom read addr off cnt\n" - "ds4510 seeprom write addr off cnt\n" - " - read/write 'cnt' bytes at SRAM-shadowed EEPROM offset 'off'\n" - "ds4510 sram read addr off cnt\n" - "ds4510 sram write addr off cnt\n" - " - read/write 'cnt' bytes at SRAM offset 'off'" -); diff --git a/drivers/misc/ds4510.h b/drivers/misc/ds4510.h deleted file mode 100644 index 5c7a1a8c737..00000000000 --- a/drivers/misc/ds4510.h +++ /dev/null @@ -1,52 +0,0 @@ -/* SPDX-License-Identifier: GPL-2.0 */ -/* - * Copyright 2008 Extreme Engineering Solutions, Inc. - */ - -#ifndef __DS4510_H_ -#define __DS4510_H_ - -/* General defines */ -#define DS4510_NUM_IO 0x04 -#define DS4510_IO_MASK ((1 << DS4510_NUM_IO) - 1) -#define DS4510_EEPROM_PAGE_WRITE_DELAY_MS 20 - -/* EEPROM from 0x00 - 0x39 */ -#define DS4510_EEPROM 0x00 -#define DS4510_EEPROM_SIZE 0x40 -#define DS4510_EEPROM_PAGE_SIZE 0x08 -#define DS4510_EEPROM_PAGE_OFFSET(x) ((x) & (DS4510_EEPROM_PAGE_SIZE - 1)) - -/* SEEPROM from 0xf0 - 0xf7 */ -#define DS4510_SEEPROM 0xf0 -#define DS4510_SEEPROM_SIZE 0x08 - -/* Registers overlapping SEEPROM from 0xf0 - 0xf7 */ -#define DS4510_PULLUP 0xF0 -#define DS4510_PULLUP_DIS 0x00 -#define DS4510_PULLUP_EN 0x01 -#define DS4510_RSTDELAY 0xF1 -#define DS4510_RSTDELAY_MASK 0x03 -#define DS4510_RSTDELAY_125 0x00 -#define DS4510_RSTDELAY_250 0x01 -#define DS4510_RSTDELAY_500 0x02 -#define DS4510_RSTDELAY_1000 0x03 -#define DS4510_IO3 0xF4 -#define DS4510_IO2 0xF5 -#define DS4510_IO1 0xF6 -#define DS4510_IO0 0xF7 - -/* Status configuration registers from 0xf8 - 0xf9*/ -#define DS4510_IO_STATUS 0xF8 -#define DS4510_CFG 0xF9 -#define DS4510_CFG_READY 0x80 -#define DS4510_CFG_TRIP_POINT 0x40 -#define DS4510_CFG_RESET 0x20 -#define DS4510_CFG_SEE 0x10 -#define DS4510_CFG_SWRST 0x08 - -/* SRAM from 0xfa - 0xff */ -#define DS4510_SRAM 0xfa -#define DS4510_SRAM_SIZE 0x06 - -#endif /* __DS4510_H_ */ diff --git a/drivers/misc/pca9551_led.c b/drivers/misc/pca9551_led.c deleted file mode 100644 index 040d0d5cf48..00000000000 --- a/drivers/misc/pca9551_led.c +++ /dev/null @@ -1,170 +0,0 @@ -// SPDX-License-Identifier: GPL-2.0+ -/* - * Copyright (C) 2015 Stefan Roese <sr@denx.de> - */ - -#include <errno.h> -#include <i2c.h> -#include <status_led.h> - -#ifndef CONFIG_PCA9551_I2C_ADDR -#error "CONFIG_PCA9551_I2C_ADDR not defined!" -#endif - -#define PCA9551_REG_INPUT 0x00 /* Input register (read only) */ -#define PCA9551_REG_PSC0 0x01 /* Frequency prescaler 0 */ -#define PCA9551_REG_PWM0 0x02 /* PWM0 */ -#define PCA9551_REG_PSC1 0x03 /* Frequency prescaler 1 */ -#define PCA9551_REG_PWM1 0x04 /* PWM1 */ -#define PCA9551_REG_LS0 0x05 /* LED0 to LED3 selector */ -#define PCA9551_REG_LS1 0x06 /* LED4 to LED7 selector */ - -#define PCA9551_CTRL_AI (1 << 4) /* Auto-increment flag */ - -#define PCA9551_LED_STATE_ON 0x00 -#define PCA9551_LED_STATE_OFF 0x01 -#define PCA9551_LED_STATE_BLINK0 0x02 -#define PCA9551_LED_STATE_BLINK1 0x03 - -struct pca9551_blink_rate { - u8 psc; /* Frequency preescaler, see PCA9551_7.pdf p. 6 */ - u8 pwm; /* Pulse width modulation, see PCA9551_7.pdf p. 6 */ -}; - -static int freq_last = -1; -static int mask_last = -1; -static int idx_last = -1; -static int mode_last; - -static int pca9551_led_get_state(int led, int *state) -{ - unsigned int reg; - u8 shift, buf; - int ret; - - if (led < 0 || led > 7) { - return -EINVAL; - } else if (led < 4) { - reg = PCA9551_REG_LS0; - shift = led << 1; - } else { - reg = PCA9551_REG_LS1; - shift = (led - 4) << 1; - } - - ret = i2c_read(CONFIG_PCA9551_I2C_ADDR, reg, 1, &buf, 1); - if (ret) - return ret; - - *state = (buf >> shift) & 0x03; - return 0; -} - -static int pca9551_led_set_state(int led, int state) -{ - unsigned int reg; - u8 shift, buf, mask; - int ret; - - if (led < 0 || led > 7) { - return -EINVAL; - } else if (led < 4) { - reg = PCA9551_REG_LS0; - shift = led << 1; - } else { - reg = PCA9551_REG_LS1; - shift = (led - 4) << 1; - } - mask = 0x03 << shift; - - ret = i2c_read(CONFIG_PCA9551_I2C_ADDR, reg, 1, &buf, 1); - if (ret) - return ret; - - buf = (buf & ~mask) | ((state & 0x03) << shift); - - ret = i2c_write(CONFIG_PCA9551_I2C_ADDR, reg, 1, &buf, 1); - if (ret) - return ret; - - return 0; -} - -static int pca9551_led_set_blink_rate(int idx, struct pca9551_blink_rate rate) -{ - unsigned int reg; - int ret; - - switch (idx) { - case 0: - reg = PCA9551_REG_PSC0; - break; - case 1: - reg = PCA9551_REG_PSC1; - break; - default: - return -EINVAL; - } - reg |= PCA9551_CTRL_AI; - - ret = i2c_write(CONFIG_PCA9551_I2C_ADDR, reg, 1, (u8 *)&rate, 2); - if (ret) - return ret; - - return 0; -} - -/* - * Functions referenced by cmd_led.c or status_led.c - */ -void __led_init(led_id_t id, int state) -{ -} - -void __led_set(led_id_t mask, int state) -{ - if (state == CONFIG_LED_STATUS_OFF) - pca9551_led_set_state(mask, PCA9551_LED_STATE_OFF); - else - pca9551_led_set_state(mask, PCA9551_LED_STATE_ON); -} - -void __led_toggle(led_id_t mask) -{ - int state = 0; - - pca9551_led_get_state(mask, &state); - pca9551_led_set_state(mask, !state); -} - -void __led_blink(led_id_t mask, int freq) -{ - struct pca9551_blink_rate rate; - int mode; - int idx; - - if ((freq == freq_last) || (mask == mask_last)) { - idx = idx_last; - mode = mode_last; - } else { - /* Toggle blink index */ - if (idx_last == 0) { - idx = 1; - mode = PCA9551_LED_STATE_BLINK1; - } else { - idx = 0; - mode = PCA9551_LED_STATE_BLINK0; - } - - idx_last = idx; - mode_last = mode; - } - freq_last = freq; - mask_last = mask; - - rate.psc = ((freq * 38) / 1000) - 1; - rate.pwm = 128; /* 50% duty cycle */ - - pca9551_led_set_blink_rate(idx, rate); - pca9551_led_set_state(mask, mode); -} diff --git a/drivers/mmc/Kconfig b/drivers/mmc/Kconfig index 1c9b6898bff..4c46df0ffb8 100644 --- a/drivers/mmc/Kconfig +++ b/drivers/mmc/Kconfig @@ -284,7 +284,7 @@ config MMC_DW_K3 config MMC_DW_ROCKCHIP bool "Rockchip SD/MMC controller support" - depends on OF_CONTROL + depends on OF_CONTROL && ARCH_ROCKCHIP depends on MMC_DW help This enables support for the Rockchip SD/MMM controller, which is @@ -333,15 +333,6 @@ config MMC_MESON_GX help Support for EMMC host controller on Meson GX ARM SoCs platform (S905) -config MMC_MXC - bool "Freescale i.MX21/27/31 or MPC512x Multimedia Card support" - help - This selects the Freescale i.MX21, i.MX27, i.MX31 or MPC512x - Multimedia Card Interface. If you have an i.MX or MPC512x platform - with a Multimedia Card slot, say Y here. - - If unsure, say N. - config MMC_OWL bool "Actions OWL Multimedia Card Interface support" depends on ARCH_OWL @@ -391,6 +382,7 @@ config MVEBU_MMC config MMC_OMAP_HS bool "TI OMAP High Speed Multimedia Card Interface support" + depends on ARCH_KEYSTONE || ARCH_OMAP2PLUS select DM_REGULATOR_PBIAS if DM_REGULATOR help This selects the TI OMAP High Speed Multimedia card Interface. @@ -597,7 +589,7 @@ config MMC_SDHCI_BCM2835 config MMC_SDHCI_BCMSTB tristate "SDHCI support for the BCMSTB SD/MMC Controller" - depends on MMC_SDHCI + depends on MMC_SDHCI && (ARCH_BCMSTB || ARCH_BCM283X) help This selects the Broadcom set-top box SD/MMC controller. @@ -660,19 +652,9 @@ config MMC_SDHCI_F_SDH30 If you have a controller with this interface, say Y here. If unsure, say N. -config MMC_SDHCI_KONA - bool "SDHCI support on Broadcom KONA platform" - depends on MMC_SDHCI - help - This selects the Broadcom Kona Secure Digital Host Controller - Interface(SDHCI) support. - This is used in Broadcom mobile SoCs. - - If you have a controller with this interface, say Y here. - config MMC_SDHCI_MSM bool "Qualcomm SDHCI controller" - depends on MMC_SDHCI + depends on MMC_SDHCI && ARCH_SNAPDRAGON help Enables support for SDHCI 2.0 controller present on some Qualcomm Snapdragon devices. This device is compatible with eMMC v4.5 and @@ -718,7 +700,7 @@ config MMC_SDHCI_ROCKCHIP config MMC_SDHCI_S5P bool "SDHCI support on Samsung S5P SoC" - depends on MMC_SDHCI + depends on MMC_SDHCI && S5P help This selects the Secure Digital Host Controller Interface (SDHCI) on Samsung S5P SoCs. @@ -740,7 +722,7 @@ config MMC_SDHCI_SNPS config MMC_SDHCI_STI bool "SDHCI support for STMicroelectronics SoC" - depends on MMC_SDHCI && OF_CONTROL + depends on MMC_SDHCI && OF_CONTROL && ARCH_STI help This selects the Secure Digital Host Controller Interface (SDHCI) on STMicroelectronics STiH410 SoC. @@ -794,6 +776,7 @@ config TEGRA124_MMC_DISABLE_EXT_LOOPBACK config MMC_SDHCI_ZYNQ bool "Arasan SDHCI controller support" depends on OF_CONTROL + depends on ARCH_VERSAL || ARCH_VERSAL_NET || ARCH_VERSAL2 || ARCH_ZYNQ || ARCH_ZYNQMP depends on MMC_SDHCI help Support for Arasan SDHCI host controller on Zynq/ZynqMP ARM SoCs platform @@ -852,7 +835,7 @@ config GENERIC_ATMEL_MCI config STM32_SDMMC2 bool "STMicroelectronics STM32H7 SD/MMC Host Controller support" - depends on OF_CONTROL + depends on OF_CONTROL && (ARCH_STM32 || ARCH_STM32MP) help This selects support for the SD/MMC controller on STM32H7 SoCs. If you have a board based on such a SoC and with a SD/MMC slot, @@ -886,6 +869,7 @@ config FSL_SDHC_V2_3 config FSL_ESDHC bool "Freescale/NXP eSDHC controller support" + depends on ARCH_LS1021A || FSL_LSCH2 || FSL_LSCH3 || PPC select FSL_SDHC_V2_3 if ARCH_P1010 || ARCH_BSC9131 || ARCH_BSC9132 \ || ARCH_C29X help @@ -938,6 +922,7 @@ config ESDHCI_QUIRK_BROKEN_TIMEOUT_VALUE config FSL_ESDHC_IMX bool "Freescale/NXP i.MX eSDHC controller support" + depends on MACH_IMX help This selects support for the i.MX eSDHC (Enhanced Secure Digital Host Controller) found on numerous Freescale/NXP SoCs. diff --git a/drivers/mmc/Makefile b/drivers/mmc/Makefile index 360706f53d2..a23336d7d8d 100644 --- a/drivers/mmc/Makefile +++ b/drivers/mmc/Makefile @@ -41,7 +41,6 @@ obj-$(CONFIG_MMC_MESON_GX) += meson_gx_mmc.o obj-$(CONFIG_MMC_SPI) += mmc_spi.o obj-$(CONFIG_MVEBU_MMC) += mvebu_mmc.o obj-$(CONFIG_MMC_OMAP_HS) += omap_hsmmc.o -obj-$(CONFIG_MMC_MXC) += mxcmmc.o obj-$(CONFIG_MMC_MXS) += mxsmmc.o obj-$(CONFIG_MMC_OCTEONTX) += octeontx_hsmmc.o obj-$(CONFIG_MMC_OWL) += owl_mmc.o @@ -64,7 +63,6 @@ obj-$(CONFIG_MMC_SDHCI_CADENCE) += sdhci-cadence6.o obj-$(CONFIG_MMC_SDHCI_CV1800B) += cv1800b_sdhci.o obj-$(CONFIG_MMC_SDHCI_AM654) += am654_sdhci.o obj-$(CONFIG_MMC_SDHCI_IPROC) += iproc_sdhci.o -obj-$(CONFIG_MMC_SDHCI_KONA) += kona_sdhci.o obj-$(CONFIG_MMC_SDHCI_MSM) += msm_sdhci.o obj-$(CONFIG_MMC_SDHCI_MV) += mv_sdhci.o obj-$(CONFIG_MMC_SDHCI_NPCM) += npcm_sdhci.o diff --git a/drivers/mmc/exynos_dw_mmc.c b/drivers/mmc/exynos_dw_mmc.c index c8bf89d6d35..12e37cb4b78 100644 --- a/drivers/mmc/exynos_dw_mmc.c +++ b/drivers/mmc/exynos_dw_mmc.c @@ -373,6 +373,12 @@ static const struct udevice_id exynos_dwmmc_ids[] = { .compatible = "samsung,exynos4412-dw-mshc", .data = (ulong)&exynos4_drv_data, }, { + .compatible = "samsung,exynos5420-dw-mshc-smu", + .data = (ulong)&exynos5_drv_data, + }, { + .compatible = "samsung,exynos5420-dw-mshc", + .data = (ulong)&exynos5_drv_data, + }, { .compatible = "samsung,exynos-dwmmc", .data = (ulong)&exynos5_drv_data, }, { diff --git a/drivers/mmc/kona_sdhci.c b/drivers/mmc/kona_sdhci.c deleted file mode 100644 index 83f14122632..00000000000 --- a/drivers/mmc/kona_sdhci.c +++ /dev/null @@ -1,132 +0,0 @@ -// SPDX-License-Identifier: GPL-2.0+ -/* - * Copyright 2013 Broadcom Corporation. - */ - -#include <malloc.h> -#include <sdhci.h> -#include <linux/delay.h> -#include <linux/errno.h> -#include <asm/kona-common/clk.h> - -#define SDHCI_CORECTRL_OFFSET 0x00008000 -#define SDHCI_CORECTRL_EN 0x01 -#define SDHCI_CORECTRL_RESET 0x02 - -#define SDHCI_CORESTAT_OFFSET 0x00008004 -#define SDHCI_CORESTAT_CD_SW 0x01 - -#define SDHCI_COREIMR_OFFSET 0x00008008 -#define SDHCI_COREIMR_IP 0x01 - -static int init_kona_mmc_core(struct sdhci_host *host) -{ - unsigned int mask; - unsigned int timeout; - - if (sdhci_readb(host, SDHCI_SOFTWARE_RESET) & SDHCI_RESET_ALL) { - printf("%s: sd host controller reset error\n", __func__); - return -EBUSY; - } - - /* For kona a hardware reset before anything else. */ - mask = sdhci_readl(host, SDHCI_CORECTRL_OFFSET) | SDHCI_CORECTRL_RESET; - sdhci_writel(host, mask, SDHCI_CORECTRL_OFFSET); - - /* Wait max 100 ms */ - timeout = 1000; - do { - if (timeout == 0) { - printf("%s: reset timeout error\n", __func__); - return -ETIMEDOUT; - } - timeout--; - udelay(100); - } while (0 == - (sdhci_readl(host, SDHCI_CORECTRL_OFFSET) & - SDHCI_CORECTRL_RESET)); - - /* Clear the reset bit. */ - mask = mask & ~SDHCI_CORECTRL_RESET; - sdhci_writel(host, mask, SDHCI_CORECTRL_OFFSET); - - /* Enable AHB clock */ - mask = sdhci_readl(host, SDHCI_CORECTRL_OFFSET); - sdhci_writel(host, mask | SDHCI_CORECTRL_EN, SDHCI_CORECTRL_OFFSET); - - /* Enable interrupts */ - sdhci_writel(host, SDHCI_COREIMR_IP, SDHCI_COREIMR_OFFSET); - - /* Make sure Card is detected in controller */ - mask = sdhci_readl(host, SDHCI_CORESTAT_OFFSET); - sdhci_writel(host, mask | SDHCI_CORESTAT_CD_SW, SDHCI_CORESTAT_OFFSET); - - /* Wait max 100 ms */ - timeout = 1000; - while (!(sdhci_readl(host, SDHCI_PRESENT_STATE) & SDHCI_CARD_PRESENT)) { - if (timeout == 0) { - printf("%s: CARD DETECT timeout error\n", __func__); - return -ETIMEDOUT; - } - timeout--; - udelay(100); - } - return 0; -} - -int kona_sdhci_init(int dev_index, u32 min_clk, u32 quirks) -{ - int ret = 0; - u32 max_clk; - void *reg_base; - struct sdhci_host *host = NULL; - - host = (struct sdhci_host *)malloc(sizeof(struct sdhci_host)); - if (!host) { - printf("%s: sdhci host malloc fail!\n", __func__); - return -ENOMEM; - } - switch (dev_index) { - case 0: - reg_base = (void *)CONFIG_SYS_SDIO_BASE0; - ret = clk_sdio_enable(reg_base, CONFIG_SYS_SDIO0_MAX_CLK, - &max_clk); - break; - case 1: - reg_base = (void *)CONFIG_SYS_SDIO_BASE1; - ret = clk_sdio_enable(reg_base, CONFIG_SYS_SDIO1_MAX_CLK, - &max_clk); - break; - case 2: - reg_base = (void *)CONFIG_SYS_SDIO_BASE2; - ret = clk_sdio_enable(reg_base, CONFIG_SYS_SDIO2_MAX_CLK, - &max_clk); - break; - case 3: - reg_base = (void *)CONFIG_SYS_SDIO_BASE3; - ret = clk_sdio_enable(reg_base, CONFIG_SYS_SDIO3_MAX_CLK, - &max_clk); - break; - default: - printf("%s: sdio dev index %d not supported\n", - __func__, dev_index); - ret = -EINVAL; - } - if (ret) { - free(host); - return ret; - } - - host->name = "kona-sdhci"; - host->ioaddr = reg_base; - host->quirks = quirks; - host->max_clk = max_clk; - - if (init_kona_mmc_core(host)) { - free(host); - return -EINVAL; - } - - add_sdhci(host, 0, min_clk); - return ret; -} diff --git a/drivers/mmc/mmc.c b/drivers/mmc/mmc.c index 2c1f4f9c336..5f2efbe6df9 100644 --- a/drivers/mmc/mmc.c +++ b/drivers/mmc/mmc.c @@ -2365,8 +2365,10 @@ static int mmc_startup_v4(struct mmc *mmc) return -ENOMEM; memcpy(mmc->ext_csd, ext_csd, MMC_MAX_BLOCK_LEN); #endif - if (ext_csd[EXT_CSD_REV] >= ARRAY_SIZE(mmc_versions)) - return -EINVAL; + if (ext_csd[EXT_CSD_REV] >= ARRAY_SIZE(mmc_versions)) { + err = -EINVAL; + goto error; + } mmc->version = mmc_versions[ext_csd[EXT_CSD_REV]]; diff --git a/drivers/mmc/mmc_write.c b/drivers/mmc/mmc_write.c index 90fcf2679bb..928c05872ca 100644 --- a/drivers/mmc/mmc_write.c +++ b/drivers/mmc/mmc_write.c @@ -155,6 +155,7 @@ static ulong mmc_write_blocks(struct mmc *mmc, lbaint_t start, struct mmc_cmd cmd; struct mmc_data data; int timeout_ms = 1000; + int err; if ((start + blkcnt) > mmc_get_blk_desc(mmc)->lba) { printf("MMC: block number 0x" LBAF " exceeds max(0x" LBAF ")\n", @@ -181,9 +182,13 @@ static ulong mmc_write_blocks(struct mmc *mmc, lbaint_t start, data.blocksize = mmc->write_bl_len; data.flags = MMC_DATA_WRITE; - if (mmc_send_cmd(mmc, &cmd, &data)) { + err = mmc_send_cmd(mmc, &cmd, &data); + if (err) { printf("mmc write failed\n"); - return 0; + /* + * Don't return 0 here since the emmc will still be in data + * transfer mode continue to send the STOP_TRANSMISSION command + */ } /* SPI multiblock writes terminate using a special @@ -203,6 +208,9 @@ static ulong mmc_write_blocks(struct mmc *mmc, lbaint_t start, if (mmc_poll_for_busy(mmc, timeout_ms)) return 0; + if (err) + return 0; + return blkcnt; } diff --git a/drivers/mmc/mxcmmc.c b/drivers/mmc/mxcmmc.c deleted file mode 100644 index 1acea6f820b..00000000000 --- a/drivers/mmc/mxcmmc.c +++ /dev/null @@ -1,523 +0,0 @@ -/* - * This is a driver for the SDHC controller found in Freescale MX2/MX3 - * SoCs. It is basically the same hardware as found on MX1 (imxmmc.c). - * Unlike the hardware found on MX1, this hardware just works and does - * not need all the quirks found in imxmmc.c, hence the seperate driver. - * - * Copyright (C) 2009 Ilya Yanok, <yanok@emcraft.com> - * Copyright (C) 2008 Sascha Hauer, Pengutronix <s.hauer@pengutronix.de> - * Copyright (C) 2006 Pavel Pisa, PiKRON <ppisa@pikron.com> - * - * derived from pxamci.c by Russell King - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License version 2 as - * published by the Free Software Foundation. - * - */ - -#include <config.h> -#include <command.h> -#include <mmc.h> -#include <part.h> -#include <malloc.h> -#include <mmc.h> -#include <time.h> -#include <linux/errno.h> -#include <asm/io.h> -#include <asm/arch/clock.h> - -#define DRIVER_NAME "mxc-mmc" - -struct mxcmci_regs { - u32 str_stp_clk; - u32 status; - u32 clk_rate; - u32 cmd_dat_cont; - u32 res_to; - u32 read_to; - u32 blk_len; - u32 nob; - u32 rev_no; - u32 int_cntr; - u32 cmd; - u32 arg; - u32 pad; - u32 res_fifo; - u32 buffer_access; -}; - -#define STR_STP_CLK_RESET (1 << 3) -#define STR_STP_CLK_START_CLK (1 << 1) -#define STR_STP_CLK_STOP_CLK (1 << 0) - -#define STATUS_CARD_INSERTION (1 << 31) -#define STATUS_CARD_REMOVAL (1 << 30) -#define STATUS_YBUF_EMPTY (1 << 29) -#define STATUS_XBUF_EMPTY (1 << 28) -#define STATUS_YBUF_FULL (1 << 27) -#define STATUS_XBUF_FULL (1 << 26) -#define STATUS_BUF_UND_RUN (1 << 25) -#define STATUS_BUF_OVFL (1 << 24) -#define STATUS_SDIO_INT_ACTIVE (1 << 14) -#define STATUS_END_CMD_RESP (1 << 13) -#define STATUS_WRITE_OP_DONE (1 << 12) -#define STATUS_DATA_TRANS_DONE (1 << 11) -#define STATUS_READ_OP_DONE (1 << 11) -#define STATUS_WR_CRC_ERROR_CODE_MASK (3 << 10) -#define STATUS_CARD_BUS_CLK_RUN (1 << 8) -#define STATUS_BUF_READ_RDY (1 << 7) -#define STATUS_BUF_WRITE_RDY (1 << 6) -#define STATUS_RESP_CRC_ERR (1 << 5) -#define STATUS_CRC_READ_ERR (1 << 3) -#define STATUS_CRC_WRITE_ERR (1 << 2) -#define STATUS_TIME_OUT_RESP (1 << 1) -#define STATUS_TIME_OUT_READ (1 << 0) -#define STATUS_ERR_MASK 0x2f - -#define CMD_DAT_CONT_CMD_RESP_LONG_OFF (1 << 12) -#define CMD_DAT_CONT_STOP_READWAIT (1 << 11) -#define CMD_DAT_CONT_START_READWAIT (1 << 10) -#define CMD_DAT_CONT_BUS_WIDTH_4 (2 << 8) -#define CMD_DAT_CONT_INIT (1 << 7) -#define CMD_DAT_CONT_WRITE (1 << 4) -#define CMD_DAT_CONT_DATA_ENABLE (1 << 3) -#define CMD_DAT_CONT_RESPONSE_48BIT_CRC (1 << 0) -#define CMD_DAT_CONT_RESPONSE_136BIT (2 << 0) -#define CMD_DAT_CONT_RESPONSE_48BIT (3 << 0) - -#define INT_SDIO_INT_WKP_EN (1 << 18) -#define INT_CARD_INSERTION_WKP_EN (1 << 17) -#define INT_CARD_REMOVAL_WKP_EN (1 << 16) -#define INT_CARD_INSERTION_EN (1 << 15) -#define INT_CARD_REMOVAL_EN (1 << 14) -#define INT_SDIO_IRQ_EN (1 << 13) -#define INT_DAT0_EN (1 << 12) -#define INT_BUF_READ_EN (1 << 4) -#define INT_BUF_WRITE_EN (1 << 3) -#define INT_END_CMD_RES_EN (1 << 2) -#define INT_WRITE_OP_DONE_EN (1 << 1) -#define INT_READ_OP_EN (1 << 0) - -struct mxcmci_host { - struct mmc *mmc; - struct mxcmci_regs *base; - int irq; - int detect_irq; - int dma; - int do_dma; - unsigned int power_mode; - - struct mmc_cmd *cmd; - struct mmc_data *data; - - unsigned int dma_nents; - unsigned int datasize; - unsigned int dma_dir; - - u16 rev_no; - unsigned int cmdat; - - int clock; -}; - -static struct mxcmci_host mxcmci_host; - -/* maintainer note: do we really want to have a global host pointer? */ -static struct mxcmci_host *host = &mxcmci_host; - -static inline int mxcmci_use_dma(struct mxcmci_host *host) -{ - return host->do_dma; -} - -static void mxcmci_softreset(struct mxcmci_host *host) -{ - int i; - - /* reset sequence */ - writel(STR_STP_CLK_RESET, &host->base->str_stp_clk); - writel(STR_STP_CLK_RESET | STR_STP_CLK_START_CLK, - &host->base->str_stp_clk); - - for (i = 0; i < 8; i++) - writel(STR_STP_CLK_START_CLK, &host->base->str_stp_clk); - - writel(0xff, &host->base->res_to); -} - -static void mxcmci_setup_data(struct mxcmci_host *host, struct mmc_data *data) -{ - unsigned int nob = data->blocks; - unsigned int blksz = data->blocksize; - unsigned int datasize = nob * blksz; - - host->data = data; - - writel(nob, &host->base->nob); - writel(blksz, &host->base->blk_len); - host->datasize = datasize; -} - -static int mxcmci_start_cmd(struct mxcmci_host *host, struct mmc_cmd *cmd, - unsigned int cmdat) -{ - if (host->cmd != NULL) - printf("mxcmci: error!\n"); - host->cmd = cmd; - - switch (cmd->resp_type) { - case MMC_RSP_R1: /* short CRC, OPCODE */ - case MMC_RSP_R1b:/* short CRC, OPCODE, BUSY */ - cmdat |= CMD_DAT_CONT_RESPONSE_48BIT_CRC; - break; - case MMC_RSP_R2: /* long 136 bit + CRC */ - cmdat |= CMD_DAT_CONT_RESPONSE_136BIT; - break; - case MMC_RSP_R3: /* short */ - cmdat |= CMD_DAT_CONT_RESPONSE_48BIT; - break; - case MMC_RSP_NONE: - break; - default: - printf("mxcmci: unhandled response type 0x%x\n", - cmd->resp_type); - return -EINVAL; - } - - writel(cmd->cmdidx, &host->base->cmd); - writel(cmd->cmdarg, &host->base->arg); - writel(cmdat, &host->base->cmd_dat_cont); - - return 0; -} - -static void mxcmci_finish_request(struct mxcmci_host *host, - struct mmc_cmd *cmd, struct mmc_data *data) -{ - host->cmd = NULL; - host->data = NULL; -} - -static int mxcmci_finish_data(struct mxcmci_host *host, unsigned int stat) -{ - int data_error = 0; - - if (stat & STATUS_ERR_MASK) { - printf("request failed. status: 0x%08x\n", - stat); - if (stat & STATUS_CRC_READ_ERR) { - data_error = -EILSEQ; - } else if (stat & STATUS_CRC_WRITE_ERR) { - u32 err_code = (stat >> 9) & 0x3; - if (err_code == 2) /* No CRC response */ - data_error = -ETIMEDOUT; - else - data_error = -EILSEQ; - } else if (stat & STATUS_TIME_OUT_READ) { - data_error = -ETIMEDOUT; - } else { - data_error = -EIO; - } - } - - host->data = NULL; - - return data_error; -} - -static int mxcmci_read_response(struct mxcmci_host *host, unsigned int stat) -{ - struct mmc_cmd *cmd = host->cmd; - int i; - u32 a, b, c; - u32 *resp = (u32 *)cmd->response; - - if (!cmd) - return 0; - - if (stat & STATUS_TIME_OUT_RESP) { - printf("CMD TIMEOUT\n"); - return -ETIMEDOUT; - } else if (stat & STATUS_RESP_CRC_ERR && cmd->resp_type & MMC_RSP_CRC) { - printf("cmd crc error\n"); - return -EILSEQ; - } - - if (cmd->resp_type & MMC_RSP_PRESENT) { - if (cmd->resp_type & MMC_RSP_136) { - for (i = 0; i < 4; i++) { - a = readl(&host->base->res_fifo) & 0xFFFF; - b = readl(&host->base->res_fifo) & 0xFFFF; - resp[i] = a << 16 | b; - } - } else { - a = readl(&host->base->res_fifo) & 0xFFFF; - b = readl(&host->base->res_fifo) & 0xFFFF; - c = readl(&host->base->res_fifo) & 0xFFFF; - resp[0] = a << 24 | b << 8 | c >> 8; - } - } - return 0; -} - -static int mxcmci_poll_status(struct mxcmci_host *host, u32 mask) -{ - u32 stat; - unsigned long timeout = get_ticks() + CONFIG_SYS_HZ; - - do { - stat = readl(&host->base->status); - if (stat & STATUS_ERR_MASK) - return stat; - if (timeout < get_ticks()) - return STATUS_TIME_OUT_READ; - if (stat & mask) - return 0; - } while (1); -} - -static int mxcmci_pull(struct mxcmci_host *host, void *_buf, int bytes) -{ - unsigned int stat; - u32 *buf = _buf; - - while (bytes > 3) { - stat = mxcmci_poll_status(host, - STATUS_BUF_READ_RDY | STATUS_READ_OP_DONE); - if (stat) - return stat; - *buf++ = readl(&host->base->buffer_access); - bytes -= 4; - } - - if (bytes) { - u8 *b = (u8 *)buf; - u32 tmp; - - stat = mxcmci_poll_status(host, - STATUS_BUF_READ_RDY | STATUS_READ_OP_DONE); - if (stat) - return stat; - tmp = readl(&host->base->buffer_access); - memcpy(b, &tmp, bytes); - } - - return 0; -} - -static int mxcmci_push(struct mxcmci_host *host, const void *_buf, int bytes) -{ - unsigned int stat; - const u32 *buf = _buf; - - while (bytes > 3) { - stat = mxcmci_poll_status(host, STATUS_BUF_WRITE_RDY); - if (stat) - return stat; - writel(*buf++, &host->base->buffer_access); - bytes -= 4; - } - - if (bytes) { - const u8 *b = (u8 *)buf; - u32 tmp; - - stat = mxcmci_poll_status(host, STATUS_BUF_WRITE_RDY); - if (stat) - return stat; - - memcpy(&tmp, b, bytes); - writel(tmp, &host->base->buffer_access); - } - - stat = mxcmci_poll_status(host, STATUS_BUF_WRITE_RDY); - if (stat) - return stat; - - return 0; -} - -static int mxcmci_transfer_data(struct mxcmci_host *host) -{ - struct mmc_data *data = host->data; - int stat; - unsigned long length; - - length = data->blocks * data->blocksize; - host->datasize = 0; - - if (data->flags & MMC_DATA_READ) { - stat = mxcmci_pull(host, data->dest, length); - if (stat) - return stat; - host->datasize += length; - } else { - stat = mxcmci_push(host, (const void *)(data->src), length); - if (stat) - return stat; - host->datasize += length; - stat = mxcmci_poll_status(host, STATUS_WRITE_OP_DONE); - if (stat) - return stat; - } - return 0; -} - -static int mxcmci_cmd_done(struct mxcmci_host *host, unsigned int stat) -{ - int datastat; - int ret; - - ret = mxcmci_read_response(host, stat); - - if (ret) { - mxcmci_finish_request(host, host->cmd, host->data); - return ret; - } - - if (!host->data) { - mxcmci_finish_request(host, host->cmd, host->data); - return 0; - } - - datastat = mxcmci_transfer_data(host); - ret = mxcmci_finish_data(host, datastat); - mxcmci_finish_request(host, host->cmd, host->data); - return ret; -} - -static int mxcmci_request(struct mmc *mmc, struct mmc_cmd *cmd, - struct mmc_data *data) -{ - struct mxcmci_host *host = mmc->priv; - unsigned int cmdat = host->cmdat; - u32 stat; - int ret; - - host->cmdat &= ~CMD_DAT_CONT_INIT; - if (data) { - mxcmci_setup_data(host, data); - - cmdat |= CMD_DAT_CONT_DATA_ENABLE; - - if (data->flags & MMC_DATA_WRITE) - cmdat |= CMD_DAT_CONT_WRITE; - } - - if ((ret = mxcmci_start_cmd(host, cmd, cmdat))) { - mxcmci_finish_request(host, cmd, data); - return ret; - } - - do { - stat = readl(&host->base->status); - writel(stat, &host->base->status); - } while (!(stat & STATUS_END_CMD_RESP)); - - return mxcmci_cmd_done(host, stat); -} - -static void mxcmci_set_clk_rate(struct mxcmci_host *host, unsigned int clk_ios) -{ - unsigned int divider; - int prescaler = 0; - unsigned long clk_in = mxc_get_clock(MXC_ESDHC_CLK); - - while (prescaler <= 0x800) { - for (divider = 1; divider <= 0xF; divider++) { - int x; - - x = (clk_in / (divider + 1)); - - if (prescaler) - x /= (prescaler * 2); - - if (x <= clk_ios) - break; - } - if (divider < 0x10) - break; - - if (prescaler == 0) - prescaler = 1; - else - prescaler <<= 1; - } - - writel((prescaler << 4) | divider, &host->base->clk_rate); -} - -static int mxcmci_set_ios(struct mmc *mmc) -{ - struct mxcmci_host *host = mmc->priv; - if (mmc->bus_width == 4) - host->cmdat |= CMD_DAT_CONT_BUS_WIDTH_4; - else - host->cmdat &= ~CMD_DAT_CONT_BUS_WIDTH_4; - - if (mmc->clock) { - mxcmci_set_clk_rate(host, mmc->clock); - writel(STR_STP_CLK_START_CLK, &host->base->str_stp_clk); - } else { - writel(STR_STP_CLK_STOP_CLK, &host->base->str_stp_clk); - } - - host->clock = mmc->clock; - - return 0; -} - -static int mxcmci_init(struct mmc *mmc) -{ - struct mxcmci_host *host = mmc->priv; - - mxcmci_softreset(host); - - host->rev_no = readl(&host->base->rev_no); - if (host->rev_no != 0x400) { - printf("wrong rev.no. 0x%08x. aborting.\n", - host->rev_no); - return -ENODEV; - } - - /* recommended in data sheet */ - writel(0x2db4, &host->base->read_to); - - writel(0, &host->base->int_cntr); - - return 0; -} - -static const struct mmc_ops mxcmci_ops = { - .send_cmd = mxcmci_request, - .set_ios = mxcmci_set_ios, - .init = mxcmci_init, -}; - -static struct mmc_config mxcmci_cfg = { - .name = "MXC MCI", - .ops = &mxcmci_ops, - .host_caps = MMC_MODE_4BIT, - .voltages = MMC_VDD_32_33 | MMC_VDD_33_34, - .b_max = CONFIG_SYS_MMC_MAX_BLK_COUNT, -}; - -static int mxcmci_initialize(struct bd_info *bis) -{ - host->base = (struct mxcmci_regs *)CONFIG_MXC_MCI_REGS_BASE; - - mxcmci_cfg.f_min = mxc_get_clock(MXC_ESDHC_CLK) >> 7; - mxcmci_cfg.f_max = mxc_get_clock(MXC_ESDHC_CLK) >> 1; - - host->mmc = mmc_create(&mxcmci_cfg, host); - if (host->mmc == NULL) - return -1; - - return 0; -} - -int mxc_mmc_init(struct bd_info *bis) -{ - return mxcmci_initialize(bis); -} diff --git a/drivers/mmc/s5p_sdhci.c b/drivers/mmc/s5p_sdhci.c index 278019f02ab..c80033d8752 100644 --- a/drivers/mmc/s5p_sdhci.c +++ b/drivers/mmc/s5p_sdhci.c @@ -141,14 +141,6 @@ static int do_sdhci_init(struct sdhci_host *host) } } - if (dm_gpio_is_valid(&host->cd_gpio)) { - ret = dm_gpio_get_value(&host->cd_gpio); - if (ret) { - debug("no SD card detected (%d)\n", ret); - return -ENODEV; - } - } - return s5p_sdhci_core_init(host); } @@ -183,8 +175,6 @@ static int sdhci_get_config(const void *blob, int node, struct sdhci_host *host) gpio_request_by_name_nodev(offset_to_ofnode(node), "pwr-gpios", 0, &host->pwr_gpio, GPIOD_IS_OUT); - gpio_request_by_name_nodev(offset_to_ofnode(node), "cd-gpios", 0, - &host->cd_gpio, GPIOD_IS_IN); return 0; } @@ -236,6 +226,7 @@ static int s5p_sdhci_bind(struct udevice *dev) static const struct udevice_id s5p_sdhci_ids[] = { { .compatible = "samsung,exynos4412-sdhci"}, + { .compatible = "samsung,exynos4210-sdhci"}, { } }; diff --git a/drivers/net/Kconfig b/drivers/net/Kconfig index 950ed0f25a9..d942fa4e202 100644 --- a/drivers/net/Kconfig +++ b/drivers/net/Kconfig @@ -411,6 +411,14 @@ config ETH_DESIGNWARE_S700 This provides glue layer to use Synopsys Designware Ethernet MAC present on Actions S700 SoC. +config ETH_DESIGNWARE_THEAD + bool "T-Head glue driver for Synopsys Designware Ethernet MAC" + depends on ETH_DESIGNWARE + select DW_ALTDESCRIPTOR + help + This provides glue layer to use Synopsys Designware Ethernet MAC + present on T-Head SoCs. + config DW_ALTDESCRIPTOR bool "Designware Ethernet MAC uses alternate (enhanced) descriptors" depends on ETH_DESIGNWARE diff --git a/drivers/net/Makefile b/drivers/net/Makefile index 67bba3a8536..79cc8b422b0 100644 --- a/drivers/net/Makefile +++ b/drivers/net/Makefile @@ -38,6 +38,7 @@ obj-$(CONFIG_ETH_DESIGNWARE) += designware.o obj-$(CONFIG_ETH_DESIGNWARE_MESON8B) += dwmac_meson8b.o obj-$(CONFIG_ETH_DESIGNWARE_S700) += dwmac_s700.o obj-$(CONFIG_ETH_DESIGNWARE_SOCFPGA) += dwmac_socfpga.o +obj-$(CONFIG_ETH_DESIGNWARE_THEAD) += dwmac_thead.o obj-$(CONFIG_ETH_SANDBOX) += sandbox.o obj-$(CONFIG_ETH_SANDBOX_RAW) += sandbox-raw-bus.o obj-$(CONFIG_ETH_SANDBOX_RAW) += sandbox-raw.o diff --git a/drivers/net/dwmac_thead.c b/drivers/net/dwmac_thead.c new file mode 100644 index 00000000000..138d71a6202 --- /dev/null +++ b/drivers/net/dwmac_thead.c @@ -0,0 +1,288 @@ +// SPDX-License-Identifier: GPL-2.0 +/* + * T-HEAD DWMAC platform driver + * + * Copyright (C) 2021 Alibaba Group Holding Limited. + * Copyright (C) 2023 Jisheng Zhang <jszhang@kernel.org> + * Copyright (C) 2025 Yao Zi <ziyao@disroot.org> + * + */ + +#include <asm/io.h> +#include <clk.h> +#include <dm.h> +#include <linux/bitfield.h> +#include <phy.h> + +#include "designware.h" + +#define GMAC_CLK_EN 0x00 +#define GMAC_TX_CLK_EN BIT(1) +#define GMAC_TX_CLK_N_EN BIT(2) +#define GMAC_TX_CLK_OUT_EN BIT(3) +#define GMAC_RX_CLK_EN BIT(4) +#define GMAC_RX_CLK_N_EN BIT(5) +#define GMAC_EPHY_REF_CLK_EN BIT(6) +#define GMAC_RXCLK_DELAY_CTRL 0x04 +#define GMAC_RXCLK_BYPASS BIT(15) +#define GMAC_RXCLK_INVERT BIT(14) +#define GMAC_RXCLK_DELAY GENMASK(4, 0) +#define GMAC_TXCLK_DELAY_CTRL 0x08 +#define GMAC_TXCLK_BYPASS BIT(15) +#define GMAC_TXCLK_INVERT BIT(14) +#define GMAC_TXCLK_DELAY GENMASK(4, 0) +#define GMAC_PLLCLK_DIV 0x0c +#define GMAC_PLLCLK_DIV_EN BIT(31) +#define GMAC_PLLCLK_DIV_NUM GENMASK(7, 0) +#define GMAC_GTXCLK_SEL 0x18 +#define GMAC_GTXCLK_SEL_PLL BIT(0) +#define GMAC_INTF_CTRL 0x1c +#define PHY_INTF_MASK BIT(0) +#define PHY_INTF_RGMII FIELD_PREP(PHY_INTF_MASK, 1) +#define PHY_INTF_MII_GMII FIELD_PREP(PHY_INTF_MASK, 0) +#define GMAC_TXCLK_OEN 0x20 +#define TXCLK_DIR_MASK BIT(0) +#define TXCLK_DIR_OUTPUT FIELD_PREP(TXCLK_DIR_MASK, 0) +#define TXCLK_DIR_INPUT FIELD_PREP(TXCLK_DIR_MASK, 1) + +#define GMAC_RGMII_CLK_RATE 125000000 + +struct dwmac_thead_plat { + struct dw_eth_pdata dw_eth_pdata; + void __iomem *apb_base; +}; + +static int dwmac_thead_set_phy_if(struct dwmac_thead_plat *plat) +{ + u32 phyif; + + switch (plat->dw_eth_pdata.eth_pdata.phy_interface) { + case PHY_INTERFACE_MODE_MII: + phyif = PHY_INTF_MII_GMII; + break; + case PHY_INTERFACE_MODE_RGMII: + case PHY_INTERFACE_MODE_RGMII_ID: + case PHY_INTERFACE_MODE_RGMII_TXID: + case PHY_INTERFACE_MODE_RGMII_RXID: + phyif = PHY_INTF_RGMII; + break; + default: + return -EINVAL; + } + + writel(phyif, plat->apb_base + GMAC_INTF_CTRL); + return 0; +} + +static int dwmac_thead_set_txclk_dir(struct dwmac_thead_plat *plat) +{ + u32 txclk_dir; + + switch (plat->dw_eth_pdata.eth_pdata.phy_interface) { + case PHY_INTERFACE_MODE_MII: + txclk_dir = TXCLK_DIR_INPUT; + break; + case PHY_INTERFACE_MODE_RGMII: + case PHY_INTERFACE_MODE_RGMII_ID: + case PHY_INTERFACE_MODE_RGMII_TXID: + case PHY_INTERFACE_MODE_RGMII_RXID: + txclk_dir = TXCLK_DIR_OUTPUT; + break; + default: + return -EINVAL; + } + + writel(txclk_dir, plat->apb_base + GMAC_TXCLK_OEN); + return 0; +} + +static unsigned long dwmac_thead_rgmii_tx_rate(int speed) +{ + switch (speed) { + case 10: + return 2500000; + case 100: + return 25000000; + case 1000: + return 125000000; + } + + return -EINVAL; +} + +static int dwmac_thead_set_clk_tx_rate(struct dwmac_thead_plat *plat, + struct dw_eth_dev *edev, + unsigned long tx_rate) +{ + unsigned long rate; + u32 div, reg; + + rate = clk_get_rate(&edev->clocks[0]); + + writel(0, plat->apb_base + GMAC_PLLCLK_DIV); + + div = rate / tx_rate; + if (rate != tx_rate * div) { + pr_err("invalid gmac rate %lu\n", rate); + return -EINVAL; + } + + reg = FIELD_PREP(GMAC_PLLCLK_DIV_EN, 1) | + FIELD_PREP(GMAC_PLLCLK_DIV_NUM, div); + writel(reg, plat->apb_base + GMAC_PLLCLK_DIV); + + return 0; +} + +static int dwmac_thead_enable_clk(struct dwmac_thead_plat *plat) +{ + u32 reg; + + switch (plat->dw_eth_pdata.eth_pdata.phy_interface) { + case PHY_INTERFACE_MODE_MII: + reg = GMAC_RX_CLK_EN | GMAC_TX_CLK_EN; + break; + + case PHY_INTERFACE_MODE_RGMII: + case PHY_INTERFACE_MODE_RGMII_ID: + case PHY_INTERFACE_MODE_RGMII_RXID: + case PHY_INTERFACE_MODE_RGMII_TXID: + /* use pll */ + writel(GMAC_GTXCLK_SEL_PLL, plat->apb_base + GMAC_GTXCLK_SEL); + reg = GMAC_TX_CLK_EN | GMAC_TX_CLK_N_EN | GMAC_TX_CLK_OUT_EN | + GMAC_RX_CLK_EN | GMAC_RX_CLK_N_EN; + break; + + default: + return -EINVAL; + } + + writel(reg, plat->apb_base + GMAC_CLK_EN); + return 0; +} + +static int dwmac_thead_eth_start(struct udevice *dev) +{ + struct dwmac_thead_plat *plat = dev_get_plat(dev); + struct dw_eth_dev *edev = dev_get_priv(dev); + phy_interface_t interface; + bool is_rgmii; + long tx_rate; + int ret; + + interface = plat->dw_eth_pdata.eth_pdata.phy_interface; + is_rgmii = (interface == PHY_INTERFACE_MODE_RGMII) | + (interface == PHY_INTERFACE_MODE_RGMII_ID) | + (interface == PHY_INTERFACE_MODE_RGMII_RXID) | + (interface == PHY_INTERFACE_MODE_RGMII_TXID); + + /* + * When operating in RGMII mode, the TX clock is generated by an + * internal divider and fed to the MAC. Configure and enable it before + * initializing the MAC. + */ + if (is_rgmii) { + ret = dwmac_thead_set_clk_tx_rate(plat, edev, + GMAC_RGMII_CLK_RATE); + if (ret) + return ret; + } + + ret = designware_eth_init(edev, plat->dw_eth_pdata.eth_pdata.enetaddr); + if (ret) + return ret; + + if (is_rgmii) { + tx_rate = dwmac_thead_rgmii_tx_rate(edev->phydev->speed); + if (tx_rate < 0) + return tx_rate; + + ret = dwmac_thead_set_clk_tx_rate(plat, edev, tx_rate); + if (ret) + return ret; + } + + ret = designware_eth_enable(edev); + if (ret) + return ret; + + return 0; +} + +static int dwmac_thead_probe(struct udevice *dev) +{ + struct dwmac_thead_plat *plat = dev_get_plat(dev); + unsigned int reg; + int ret; + + ret = designware_eth_probe(dev); + if (ret) + return ret; + + ret = dwmac_thead_set_phy_if(plat); + if (ret) { + pr_err("failed to set phy interface: %d\n", ret); + return ret; + } + + ret = dwmac_thead_set_txclk_dir(plat); + if (ret) { + pr_err("failed to set TX clock direction: %d\n", ret); + return ret; + } + + reg = readl(plat->apb_base + GMAC_RXCLK_DELAY_CTRL); + reg &= ~(GMAC_RXCLK_DELAY); + reg |= FIELD_PREP(GMAC_RXCLK_DELAY, 0); + writel(reg, plat->apb_base + GMAC_RXCLK_DELAY_CTRL); + + reg = readl(plat->apb_base + GMAC_TXCLK_DELAY_CTRL); + reg &= ~(GMAC_TXCLK_DELAY); + reg |= FIELD_PREP(GMAC_TXCLK_DELAY, 0); + writel(reg, plat->apb_base + GMAC_TXCLK_DELAY_CTRL); + + ret = dwmac_thead_enable_clk(plat); + if (ret) + pr_err("failed to enable clock: %d\n", ret); + + return ret; +} + +static int dwmac_thead_of_to_plat(struct udevice *dev) +{ + struct dwmac_thead_plat *pdata = dev_get_plat(dev); + + pdata->apb_base = dev_read_addr_index_ptr(dev, 1); + if (!pdata->apb_base) { + pr_err("failed to get apb registers\n"); + return -ENOENT; + } + + return designware_eth_of_to_plat(dev); +} + +static const struct eth_ops dwmac_thead_eth_ops = { + .start = dwmac_thead_eth_start, + .send = designware_eth_send, + .recv = designware_eth_recv, + .free_pkt = designware_eth_free_pkt, + .stop = designware_eth_stop, + .write_hwaddr = designware_eth_write_hwaddr, +}; + +static const struct udevice_id dwmac_thead_match[] = { + { .compatible = "thead,th1520-gmac" }, + { /* sentinel */ } +}; + +U_BOOT_DRIVER(dwmac_thead) = { + .name = "dwmac_thead", + .id = UCLASS_ETH, + .of_match = dwmac_thead_match, + .of_to_plat = dwmac_thead_of_to_plat, + .probe = dwmac_thead_probe, + .ops = &dwmac_thead_eth_ops, + .priv_auto = sizeof(struct dw_eth_dev), + .plat_auto = sizeof(struct dwmac_thead_plat), + .flags = DM_FLAG_ALLOC_PRIV_DMA, +}; diff --git a/drivers/net/sandbox-raw-bus.c b/drivers/net/sandbox-raw-bus.c index 15670d6d24a..c698a07c784 100644 --- a/drivers/net/sandbox-raw-bus.c +++ b/drivers/net/sandbox-raw-bus.c @@ -42,7 +42,7 @@ static int eth_raw_bus_post_bind(struct udevice *dev) device_probe(child); priv = dev_get_priv(child); if (priv) { - strcpy(priv->host_ifname, i->if_name); + strlcpy(priv->host_ifname, i->if_name, IFNAMSIZ); priv->host_ifindex = i->if_index; priv->local = local; } diff --git a/drivers/net/xilinx_axi_mrmac.c b/drivers/net/xilinx_axi_mrmac.c index 555651937f8..56f877c20a6 100644 --- a/drivers/net/xilinx_axi_mrmac.c +++ b/drivers/net/xilinx_axi_mrmac.c @@ -346,7 +346,7 @@ static bool isrxready(struct axi_mrmac_priv *priv) * axi_mrmac_recv - MRMAC Rx function * @dev: udevice structure * @flags: flags from network stack - * @packetp pointer to received data + * @packetp: pointer to received data * * Return: received data length on success, negative value on errors * @@ -399,7 +399,7 @@ static int axi_mrmac_recv(struct udevice *dev, int flags, uchar **packetp) * axi_mrmac_free_pkt - MRMAC free packet function * @dev: udevice structure * @packet: receive buffer pointer - * @length received data length + * @length: received data length * * Return: 0 on success, negative value on errors * diff --git a/drivers/phy/Kconfig b/drivers/phy/Kconfig index d3fe90d939e..c297fa03ea7 100644 --- a/drivers/phy/Kconfig +++ b/drivers/phy/Kconfig @@ -259,6 +259,15 @@ config MT76X8_USB_PHY This PHY is found on MT76x8 devices supporting USB. +config PHY_EXYNOS_USBDRD + bool "Exynos SoC series USB DRD PHY driver" + depends on PHY && CLK + depends on ARCH_EXYNOS + select REGMAP + select SYSCON + help + Enable USB DRD PHY support for Exynos SoC series. + config PHY_MTK_TPHY bool "MediaTek T-PHY Driver" depends on PHY diff --git a/drivers/phy/Makefile b/drivers/phy/Makefile index b4d01fc700d..98c1ef8683b 100644 --- a/drivers/phy/Makefile +++ b/drivers/phy/Makefile @@ -35,6 +35,7 @@ obj-$(CONFIG_KEYSTONE_USB_PHY) += keystone-usb-phy.o obj-$(CONFIG_MT7620_USB_PHY) += mt7620-usb-phy.o obj-$(CONFIG_MT76X8_USB_PHY) += mt76x8-usb-phy.o obj-$(CONFIG_PHY_DA8XX_USB) += phy-da8xx-usb.o +obj-$(CONFIG_PHY_EXYNOS_USBDRD) += phy-exynos-usbdrd.o obj-$(CONFIG_PHY_MTK_TPHY) += phy-mtk-tphy.o obj-$(CONFIG_PHY_NPCM_USB) += phy-npcm-usb.o obj-$(CONFIG_PHY_IMX8MQ_USB) += phy-imx8mq-usb.o diff --git a/drivers/phy/phy-exynos-usbdrd.c b/drivers/phy/phy-exynos-usbdrd.c new file mode 100644 index 00000000000..db5815ed184 --- /dev/null +++ b/drivers/phy/phy-exynos-usbdrd.c @@ -0,0 +1,386 @@ +// SPDX-License-Identifier: GPL-2.0-only +/* + * Copyright (C) 2025 Linaro Ltd. + * Sam Protsenko <semen.protsenko@linaro.org> + * + * Samsung Exynos SoC series USB DRD PHY driver. + * Based on Linux kernel PHY driver: drivers/phy/samsung/phy-exynos5-usbdrd.c + */ + +#include <clk.h> +#include <dm.h> +#include <generic-phy.h> +#include <regmap.h> +#include <syscon.h> +#include <asm/io.h> +#include <dm/device_compat.h> +#include <linux/bitfield.h> +#include <linux/bitops.h> +#include <linux/delay.h> + +/* Offset of PMU register controlling USB PHY output isolation */ +#define EXYNOS_USBDRD_PHY_CONTROL 0x0704 +#define EXYNOS_PHY_ENABLE BIT(0) + +/* Exynos USB PHY registers */ +#define EXYNOS5_FSEL_9MHZ6 0x0 +#define EXYNOS5_FSEL_10MHZ 0x1 +#define EXYNOS5_FSEL_12MHZ 0x2 +#define EXYNOS5_FSEL_19MHZ2 0x3 +#define EXYNOS5_FSEL_20MHZ 0x4 +#define EXYNOS5_FSEL_24MHZ 0x5 +#define EXYNOS5_FSEL_26MHZ 0x6 +#define EXYNOS5_FSEL_50MHZ 0x7 + +/* Exynos850: USB DRD PHY registers */ +#define EXYNOS850_DRD_LINKCTRL 0x04 +#define LINKCTRL_FORCE_QACT BIT(8) +#define LINKCTRL_BUS_FILTER_BYPASS GENMASK(7, 4) + +#define EXYNOS850_DRD_CLKRST 0x20 +#define CLKRST_LINK_SW_RST BIT(0) +#define CLKRST_PORT_RST BIT(1) +#define CLKRST_PHY_SW_RST BIT(3) + +#define EXYNOS850_DRD_SSPPLLCTL 0x30 +#define SSPPLLCTL_FSEL GENMASK(2, 0) + +#define EXYNOS850_DRD_UTMI 0x50 +#define UTMI_FORCE_SLEEP BIT(0) +#define UTMI_FORCE_SUSPEND BIT(1) +#define UTMI_DM_PULLDOWN BIT(2) +#define UTMI_DP_PULLDOWN BIT(3) +#define UTMI_FORCE_BVALID BIT(4) +#define UTMI_FORCE_VBUSVALID BIT(5) + +#define EXYNOS850_DRD_HSP 0x54 +#define HSP_COMMONONN BIT(8) +#define HSP_EN_UTMISUSPEND BIT(9) +#define HSP_VBUSVLDEXT BIT(12) +#define HSP_VBUSVLDEXTSEL BIT(13) +#define HSP_FSV_OUT_EN BIT(24) + +#define EXYNOS850_DRD_HSP_TEST 0x5c +#define HSP_TEST_SIDDQ BIT(24) + +#define KHZ 1000 +#define MHZ (KHZ * KHZ) + +/** + * struct exynos_usbdrd_phy - driver data for Exynos USB PHY + * @reg_phy: USB PHY controller register memory base + * @clk: clock for register access + * @core_clk: core clock for phy (ref clock) + * @reg_pmu: regmap for PMU block + * @extrefclk: frequency select settings when using 'separate reference clocks' + */ +struct exynos_usbdrd_phy { + void __iomem *reg_phy; + struct clk *clk; + struct clk *core_clk; + struct regmap *reg_pmu; + u32 extrefclk; +}; + +static void exynos_usbdrd_phy_isol(struct regmap *reg_pmu, bool isolate) +{ + unsigned int val; + + if (!reg_pmu) + return; + + val = isolate ? 0 : EXYNOS_PHY_ENABLE; + regmap_update_bits(reg_pmu, EXYNOS_USBDRD_PHY_CONTROL, + EXYNOS_PHY_ENABLE, val); +} + +/* + * Convert the supplied clock rate to the value that can be written to the PHY + * register. + */ +static unsigned int exynos_rate_to_clk(unsigned long rate, u32 *reg) +{ + switch (rate) { + case 9600 * KHZ: + *reg = EXYNOS5_FSEL_9MHZ6; + break; + case 10 * MHZ: + *reg = EXYNOS5_FSEL_10MHZ; + break; + case 12 * MHZ: + *reg = EXYNOS5_FSEL_12MHZ; + break; + case 19200 * KHZ: + *reg = EXYNOS5_FSEL_19MHZ2; + break; + case 20 * MHZ: + *reg = EXYNOS5_FSEL_20MHZ; + break; + case 24 * MHZ: + *reg = EXYNOS5_FSEL_24MHZ; + break; + case 26 * MHZ: + *reg = EXYNOS5_FSEL_26MHZ; + break; + case 50 * MHZ: + *reg = EXYNOS5_FSEL_50MHZ; + break; + default: + return -EINVAL; + } + + return 0; +} + +static void exynos850_usbdrd_utmi_init(struct phy *phy) +{ + struct exynos_usbdrd_phy *phy_drd = dev_get_priv(phy->dev); + void __iomem *regs_base = phy_drd->reg_phy; + u32 reg; + + /* + * Disable HWACG (hardware auto clock gating control). This will force + * QACTIVE signal in Q-Channel interface to HIGH level, to make sure + * the PHY clock is not gated by the hardware. + */ + reg = readl(regs_base + EXYNOS850_DRD_LINKCTRL); + reg |= LINKCTRL_FORCE_QACT; + writel(reg, regs_base + EXYNOS850_DRD_LINKCTRL); + + /* Start PHY Reset (POR=high) */ + reg = readl(regs_base + EXYNOS850_DRD_CLKRST); + reg |= CLKRST_PHY_SW_RST; + writel(reg, regs_base + EXYNOS850_DRD_CLKRST); + + /* Enable UTMI+ */ + reg = readl(regs_base + EXYNOS850_DRD_UTMI); + reg &= ~(UTMI_FORCE_SUSPEND | UTMI_FORCE_SLEEP | UTMI_DP_PULLDOWN | + UTMI_DM_PULLDOWN); + writel(reg, regs_base + EXYNOS850_DRD_UTMI); + + /* Set PHY clock and control HS PHY */ + reg = readl(regs_base + EXYNOS850_DRD_HSP); + reg |= HSP_EN_UTMISUSPEND | HSP_COMMONONN; + writel(reg, regs_base + EXYNOS850_DRD_HSP); + + /* Set VBUS Valid and D+ pull-up control by VBUS pad usage */ + reg = readl(regs_base + EXYNOS850_DRD_LINKCTRL); + reg |= FIELD_PREP(LINKCTRL_BUS_FILTER_BYPASS, 0xf); + writel(reg, regs_base + EXYNOS850_DRD_LINKCTRL); + + reg = readl(regs_base + EXYNOS850_DRD_UTMI); + reg |= UTMI_FORCE_BVALID | UTMI_FORCE_VBUSVALID; + writel(reg, regs_base + EXYNOS850_DRD_UTMI); + + reg = readl(regs_base + EXYNOS850_DRD_HSP); + reg |= HSP_VBUSVLDEXT | HSP_VBUSVLDEXTSEL; + writel(reg, regs_base + EXYNOS850_DRD_HSP); + + reg = readl(regs_base + EXYNOS850_DRD_SSPPLLCTL); + reg &= ~SSPPLLCTL_FSEL; + switch (phy_drd->extrefclk) { + case EXYNOS5_FSEL_50MHZ: + reg |= FIELD_PREP(SSPPLLCTL_FSEL, 7); + break; + case EXYNOS5_FSEL_26MHZ: + reg |= FIELD_PREP(SSPPLLCTL_FSEL, 6); + break; + case EXYNOS5_FSEL_24MHZ: + reg |= FIELD_PREP(SSPPLLCTL_FSEL, 2); + break; + case EXYNOS5_FSEL_20MHZ: + reg |= FIELD_PREP(SSPPLLCTL_FSEL, 1); + break; + case EXYNOS5_FSEL_19MHZ2: + reg |= FIELD_PREP(SSPPLLCTL_FSEL, 0); + break; + default: + dev_warn(phy->dev, "unsupported ref clk: %#.2x\n", + phy_drd->extrefclk); + break; + } + writel(reg, regs_base + EXYNOS850_DRD_SSPPLLCTL); + + /* Power up PHY analog blocks */ + reg = readl(regs_base + EXYNOS850_DRD_HSP_TEST); + reg &= ~HSP_TEST_SIDDQ; + writel(reg, regs_base + EXYNOS850_DRD_HSP_TEST); + + /* Finish PHY reset (POR=low) */ + udelay(10); /* required before doing POR=low */ + reg = readl(regs_base + EXYNOS850_DRD_CLKRST); + reg &= ~(CLKRST_PHY_SW_RST | CLKRST_PORT_RST); + writel(reg, regs_base + EXYNOS850_DRD_CLKRST); + udelay(75); /* required after POR=low for guaranteed PHY clock */ + + /* Disable single ended signal out */ + reg = readl(regs_base + EXYNOS850_DRD_HSP); + reg &= ~HSP_FSV_OUT_EN; + writel(reg, regs_base + EXYNOS850_DRD_HSP); +} + +static void exynos850_usbdrd_utmi_exit(struct phy *phy) +{ + struct exynos_usbdrd_phy *phy_drd = dev_get_priv(phy->dev); + void __iomem *regs_base = phy_drd->reg_phy; + u32 reg; + + /* Set PHY clock and control HS PHY */ + reg = readl(regs_base + EXYNOS850_DRD_UTMI); + reg &= ~(UTMI_DP_PULLDOWN | UTMI_DM_PULLDOWN); + reg |= UTMI_FORCE_SUSPEND | UTMI_FORCE_SLEEP; + writel(reg, regs_base + EXYNOS850_DRD_UTMI); + + /* Power down PHY analog blocks */ + reg = readl(regs_base + EXYNOS850_DRD_HSP_TEST); + reg |= HSP_TEST_SIDDQ; + writel(reg, regs_base + EXYNOS850_DRD_HSP_TEST); + + /* Link reset */ + reg = readl(regs_base + EXYNOS850_DRD_CLKRST); + reg |= CLKRST_LINK_SW_RST; + writel(reg, regs_base + EXYNOS850_DRD_CLKRST); + udelay(10); /* required before doing POR=low */ + reg &= ~CLKRST_LINK_SW_RST; + writel(reg, regs_base + EXYNOS850_DRD_CLKRST); +} + +static int exynos_usbdrd_phy_init(struct phy *phy) +{ + struct exynos_usbdrd_phy *phy_drd = dev_get_priv(phy->dev); + int ret; + + ret = clk_prepare_enable(phy_drd->clk); + if (ret) + return ret; + + exynos850_usbdrd_utmi_init(phy); + + clk_disable_unprepare(phy_drd->clk); + + return 0; +} + +static int exynos_usbdrd_phy_exit(struct phy *phy) +{ + struct exynos_usbdrd_phy *phy_drd = dev_get_priv(phy->dev); + int ret; + + ret = clk_prepare_enable(phy_drd->clk); + if (ret) + return ret; + + exynos850_usbdrd_utmi_exit(phy); + + clk_disable_unprepare(phy_drd->clk); + + return 0; +} + +static int exynos_usbdrd_phy_power_on(struct phy *phy) +{ + struct exynos_usbdrd_phy *phy_drd = dev_get_priv(phy->dev); + int ret; + + dev_dbg(phy->dev, "Request to power_on usbdrd_phy phy\n"); + + ret = clk_prepare_enable(phy_drd->core_clk); + if (ret) + return ret; + + /* Power-on PHY */ + exynos_usbdrd_phy_isol(phy_drd->reg_pmu, false); + + return 0; +} + +static int exynos_usbdrd_phy_power_off(struct phy *phy) +{ + struct exynos_usbdrd_phy *phy_drd = dev_get_priv(phy->dev); + + dev_dbg(phy->dev, "Request to power_off usbdrd_phy phy\n"); + + /* Power-off the PHY */ + exynos_usbdrd_phy_isol(phy_drd->reg_pmu, true); + + clk_disable_unprepare(phy_drd->core_clk); + + return 0; +} + +static int exynos_usbdrd_phy_init_clk(struct udevice *dev) +{ + struct exynos_usbdrd_phy *phy_drd = dev_get_priv(dev); + unsigned long ref_rate; + int err; + + phy_drd->clk = devm_clk_get(dev, "phy"); + if (IS_ERR(phy_drd->clk)) { + err = PTR_ERR(phy_drd->clk); + dev_err(dev, "Failed to get phy clock (err=%d)\n", err); + return err; + } + + phy_drd->core_clk = devm_clk_get(dev, "ref"); + if (IS_ERR(phy_drd->core_clk)) { + err = PTR_ERR(phy_drd->core_clk); + dev_err(dev, "Failed to get ref clock (err=%d)\n", err); + return err; + } + + ref_rate = clk_get_rate(phy_drd->core_clk); + err = exynos_rate_to_clk(ref_rate, &phy_drd->extrefclk); + if (err) { + dev_err(dev, "Clock rate %lu not supported\n", ref_rate); + return err; + } + + return 0; +} + +static int exynos_usbdrd_phy_probe(struct udevice *dev) +{ + struct exynos_usbdrd_phy *phy_drd = dev_get_priv(dev); + int err; + + phy_drd->reg_phy = dev_read_addr_ptr(dev); + if (!phy_drd->reg_phy) + return -EINVAL; + + err = exynos_usbdrd_phy_init_clk(dev); + if (err) + return err; + + phy_drd->reg_pmu = syscon_regmap_lookup_by_phandle(dev, + "samsung,pmu-syscon"); + if (IS_ERR(phy_drd->reg_pmu)) { + err = PTR_ERR(phy_drd->reg_pmu); + dev_err(dev, "Failed to lookup PMU regmap\n"); + return err; + } + + return 0; +} + +static const struct phy_ops exynos_usbdrd_phy_ops = { + .init = exynos_usbdrd_phy_init, + .exit = exynos_usbdrd_phy_exit, + .power_on = exynos_usbdrd_phy_power_on, + .power_off = exynos_usbdrd_phy_power_off, +}; + +static const struct udevice_id exynos_usbdrd_phy_of_match[] = { + { + .compatible = "samsung,exynos850-usbdrd-phy", + }, + { } +}; + +U_BOOT_DRIVER(exynos_usbdrd_phy) = { + .name = "exynos-usbdrd-phy", + .id = UCLASS_PHY, + .of_match = exynos_usbdrd_phy_of_match, + .probe = exynos_usbdrd_phy_probe, + .ops = &exynos_usbdrd_phy_ops, + .priv_auto = sizeof(struct exynos_usbdrd_phy), +}; diff --git a/drivers/power/domain/imx8m-power-domain.c b/drivers/power/domain/imx8m-power-domain.c index b44aae78e6d..a7e64971a2a 100644 --- a/drivers/power/domain/imx8m-power-domain.c +++ b/drivers/power/domain/imx8m-power-domain.c @@ -468,6 +468,8 @@ out_clk_disable: static int imx8m_power_domain_of_xlate(struct power_domain *power_domain, struct ofnode_phandle_args *args) { + power_domain->id = 0; + return 0; } diff --git a/drivers/power/regulator/regulator-uclass.c b/drivers/power/regulator/regulator-uclass.c index 09567eb9dbb..2a59a1b79c2 100644 --- a/drivers/power/regulator/regulator-uclass.c +++ b/drivers/power/regulator/regulator-uclass.c @@ -260,13 +260,13 @@ int regulator_get_by_platname(const char *plat_name, struct udevice **devp) *devp = NULL; - for (ret = uclass_find_first_device(UCLASS_REGULATOR, &dev); dev; - ret = uclass_find_next_device(&dev)) { - if (ret) { - dev_dbg(dev, "ret=%d\n", ret); - continue; - } + ret = uclass_find_first_device(UCLASS_REGULATOR, &dev); + if (ret) { + dev_dbg(dev, "ret=%d\n", ret); + return ret; + } + for (; dev; uclass_find_next_device(&dev)) { uc_pdata = dev_get_uclass_plat(dev); if (!uc_pdata || strcmp(plat_name, uc_pdata->name)) continue; @@ -410,9 +410,12 @@ static bool regulator_name_is_unique(struct udevice *check_dev, int ret; int len; - for (ret = uclass_find_first_device(UCLASS_REGULATOR, &dev); dev; - ret = uclass_find_next_device(&dev)) { - if (ret || dev == check_dev) + ret = uclass_find_first_device(UCLASS_REGULATOR, &dev); + if (ret) + return true; + + for (; dev; uclass_find_next_device(&dev)) { + if (dev == check_dev) continue; uc_pdata = dev_get_uclass_plat(dev); diff --git a/drivers/remoteproc/rproc-uclass.c b/drivers/remoteproc/rproc-uclass.c index 3233ff80419..2dbd3a21cea 100644 --- a/drivers/remoteproc/rproc-uclass.c +++ b/drivers/remoteproc/rproc-uclass.c @@ -55,9 +55,12 @@ static int for_each_remoteproc_device(int (*fn) (struct udevice *dev, struct dm_rproc_uclass_pdata *uc_pdata; int ret; - for (ret = uclass_find_first_device(UCLASS_REMOTEPROC, &dev); dev; - ret = uclass_find_next_device(&dev)) { - if (ret || dev == skip_dev) + ret = uclass_find_first_device(UCLASS_REMOTEPROC, &dev); + if (ret) + return ret; + + for (; dev; uclass_find_next_device(&dev)) { + if (dev == skip_dev) continue; uc_pdata = dev_get_uclass_plat(dev); ret = fn(dev, uc_pdata, data); diff --git a/drivers/spi/cadence_qspi_apb.c b/drivers/spi/cadence_qspi_apb.c index 6f89d3add5d..4696c09f754 100644 --- a/drivers/spi/cadence_qspi_apb.c +++ b/drivers/spi/cadence_qspi_apb.c @@ -559,9 +559,6 @@ int cadence_qspi_apb_command_write(struct cadence_spi_priv *priv, u8 opcode; if (priv->dtr) - txlen += txlen & 1; - - if (priv->dtr) opcode = op->cmd.opcode >> 8; else opcode = op->cmd.opcode; diff --git a/drivers/spi/microchip_coreqspi.c b/drivers/spi/microchip_coreqspi.c index 234b1688272..a84b257fb1a 100644 --- a/drivers/spi/microchip_coreqspi.c +++ b/drivers/spi/microchip_coreqspi.c @@ -16,6 +16,7 @@ #include <linux/delay.h> #include <linux/types.h> #include <linux/sizes.h> +#include <asm/gpio.h> DECLARE_GLOBAL_DATA_PTR; @@ -97,6 +98,8 @@ DECLARE_GLOBAL_DATA_PTR; #define REG_X4_TX_DATA (0x4c) #define REG_FRAMESUP (0x50) +#define MAX_CS_COUNT 1 + /** * struct mchp_coreqspi - Defines qspi driver instance * @regs: Address of the QSPI controller registers @@ -113,6 +116,7 @@ struct mchp_coreqspi { u8 *rxbuf; int tx_len; int rx_len; + struct gpio_desc cs_gpios[MAX_CS_COUNT]; }; static void mchp_coreqspi_init_hw(struct mchp_coreqspi *qspi) @@ -172,7 +176,7 @@ static inline void mchp_coreqspi_write_op(struct mchp_coreqspi *qspi, bool word) while (qspi->tx_len >= 4) { while (readl(qspi->regs + REG_STATUS) & STATUS_TXFIFOFULL) ; - data = *(u32 *)qspi->txbuf; + data = qspi->txbuf ? *((u32 *)qspi->txbuf) : 0xFF; qspi->txbuf += 4; qspi->tx_len -= 4; writel(data, qspi->regs + REG_X4_TX_DATA); @@ -184,7 +188,7 @@ static inline void mchp_coreqspi_write_op(struct mchp_coreqspi *qspi, bool word) while (qspi->tx_len--) { while (readl(qspi->regs + REG_STATUS) & STATUS_TXFIFOFULL) ; - data = *qspi->txbuf++; + data = qspi->txbuf ? *qspi->txbuf++ : 0xFF; writel(data, qspi->regs + REG_TX_DATA); } } @@ -471,6 +475,110 @@ static int mchp_coreqspi_probe(struct udevice *dev) /* Init the mpfs qspi hw */ mchp_coreqspi_init_hw(qspi); + if (CONFIG_IS_ENABLED(DM_GPIO)) { + int i; + + ret = gpio_request_list_by_name(dev, "cs-gpios", qspi->cs_gpios, + ARRAY_SIZE(qspi->cs_gpios), 0); + + if (ret < 0) { + pr_err("Can't get %s gpios! Error: %d", dev->name, ret); + return ret; + } + + for (i = 0; i < ARRAY_SIZE(qspi->cs_gpios); i++) { + if (!dm_gpio_is_valid(&qspi->cs_gpios[i])) + continue; + dm_gpio_set_dir_flags(&qspi->cs_gpios[i], GPIOD_IS_OUT); + } + } + + u32 control = readl(qspi->regs + REG_CONTROL); + + control |= (CONTROL_MASTER | CONTROL_ENABLE); + control &= ~CONTROL_CLKIDLE; + writel(control, qspi->regs + REG_CONTROL); + + return 0; +} + +static void mchp_coreqspi_cs_activate(struct udevice *dev) +{ + struct udevice *bus = dev_get_parent(dev); + struct mchp_coreqspi *qspi = dev_get_priv(bus); + struct dm_spi_slave_plat *slave_plat = dev_get_parent_plat(dev); + u32 cs = slave_plat->cs[0]; + + if (CONFIG_IS_ENABLED(DM_GPIO) && dm_gpio_is_valid(&qspi->cs_gpios[cs])) + dm_gpio_set_value(&qspi->cs_gpios[cs], 1); +} + +static void mchp_coreqspi_cs_deactivate(struct udevice *dev) +{ + struct udevice *bus = dev_get_parent(dev); + struct mchp_coreqspi *qspi = dev_get_priv(bus); + struct dm_spi_slave_plat *slave_plat = dev_get_parent_plat(dev); + u32 cs = slave_plat->cs[0]; + + if (CONFIG_IS_ENABLED(DM_GPIO) && dm_gpio_is_valid(&qspi->cs_gpios[cs])) + dm_gpio_set_value(&qspi->cs_gpios[cs], 0); +} + +static int mchp_coreqspi_xfer(struct udevice *dev, unsigned int bitlen, + const void *dout, void *din, unsigned long flags) +{ + struct udevice *bus = dev_get_parent(dev); + struct mchp_coreqspi *qspi = dev_get_priv(bus); + struct spi_slave *slave = dev_get_parent_priv(dev); + uint total_bytes = bitlen >> 3; /* fixed 8-bit word length */ + u32 control, frames; + + int err = 0; + + err = mchp_coreqspi_wait_for_ready(slave); + if (err) + return err; + + control = readl(qspi->regs + REG_CONTROL); + control &= ~(CONTROL_MODE12_MASK | CONTROL_MODE0); + writel(control, qspi->regs + REG_CONTROL); + + frames = total_bytes & BYTESUPPER_MASK; + writel(frames, qspi->regs + REG_FRAMESUP); + + frames |= FRAMES_FLAGBYTE; + writel(frames, qspi->regs + REG_FRAMES); + + if (flags & SPI_XFER_BEGIN) + mchp_coreqspi_cs_activate(dev); + + if (bitlen == 0) + goto out; + + if (bitlen % 8) { // Non byte aligned SPI transfer + flags |= SPI_XFER_END; + goto out; + } + + qspi->txbuf = (u8 *)dout; + qspi->rxbuf = (u8 *)din; + + while (total_bytes) { + qspi->tx_len = 1; + qspi->rx_len = 1; + total_bytes--; + + if (din) { + mchp_coreqspi_write_op(qspi, true); + mchp_coreqspi_read_op(qspi); + } else { + mchp_coreqspi_write_op(qspi, true); + } + } +out: + if (flags & SPI_XFER_END) + mchp_coreqspi_cs_deactivate(dev); + return 0; } @@ -483,6 +591,7 @@ static const struct spi_controller_mem_ops mchp_coreqspi_mem_ops = { static const struct dm_spi_ops mchp_coreqspi_ops = { .claim_bus = mchp_coreqspi_claim_bus, .release_bus = mchp_coreqspi_release_bus, + .xfer = mchp_coreqspi_xfer, .set_speed = mchp_coreqspi_set_speed, .set_mode = mchp_coreqspi_set_mode, .mem_ops = &mchp_coreqspi_mem_ops, diff --git a/drivers/sysreset/Kconfig b/drivers/sysreset/Kconfig index aa83073c96a..67edf004205 100644 --- a/drivers/sysreset/Kconfig +++ b/drivers/sysreset/Kconfig @@ -176,7 +176,7 @@ config SYSRESET_PALMAS config SYSRESET_PSCI bool "Enable support for PSCI System Reset" depends on ARM_PSCI_FW - select SPL_ARM_PSCI_FW if SPL + select SPL_ARM_PSCI_FW if SPL_SYSRESET help Enable PSCI SYSTEM_RESET function call. To use this, PSCI firmware must be running on your system. diff --git a/drivers/usb/dwc3/dwc3-generic.c b/drivers/usb/dwc3/dwc3-generic.c index 21452ad1569..3cda2b74b7e 100644 --- a/drivers/usb/dwc3/dwc3-generic.c +++ b/drivers/usb/dwc3/dwc3-generic.c @@ -704,6 +704,7 @@ static const struct udevice_id dwc3_glue_ids[] = { { .compatible = "fsl,imx8mp-dwc3", .data = (ulong)&imx8mp_ops }, { .compatible = "fsl,imx8mq-dwc3" }, { .compatible = "intel,tangier-dwc3" }, + { .compatible = "samsung,exynos850-dwusb3" }, { } }; diff --git a/fs/exfat/exfat.h b/fs/exfat/exfat.h index ca6f22b9d58..bd2965c3942 100644 --- a/fs/exfat/exfat.h +++ b/fs/exfat/exfat.h @@ -237,8 +237,10 @@ int exfat_rename(struct exfat* ef, const char* old_path, const char* new_path); void exfat_utimes(struct exfat_node* node, const struct timespec tv[2]); void exfat_update_atime(struct exfat_node* node); void exfat_update_mtime(struct exfat_node* node); +#ifndef __UBOOT__ const char* exfat_get_label(struct exfat* ef); int exfat_set_label(struct exfat* ef, const char* label); +#endif /* __UBOOT__ */ int exfat_soil_super_block(const struct exfat* ef); int exfat_mount(struct exfat* ef, const char* spec, const char* options); diff --git a/fs/exfat/node.c b/fs/exfat/node.c index 88b1357189c..b7406fbf3ed 100644 --- a/fs/exfat/node.c +++ b/fs/exfat/node.c @@ -1188,6 +1188,7 @@ void exfat_update_mtime(struct exfat_node* node) node->is_dirty = true; } +#ifndef __UBOOT__ const char* exfat_get_label(struct exfat* ef) { return ef->label; @@ -1241,3 +1242,4 @@ int exfat_set_label(struct exfat* ef, const char* label) strcpy(ef->label, label); return 0; } +#endif /* __UBOOT__ */ diff --git a/include/blk.h b/include/blk.h index 488d04cf32a..8d1b70cabd3 100644 --- a/include/blk.h +++ b/include/blk.h @@ -782,51 +782,6 @@ int blk_first_device_err(enum blk_flag_t flags, struct udevice **devp); int blk_next_device_err(enum blk_flag_t flags, struct udevice **devp); /** - * blk_find_first() - Return the first matching block device - * @flags: Indicates type of device to return - * @devp: Returns pointer to device, or NULL on error - * - * The device is not prepared for use - this is an internal function. - * The function uclass_get_device_tail() can be used to probe the device. - * - * Note that some devices are considered removable until they have been probed - * - * @return 0 if found, -ENODEV if not found - */ -int blk_find_first(enum blk_flag_t flags, struct udevice **devp); - -/** - * blk_find_next() - Return the next matching block device - * @flags: Indicates type of device to return - * @devp: On entry, pointer to device to lookup. On exit, returns pointer - * to the next device in the same uclass, or NULL if none - * - * The device is not prepared for use - this is an internal function. - * The function uclass_get_device_tail() can be used to probe the device. - * - * Note that some devices are considered removable until they have been probed - * - * @return 0 if found, -ENODEV if not found - */ -int blk_find_next(enum blk_flag_t flags, struct udevice **devp); - -/** - * blk_foreach() - iterate through block devices - * - * This creates a for() loop which works through the available block devices in - * order from start to end. - * - * If for some reason the uclass cannot be found, this does nothing. - * - * @_flags: Indicates type of device to return - * @_pos: struct udevice * to hold the current device. Set to NULL when there - * are no more devices. - */ -#define blk_foreach(_flags, _pos) \ - for (int _ret = blk_find_first(_flags, &_pos); !_ret && _pos; \ - _ret = blk_find_next(_flags, &_pos)) - -/** * blk_foreach_probe() - Helper function to iteration through block devices * * This creates a for() loop which works through the available devices in diff --git a/include/configs/e850-96.h b/include/configs/e850-96.h index 4607b3089b2..63e85332bd8 100644 --- a/include/configs/e850-96.h +++ b/include/configs/e850-96.h @@ -9,4 +9,25 @@ #ifndef __E850_96_H #define __E850_96_H +/* GUIDs for capsule updatable firmware images */ +#define E850_96_FWBL1_IMAGE_GUID \ + EFI_GUID(0x181cd3f2, 0xe375, 0x44d2, 0x80, 0x78, \ + 0x32, 0x21, 0xe1, 0xdf, 0xb9, 0x5e) + +#define E850_96_EPBL_IMAGE_GUID \ + EFI_GUID(0x66c1a54d, 0xd149, 0x415d, 0xaa, 0xda, \ + 0xb8, 0xae, 0xe4, 0x99, 0xb3, 0x70) + +#define E850_96_BL2_IMAGE_GUID \ + EFI_GUID(0x89471c2a, 0x6c8d, 0x4158, 0xac, 0xad, \ + 0x23, 0xd3, 0xb2, 0x87, 0x3d, 0x35) + +#define E850_96_BOOTLOADER_IMAGE_GUID \ + EFI_GUID(0x629578c3, 0xffb3, 0x4a89, 0xac, 0x0c, \ + 0x61, 0x18, 0x40, 0x72, 0x77, 0x79) + +#define E850_96_EL3_MON_IMAGE_GUID \ + EFI_GUID(0xdf5718a2, 0x930a, 0x4916, 0xbb, 0x19, \ + 0x32, 0x13, 0x21, 0x4d, 0x84, 0x86) + #endif /* __E850_96_H */ diff --git a/include/configs/imx93_evk.h b/include/configs/imx93_evk.h index 94355cf61e4..e7db0161126 100644 --- a/include/configs/imx93_evk.h +++ b/include/configs/imx93_evk.h @@ -6,8 +6,6 @@ #ifndef __IMX93_EVK_H #define __IMX93_EVK_H -#include <linux/sizes.h> -#include <linux/stringify.h> #include <asm/arch/imx-regs.h> #define CFG_SYS_UBOOT_BASE \ diff --git a/include/configs/imx93_frdm.h b/include/configs/imx93_frdm.h new file mode 100644 index 00000000000..987fcacb999 --- /dev/null +++ b/include/configs/imx93_frdm.h @@ -0,0 +1,30 @@ +/* SPDX-License-Identifier: GPL-2.0+ */ +/* + * Copyright 2025 NXP + */ + +#ifndef __IMX93_FRDM_H +#define __IMX93_FRDM_H + +#include <asm/arch/imx-regs.h> + +#define CFG_SYS_UBOOT_BASE \ + (QSPI0_AMBA_BASE + CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR * 512) + +#ifdef CONFIG_XPL_BUILD +#define CFG_MALLOC_F_ADDR 0x204D0000 +#endif + +/* Link Definitions */ + +#define CFG_SYS_INIT_RAM_ADDR 0x80000000 +#define CFG_SYS_INIT_RAM_SIZE 0x200000 + +#define CFG_SYS_SDRAM_BASE 0x80000000 +#define PHYS_SDRAM 0x80000000 +#define PHYS_SDRAM_SIZE 0x80000000 /* 2GB DDR */ + +/* Using ULP WDOG for reset */ +#define WDOG_BASE_ADDR WDG3_BASE_ADDR + +#endif diff --git a/include/configs/km/pg-wcom-ls102xa.h b/include/configs/km/pg-wcom-ls102xa.h index 3a243d789c0..b6e6958599c 100644 --- a/include/configs/km/pg-wcom-ls102xa.h +++ b/include/configs/km/pg-wcom-ls102xa.h @@ -10,8 +10,7 @@ #define CFG_SYS_INIT_RAM_SIZE OCRAM_SIZE #define CFG_PRAM ((CONFIG_KM_PNVRAM + \ - CONFIG_KM_PHRAM + \ - CONFIG_KM_RESERVED_PRAM) >> 10) + CONFIG_KM_PHRAM) >> 10) #define PHYS_SDRAM 0x80000000 #define PHYS_SDRAM_SIZE (1u * 1024 * 1024 * 1024) diff --git a/include/configs/kmcent2.h b/include/configs/kmcent2.h index e7ae18ec5f9..de41b998ea4 100644 --- a/include/configs/kmcent2.h +++ b/include/configs/kmcent2.h @@ -158,11 +158,10 @@ /****************************************************************************** * (PRAM usage) * ... ------------------------------------------------------- - * ... |ROOTFSSIZE | PNVRAM |PHRAM |RESERVED_PRAM | END_OF_RAM + * ... |ROOTFSSIZE | PNVRAM |PHRAM | END_OF_RAM | * ... |<------------------- pram -------------------------->| * ... ------------------------------------------------------- * @END_OF_RAM: - * @CONFIG_KM_RESERVED_PRAM: reserved pram for special purpose * @CONFIG_KM_PHRAM: address for /var * @CONFIG_KM_PNVRAM: address for PNVRAM (for the application) */ diff --git a/include/dm/uclass-internal.h b/include/dm/uclass-internal.h index 3ddcdd21439..9cb3f090271 100644 --- a/include/dm/uclass-internal.h +++ b/include/dm/uclass-internal.h @@ -149,10 +149,8 @@ int uclass_find_first_device(enum uclass_id id, struct udevice **devp); * * The device is not prepared for use - this is an internal function. * The function uclass_get_device_tail() can be used to probe the device. - * - * Return: 0 if OK (found or not found), -ve on error */ -int uclass_find_next_device(struct udevice **devp); +void uclass_find_next_device(struct udevice **devp); /** * uclass_find_device_by_namelen() - Find uclass device based on ID and name diff --git a/include/env/pg-wcom/ls102xa.env b/include/env/pg-wcom/ls102xa.env index abbec424574..88aaac8f008 100644 --- a/include/env/pg-wcom/ls102xa.env +++ b/include/env/pg-wcom/ls102xa.env @@ -8,7 +8,6 @@ checkfdt=true cramfsloadfdt=cramfsload $fdt_addr_r fdt_0x${IVM_BoardId}_0x${IVM_HWKey}.dtb ethrotate=no hwconfig=devdis:esdhc,usb3,usb2,sata,sec,dcu,duart2,qspi,can1,can2_4,ftm2_8,i2c2_3,sai1_4,lpuart2_6,asrc,spdif,lpuart1,ftm1 -netdev=eth2 newenv=protect off CONFIG_ENV_ADDR_REDUND +0x40000 && erase CONFIG_ENV_ADDR_REDUND +0x40000 && diff --git a/include/env/ti/ti_armv7_keystone2.env b/include/env/ti/ti_armv7_keystone2.env index e0395d302cb..1b2aaa2808a 100644 --- a/include/env/ti/ti_armv7_keystone2.env +++ b/include/env/ti/ti_armv7_keystone2.env @@ -12,6 +12,7 @@ dfu_alt_info_mmc= uEnv.txt fat 0 1 bootdir=/boot +bootm_size=0x10000000 tftp_root=/ nfs_root=/export mem_lpae=1 diff --git a/include/env/ti/ti_common.env b/include/env/ti/ti_common.env index 7029d12bf20..03e3267ef8a 100644 --- a/include/env/ti/ti_common.env +++ b/include/env/ti/ti_common.env @@ -8,7 +8,6 @@ rdaddr=0x88080000 ramdisk_addr_r=0x88080000 scriptaddr=0x80000000 pxefile_addr_r=0x80100000 -bootm_size=0x10000000 boot_fdt=try boot_fit=0 diff --git a/include/fb_spi_flash.h b/include/fb_spi_flash.h new file mode 100644 index 00000000000..904654748a4 --- /dev/null +++ b/include/fb_spi_flash.h @@ -0,0 +1,42 @@ +/* SPDX-License-Identifier: GPL-2.0+ */ +/* + * Copyright 2025 Collabora Ltd. + */ + +#ifndef _FB_SPI_FLASH_H_ +#define _FB_SPI_FLASH_H_ + +#include <part.h> + +/** + * fastboot_spi_flash_get_part_info() - Lookup SPI flash partition by name + * + * @part_name: Named device to lookup + * @part_info: Pointer to returned struct disk_partition + * @response: Pointer to fastboot response buffer + * Return: 0 if OK, -ENOENT if no partition name was given, -ENODEV on invalid + * raw partition descriptor + */ +int fastboot_spi_flash_get_part_info(const char *part_name, + struct disk_partition *part_info, + char *response); + +/** + * fastboot_spi_flash_write() - Write image to SPI flash for fastboot + * + * @cmd: Named device to write image to + * @download_buffer: Pointer to image data + * @download_bytes: Size of image data + * @response: Pointer to fastboot response buffer + */ +void fastboot_spi_flash_write(const char *cmd, void *download_buffer, + u32 download_bytes, char *response); + +/** + * fastboot_spi_flash_erase() - Erase SPI flash for fastboot + * + * @cmd: Named device to erase + * @response: Pointer to fastboot response buffer + */ +void fastboot_spi_flash_erase(const char *cmd, char *response); +#endif diff --git a/include/fpga.h b/include/fpga.h index 4cc44164b2f..a144238e66a 100644 --- a/include/fpga.h +++ b/include/fpga.h @@ -79,7 +79,7 @@ int fpga_loadbitstream(int devnum, char *fpgadata, size_t size, int fpga_dump(int devnum, const void *buf, size_t bsize); int fpga_info(int devnum); const fpga_desc *fpga_validate(int devnum, const void *buf, - size_t bsize, char *fn); + size_t bsize); int fpga_compatible2flag(int devnum, const char *compatible); #endif /* _FPGA_H_ */ diff --git a/include/imx8image.h b/include/imx8image.h index e0d25c5b6c9..d0e05811ff9 100644 --- a/include/imx8image.h +++ b/include/imx8image.h @@ -45,6 +45,7 @@ #define DCD_ENTRY_ADDR_IN_SCFW 0x240 #define CONTAINER_ALIGNMENT 0x400 +#define CONTAINER_PQC_ALIGNMENT 0x4000 #define CONTAINER_FLAGS_DEFAULT 0x10 #define CONTAINER_FUSE_DEFAULT 0x0 @@ -160,6 +161,8 @@ enum imx8image_cmd { CMD_DATA, CMD_DUMMY_V2X, CMD_HOLD, + CMD_CNTR_VERSION, + CMD_DUMMY_DDR, }; enum imx8image_core_type { @@ -216,6 +219,8 @@ typedef enum option_type { OEI, DUMMY_V2X, HOLD, + CNTR_VERSION, + DUMMY_DDR, } option_type_t; typedef struct { @@ -262,6 +267,7 @@ typedef struct { #define IMG_TYPE_SENTINEL 0x06 /* SENTINEL image type */ #define IMG_TYPE_PROV 0x07 /* Provisioning image type */ #define IMG_TYPE_DEK 0x08 /* DEK validation type */ +#define IMG_TYPE_DDR_DUMMY 0x0D /* DDR training data dummy entry */ #define IMG_TYPE_V2X_DUMMY 0x0E /* V2X Dummy image */ #define IMG_TYPE_SHIFT 0 diff --git a/include/imx_container.h b/include/imx_container.h index 691c764b3e5..684fc3bc988 100644 --- a/include/imx_container.h +++ b/include/imx_container.h @@ -12,7 +12,11 @@ #define IV_MAX_LEN 32 #define HASH_MAX_LEN 64 +#if IS_ENABLED(CONFIG_IMX_PQC_SUPPORT) +#define CONTAINER_HDR_ALIGNMENT 0x4000 +#else #define CONTAINER_HDR_ALIGNMENT 0x400 +#endif #define CONTAINER_HDR_EMMC_OFFSET 0 #define CONTAINER_HDR_MMCSD_OFFSET SZ_32K #define CONTAINER_HDR_QSPI_OFFSET SZ_4K @@ -72,7 +76,14 @@ int get_container_size(ulong addr, u16 *header_length); static inline bool valid_container_hdr(struct container_hdr *container) { +#if IS_ENABLED(CONFIG_IMX_PQC_SUPPORT) + return (container->tag == CONTAINER_HDR_TAG || + container->tag == 0x82) && + (container->version == CONTAINER_HDR_VERSION || + container->version == 0x2); +#else return container->tag == CONTAINER_HDR_TAG && container->version == CONTAINER_HDR_VERSION; +#endif } #endif diff --git a/include/stratixII.h b/include/stratixII.h index 3c06bb2955a..785cdf41cb8 100644 --- a/include/stratixII.h +++ b/include/stratixII.h @@ -6,8 +6,8 @@ #ifndef _STRATIXII_H_ #define _STRATIXII_H_ -extern int StratixII_load (Altera_desc * desc, void *image, size_t size); -extern int StratixII_dump (Altera_desc * desc, void *buf, size_t bsize); -extern int StratixII_info (Altera_desc * desc); +int StratixII_load(Altera_desc *desc, const void *buf, size_t size); +int StratixII_dump(Altera_desc *desc, const void *buf, size_t bsize); +int StratixII_info(Altera_desc *desc); #endif /* _STRATIXII_H_ */ diff --git a/lib/lmb.c b/lib/lmb.c index e5a0677e3f9..e2d9fe86c14 100644 --- a/lib/lmb.c +++ b/lib/lmb.c @@ -8,6 +8,7 @@ #include <alist.h> #include <efi_loader.h> +#include <env.h> #include <event.h> #include <image.h> #include <mapmem.h> @@ -214,8 +215,6 @@ static long lmb_add_region_flags(struct alist *lmb_rgn_lst, phys_addr_t base, coalesced++; break; - - return -1; } } @@ -538,6 +537,7 @@ static void lmb_reserve_uboot_region(void) int bank; ulong end, bank_end; phys_addr_t rsv_start; + ulong pram = 0; rsv_start = gd->start_addr_sp - CONFIG_STACK_SIZE; end = gd->ram_top; @@ -548,6 +548,11 @@ static void lmb_reserve_uboot_region(void) */ debug("## Current stack ends at 0x%08lx ", (ulong)rsv_start); +#ifdef CFG_PRAM + pram = env_get_ulong("pram", 10, CFG_PRAM); + pram = pram << 10; /* size is in kB */ +#endif + for (bank = 0; bank < CONFIG_NR_DRAM_BANKS; bank++) { if (!gd->bd->bi_dram[bank].size || rsv_start < gd->bd->bi_dram[bank].start) @@ -560,7 +565,8 @@ static void lmb_reserve_uboot_region(void) if (bank_end > end) bank_end = end - 1; - lmb_reserve(rsv_start, bank_end - rsv_start + 1, LMB_NOOVERWRITE); + lmb_reserve(rsv_start, bank_end - rsv_start - pram + 1, + LMB_NOOVERWRITE); if (gd->flags & GD_FLG_SKIP_RELOC) lmb_reserve((phys_addr_t)(uintptr_t)_start, diff --git a/test/dm/blk.c b/test/dm/blk.c index aa5cbc63777..1b928b27d9c 100644 --- a/test/dm/blk.c +++ b/test/dm/blk.c @@ -229,30 +229,7 @@ static int dm_test_blk_flags(struct unit_test_state *uts) { struct udevice *dev; - /* Iterate through devices without probing them */ - ut_assertok(blk_find_first(BLKF_BOTH, &dev)); - ut_assertnonnull(dev); - ut_asserteq_str("mmc2.blk", dev->name); - - ut_assertok(blk_find_next(BLKF_BOTH, &dev)); - ut_assertnonnull(dev); - ut_asserteq_str("mmc1.blk", dev->name); - - ut_assertok(blk_find_next(BLKF_BOTH, &dev)); - ut_assertnonnull(dev); - ut_asserteq_str("mmc0.blk", dev->name); - - ut_asserteq(-ENODEV, blk_find_next(BLKF_BOTH, &dev)); - ut_assertnull(dev); - - /* All devices are removable until probed */ - ut_asserteq(-ENODEV, blk_find_first(BLKF_FIXED, &dev)); - - ut_assertok(blk_find_first(BLKF_REMOVABLE, &dev)); - ut_assertnonnull(dev); - ut_asserteq_str("mmc2.blk", dev->name); - - /* Now probe them and iterate again */ + /* Probe and look through block devices */ ut_assertok(blk_first_device_err(BLKF_BOTH, &dev)); ut_assertnonnull(dev); ut_asserteq_str("mmc2.blk", dev->name); @@ -289,30 +266,13 @@ static int dm_test_blk_flags(struct unit_test_state *uts) } DM_TEST(dm_test_blk_flags, UTF_SCAN_PDATA | UTF_SCAN_FDT); -/* Test blk_foreach() and friend */ +/* Test blk_foreach_probe() */ static int dm_test_blk_foreach(struct unit_test_state *uts) { struct udevice *dev; int found; - /* Test blk_foreach() - use the 3rd bytes of the name (0/1/2) */ - found = 0; - blk_foreach(BLKF_BOTH, dev) - found |= 1 << dectoul(&dev->name[3], NULL); - ut_asserteq(7, found); - - /* All devices are removable until probed */ - found = 0; - blk_foreach(BLKF_FIXED, dev) - found |= 1 << dectoul(&dev->name[3], NULL); - ut_asserteq(0, found); - - found = 0; - blk_foreach(BLKF_REMOVABLE, dev) - found |= 1 << dectoul(&dev->name[3], NULL); - ut_asserteq(7, found); - - /* Now try again with the probing functions */ + /* The test device tree has two fixed and one removable block device(s) */ found = 0; blk_foreach_probe(BLKF_BOTH, dev) found |= 1 << dectoul(&dev->name[3], NULL); diff --git a/test/dm/core.c b/test/dm/core.c index 959b834576f..53693f4f7ed 100644 --- a/test/dm/core.c +++ b/test/dm/core.c @@ -167,8 +167,6 @@ static int dm_test_autobind_uclass_pdata_alloc(struct unit_test_state *uts) for (uclass_find_first_device(UCLASS_TEST, &dev); dev; uclass_find_next_device(&dev)) { - ut_assertnonnull(dev); - uc_pdata = dev_get_uclass_plat(dev); ut_assert(uc_pdata); } @@ -223,8 +221,6 @@ static int dm_test_autobind_uclass_pdata_valid(struct unit_test_state *uts) for (uclass_find_first_device(UCLASS_TEST, &dev); dev; uclass_find_next_device(&dev)) { - ut_assertnonnull(dev); - uc_pdata = dev_get_uclass_plat(dev); ut_assert(uc_pdata); ut_assert(uc_pdata->intval1 == TEST_UC_PDATA_INTVAL1); @@ -734,114 +730,90 @@ static int dm_test_device_reparent(struct unit_test_state *uts) /* Re-parent top-level children with no grandchildren. */ ut_assertok(device_reparent(top[3], top[0])); + /* try to get devices */ - for (ret = uclass_find_first_device(UCLASS_TEST, &dev); - dev; - ret = uclass_find_next_device(&dev)) { - ut_assert(!ret); - ut_assertnonnull(dev); - } + ret = uclass_find_first_device(UCLASS_TEST, &dev); + ut_assert(!ret); + ut_assertnonnull(dev); ut_assertok(device_reparent(top[4], top[0])); + /* try to get devices */ - for (ret = uclass_find_first_device(UCLASS_TEST, &dev); - dev; - ret = uclass_find_next_device(&dev)) { - ut_assert(!ret); - ut_assertnonnull(dev); - } + ret = uclass_find_first_device(UCLASS_TEST, &dev); + ut_assert(!ret); + ut_assertnonnull(dev); /* Re-parent top-level children with grandchildren. */ ut_assertok(device_reparent(top[2], top[0])); + /* try to get devices */ - for (ret = uclass_find_first_device(UCLASS_TEST, &dev); - dev; - ret = uclass_find_next_device(&dev)) { - ut_assert(!ret); - ut_assertnonnull(dev); - } + ret = uclass_find_first_device(UCLASS_TEST, &dev); + ut_assert(!ret); + ut_assertnonnull(dev); ut_assertok(device_reparent(top[5], top[2])); + /* try to get devices */ - for (ret = uclass_find_first_device(UCLASS_TEST, &dev); - dev; - ret = uclass_find_next_device(&dev)) { - ut_assert(!ret); - ut_assertnonnull(dev); - } + ret = uclass_find_first_device(UCLASS_TEST, &dev); + ut_assert(!ret); + ut_assertnonnull(dev); /* Re-parent grandchildren. */ ut_assertok(device_reparent(grandchild[0], top[1])); + /* try to get devices */ - for (ret = uclass_find_first_device(UCLASS_TEST, &dev); - dev; - ret = uclass_find_next_device(&dev)) { - ut_assert(!ret); - ut_assertnonnull(dev); - } + ret = uclass_find_first_device(UCLASS_TEST, &dev); + ut_assert(!ret); + ut_assertnonnull(dev); ut_assertok(device_reparent(grandchild[1], top[1])); + /* try to get devices */ - for (ret = uclass_find_first_device(UCLASS_TEST, &dev); - dev; - ret = uclass_find_next_device(&dev)) { - ut_assert(!ret); - ut_assertnonnull(dev); - } + ret = uclass_find_first_device(UCLASS_TEST, &dev); + ut_assert(!ret); + ut_assertnonnull(dev); /* Remove re-pareneted devices. */ ut_assertok(device_remove(top[3], DM_REMOVE_NORMAL)); + /* try to get devices */ - for (ret = uclass_find_first_device(UCLASS_TEST, &dev); - dev; - ret = uclass_find_next_device(&dev)) { - ut_assert(!ret); - ut_assertnonnull(dev); - } + ret = uclass_find_first_device(UCLASS_TEST, &dev); + ut_assert(!ret); + ut_assertnonnull(dev); ut_assertok(device_remove(top[4], DM_REMOVE_NORMAL)); + /* try to get devices */ - for (ret = uclass_find_first_device(UCLASS_TEST, &dev); - dev; - ret = uclass_find_next_device(&dev)) { - ut_assert(!ret); - ut_assertnonnull(dev); - } + ret = uclass_find_first_device(UCLASS_TEST, &dev); + ut_assert(!ret); + ut_assertnonnull(dev); ut_assertok(device_remove(top[5], DM_REMOVE_NORMAL)); + /* try to get devices */ - for (ret = uclass_find_first_device(UCLASS_TEST, &dev); - dev; - ret = uclass_find_next_device(&dev)) { - ut_assert(!ret); - ut_assertnonnull(dev); - } + ret = uclass_find_first_device(UCLASS_TEST, &dev); + ut_assert(!ret); + ut_assertnonnull(dev); ut_assertok(device_remove(top[2], DM_REMOVE_NORMAL)); - for (ret = uclass_find_first_device(UCLASS_TEST, &dev); - dev; - ret = uclass_find_next_device(&dev)) { - ut_assert(!ret); - ut_assertnonnull(dev); - } + + ret = uclass_find_first_device(UCLASS_TEST, &dev); + ut_assert(!ret); + ut_assertnonnull(dev); ut_assertok(device_remove(grandchild[0], DM_REMOVE_NORMAL)); + /* try to get devices */ - for (ret = uclass_find_first_device(UCLASS_TEST, &dev); - dev; - ret = uclass_find_next_device(&dev)) { - ut_assert(!ret); - ut_assertnonnull(dev); - } + ret = uclass_find_first_device(UCLASS_TEST, &dev); + ut_assert(!ret); + ut_assertnonnull(dev); ut_assertok(device_remove(grandchild[1], DM_REMOVE_NORMAL)); + /* try to get devices */ - for (ret = uclass_find_first_device(UCLASS_TEST, &dev); - dev; - ret = uclass_find_next_device(&dev)) { - ut_assert(!ret); - ut_assertnonnull(dev); - } + ret = uclass_find_first_device(UCLASS_TEST, &dev); + ut_assert(!ret); + ut_assertnonnull(dev); /* Try the same with unbind */ ut_assertok(device_unbind(top[3])); @@ -1090,12 +1062,9 @@ static int dm_test_uclass_devices_find(struct unit_test_state *uts) struct udevice *dev; int ret; - for (ret = uclass_find_first_device(UCLASS_TEST, &dev); - dev; - ret = uclass_find_next_device(&dev)) { - ut_assert(!ret); - ut_assertnonnull(dev); - } + ret = uclass_find_first_device(UCLASS_TEST, &dev); + ut_assert(!ret); + ut_assertnonnull(dev); ut_assertok(uclass_find_first_device(UCLASS_TEST_DUMMY, &dev)); ut_assertnull(dev); @@ -1121,18 +1090,16 @@ static int dm_test_uclass_devices_find_by_name(struct unit_test_state *uts) * this will fail on checking condition: testdev == finddev, since the * uclass_find_device_by_name(), returns the first device by given name. */ - for (ret = uclass_find_first_device(UCLASS_TEST_FDT, &testdev); - testdev; - ret = uclass_find_next_device(&testdev)) { - ut_assertok(ret); - ut_assertnonnull(testdev); + ret = uclass_find_first_device(UCLASS_TEST_FDT, &testdev); + ut_assertok(ret); + ut_assertnonnull(testdev); + for (; testdev; uclass_find_next_device(&testdev)) { findret = uclass_find_device_by_name(UCLASS_TEST_FDT, testdev->name, &finddev); ut_assertok(findret); - ut_assert(testdev); ut_asserteq_str(testdev->name, finddev->name); ut_asserteq_ptr(testdev, finddev); } diff --git a/test/lib/abuf.c b/test/lib/abuf.c index 97b128c01c0..3dced1ddb11 100644 --- a/test/lib/abuf.c +++ b/test/lib/abuf.c @@ -12,6 +12,7 @@ static char test_data[] = "1234"; #define TEST_DATA_LEN sizeof(test_data) +#define HUGE_ALLOC_SIZE 0x60000000 /* Test abuf_set() */ static int lib_test_abuf_set(struct unit_test_state *uts) @@ -93,13 +94,6 @@ static int lib_test_abuf_realloc(struct unit_test_state *uts) { struct abuf buf; ulong start; - void *ptr; - - /* - * TODO: crashes on sandbox sometimes due to an apparent bug in - * realloc(). - */ - return 0; start = ut_check_free(); @@ -116,23 +110,18 @@ static int lib_test_abuf_realloc(struct unit_test_state *uts) ut_assertnonnull(buf.data); ut_asserteq(TEST_DATA_LEN, buf.size); ut_asserteq(true, buf.alloced); - ptr = buf.data; /* - * Make it smaller; the pointer should remain the same. Note this relies - * on knowledge of how U-Boot's realloc() works + * Make it smaller. */ ut_asserteq(true, abuf_realloc(&buf, TEST_DATA_LEN - 1)); ut_asserteq(TEST_DATA_LEN - 1, buf.size); ut_asserteq(true, buf.alloced); - ut_asserteq_ptr(ptr, buf.data); /* - * Make it larger, forcing reallocation. Note this relies on knowledge - * of how U-Boot's realloc() works + * Make it larger. */ ut_asserteq(true, abuf_realloc(&buf, 0x1000)); - ut_assert(buf.data != ptr); ut_asserteq(0x1000, buf.size); ut_asserteq(true, buf.alloced); @@ -210,19 +199,12 @@ static int lib_test_abuf_large(struct unit_test_state *uts) ulong start; size_t size; int delta; - void *ptr; - - /* - * This crashes at present due to trying to allocate more memory than - * available, which breaks something on sandbox. - */ - return 0; start = ut_check_free(); /* Try an impossible size */ abuf_init(&buf); - ut_asserteq(false, abuf_realloc(&buf, CONFIG_SYS_MALLOC_LEN)); + ut_asserteq(false, abuf_realloc(&buf, HUGE_ALLOC_SIZE)); ut_assertnull(buf.data); ut_asserteq(0, buf.size); ut_asserteq(false, buf.alloced); @@ -237,13 +219,11 @@ static int lib_test_abuf_large(struct unit_test_state *uts) ut_assertnonnull(buf.data); ut_asserteq(TEST_DATA_LEN, buf.size); ut_asserteq(true, buf.alloced); - ptr = buf.data; delta = ut_check_delta(start); ut_assert(delta > 0); /* try to increase it */ - ut_asserteq(false, abuf_realloc(&buf, CONFIG_SYS_MALLOC_LEN)); - ut_asserteq_ptr(ptr, buf.data); + ut_asserteq(false, abuf_realloc(&buf, HUGE_ALLOC_SIZE)); ut_asserteq(TEST_DATA_LEN, buf.size); ut_asserteq(true, buf.alloced); ut_asserteq(delta, ut_check_delta(start)); @@ -254,8 +234,8 @@ static int lib_test_abuf_large(struct unit_test_state *uts) /* Start with a huge unallocated buf and try to move it */ abuf_init(&buf); - abuf_map_sysmem(&buf, 0, CONFIG_SYS_MALLOC_LEN); - ut_asserteq(CONFIG_SYS_MALLOC_LEN, buf.size); + abuf_map_sysmem(&buf, 0, HUGE_ALLOC_SIZE); + ut_asserteq(HUGE_ALLOC_SIZE, buf.size); ut_asserteq(false, buf.alloced); ut_assertnull(abuf_uninit_move(&buf, &size)); @@ -278,12 +258,6 @@ static int lib_test_abuf_uninit_move(struct unit_test_state *uts) start = ut_check_free(); - /* - * TODO: crashes on sandbox sometimes due to an apparent bug in - * realloc(). - */ - return 0; - /* Move an empty buffer */ abuf_init(&buf); ut_assertnull(abuf_uninit_move(&buf, &size)); @@ -383,12 +357,6 @@ static int lib_test_abuf_init_move(struct unit_test_state *uts) struct abuf buf; void *ptr; - /* - * TODO: crashes on sandbox sometimes due to an apparent bug in - * realloc(). - */ - return 0; - ptr = strdup(test_data); ut_assertnonnull(ptr); diff --git a/test/py/tests/test_fit_mkimage_validate.py b/test/py/tests/test_fit_mkimage_validate.py index af56f08ca10..ef974c8c762 100644 --- a/test/py/tests/test_fit_mkimage_validate.py +++ b/test/py/tests/test_fit_mkimage_validate.py @@ -7,6 +7,7 @@ import os import subprocess import pytest import fit_util +import re @pytest.mark.boardspec('sandbox') @pytest.mark.requiredtool('dtc') @@ -56,3 +57,47 @@ def test_fit_invalid_image_reference(ubman): assert result.returncode != 0, "mkimage should fail due to missing image reference" assert "references undefined image 'notexist'" in result.stderr +def test_fit_invalid_default_config(ubman): + """Test that mkimage fails when default config is missing""" + + its_fname = fit_util.make_fname(ubman, "invalid.its") + itb_fname = fit_util.make_fname(ubman, "invalid.itb") + kernel = fit_util.make_kernel(ubman, 'kernel.bin', 'kernel') + + # Write ITS with an invalid reference to a nonexistent default config + its_text = ''' +/dts-v1/; + +/ { + images { + kernel@1 { + description = "Test Kernel"; + data = /incbin/("kernel.bin"); + type = "kernel"; + arch = "sandbox"; + os = "linux"; + compression = "none"; + load = <0x40000>; + entry = <0x40000>; + }; + }; + + configurations { + default = "conf@1"; + conf@2 { + kernel = "kernel@1"; + }; + }; +}; +''' + + with open(its_fname, 'w') as f: + f.write(its_text) + + mkimage = os.path.join(ubman.config.build_dir, 'tools/mkimage') + cmd = [mkimage, '-f', its_fname, itb_fname] + + result = subprocess.run(cmd, capture_output=True, text=True) + + assert result.returncode != 0, "mkimage should fail due to missing default config" + assert re.search(r"Default configuration '.*' not found under /configurations", result.stderr) diff --git a/tools/binman/etype/cbfs.py b/tools/binman/etype/cbfs.py index 5879f377231..9cc4b756b3f 100644 --- a/tools/binman/etype/cbfs.py +++ b/tools/binman/etype/cbfs.py @@ -5,6 +5,7 @@ # Entry-type module for a Coreboot Filesystem (CBFS) # +from __future__ import annotations from collections import OrderedDict from binman import cbfs_util diff --git a/tools/binman/etype/mkimage.py b/tools/binman/etype/mkimage.py index 75e59c3d3a3..9fba902bdad 100644 --- a/tools/binman/etype/mkimage.py +++ b/tools/binman/etype/mkimage.py @@ -5,6 +5,7 @@ # Entry-type module for producing an image using mkimage # +from __future__ import annotations from collections import OrderedDict from binman.entry import Entry diff --git a/tools/binman/etype/section.py b/tools/binman/etype/section.py index 03c4f7c6ec7..6a26d687056 100644 --- a/tools/binman/etype/section.py +++ b/tools/binman/etype/section.py @@ -8,6 +8,7 @@ Sections are entries which can contain other entries. This allows hierarchical images to be created. """ +from __future__ import annotations from collections import OrderedDict import concurrent.futures import re diff --git a/tools/fit_image.c b/tools/fit_image.c index ad0ffa39c6a..331be5ae71d 100644 --- a/tools/fit_image.c +++ b/tools/fit_image.c @@ -756,6 +756,8 @@ static int fit_import_data(struct image_tool_params *params, const char *fname) } confs = fdt_path_offset(fdt, FIT_CONFS_PATH); + const char *default_conf = + (char *)fdt_getprop(fdt, confs, FIT_DEFAULT_PROP, NULL); static const char * const props[] = { FIT_KERNEL_PROP, FIT_RAMDISK_PROP, FIT_FDT_PROP, @@ -764,6 +766,14 @@ static int fit_import_data(struct image_tool_params *params, const char *fname) FIT_FIRMWARE_PROP, FIT_SCRIPT_PROP}; + if (default_conf && fdt_subnode_offset(fdt, confs, default_conf) < 0) { + fprintf(stderr, + "Error: Default configuration '%s' not found under /configurations\n", + default_conf); + ret = FDT_ERR_NOTFOUND; + goto err_munmap; + } + fdt_for_each_subnode(node, fdt, confs) { const char *conf_name = fdt_get_name(fdt, node, NULL); diff --git a/tools/imx8image.c b/tools/imx8image.c index cad55fd3cf2..5a76643c06e 100644 --- a/tools/imx8image.c +++ b/tools/imx8image.c @@ -19,6 +19,7 @@ static bool dcd_skip; static image_t param_stack[IMG_STACK_SIZE]; static uint8_t fuse_version; static uint16_t sw_version; +static uint8_t cntr_version; static uint32_t custom_partition; static uint32_t scfw_flags; @@ -57,6 +58,8 @@ static table_entry_t imx8image_cmds[] = { {CMD_DATA, "DATA", "new data", }, {CMD_DUMMY_V2X, "DUMMY_V2X", "v2x", }, {CMD_HOLD, "HOLD", "hold", }, + {CMD_CNTR_VERSION, "CNTR_VERSION", "cntr version", }, + {CMD_DUMMY_DDR, "DUMMY_DDR", "ddr", }, {-1, "", "", } }; @@ -157,6 +160,10 @@ static void parse_cfg_cmd(image_t *param_stack, int32_t cmd, char *token, param_stack[p_idx].option = HOLD; param_stack[p_idx].entry = (uint32_t)strtoll(token, NULL, 0); param_stack[p_idx++].filename = NULL; + break; + case CMD_CNTR_VERSION: + cntr_version = (uint8_t)(strtoll(token, NULL, 0) & 0xFF); + break; default: break; } @@ -177,6 +184,8 @@ static void parse_cfg_fld(image_t *param_stack, int32_t *cmd, char *token, if (*cmd == CMD_CONTAINER) { fprintf(stdout, "New Container: \t%d\n", ++container); param_stack[p_idx++].option = NEW_CONTAINER; + } else if (*cmd == CMD_DUMMY_DDR) { + param_stack[p_idx++].option = DUMMY_DDR; } break; case CFG_CORE_TYPE: @@ -588,7 +597,8 @@ static void set_image_array_entry(flash_header_v3_t *container, img->offset = offset; /* Is re-adjusted later */ img->size = size; - if (type != DUMMY_V2X) { + /* skip hash generation here if dummy image */ + if (type != DUMMY_V2X && type != DUMMY_DDR) { set_image_hash(img, tmp_filename, IMAGE_HASH_ALGO_DEFAULT); } @@ -632,6 +642,15 @@ static void set_image_array_entry(flash_header_v3_t *container, img->entry = entry; img->meta = meta; custom_partition = 0; + + if (container->num_images) { + /* if at least 2 images in container, [0] and [1] */ + boot_img_t *ddr_dummy = &container->img[container->num_images - 1]; + if ((ddr_dummy->hab_flags & 0x0F) == IMG_TYPE_DDR_DUMMY) { + ddr_dummy->offset = img->offset + img->size; + set_image_hash(ddr_dummy, "/dev/null", IMAGE_HASH_ALGO_DEFAULT); + } + } break; case AP: if (soc == QX && core == CORE_CA35) { @@ -751,6 +770,11 @@ static void set_image_array_entry(flash_header_v3_t *container, img->entry = entry; img->size = 0; /* dummy image has no size */ break; + case DUMMY_DDR: + img->hab_flags |= IMG_TYPE_DDR_DUMMY; + tmp_name = "DDR Dummy"; + img->size = 0; /* dummy image has no size */ + break; default: fprintf(stderr, "unrecognized image type (%d)\n", type); exit(EXIT_FAILURE); @@ -776,22 +800,27 @@ void set_container(flash_header_v3_t *container, uint16_t sw_version, static int get_container_image_start_pos(image_t *image_stack, uint32_t align, uint32_t *v2x) { image_t *img_sp = image_stack; - /*8K total container header*/ - int file_off = CONTAINER_IMAGE_ARRAY_START_OFFSET; + /* + * 8K total container header for legacy container, for version 2 + * container, the total container header is 0x4000 * 3 = 0xC000. + */ + int file_off = cntr_version ? 0xC000 : CONTAINER_IMAGE_ARRAY_START_OFFSET; + size_t size = cntr_version ? SZ_32K : SZ_4K; + uint32_t cntr_header_len = cntr_version ? CONTAINER_PQC_ALIGNMENT : FIRST_CONTAINER_HEADER_LENGTH; FILE *fd = NULL; flash_header_v3_t *header; flash_header_v3_t *header2; void *p; int ret; - p = calloc(1, SZ_4K); + p = calloc(1, size); if (!p) { - fprintf(stderr, "Fail to alloc 4K memory\n"); + fprintf(stderr, "Fail to alloc %lx memory\n", size); exit(EXIT_FAILURE); } header = p; - header2 = p + FIRST_CONTAINER_HEADER_LENGTH; + header2 = p + cntr_header_len; while (img_sp->option != NO_IMG) { if (img_sp->option == APPEND) { @@ -801,7 +830,7 @@ static int get_container_image_start_pos(image_t *image_stack, uint32_t align, u exit(EXIT_FAILURE); } - ret = fread(header, SZ_4K, 1, fd); + ret = fread(header, size, 1, fd); if (ret != 1) { printf("Failure Read header %d\n", ret); exit(EXIT_FAILURE); @@ -813,11 +842,11 @@ static int get_container_image_start_pos(image_t *image_stack, uint32_t align, u fprintf(stderr, "header tag mismatched \n"); exit(EXIT_FAILURE); } else { - if (header2->tag != IVT_HEADER_TAG_B0) { + if ((header2->tag != IVT_HEADER_TAG_B0) && (header2->tag != 0x82)) { file_off += header->img[header->num_images - 1].size; file_off = ALIGN(file_off, align); } else { - file_off = header2->img[header2->num_images - 1].offset + FIRST_CONTAINER_HEADER_LENGTH; + file_off = header2->img[header2->num_images - 1].offset + cntr_header_len; file_off += header2->img[header2->num_images - 1].size; file_off = ALIGN(file_off, align); fprintf(stderr, "Has 2nd container %x\n", file_off); @@ -839,7 +868,7 @@ static void set_imx_hdr_v3(imx_header_v3_t *imxhdr, uint32_t cont_id) /* Set magic number, Only >= B0 supported */ fhdr_v3->tag = IVT_HEADER_TAG_B0; - fhdr_v3->version = IVT_VERSION_B0; + fhdr_v3->version = cntr_version ? 0x2 : IVT_VERSION_B0; } static uint8_t *flatten_container_header(imx_header_v3_t *imx_header, @@ -921,6 +950,7 @@ static int build_container(soc_type_t soc, uint32_t sector_size, char *tmp_filename = NULL; uint32_t size = 0; uint32_t file_padding = 0; + uint32_t cntr_header_len = cntr_version ? CONTAINER_PQC_ALIGNMENT : FIRST_CONTAINER_HEADER_LENGTH; uint32_t v2x = false; int ret; @@ -978,6 +1008,7 @@ static int build_container(soc_type_t soc, uint32_t sector_size, break; case DUMMY_V2X: + case DUMMY_DDR: if (container < 0) { fprintf(stderr, "No container found\n"); exit(EXIT_FAILURE); @@ -1023,7 +1054,7 @@ static int build_container(soc_type_t soc, uint32_t sector_size, case NEW_CONTAINER: container++; set_container(&imx_header.fhdr[container], sw_version, - CONTAINER_ALIGNMENT, + cntr_version ? CONTAINER_PQC_ALIGNMENT : CONTAINER_ALIGNMENT, CONTAINER_FLAGS_DEFAULT, fuse_version); scfw_flags = 0; @@ -1073,9 +1104,9 @@ static int build_container(soc_type_t soc, uint32_t sector_size, if (img_sp->option == APPEND) { copy_file(ofd, img_sp->filename, 0, 0); if (v2x) - file_padding += FIRST_CONTAINER_HEADER_LENGTH * 2; + file_padding += cntr_header_len * 2; else - file_padding += FIRST_CONTAINER_HEADER_LENGTH; + file_padding += cntr_header_len; } img_sp++; } while (img_sp->option != NO_IMG); diff --git a/tools/patman/requirements.txt b/tools/patman/requirements.txt index ce9a3854527..d4fcb1061c2 100644 --- a/tools/patman/requirements.txt +++ b/tools/patman/requirements.txt @@ -1,6 +1,6 @@ -aiohttp==3.9.1 +aiohttp==3.10.11 ConfigParser==7.1.0 importlib_resources==6.5.2 pygit2==1.14.1 -Requests==2.32.3 -setuptools==75.8.0 +requests==2.32.4 +setuptools==78.1.1 diff --git a/tools/patman/test_cseries.py b/tools/patman/test_cseries.py index e58f2f68333..4c211c8ee89 100644 --- a/tools/patman/test_cseries.py +++ b/tools/patman/test_cseries.py @@ -3278,7 +3278,7 @@ Date: .* self.assertIn('bootm.c:1: check: Avoid CamelCase: <Fix>', err.getvalue()) self.assertIn( - 'Cc: Anatolij Gustschin <agust@denx.de>', out.getvalue()) + 'Cc: Anatolij Gustschin <ag.dev.uboot@gmail.com>', out.getvalue()) self.assertTrue(os.path.exists(os.path.join( self.tmpdir, '0001-video-Some-video-improvements.patch'))) |