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-rw-r--r--arch/arm/mach-omap2/omap3/lowlevel_init.S4
-rw-r--r--boot/Kconfig8
2 files changed, 2 insertions, 10 deletions
diff --git a/arch/arm/mach-omap2/omap3/lowlevel_init.S b/arch/arm/mach-omap2/omap3/lowlevel_init.S
index 1ab9472e198..5541a4714ac 100644
--- a/arch/arm/mach-omap2/omap3/lowlevel_init.S
+++ b/arch/arm/mach-omap2/omap3/lowlevel_init.S
@@ -176,10 +176,10 @@ ENTRY(lowlevel_init)
ldr sp, SRAM_STACK
str ip, [sp] /* stash ip register */
mov ip, lr /* save link reg across call */
-#if !defined(CONFIG_SYS_NAND_BOOT) && !defined(CONFIG_SYS_ONENAND_BOOT)
+#if !defined(CONFIG_SYS_NAND_BOOT)
/*
* No need to copy/exec the clock code - DPLL adjust already done
- * in NAND/oneNAND Boot.
+ * in NAND Boot.
*/
ldr r1, =SRAM_CLK_CODE
bl cpy_clk_code
diff --git a/boot/Kconfig b/boot/Kconfig
index c09a98c3233..f101200ba7a 100644
--- a/boot/Kconfig
+++ b/boot/Kconfig
@@ -1436,14 +1436,6 @@ config NAND_BOOT
booted via NAND flash. This is not a must, some SoCs need this,
some not.
-config ONENAND_BOOT
- bool "Support for booting from ONENAND"
- imply MTD_RAW_NAND
- help
- Enabling this will make a U-Boot binary that is capable of being
- booted via ONENAND. This is not a must, some SoCs need this,
- some not.
-
config QSPI_BOOT
bool "Support for booting from QSPI flash"
help