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-rw-r--r--drivers/power/pmic/rk8xx.c21
-rw-r--r--include/power/rk8xx_pmic.h2
2 files changed, 14 insertions, 9 deletions
diff --git a/drivers/power/pmic/rk8xx.c b/drivers/power/pmic/rk8xx.c
index 3bc696d4caa..d11f7a7886e 100644
--- a/drivers/power/pmic/rk8xx.c
+++ b/drivers/power/pmic/rk8xx.c
@@ -89,11 +89,6 @@ void rk8xx_off_for_plugin(struct udevice *dev)
}
}
-static struct reg_data rk806_init_reg[] = {
- /* RST_FUN */
- { RK806_REG_SYS_CFG3, BIT(7), GENMASK(7, 6)},
-};
-
static struct reg_data rk817_init_reg[] = {
/* enable the under-voltage protection,
* the under-voltage protection will shutdown the LDO3 and reset the PMIC
@@ -306,12 +301,20 @@ static int rk8xx_probe(struct udevice *dev)
value = (power_en2 & 0x0f) | ((power_en3 & 0x0f) << 4);
pmic_reg_write(dev, RK817_POWER_EN_SAVE1, value);
break;
- case RK806_ID:
+ case RK806_ID: {
+ u32 rst_fun = 2;
+
on_source = RK806_ON_SOURCE;
off_source = RK806_OFF_SOURCE;
- init_data = rk806_init_reg;
- init_data_num = ARRAY_SIZE(rk806_init_reg);
- break;
+
+ ret = dev_read_u32(dev, "rockchip,reset-mode", &rst_fun);
+ if (ret)
+ debug("rockchip,reset-mode property missing, defaulting to %d\n",
+ rst_fun);
+
+ pmic_clrsetbits(dev, RK806_REG_SYS_CFG3, RK806_RST_FUN_MSK,
+ FIELD_PREP(RK806_RST_FUN_MSK, rst_fun));
+ break; }
default:
printf("Unknown PMIC: RK%x!!\n", show_variant);
return -EINVAL;
diff --git a/include/power/rk8xx_pmic.h b/include/power/rk8xx_pmic.h
index 31221aa46b6..913b6ebe6d9 100644
--- a/include/power/rk8xx_pmic.h
+++ b/include/power/rk8xx_pmic.h
@@ -212,6 +212,8 @@ enum {
#define RK817_POWER_EN_SAVE0 0x99
#define RK817_POWER_EN_SAVE1 0xa4
+#define RK806_RST_FUN_MSK GENMASK(7, 6)
+
#define RK806_POWER_EN(x) (0x00 + (x))
/* POWER_ENx register lower 4 bits are write-protected unless the associated top bit is set */
#define RK806_POWER_EN_CLRSETBITS(bit, val) (((val) << (bit)) | (1 << ((bit) + 4)))