diff options
| -rw-r--r-- | arch/arm/Kconfig | 1 | ||||
| -rw-r--r-- | arch/arm/dts/Makefile | 1 | ||||
| -rw-r--r-- | arch/arm/dts/zynqmp-binman-som.dts | 225 | ||||
| -rw-r--r-- | arch/arm/mach-zynqmp/Kconfig | 14 | ||||
| -rw-r--r-- | configs/xilinx_zynqmp_kria_defconfig | 3 |
5 files changed, 244 insertions, 0 deletions
diff --git a/arch/arm/Kconfig b/arch/arm/Kconfig index 7282c4123b0..b068468f2e7 100644 --- a/arch/arm/Kconfig +++ b/arch/arm/Kconfig @@ -1324,6 +1324,7 @@ config ARCH_ZYNQMP_R5 config ARCH_ZYNQMP bool "Xilinx ZynqMP based platform" select ARM64 + select BINMAN select CLK select DM select DEBUG_UART_BOARD_INIT if SPL && DEBUG_UART diff --git a/arch/arm/dts/Makefile b/arch/arm/dts/Makefile index ce4ea32e708..95b552b303b 100644 --- a/arch/arm/dts/Makefile +++ b/arch/arm/dts/Makefile @@ -370,6 +370,7 @@ dtb-$(CONFIG_ARCH_ZYNQMP) += zynqmp-sm-k24-revA-sck-kv-g-revB.dtb dtb-$(CONFIG_ARCH_ZYNQMP) += zynqmp-smk-k24-revA-sck-kv-g-revB.dtb dtb-$(CONFIG_ARCH_ZYNQMP) += zynqmp-sm-k24-revA-sck-kr-g-revB.dtb dtb-$(CONFIG_ARCH_ZYNQMP) += zynqmp-smk-k24-revA-sck-kr-g-revB.dtb +dtb-$(CONFIG_ARCH_ZYNQMP) += zynqmp-binman-som.dtb dtb-$(CONFIG_ARCH_VERSAL) += \ versal-mini.dtb \ diff --git a/arch/arm/dts/zynqmp-binman-som.dts b/arch/arm/dts/zynqmp-binman-som.dts new file mode 100644 index 00000000000..3d9d8476c98 --- /dev/null +++ b/arch/arm/dts/zynqmp-binman-som.dts @@ -0,0 +1,225 @@ +// SPDX-License-Identifier: GPL-2.0 +/* + * dts file for Xilinx ZynqMP SOMs (k24/k26) + * + * (C) Copyright 2024, Advanced Micro Devices, Inc. + * + * Michal Simek <michal.simek@amd.com> + */ + +#include <config.h> + +/dts-v1/; +/ { + binman: binman { + multiple-images; + fit-dtb.blob { + filename = "fit-dtb.blob"; + pad-byte = <0>; + fit { + fit,align = <0x8>; + fit,external-offset = <0x0>; + description = "DTBs for SOMs+CCs"; + fit,fdt-list-val = "zynqmp-smk-k26-revA", "zynqmp-smk-k26-revA-sck-kr-g-revA", + "zynqmp-smk-k26-revA-sck-kr-g-revB", "zynqmp-smk-k26-revA-sck-kv-g-revA", + "zynqmp-smk-k26-revA-sck-kv-g-revB", "zynqmp-sm-k26-revA-sck-kv-g-revA", + "zynqmp-sm-k26-revA-sck-kv-g-revB", "zynqmp-sm-k26-revA-sck-kr-g-revB", + "zynqmp-smk-k24-revA-sck-kd-g-revA", "zynqmp-smk-k24-revA-sck-kv-g-revB", + "zynqmp-smk-k24-revA-sck-kr-g-revB", "zynqmp-sm-k24-revA-sck-kd-g-revA", + "zynqmp-sm-k24-revA-sck-kv-g-revB", "zynqmp-sm-k24-revA-sck-kr-g-revB"; + + images { + @fdt-SEQ { + description = "NAME"; + type = "flat_dt"; + arch = "arm64"; + compression = "none"; + hash-1 { + algo = "md5"; + }; + }; + }; + configurations { + default = "conf-1"; + conf-1 { + description = "SOM itself"; + fdt = "fdt-1"; + }; + conf-2 { + description = "zynqmp-smk-k26-.*-sck-kr-g-revA"; + fdt = "fdt-2"; + }; + conf-3 { + description = "zynqmp-smk-k26-.*-sck-kr-g-.*"; + fdt = "fdt-3"; + }; + conf-4 { + description = "zynqmp-smk-k26-.*-sck-kv-g-rev[AZ]"; + fdt = "fdt-4"; + }; + conf-5 { + description = "zynqmp-smk-k26-.*-sck-kv-g-.*"; + fdt = "fdt-5"; + }; + conf-6 { + description = "zynqmp-sm-k26-.*-sck-kv-g-rev[AZ]"; + fdt = "fdt-6"; + }; + conf-7 { + description = "zynqmp-sm-k26-.*-sck-kv-g-.*"; + fdt = "fdt-7"; + }; + conf-8 { + description = "zynqmp-sm-k26-.*-sck-kr-g-.*"; + fdt = "fdt-8"; + }; + conf-9 { + description = "zynqmp-smk-k24-.*-sck-kd-g-.*"; + fdt = "fdt-9"; + }; + conf-10 { + description = "zynqmp-smk-k24-.*-sck-kv-g-.*"; + fdt = "fdt-10"; + }; + conf-11 { + description = "zynqmp-smk-k24-.*-sck-kr-g-.*"; + fdt = "fdt-11"; + }; + conf-12 { + description = "zynqmp-sm-k24-.*-sck-kd-g-.*"; + fdt = "fdt-12"; + }; + conf-13 { + description = "zynqmp-sm-k24-.*-sck-kv-g-.*"; + fdt = "fdt-13"; + }; + conf-14 { + description = "zynqmp-sm-k24-.*-sck-kr-g-.*"; + fdt = "fdt-14"; + }; + }; + }; + }; + + /* u-boot.itb generation in a static way */ + itb { + filename = "u-boot.itb"; + pad-byte = <0>; + + fit { + description = "Configuration for Xilinx ZynqMP SoC"; + fit,align = <0x8>; + fit,external-offset = <0x0>; + images { + uboot { + description = "U-Boot (64-bit)"; + type = "firmware"; + os = "u-boot"; + arch = "arm64"; + compression = "none"; + load = /bits/ 64 <CONFIG_TEXT_BASE>; + entry = /bits/ 64 <CONFIG_TEXT_BASE>; + hash { + algo = "md5"; + }; + u-boot-nodtb { + }; + }; + atf { + description = "Trusted Firmware-A"; + type = "firmware"; + os = "arm-trusted-firmware"; + arch = "arm64"; + compression = "none"; + load = /bits/ 64 <CONFIG_BL31_LOAD_ADDR>; + entry = /bits/ 64 <CONFIG_BL31_LOAD_ADDR>; + hash { + algo = "md5"; + }; + atf-bl31 { + optional; + }; + }; + tee { + description = "OP-TEE"; + type = "tee"; + arch = "arm64"; + compression = "none"; + os = "tee"; + load = /bits/ 64 <CONFIG_BL31_LOAD_ADDR>; + entry = /bits/ 64 <CONFIG_BL31_LOAD_ADDR>; + tee-os { + optional; + }; + }; + fdt { + description = "Multi DTB fit image"; + type = "flat_dt"; + arch = "arm64"; + compression = "none"; + load = <0x0 0x100000>; + hash { + algo = "md5"; + }; + fdt-blob { + filename = "fit-dtb.blob"; + type = "blob-ext"; + }; + }; + }; + configurations { + default = "conf-1"; + conf-1 { + description = "Multi DTB with TF-A/TEE"; + firmware = "atf"; + loadables = "tee", "uboot", "fdt"; + }; + }; + }; + }; + + /* boot.bin generated with version string inside */ + bootimage { + filename = "boot.bin"; + pad-byte = <0>; + + blob-ext@1 { + offset = <0x0>; + filename = "spl/boot.bin"; + }; + /* Optional version string at offset 0x70 */ + blob-ext@2 { + offset = <0x70>; + filename = "version.bin"; + overlap; + optional; + }; + /* Optional version string at offset 0x94 */ + blob-ext@3 { + offset = <0x94>; + filename = "version.bin"; + overlap; + optional; + }; + }; + +#ifdef CONFIG_SYS_SPI_U_BOOT_OFFS + /* Full QSPI image for recovery app */ + image { + filename = "qspi.bin"; + pad-byte = <0>; + + blob-ext@1 { + offset = <0x0>; + filename = "boot.bin"; + }; + blob-ext@2 { + offset = <CONFIG_SYS_SPI_U_BOOT_OFFS>; + filename = "u-boot.itb"; + }; + fdtmap { + }; + }; +#endif + }; +}; diff --git a/arch/arm/mach-zynqmp/Kconfig b/arch/arm/mach-zynqmp/Kconfig index aea13622b68..92d61e84319 100644 --- a/arch/arm/mach-zynqmp/Kconfig +++ b/arch/arm/mach-zynqmp/Kconfig @@ -132,6 +132,20 @@ config SPL_ZYNQMP_RESTORE_JTAG even if no eFuses were burnt. This option restores the interface if possible. +config BL31_LOAD_ADDR + hex "Load address of BL31 image (mostly TF-A)" + default 0xfffea000 + help + The load address for the BL31 image. This value is used to build the + FIT image header that places BL31 in memory where it will run. + +config BL32_LOAD_ADDR + hex "Load address of BL32 image (mostly secure OS)" + default 0 + help + The load address for the BL32 image. This value is used to build the + FIT image header that places BL32 in memory where it will run. + config ZYNQ_SDHCI_MAX_FREQ default 200000000 diff --git a/configs/xilinx_zynqmp_kria_defconfig b/configs/xilinx_zynqmp_kria_defconfig index e5ffc7076fb..c9f596a4201 100644 --- a/configs/xilinx_zynqmp_kria_defconfig +++ b/configs/xilinx_zynqmp_kria_defconfig @@ -47,6 +47,7 @@ CONFIG_SYS_PBSIZE=2073 CONFIG_BOARD_EARLY_INIT_R=y CONFIG_CLOCKS=y CONFIG_SPL_MAX_SIZE=0x40000 +# CONFIG_SPL_BINMAN_SYMBOLS is not set # CONFIG_SPL_SHARES_INIT_SP_ADDR is not set CONFIG_SPL_FS_LOAD_KERNEL_NAME="" CONFIG_SPL_FS_LOAD_ARGS_NAME="" @@ -223,6 +224,8 @@ CONFIG_VIDEO_ZYNQMP_DPSUB=y CONFIG_VIRTIO_MMIO=y CONFIG_VIRTIO_NET=y CONFIG_VIRTIO_BLK=y +# CONFIG_BINMAN_FDT is not set +CONFIG_BINMAN_DTB="./arch/arm/dts/zynqmp-binman-som.dtb" CONFIG_PANIC_HANG=y CONFIG_TPM=y CONFIG_SPL_GZIP=y |