diff options
| -rw-r--r-- | include/configs/p1_p2_bootsrc.h | 20 | ||||
| -rw-r--r-- | include/configs/p1_p2_rdb_pc.h | 13 |
2 files changed, 33 insertions, 0 deletions
diff --git a/include/configs/p1_p2_bootsrc.h b/include/configs/p1_p2_bootsrc.h index 13e4fdb4fdf..d155e553e20 100644 --- a/include/configs/p1_p2_bootsrc.h +++ b/include/configs/p1_p2_bootsrc.h @@ -34,6 +34,18 @@ #define RST_NOR_CMD(var, ...) "" #endif +#ifdef __SW_BOOT_NOR_BANK_LO +#define RST_NOR_LO_CMD(var, ...) __VAR_CMD_RST(var, __VA_ARGS__ __BOOTSRC_CMD(__SW_BOOT_NOR_BANK_LO, __SW_BOOT_MASK)) +#else +#define RST_NOR_LO_CMD(var, ...) "" +#endif + +#ifdef __SW_BOOT_NOR_BANK_UP +#define RST_NOR_UP_CMD(var, ...) __VAR_CMD_RST(var, __VA_ARGS__ __BOOTSRC_CMD(__SW_BOOT_NOR_BANK_UP, __SW_BOOT_MASK)) +#else +#define RST_NOR_UP_CMD(var, ...) "" +#endif + #ifdef __SW_BOOT_SPI #define RST_SPI_CMD(var, ...) __VAR_CMD_RST(var, __VA_ARGS__ __BOOTSRC_CMD(__SW_BOOT_SPI, __SW_BOOT_MASK)) #else @@ -46,6 +58,12 @@ #define RST_SD_CMD(var, ...) "" #endif +#ifdef __SW_BOOT_SD2 +#define RST_SD2_CMD(var, ...) __VAR_CMD_RST(var, __VA_ARGS__ __BOOTSRC_CMD(__SW_BOOT_SD2, __SW_BOOT_MASK)) +#else +#define RST_SD2_CMD(var, ...) "" +#endif + #ifdef __SW_BOOT_NAND #define RST_NAND_CMD(var, ...) __VAR_CMD_RST(var, __VA_ARGS__ __BOOTSRC_CMD(__SW_BOOT_NAND, __SW_BOOT_MASK)) #else @@ -57,3 +75,5 @@ #else #define RST_PCIE_CMD(var, ...) "" #endif + +#define RST_DEF_CMD(var, ...) __VAR_CMD_RST(var, __VA_ARGS__ __BOOTSRC_CMD(0x00, 0xff)) diff --git a/include/configs/p1_p2_rdb_pc.h b/include/configs/p1_p2_rdb_pc.h index f7d8723b03d..bd2d657f1c9 100644 --- a/include/configs/p1_p2_rdb_pc.h +++ b/include/configs/p1_p2_rdb_pc.h @@ -24,6 +24,9 @@ #define __SW_NOR_BANK_MASK 0xfd #define __SW_NOR_BANK_UP 0x00 #define __SW_NOR_BANK_LO 0x02 +#define __SW_BOOT_NOR_BANK_UP 0x5c /* (__SW_BOOT_NOR | __SW_NOR_BANK_UP) */ +#define __SW_BOOT_NOR_BANK_LO 0x5e /* (__SW_BOOT_NOR | __SW_NOR_BANK_LO) */ +#define __SW_BOOT_NOR_BANK_MASK 0x01 /* (__SW_BOOT_MASK & __SW_NOR_BANK_MASK) */ #define CONFIG_SYS_L2_SIZE (256 << 10) #endif @@ -52,6 +55,9 @@ #define __SW_NOR_BANK_MASK 0xfd #define __SW_NOR_BANK_UP 0x00 #define __SW_NOR_BANK_LO 0x02 +#define __SW_BOOT_NOR_BANK_UP 0x64 /* (__SW_BOOT_NOR | __SW_NOR_BANK_UP) */ +#define __SW_BOOT_NOR_BANK_LO 0x66 /* (__SW_BOOT_NOR | __SW_NOR_BANK_LO) */ +#define __SW_BOOT_NOR_BANK_MASK 0x01 /* (__SW_BOOT_MASK & __SW_NOR_BANK_MASK) */ #define CONFIG_SYS_L2_SIZE (256 << 10) /* * Dynamic MTD Partition support with mtdparts @@ -70,6 +76,9 @@ #define __SW_NOR_BANK_MASK 0xfd #define __SW_NOR_BANK_UP 0x00 #define __SW_NOR_BANK_LO 0x02 +#define __SW_BOOT_NOR_BANK_UP 0xc8 /* (__SW_BOOT_NOR | __SW_NOR_BANK_UP) */ +#define __SW_BOOT_NOR_BANK_LO 0xca /* (__SW_BOOT_NOR | __SW_NOR_BANK_LO) */ +#define __SW_BOOT_NOR_BANK_MASK 0x01 /* (__SW_BOOT_MASK & __SW_NOR_BANK_MASK) */ #define CONFIG_SYS_L2_SIZE (512 << 10) /* * Dynamic MTD Partition support with mtdparts @@ -465,10 +474,14 @@ __VSCFW_ADDR \ MAP_NOR_LO_CMD(map_lowernorbank) \ MAP_NOR_UP_CMD(map_uppernorbank) \ RST_NOR_CMD(norboot) \ +RST_NOR_LO_CMD(norlowerboot) \ +RST_NOR_UP_CMD(norupperboot) \ RST_SPI_CMD(spiboot) \ RST_SD_CMD(sdboot) \ +RST_SD2_CMD(sd2boot) \ RST_NAND_CMD(nandboot) \ RST_PCIE_CMD(pciboot) \ +RST_DEF_CMD(defboot) \ "" #define CONFIG_USB_FAT_BOOT \ |