diff options
| -rw-r--r-- | arch/arm/dts/rk3308-rock-s0-u-boot.dtsi | 12 | ||||
| -rw-r--r-- | arch/arm/dts/rk3399-nanopi-r4s-u-boot.dtsi | 5 | ||||
| -rw-r--r-- | configs/nanopi-r3s-rk3566_defconfig | 1 | ||||
| -rw-r--r-- | configs/rock-s0-rk3308_defconfig | 2 | ||||
| -rw-r--r-- | drivers/clk/rockchip/clk_rk3568.c | 4 | ||||
| -rw-r--r-- | drivers/clk/rockchip/clk_rk3588.c | 4 |
6 files changed, 23 insertions, 5 deletions
diff --git a/arch/arm/dts/rk3308-rock-s0-u-boot.dtsi b/arch/arm/dts/rk3308-rock-s0-u-boot.dtsi index 84ca2ee0d5f..c8c56b17a15 100644 --- a/arch/arm/dts/rk3308-rock-s0-u-boot.dtsi +++ b/arch/arm/dts/rk3308-rock-s0-u-boot.dtsi @@ -7,6 +7,14 @@ bootph-some-ram; }; +&gpio4 { + bootph-pre-ram; +}; + +&sdmmc_2030 { + bootph-pre-ram; +}; + &uart0 { bootph-all; clock-frequency = <24000000>; @@ -16,6 +24,10 @@ bootph-all; }; +&vcc_sd { + bootph-pre-ram; +}; + &vdd_core { regulator-init-microvolt = <1015000>; }; diff --git a/arch/arm/dts/rk3399-nanopi-r4s-u-boot.dtsi b/arch/arm/dts/rk3399-nanopi-r4s-u-boot.dtsi index 69800cc368d..931499b084c 100644 --- a/arch/arm/dts/rk3399-nanopi-r4s-u-boot.dtsi +++ b/arch/arm/dts/rk3399-nanopi-r4s-u-boot.dtsi @@ -36,3 +36,8 @@ }; }; }; + +&u2phy1_host { + phy-supply = <&vdd_5v>; + status = "okay"; +}; diff --git a/configs/nanopi-r3s-rk3566_defconfig b/configs/nanopi-r3s-rk3566_defconfig index 870613f690a..16e09753a72 100644 --- a/configs/nanopi-r3s-rk3566_defconfig +++ b/configs/nanopi-r3s-rk3566_defconfig @@ -54,7 +54,6 @@ CONFIG_PHY_REALTEK=y CONFIG_DWC_ETH_QOS=y CONFIG_DWC_ETH_QOS_ROCKCHIP=y CONFIG_RTL8169=y -CONFIG_NVME_PCI=y CONFIG_PCIE_DW_ROCKCHIP=y CONFIG_PHY_ROCKCHIP_INNO_USB2=y CONFIG_PHY_ROCKCHIP_NANENG_COMBOPHY=y diff --git a/configs/rock-s0-rk3308_defconfig b/configs/rock-s0-rk3308_defconfig index 0a46e7bb187..063e0b921d7 100644 --- a/configs/rock-s0-rk3308_defconfig +++ b/configs/rock-s0-rk3308_defconfig @@ -2,6 +2,7 @@ CONFIG_ARM=y CONFIG_SKIP_LOWLEVEL_INIT=y CONFIG_COUNTER_FREQUENCY=24000000 CONFIG_ARCH_ROCKCHIP=y +CONFIG_SPL_GPIO=y CONFIG_DEFAULT_DEVICE_TREE="rockchip/rk3308-rock-s0" CONFIG_DM_RESET=y CONFIG_ROCKCHIP_RK3308=y @@ -53,6 +54,7 @@ CONFIG_PHY_ROCKCHIP_INNO_USB2=y CONFIG_PINCTRL=y CONFIG_REGULATOR_PWM=y CONFIG_DM_REGULATOR_FIXED=y +CONFIG_SPL_DM_REGULATOR_FIXED=y CONFIG_PWM_ROCKCHIP=y CONFIG_RAM=y CONFIG_BAUDRATE=1500000 diff --git a/drivers/clk/rockchip/clk_rk3568.c b/drivers/clk/rockchip/clk_rk3568.c index 977699d509d..533031caead 100644 --- a/drivers/clk/rockchip/clk_rk3568.c +++ b/drivers/clk/rockchip/clk_rk3568.c @@ -2680,7 +2680,7 @@ static ulong rk3568_clk_set_rate(struct clk *clk, ulong rate) return ret; }; -#if (IS_ENABLED(OF_CONTROL)) || (!IS_ENABLED(OF_PLATDATA)) +#if (CONFIG_IS_ENABLED(OF_CONTROL)) || (!CONFIG_IS_ENABLED(OF_PLATDATA)) static int rk3568_gmac0_src_set_parent(struct clk *clk, struct clk *parent) { struct rk3568_clk_priv *priv = dev_get_priv(clk->dev); @@ -2859,7 +2859,7 @@ static int rk3568_clk_set_parent(struct clk *clk, struct clk *parent) static struct clk_ops rk3568_clk_ops = { .get_rate = rk3568_clk_get_rate, .set_rate = rk3568_clk_set_rate, -#if (IS_ENABLED(OF_CONTROL)) || (!IS_ENABLED(OF_PLATDATA)) +#if (CONFIG_IS_ENABLED(OF_CONTROL)) || (!CONFIG_IS_ENABLED(OF_PLATDATA)) .set_parent = rk3568_clk_set_parent, #endif }; diff --git a/drivers/clk/rockchip/clk_rk3588.c b/drivers/clk/rockchip/clk_rk3588.c index 6042fc10cdb..8c3a113526f 100644 --- a/drivers/clk/rockchip/clk_rk3588.c +++ b/drivers/clk/rockchip/clk_rk3588.c @@ -1822,7 +1822,7 @@ static ulong rk3588_clk_set_rate(struct clk *clk, ulong rate) */ #define ROCKCHIP_MMC_DELAY_ELEMENT_PSEC 60 -#if (IS_ENABLED(OF_CONTROL)) || (!IS_ENABLED(OF_PLATDATA)) +#if (CONFIG_IS_ENABLED(OF_CONTROL)) || (!CONFIG_IS_ENABLED(OF_PLATDATA)) static int __maybe_unused rk3588_dclk_vop_set_parent(struct clk *clk, struct clk *parent) { @@ -1915,7 +1915,7 @@ static int rk3588_clk_set_parent(struct clk *clk, struct clk *parent) static struct clk_ops rk3588_clk_ops = { .get_rate = rk3588_clk_get_rate, .set_rate = rk3588_clk_set_rate, -#if (IS_ENABLED(OF_CONTROL)) || (!IS_ENABLED(OF_PLATDATA)) +#if (CONFIG_IS_ENABLED(OF_CONTROL)) || (!CONFIG_IS_ENABLED(OF_PLATDATA)) .set_parent = rk3588_clk_set_parent, #endif }; |