diff options
| -rw-r--r-- | drivers/mtd/nand/raw/nand_base.c | 29 |
1 files changed, 25 insertions, 4 deletions
diff --git a/drivers/mtd/nand/raw/nand_base.c b/drivers/mtd/nand/raw/nand_base.c index 9eba360d55f..6b4adcf6bdc 100644 --- a/drivers/mtd/nand/raw/nand_base.c +++ b/drivers/mtd/nand/raw/nand_base.c @@ -4487,6 +4487,7 @@ EXPORT_SYMBOL(nand_detect); static int nand_dt_init(struct mtd_info *mtd, struct nand_chip *chip, ofnode node) { int ret, ecc_mode = -1, ecc_strength, ecc_step; + int ecc_algo = NAND_ECC_UNKNOWN; const char *str; ret = ofnode_read_s32_default(node, "nand-bus-width", -1); @@ -4512,10 +4513,22 @@ static int nand_dt_init(struct mtd_info *mtd, struct nand_chip *chip, ofnode nod ecc_mode = NAND_ECC_SOFT_BCH; } - if (ecc_mode == NAND_ECC_SOFT) { - str = ofnode_read_string(node, "nand-ecc-algo"); - if (str && !strcmp(str, "bch")) - ecc_mode = NAND_ECC_SOFT_BCH; + str = ofnode_read_string(node, "nand-ecc-algo"); + if (str) { + /* + * If we are in NAND_ECC_SOFT mode, just alter the + * soft mode to BCH here. No change of algorithm. + */ + if (ecc_mode == NAND_ECC_SOFT) { + if (!strcmp(str, "bch")) + ecc_mode = NAND_ECC_SOFT_BCH; + } else { + if (!strcmp(str, "bch")) { + ecc_algo = NAND_ECC_BCH; + } else if (!strcmp(str, "hamming")) { + ecc_algo = NAND_ECC_HAMMING; + } + } } ecc_strength = ofnode_read_s32_default(node, @@ -4529,6 +4542,14 @@ static int nand_dt_init(struct mtd_info *mtd, struct nand_chip *chip, ofnode nod return -EINVAL; } + /* + * Chip drivers may have assigned default algorithms here, + * onlt override it if we have found something explicitly + * specified in the device tree. + */ + if (ecc_algo != NAND_ECC_UNKNOWN) + chip->ecc.algo = ecc_algo; + if (ecc_mode >= 0) chip->ecc.mode = ecc_mode; |