diff options
| -rw-r--r-- | drivers/net/ti/am65-cpsw-nuss.c | 35 | ||||
| -rw-r--r-- | include/miiphy.h | 15 | ||||
| -rw-r--r-- | net/mdio-uclass.c | 18 |
3 files changed, 42 insertions, 26 deletions
diff --git a/drivers/net/ti/am65-cpsw-nuss.c b/drivers/net/ti/am65-cpsw-nuss.c index 2aa7e5e3a30..7a88f76fd09 100644 --- a/drivers/net/ti/am65-cpsw-nuss.c +++ b/drivers/net/ti/am65-cpsw-nuss.c @@ -234,14 +234,11 @@ out: #define AM65_GMII_SEL_MODE_RGMII 2 #define AM65_GMII_SEL_MODE_SGMII 3 -#define AM65_GMII_SEL_RGMII_IDMODE BIT(4) - static int am65_cpsw_gmii_sel_k3(struct am65_cpsw_priv *priv, phy_interface_t phy_mode) { struct udevice *dev = priv->dev; u32 offset, reg, phandle; - bool rgmii_id = false; fdt_addr_t gmii_sel; u32 mode = 0; ofnode node; @@ -278,12 +275,6 @@ static int am65_cpsw_gmii_sel_k3(struct am65_cpsw_priv *priv, mode = AM65_GMII_SEL_MODE_RGMII; break; - case PHY_INTERFACE_MODE_RGMII_ID: - case PHY_INTERFACE_MODE_RGMII_TXID: - mode = AM65_GMII_SEL_MODE_RGMII; - rgmii_id = true; - break; - case PHY_INTERFACE_MODE_SGMII: mode = AM65_GMII_SEL_MODE_SGMII; break; @@ -298,9 +289,6 @@ static int am65_cpsw_gmii_sel_k3(struct am65_cpsw_priv *priv, break; }; - if (rgmii_id) - mode |= AM65_GMII_SEL_RGMII_IDMODE; - reg = mode; dev_dbg(dev, "gmii_sel PHY mode: %u, new gmii_sel: %08x\n", phy_mode, reg); @@ -630,7 +618,7 @@ static int am65_cpsw_phy_init(struct udevice *dev) u32 supported = PHY_GBIT_FEATURES; int ret = 0; - phydev = dm_eth_phy_connect(dev); + phydev = dm_eth_phy_connect_interface(dev, pdata->phy_interface); if (!phydev) { dev_err(dev, "phy_connect() failed\n"); return -ENODEV; @@ -657,9 +645,28 @@ static int am65_cpsw_ofdata_parse_phy(struct udevice *dev) dev_read_u32(dev, "reg", &priv->port_id); pdata->phy_interface = dev_read_phy_mode(dev); - if (pdata->phy_interface == PHY_INTERFACE_MODE_NA) { + + /* CPSW controllers supported by this driver have a fixed internal TX + * delay in RGMII mode. Fix up PHY mode to account for this and warn + * about Device Trees that claim to have a TX delay on the PCB. + */ + switch (pdata->phy_interface) { + case PHY_INTERFACE_MODE_RGMII_ID: + pdata->phy_interface = PHY_INTERFACE_MODE_RGMII_RXID; + break; + case PHY_INTERFACE_MODE_RGMII_TXID: + pdata->phy_interface = PHY_INTERFACE_MODE_RGMII; + break; + case PHY_INTERFACE_MODE_RGMII: + case PHY_INTERFACE_MODE_RGMII_RXID: + dev_warn(dev, + "RGMII mode without internal TX delay unsupported; please fix your Device Tree\n"); + break; + case PHY_INTERFACE_MODE_NA: dev_err(dev, "Invalid PHY mode, port %u\n", priv->port_id); return -EINVAL; + default: + break; } dev_read_u32(dev, "max-speed", (u32 *)&pdata->max_speed); diff --git a/include/miiphy.h b/include/miiphy.h index 00d0b9b6a43..96afe5f4030 100644 --- a/include/miiphy.h +++ b/include/miiphy.h @@ -193,6 +193,21 @@ struct phy_device *dm_mdio_phy_connect(struct udevice *mdiodev, int phyaddr, phy_interface_t interface); /** + * dm_eth_phy_connect_interface - Connect an Eth device to a PHY based on device + * tree with custom PHY interface + * + * Picks up the DT phy-handle and from ethernet device node and connects the + * ethernet device to the linked PHY, while allowing the caller to specify + * the phy-mode to use. + * + * @ethdev: ethernet device + * @interface: MAC-PHY protocol + * + * Return: pointer to phy_device, or 0 on error + */ +struct phy_device *dm_eth_phy_connect_interface(struct udevice *ethdev, + phy_interface_t interface); +/** * dm_eth_phy_connect - Connect an Eth device to a PHY based on device tree * * Picks up the DT phy-handle and phy-mode from ethernet device node and diff --git a/net/mdio-uclass.c b/net/mdio-uclass.c index 4f052ae432c..64af689d2df 100644 --- a/net/mdio-uclass.c +++ b/net/mdio-uclass.c @@ -242,8 +242,8 @@ struct phy_device *dm_mdio_phy_connect(struct udevice *mdiodev, int phyaddr, return phy_connect(pdata->mii_bus, phyaddr, ethdev, interface); } -static struct phy_device *dm_eth_connect_phy_handle(struct udevice *ethdev, - phy_interface_t interface) +struct phy_device *dm_eth_phy_connect_interface(struct udevice *ethdev, + phy_interface_t interface) { u32 phy_addr; struct udevice *mdiodev; @@ -282,8 +282,10 @@ static struct phy_device *dm_eth_connect_phy_handle(struct udevice *ethdev, phy = dm_mdio_phy_connect(mdiodev, phy_addr, ethdev, interface); out: - if (phy) + if (phy) { phy->node = phynode; + phy->interface = interface; + } return phy; } @@ -292,7 +294,6 @@ out: struct phy_device *dm_eth_phy_connect(struct udevice *ethdev) { phy_interface_t interface; - struct phy_device *phy; if (!dev_has_ofnode(ethdev)) { debug("%s: supplied eth dev has no DT node!\n", ethdev->name); @@ -303,14 +304,7 @@ struct phy_device *dm_eth_phy_connect(struct udevice *ethdev) if (interface == PHY_INTERFACE_MODE_NA) dev_dbg(ethdev, "can't find interface mode, default to NA\n"); - phy = dm_eth_connect_phy_handle(ethdev, interface); - - if (!phy) - return NULL; - - phy->interface = interface; - - return phy; + return dm_eth_phy_connect_interface(ethdev, interface); } UCLASS_DRIVER(mdio) = { |