diff options
-rw-r--r-- | drivers/clk/renesas/clk-rcar-gen3.c | 3 | ||||
-rw-r--r-- | drivers/clk/renesas/rcar-gen3-cpg.h | 4 |
2 files changed, 7 insertions, 0 deletions
diff --git a/drivers/clk/renesas/clk-rcar-gen3.c b/drivers/clk/renesas/clk-rcar-gen3.c index bcf5865222f..84cf072cae6 100644 --- a/drivers/clk/renesas/clk-rcar-gen3.c +++ b/drivers/clk/renesas/clk-rcar-gen3.c @@ -289,6 +289,9 @@ static u64 gen3_clk_get_rate64(struct clk *clk) div, rate); return rate; + case CLK_TYPE_GEN3_SDH: /* Fixed factor 1:1 */ + return gen3_clk_get_rate64(&parent); + case CLK_TYPE_GEN3_SD: /* FIXME */ fallthrough; case CLK_TYPE_R8A779A0_SD: diff --git a/drivers/clk/renesas/rcar-gen3-cpg.h b/drivers/clk/renesas/rcar-gen3-cpg.h index 7bf57013619..9ca42c2dddb 100644 --- a/drivers/clk/renesas/rcar-gen3-cpg.h +++ b/drivers/clk/renesas/rcar-gen3-cpg.h @@ -17,6 +17,7 @@ enum rcar_gen3_clk_types { CLK_TYPE_GEN3_PLL2, CLK_TYPE_GEN3_PLL3, CLK_TYPE_GEN3_PLL4, + CLK_TYPE_GEN3_SDH, CLK_TYPE_GEN3_SD, CLK_TYPE_GEN3_R, CLK_TYPE_GEN3_MDSEL, /* Select parent/divider using mode pin */ @@ -40,6 +41,9 @@ enum rcar_gen3_clk_types { CLK_TYPE_GEN3_SOC_BASE, }; +#define DEF_GEN3_SDH(_name, _id, _parent, _offset) \ + DEF_BASE(_name, _id, CLK_TYPE_GEN3_SDH, _parent, .offset = _offset) + #define DEF_GEN3_SD(_name, _id, _parent, _offset) \ DEF_BASE(_name, _id, CLK_TYPE_GEN3_SD, _parent, .offset = _offset) |