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-rw-r--r--Makefile64
-rw-r--r--scripts/Kbuild.include7
-rw-r--r--scripts/kconfig/Makefile4
3 files changed, 36 insertions, 39 deletions
diff --git a/Makefile b/Makefile
index e1ac2d9cec3..a9cba5b6e07 100644
--- a/Makefile
+++ b/Makefile
@@ -51,7 +51,7 @@ undefine MK_ARCH
# descending is started. They are now explicitly listed as the
# prepare rule.
-ifneq ($(sub-make-done),1)
+ifneq ($(sub_make_done),1)
# Do not use make's built-in rules and variables
# (this increases performance and avoids hard-to-debug behaviour)
@@ -176,17 +176,18 @@ MAKEFLAGS += --no-print-directory
endif # ifneq ($(KBUILD_OUTPUT),)
+export sub_make_done := 1
PHONY += $(MAKECMDGOALS) sub-make
$(filter-out _all sub-make $(CURDIR)/Makefile, $(MAKECMDGOALS)) _all: sub-make
@:
sub-make: FORCE
- $(Q)$(MAKE) sub-make-done=1 \
+ $(Q)$(MAKE) \
$(if $(KBUILD_OUTPUT),-C $(KBUILD_OUTPUT) KBUILD_SRC=$(CURDIR)) \
-f $(CURDIR)/Makefile $(filter-out _all sub-make,$(MAKECMDGOALS))
-else # sub-make-done
+else # sub_make_done
# We process the rest of the Makefile if this is the final invocation of make
# Do not print "Entering directory ...",
@@ -229,6 +230,9 @@ ifeq ($(KBUILD_EXTMOD),)
_all: all
else
_all: modules
+PHONY += prepare
+prepare:
+ $(cmd_crmodverdir)
endif
ifeq ($(KBUILD_SRC),)
@@ -435,16 +439,18 @@ KBUILD_CPPFLAGS := -D__KERNEL__ -D__UBOOT__
KBUILD_CFLAGS := -Wall -Werror=strict-prototypes -Wno-trigraphs \
-Wno-format-security \
- -fno-builtin -ffreestanding $(CSTD_FLAG)
+ -fno-builtin -ffreestanding $(CSTD_FLAG) \
+ -fno-PIE \
+ -Werror=implicit-function-declaration -Werror=implicit-int
KBUILD_CFLAGS += -fshort-wchar -fno-strict-aliasing
-KBUILD_AFLAGS := -D__ASSEMBLY__
+KBUILD_AFLAGS := -D__ASSEMBLY__ -fno-PIE
KBUILD_LDFLAGS :=
ifeq ($(cc-name),clang)
ifneq ($(CROSS_COMPILE),)
CLANG_TARGET := --target=$(notdir $(CROSS_COMPILE:%-=%))
LDPPFLAGS += $(CLANG_TARGET)
-GCC_TOOLCHAIN_DIR := $(dir $(shell which $(LD)))
+GCC_TOOLCHAIN_DIR := $(dir $(shell which $(CROSS_COMPILE)elfedit))
CLANG_PREFIX := --prefix=$(GCC_TOOLCHAIN_DIR)
GCC_TOOLCHAIN := $(realpath $(GCC_TOOLCHAIN_DIR)/..)
endif
@@ -457,10 +463,6 @@ KBUILD_CFLAGS += $(call cc-option, -no-integrated-as)
KBUILD_AFLAGS += $(call cc-option, -no-integrated-as)
endif
-# Don't generate position independent code
-KBUILD_CFLAGS += $(call cc-option,-fno-PIE)
-KBUILD_AFLAGS += $(call cc-option,-fno-PIE)
-
# Read UBOOTRELEASE from include/config/uboot.release (if it exists)
UBOOTRELEASE = $(shell cat include/config/uboot.release 2> /dev/null)
UBOOTVERSION = $(VERSION)$(if $(PATCHLEVEL),.$(PATCHLEVEL)$(if $(SUBLEVEL),.$(SUBLEVEL)))$(EXTRAVERSION)
@@ -515,10 +517,14 @@ PHONY += outputmakefile
# outputmakefile generates a Makefile in the output directory, if using a
# separate output directory. This allows convenient use of make in the
# output directory.
+# At the same time when output Makefile generated, generate .gitignore to
+# ignore whole output directory
outputmakefile:
ifneq ($(KBUILD_SRC),)
$(Q)ln -fsn $(srctree) source
$(Q)$(CONFIG_SHELL) $(srctree)/scripts/mkmakefile $(srctree)
+ $(Q)test -e .gitignore || \
+ { echo "# this is build directory, ignore it"; echo "*"; } > .gitignore
endif
# To make sure we do not include .config for any of the *config targets
@@ -799,7 +805,6 @@ ifdef CONFIG_CC_IS_CLANG
KBUILD_CPPFLAGS += $(call cc-option,-Qunused-arguments,)
KBUILD_CFLAGS += $(call cc-disable-warning, format-invalid-specifier)
KBUILD_CFLAGS += $(call cc-disable-warning, gnu)
-KBUILD_CFLAGS += $(call cc-disable-warning, address-of-packed-member)
# Quiet clang warning: comparison of unsigned expression < 0 is always false
KBUILD_CFLAGS += $(call cc-disable-warning, tautological-compare)
# CLANG uses a _MergedGlobals as optimization, but this breaks modpost, as the
@@ -1737,6 +1742,7 @@ u-boot.elf: u-boot.bin u-boot-elf.lds
u-boot-elf.lds: arch/u-boot-elf.lds prepare FORCE
$(call if_changed_dep,cpp_lds)
+PHONY += prepare0
# MediaTek's ARM-based u-boot needs a header to contains its load address
# which is parsed by the BootROM.
# If the SPL build is enabled, the header will be added to the spl binary,
@@ -1919,7 +1925,7 @@ $(sort $(u-boot-init) $(u-boot-main)): $(u-boot-dirs) ;
# Error messages still appears in the original language
PHONY += $(u-boot-dirs)
-$(u-boot-dirs): prepare scripts
+$(u-boot-dirs): prepare
$(Q)$(MAKE) $(build)=$@
tools: prepare
@@ -1948,7 +1954,7 @@ include/config/uboot.release: include/config/auto.conf FORCE
# version.h and scripts_basic is processed / created.
# Listed in dependency order
-PHONY += prepare archprepare prepare0 prepare1 prepare2 prepare3
+PHONY += prepare archprepare prepare1 prepare3
# prepare3 is used to check if we are building in a separate output directory,
# and if so do:
@@ -1963,10 +1969,7 @@ ifneq ($(KBUILD_SRC),)
fi;
endif
-# prepare2 creates a makefile if using a separate output directory
-prepare2: prepare3 outputmakefile cfg
-
-prepare1: prepare2 $(version_h) $(timestamp_h) $(dt_h) $(env_h) \
+prepare1: prepare3 outputmakefile cfg $(version_h) $(timestamp_h) $(dt_h) $(env_h) \
include/config/auto.conf
ifeq ($(wildcard $(LDSCRIPT)),)
@echo >&2 " Could not find linker script."
@@ -1979,7 +1982,7 @@ prepare1: $(defaultenv_h)
envtools: $(defaultenv_h)
endif
-archprepare: prepare1 scripts_basic
+archprepare: prepare1 scripts
prepare0: archprepare FORCE
$(Q)$(MAKE) $(build)=.
@@ -2486,32 +2489,29 @@ else
target-dir = $(if $(KBUILD_EXTMOD),$(dir $<),$(dir $@))
endif
-%.s: %.c prepare scripts FORCE
+%.s: %.c prepare FORCE
$(Q)$(MAKE) $(build)=$(build-dir) $(target-dir)$(notdir $@)
-%.i: %.c prepare scripts FORCE
+%.i: %.c prepare FORCE
$(Q)$(MAKE) $(build)=$(build-dir) $(target-dir)$(notdir $@)
-%.o: %.c prepare scripts FORCE
+%.o: %.c prepare FORCE
$(Q)$(MAKE) $(build)=$(build-dir) $(target-dir)$(notdir $@)
-%.lst: %.c prepare scripts FORCE
+%.lst: %.c prepare FORCE
$(Q)$(MAKE) $(build)=$(build-dir) $(target-dir)$(notdir $@)
-%.s: %.S prepare scripts FORCE
+%.s: %.S prepare FORCE
$(Q)$(MAKE) $(build)=$(build-dir) $(target-dir)$(notdir $@)
-%.o: %.S prepare scripts FORCE
+%.o: %.S prepare FORCE
$(Q)$(MAKE) $(build)=$(build-dir) $(target-dir)$(notdir $@)
-%.symtypes: %.c prepare scripts FORCE
+%.symtypes: %.c prepare FORCE
$(Q)$(MAKE) $(build)=$(build-dir) $(target-dir)$(notdir $@)
# Modules
-/: prepare scripts FORCE
- $(cmd_crmodverdir)
+/: prepare FORCE
$(Q)$(MAKE) KBUILD_MODULES=$(if $(CONFIG_MODULES),1) \
$(build)=$(build-dir)
-%/: prepare scripts FORCE
- $(cmd_crmodverdir)
+%/: prepare FORCE
$(Q)$(MAKE) KBUILD_MODULES=$(if $(CONFIG_MODULES),1) \
$(build)=$(build-dir)
-%.ko: prepare scripts FORCE
- $(cmd_crmodverdir)
+%.ko: prepare FORCE
$(Q)$(MAKE) KBUILD_MODULES=$(if $(CONFIG_MODULES),1) \
$(build)=$(build-dir) $(@:.ko=.o)
$(Q)$(MAKE) -f $(srctree)/scripts/Makefile.modpost
@@ -2551,7 +2551,7 @@ $(cmd_files): ; # Do not try to update included dependency files
endif #ifeq ($(config-targets),1)
endif #ifeq ($(mixed-targets),1)
-endif # sub-make-done
+endif # sub_make_done
PHONY += FORCE
FORCE:
diff --git a/scripts/Kbuild.include b/scripts/Kbuild.include
index c0d3440a4b3..fd7a744478f 100644
--- a/scripts/Kbuild.include
+++ b/scripts/Kbuild.include
@@ -49,11 +49,10 @@ kecho := $($(quiet)kecho)
###
# filechk is used to check if the content of a generated file is updated.
# Sample usage:
-# define filechk_sample
-# echo $KERNELRELEASE
-# endef
-# version.h : Makefile
+# filechk_sample = echo $(KERNELRELEASE)
+# version.h: FORCE
# $(call filechk,sample)
+#
# The rule defined shall write to stdout the content of the new file.
# The existing file will be compared with the new one.
# - If no file exist it is created
diff --git a/scripts/kconfig/Makefile b/scripts/kconfig/Makefile
index ba30652f01a..f0f93c56bdb 100644
--- a/scripts/kconfig/Makefile
+++ b/scripts/kconfig/Makefile
@@ -220,9 +220,7 @@ $(obj)/gconf.o: $(obj)/.gconf-cfg
$(obj)/zconf.tab.o: $(obj)/zconf.lex.c
# check if necessary packages are available, and configure build flags
-define filechk_conf_cfg
- $(CONFIG_SHELL) $<
-endef
+filechk_conf_cfg = $(CONFIG_SHELL) $<
$(obj)/.%conf-cfg: $(src)/%conf-cfg.sh FORCE
$(call filechk,conf_cfg)