diff options
40 files changed, 90 insertions, 54 deletions
diff --git a/arch/arm/Kconfig b/arch/arm/Kconfig index 7212fc5afa7..c930fa28460 100644 --- a/arch/arm/Kconfig +++ b/arch/arm/Kconfig @@ -1185,6 +1185,7 @@ config ARCH_ROCKCHIP imply TPL_SYSRESET imply ADC imply SARADC_ROCKCHIP + imply SYS_NS16550 config TARGET_THUNDERX_88XX bool "Support ThunderX 88xx" diff --git a/arch/arm/dts/rk3188-radxarock-u-boot.dtsi b/arch/arm/dts/rk3188-radxarock-u-boot.dtsi new file mode 100644 index 00000000000..26f5707bb8f --- /dev/null +++ b/arch/arm/dts/rk3188-radxarock-u-boot.dtsi @@ -0,0 +1,24 @@ +/* + * Copyright (c) 2018 Fuzhou Rockchip Electronics Co., Ltd. + * + * SPDX-License-Identifier: GPL-2.0+ + */ + +&cru { + u-boot,dm-spl; +}; + +&pinctrl { + u-boot,dm-spl; +}; + +&uart2 { + status = "okay"; + u-boot,dm-spl; +}; + +&timer3 { + compatible = "rockchip,rk3368-timer", "rockchip,rk3288-timer"; + u-boot,dm-spl; + clock-frequency = <24000000>; +}; diff --git a/arch/arm/dts/rk3188-radxarock.dts b/arch/arm/dts/rk3188-radxarock.dts index 5f5b5e9a1f0..0fc4f54af2d 100644 --- a/arch/arm/dts/rk3188-radxarock.dts +++ b/arch/arm/dts/rk3188-radxarock.dts @@ -7,6 +7,7 @@ /dts-v1/; #include <dt-bindings/input/input.h> #include "rk3188.dtsi" +#include "rk3188-radxarock-u-boot.dtsi" / { model = "Radxa Rock"; @@ -356,11 +357,6 @@ status = "okay"; }; -&uart2 { - status = "okay"; - u-boot,dm-spl; -}; - &uart3 { status = "okay"; }; diff --git a/arch/arm/dts/rk3188.dtsi b/arch/arm/dts/rk3188.dtsi index f4d438eb66e..aeb5b80e144 100644 --- a/arch/arm/dts/rk3188.dtsi +++ b/arch/arm/dts/rk3188.dtsi @@ -105,7 +105,6 @@ compatible = "rockchip,rk3188-cru"; reg = <0x20000000 0x1000>; rockchip,grf = <&grf>; - u-boot,dm-spl; #clock-cells = <1>; #reset-cells = <1>; @@ -124,6 +123,12 @@ }; }; + timer3: timer@2000e000 { + compatible = "rockchip,rk3188-timer", "rockchip,rk3288-timer"; + reg = <0x2000e000 0x20>; + interrupts = <GIC_SPI 46 IRQ_TYPE_LEVEL_HIGH>; + }; + usbphy: phy { compatible = "rockchip,rk3188-usb-phy", "rockchip,rk3288-usb-phy"; rockchip,grf = <&grf>; @@ -156,7 +161,6 @@ #address-cells = <1>; #size-cells = <1>; ranges; - u-boot,dm-spl; gpio0: gpio0@2000a000 { compatible = "rockchip,gpio-bank"; diff --git a/arch/arm/mach-rockchip/Kconfig b/arch/arm/mach-rockchip/Kconfig index 0adaed43677..007cb22a349 100644 --- a/arch/arm/mach-rockchip/Kconfig +++ b/arch/arm/mach-rockchip/Kconfig @@ -103,7 +103,6 @@ config ROCKCHIP_RK3368 imply SPL_SERIAL_SUPPORT imply TPL_SERIAL_SUPPORT select DEBUG_UART_BOARD_INIT - select SYS_NS16550 help The Rockchip RK3368 is a ARM-based SoC with a octa-core (organised into a big and little cluster with 4 cores each) Cortex-A53 including diff --git a/arch/arm/mach-rockchip/Makefile b/arch/arm/mach-rockchip/Makefile index e1b0519b1f4..096dbac25b2 100644 --- a/arch/arm/mach-rockchip/Makefile +++ b/arch/arm/mach-rockchip/Makefile @@ -40,8 +40,10 @@ endif obj-$(CONFIG_$(SPL_TPL_)RAM) += sdram_common.o ifndef CONFIG_ARM64 +ifndef CONFIG_ROCKCHIP_RK3188 obj-y += rk_timer.o endif +endif obj-$(CONFIG_ROCKCHIP_RK3036) += rk3036/ obj-$(CONFIG_ROCKCHIP_RK3128) += rk3128/ diff --git a/arch/arm/mach-rockchip/make_fit_atf.py b/arch/arm/mach-rockchip/make_fit_atf.py index 7c6dd576781..9a404d1d324 100755 --- a/arch/arm/mach-rockchip/make_fit_atf.py +++ b/arch/arm/mach-rockchip/make_fit_atf.py @@ -13,8 +13,6 @@ import getopt # pip install pyelftools from elftools.elf.elffile import ELFFile -from elftools.elf.sections import SymbolTableSection -from elftools.elf.segments import Segment, InterpSegment, NoteSegment ELF_SEG_P_TYPE='p_type' ELF_SEG_P_PADDR='p_paddr' diff --git a/arch/arm/mach-rockchip/rk3188-board-spl.c b/arch/arm/mach-rockchip/rk3188-board-spl.c index 74771d3a0b0..3ccc4f12054 100644 --- a/arch/arm/mach-rockchip/rk3188-board-spl.c +++ b/arch/arm/mach-rockchip/rk3188-board-spl.c @@ -131,8 +131,6 @@ void board_init_f(ulong dummy) hang(); } - rockchip_timer_init(); - ret = rockchip_get_clk(&dev); if (ret) { debug("CLK init failed: %d\n", ret); diff --git a/arch/arm/mach-rockchip/rk322x-board-spl.c b/arch/arm/mach-rockchip/rk322x-board-spl.c index 206abfafcd9..d3d04465744 100644 --- a/arch/arm/mach-rockchip/rk322x-board-spl.c +++ b/arch/arm/mach-rockchip/rk322x-board-spl.c @@ -95,7 +95,7 @@ void board_init_f(ulong dummy) /* Disable the ddr secure region setting to make it non-secure */ rk_clrreg(SGRF_DDR_CON0, 0x4000); -#if defined(CONFIG_ROCKCHIP_SPL_BACK_TO_BROM) && !defined(CONFIG_SPL_BOARD_INIT) +#if defined(CONFIG_SPL_ROCKCHIP_BACK_TO_BROM) && !defined(CONFIG_SPL_BOARD_INIT) back_to_bootrom(BROM_BOOT_NEXTSTAGE); #endif } diff --git a/configs/chromebit_mickey_defconfig b/configs/chromebit_mickey_defconfig index d8ab84b8e47..d1728ef6395 100644 --- a/configs/chromebit_mickey_defconfig +++ b/configs/chromebit_mickey_defconfig @@ -71,7 +71,6 @@ CONFIG_SPL_RAM=y CONFIG_DEBUG_UART_BASE=0xff690000 CONFIG_DEBUG_UART_CLOCK=24000000 CONFIG_DEBUG_UART_SHIFT=2 -CONFIG_SYS_NS16550=y CONFIG_ROCKCHIP_SERIAL=y CONFIG_ROCKCHIP_SPI=y CONFIG_SYSRESET=y diff --git a/configs/chromebook_jerry_defconfig b/configs/chromebook_jerry_defconfig index 5dabae5434a..43d93f4637a 100644 --- a/configs/chromebook_jerry_defconfig +++ b/configs/chromebook_jerry_defconfig @@ -72,7 +72,6 @@ CONFIG_SPL_RAM=y CONFIG_DEBUG_UART_BASE=0xff690000 CONFIG_DEBUG_UART_CLOCK=24000000 CONFIG_DEBUG_UART_SHIFT=2 -CONFIG_SYS_NS16550=y CONFIG_ROCKCHIP_SERIAL=y CONFIG_ROCKCHIP_SPI=y CONFIG_SYSRESET=y diff --git a/configs/chromebook_minnie_defconfig b/configs/chromebook_minnie_defconfig index c54c00f4841..706809ca53f 100644 --- a/configs/chromebook_minnie_defconfig +++ b/configs/chromebook_minnie_defconfig @@ -71,7 +71,6 @@ CONFIG_SPL_RAM=y CONFIG_DEBUG_UART_BASE=0xff690000 CONFIG_DEBUG_UART_CLOCK=24000000 CONFIG_DEBUG_UART_SHIFT=2 -CONFIG_SYS_NS16550=y CONFIG_ROCKCHIP_SERIAL=y CONFIG_ROCKCHIP_SPI=y CONFIG_SYSRESET=y diff --git a/configs/evb-rk3128_defconfig b/configs/evb-rk3128_defconfig index 5407cbaf22c..796d0ec92e6 100644 --- a/configs/evb-rk3128_defconfig +++ b/configs/evb-rk3128_defconfig @@ -34,7 +34,6 @@ CONFIG_DM_RESET=y CONFIG_DEBUG_UART_BASE=0x20068000 CONFIG_DEBUG_UART_CLOCK=24000000 CONFIG_DEBUG_UART_SHIFT=2 -CONFIG_SYS_NS16550=y CONFIG_SYSRESET=y CONFIG_USB=y CONFIG_USB_EHCI_HCD=y diff --git a/configs/evb-rk3229_defconfig b/configs/evb-rk3229_defconfig index 549a16673a2..710b0b4e1a9 100644 --- a/configs/evb-rk3229_defconfig +++ b/configs/evb-rk3229_defconfig @@ -46,7 +46,6 @@ CONFIG_BAUDRATE=1500000 CONFIG_DEBUG_UART_BASE=0x11030000 CONFIG_DEBUG_UART_CLOCK=24000000 CONFIG_DEBUG_UART_SHIFT=2 -CONFIG_SYS_NS16550=y CONFIG_SYSRESET=y CONFIG_USB=y CONFIG_USB_GADGET=y diff --git a/configs/evb-rk3288_defconfig b/configs/evb-rk3288_defconfig index d625fb1c5fa..7695277daf3 100644 --- a/configs/evb-rk3288_defconfig +++ b/configs/evb-rk3288_defconfig @@ -64,7 +64,6 @@ CONFIG_SPL_RAM=y CONFIG_DEBUG_UART_BASE=0xff690000 CONFIG_DEBUG_UART_CLOCK=24000000 CONFIG_DEBUG_UART_SHIFT=2 -CONFIG_SYS_NS16550=y CONFIG_SYSRESET=y CONFIG_USB=y CONFIG_USB_DWC2=y diff --git a/configs/evb-rk3328_defconfig b/configs/evb-rk3328_defconfig index a52e37ac745..78ae24b56b2 100644 --- a/configs/evb-rk3328_defconfig +++ b/configs/evb-rk3328_defconfig @@ -44,7 +44,6 @@ CONFIG_BAUDRATE=1500000 CONFIG_DEBUG_UART_BASE=0xFF130000 CONFIG_DEBUG_UART_CLOCK=24000000 CONFIG_DEBUG_UART_SHIFT=2 -CONFIG_SYS_NS16550=y CONFIG_SYSRESET=y CONFIG_USB=y CONFIG_USB_XHCI_HCD=y diff --git a/configs/evb-rk3399_defconfig b/configs/evb-rk3399_defconfig index b36f232dcb1..08c0ab0e275 100644 --- a/configs/evb-rk3399_defconfig +++ b/configs/evb-rk3399_defconfig @@ -11,6 +11,7 @@ CONFIG_DEFAULT_DEVICE_TREE="rk3399-evb" CONFIG_DEBUG_UART=y CONFIG_FIT=y CONFIG_SPL_LOAD_FIT=y +CONFIG_SPL_FIT_GENERATOR="arch/arm/mach-rockchip/make_fit_atf.py" # CONFIG_DISPLAY_CPUINFO is not set CONFIG_DISPLAY_BOARDINFO_LATE=y CONFIG_SPL_STACK_R=y @@ -25,6 +26,8 @@ CONFIG_CMD_TIME=y CONFIG_SPL_OF_CONTROL=y CONFIG_OF_SPL_REMOVE_PROPS="pinctrl-0 pinctrl-names clock-names interrupt-parent assigned-clocks assigned-clock-rates assigned-clock-parents" CONFIG_SPL_OF_PLATDATA=y +CONFIG_SPL_ATF=y +CONFIG_SPL_ATF_NO_PLATFORM_PARAM=y CONFIG_ENV_IS_IN_MMC=y CONFIG_NET_RANDOM_ETHADDR=y CONFIG_REGMAP=y @@ -56,7 +59,6 @@ CONFIG_BAUDRATE=1500000 CONFIG_DEBUG_UART_BASE=0xFF1A0000 CONFIG_DEBUG_UART_CLOCK=24000000 CONFIG_DEBUG_UART_SHIFT=2 -CONFIG_SYS_NS16550=y CONFIG_SYSRESET=y CONFIG_USB=y CONFIG_USB_XHCI_HCD=y diff --git a/configs/fennec-rk3288_defconfig b/configs/fennec-rk3288_defconfig index d1f7f777ed0..efdd583cf6e 100644 --- a/configs/fennec-rk3288_defconfig +++ b/configs/fennec-rk3288_defconfig @@ -63,7 +63,6 @@ CONFIG_SPL_RAM=y CONFIG_DEBUG_UART_BASE=0xff690000 CONFIG_DEBUG_UART_CLOCK=24000000 CONFIG_DEBUG_UART_SHIFT=2 -CONFIG_SYS_NS16550=y CONFIG_SYSRESET=y CONFIG_USB=y CONFIG_USB_DWC2=y diff --git a/configs/firefly-rk3288_defconfig b/configs/firefly-rk3288_defconfig index 0f254c09723..b252d274640 100644 --- a/configs/firefly-rk3288_defconfig +++ b/configs/firefly-rk3288_defconfig @@ -67,7 +67,6 @@ CONFIG_SPL_RAM=y CONFIG_DEBUG_UART_BASE=0xff690000 CONFIG_DEBUG_UART_CLOCK=24000000 CONFIG_DEBUG_UART_SHIFT=2 -CONFIG_SYS_NS16550=y CONFIG_SYSRESET=y CONFIG_USB=y CONFIG_USB_DWC2=y diff --git a/configs/firefly-rk3399_defconfig b/configs/firefly-rk3399_defconfig index 984c3f4ed6e..19c0b110401 100644 --- a/configs/firefly-rk3399_defconfig +++ b/configs/firefly-rk3399_defconfig @@ -58,7 +58,6 @@ CONFIG_BAUDRATE=1500000 CONFIG_DEBUG_UART_BASE=0xFF1A0000 CONFIG_DEBUG_UART_CLOCK=24000000 CONFIG_DEBUG_UART_SHIFT=2 -CONFIG_SYS_NS16550=y CONFIG_SYSRESET=y CONFIG_USB=y CONFIG_USB_XHCI_HCD=y diff --git a/configs/miqi-rk3288_defconfig b/configs/miqi-rk3288_defconfig index af5b9cc6a41..f44537c88f4 100644 --- a/configs/miqi-rk3288_defconfig +++ b/configs/miqi-rk3288_defconfig @@ -63,7 +63,6 @@ CONFIG_SPL_RAM=y CONFIG_DEBUG_UART_BASE=0xff690000 CONFIG_DEBUG_UART_CLOCK=24000000 CONFIG_DEBUG_UART_SHIFT=2 -CONFIG_SYS_NS16550=y CONFIG_SYSRESET=y CONFIG_USB=y CONFIG_USB_DWC2=y diff --git a/configs/phycore-rk3288_defconfig b/configs/phycore-rk3288_defconfig index 66decf0653a..d78b6d57b6b 100644 --- a/configs/phycore-rk3288_defconfig +++ b/configs/phycore-rk3288_defconfig @@ -67,7 +67,6 @@ CONFIG_SPL_RAM=y CONFIG_DEBUG_UART_BASE=0xff690000 CONFIG_DEBUG_UART_CLOCK=24000000 CONFIG_DEBUG_UART_SHIFT=2 -CONFIG_SYS_NS16550=y CONFIG_SYSRESET=y CONFIG_USB=y CONFIG_USB_DWC2=y diff --git a/configs/popmetal-rk3288_defconfig b/configs/popmetal-rk3288_defconfig index 8343a4ab4d3..2670b4b75ae 100644 --- a/configs/popmetal-rk3288_defconfig +++ b/configs/popmetal-rk3288_defconfig @@ -63,7 +63,6 @@ CONFIG_SPL_RAM=y CONFIG_DEBUG_UART_BASE=0xff690000 CONFIG_DEBUG_UART_CLOCK=24000000 CONFIG_DEBUG_UART_SHIFT=2 -CONFIG_SYS_NS16550=y CONFIG_SYSRESET=y CONFIG_USB=y CONFIG_USB_DWC2=y diff --git a/configs/puma-rk3399_defconfig b/configs/puma-rk3399_defconfig index 4324a82e766..e6539a7da8d 100644 --- a/configs/puma-rk3399_defconfig +++ b/configs/puma-rk3399_defconfig @@ -80,10 +80,11 @@ CONFIG_REGULATOR_RK8XX=y CONFIG_PWM_ROCKCHIP=y CONFIG_RAM=y CONFIG_SPL_RAM=y +CONFIG_DM_RTC=y +CONFIG_RTC_ISL1208=y CONFIG_DEBUG_UART_BASE=0xFF180000 CONFIG_DEBUG_UART_CLOCK=24000000 CONFIG_DEBUG_UART_SHIFT=2 -CONFIG_SYS_NS16550=y CONFIG_ROCKCHIP_SPI=y CONFIG_SYSRESET=y CONFIG_USB=y diff --git a/configs/rock2_defconfig b/configs/rock2_defconfig index a59599ebbcc..cd9a8219746 100644 --- a/configs/rock2_defconfig +++ b/configs/rock2_defconfig @@ -64,7 +64,6 @@ CONFIG_SPL_RAM=y CONFIG_DEBUG_UART_BASE=0xff690000 CONFIG_DEBUG_UART_CLOCK=24000000 CONFIG_DEBUG_UART_SHIFT=2 -CONFIG_SYS_NS16550=y CONFIG_SYSRESET=y CONFIG_USB=y CONFIG_USB_DWC2=y diff --git a/configs/rock_defconfig b/configs/rock_defconfig index c4a236ccf63..08ca78d03b9 100644 --- a/configs/rock_defconfig +++ b/configs/rock_defconfig @@ -5,6 +5,9 @@ CONFIG_ARCH_ROCKCHIP=y CONFIG_SYS_TEXT_BASE=0x60000000 CONFIG_SYS_MALLOC_F_LEN=0x2000 CONFIG_ROCKCHIP_RK3188=y +CONFIG_TIMER=y +CONFIG_SPL_TIMER=y +CONFIG_ROCKCHIP_TIMER=y CONFIG_SPL_ROCKCHIP_BACK_TO_BROM=y CONFIG_TARGET_ROCK=y CONFIG_SPL_STACK_R_ADDR=0x60080000 @@ -47,7 +50,6 @@ CONFIG_RAM=y CONFIG_DEBUG_UART_BASE=0x20064000 CONFIG_DEBUG_UART_CLOCK=24000000 CONFIG_DEBUG_UART_SHIFT=2 -CONFIG_SYS_NS16550=y CONFIG_SYSRESET=y CONFIG_USB=y CONFIG_ROCKCHIP_USB2_PHY=y diff --git a/configs/tinker-rk3288_defconfig b/configs/tinker-rk3288_defconfig index d5c705ae462..fb6bfa57ad7 100644 --- a/configs/tinker-rk3288_defconfig +++ b/configs/tinker-rk3288_defconfig @@ -66,7 +66,6 @@ CONFIG_SPL_RAM=y CONFIG_DEBUG_UART_BASE=0xff690000 CONFIG_DEBUG_UART_CLOCK=24000000 CONFIG_DEBUG_UART_SHIFT=2 -CONFIG_SYS_NS16550=y CONFIG_SYSRESET=y CONFIG_USB=y CONFIG_USB_DWC2=y diff --git a/configs/vyasa-rk3288_defconfig b/configs/vyasa-rk3288_defconfig index bf1de5a56e7..9e4e96a4f27 100644 --- a/configs/vyasa-rk3288_defconfig +++ b/configs/vyasa-rk3288_defconfig @@ -63,7 +63,6 @@ CONFIG_SPL_RAM=y CONFIG_DEBUG_UART_BASE=0xff690000 CONFIG_DEBUG_UART_CLOCK=24000000 CONFIG_DEBUG_UART_SHIFT=2 -CONFIG_SYS_NS16550=y CONFIG_SYSRESET=y CONFIG_USB=y CONFIG_USB_DWC2=y diff --git a/drivers/clk/rockchip/clk_rk3036.c b/drivers/clk/rockchip/clk_rk3036.c index 560222b96c4..5e11318042d 100644 --- a/drivers/clk/rockchip/clk_rk3036.c +++ b/drivers/clk/rockchip/clk_rk3036.c @@ -317,11 +317,19 @@ static struct clk_ops rk3036_clk_ops = { .set_rate = rk3036_clk_set_rate, }; -static int rk3036_clk_probe(struct udevice *dev) +static int rk3036_clk_ofdata_to_platdata(struct udevice *dev) { struct rk3036_clk_priv *priv = dev_get_priv(dev); priv->cru = dev_read_addr_ptr(dev); + + return 0; +} + +static int rk3036_clk_probe(struct udevice *dev) +{ + struct rk3036_clk_priv *priv = dev_get_priv(dev); + rkclk_init(priv->cru); return 0; @@ -367,6 +375,7 @@ U_BOOT_DRIVER(rockchip_rk3036_cru) = { .id = UCLASS_CLK, .of_match = rk3036_clk_ids, .priv_auto_alloc_size = sizeof(struct rk3036_clk_priv), + .ofdata_to_platdata = rk3036_clk_ofdata_to_platdata, .ops = &rk3036_clk_ops, .bind = rk3036_clk_bind, .probe = rk3036_clk_probe, diff --git a/drivers/clk/rockchip/clk_rk3128.c b/drivers/clk/rockchip/clk_rk3128.c index 132d50dda38..7b479e79bb4 100644 --- a/drivers/clk/rockchip/clk_rk3128.c +++ b/drivers/clk/rockchip/clk_rk3128.c @@ -546,11 +546,19 @@ static struct clk_ops rk3128_clk_ops = { .set_rate = rk3128_clk_set_rate, }; +static int rk3128_clk_ofdata_to_platdata(struct udevice *dev) +{ + struct rk3128_clk_priv *priv = dev_get_priv(dev); + + priv->cru = dev_read_addr_ptr(dev); + + return 0; +} + static int rk3128_clk_probe(struct udevice *dev) { struct rk3128_clk_priv *priv = dev_get_priv(dev); - priv->cru = (struct rk3128_cru *)dev_read_addr(dev); rkclk_init(priv->cru); return 0; @@ -590,6 +598,7 @@ U_BOOT_DRIVER(rockchip_rk3128_cru) = { .id = UCLASS_CLK, .of_match = rk3128_clk_ids, .priv_auto_alloc_size = sizeof(struct rk3128_clk_priv), + .ofdata_to_platdata = rk3128_clk_ofdata_to_platdata, .ops = &rk3128_clk_ops, .bind = rk3128_clk_bind, .probe = rk3128_clk_probe, diff --git a/drivers/clk/rockchip/clk_rk3288.c b/drivers/clk/rockchip/clk_rk3288.c index 3a36d04096b..78ada2d2db4 100644 --- a/drivers/clk/rockchip/clk_rk3288.c +++ b/drivers/clk/rockchip/clk_rk3288.c @@ -893,12 +893,25 @@ static int __maybe_unused rk3288_clk_set_parent(struct clk *clk, struct clk *par return -ENOENT; } +static int rk3288_clk_enable(struct clk *clk) +{ + switch (clk->id) { + case HCLK_USBHOST0: + case HCLK_HSIC: + return 0; + } + + debug("%s: unsupported clk %ld\n", __func__, clk->id); + return -ENOENT; +} + static struct clk_ops rk3288_clk_ops = { .get_rate = rk3288_clk_get_rate, .set_rate = rk3288_clk_set_rate, #if CONFIG_IS_ENABLED(OF_CONTROL) && !CONFIG_IS_ENABLED(OF_PLATDATA) .set_parent = rk3288_clk_set_parent, #endif + .enable = rk3288_clk_enable, }; static int rk3288_clk_ofdata_to_platdata(struct udevice *dev) diff --git a/drivers/clk/rockchip/clk_rv1108.c b/drivers/clk/rockchip/clk_rv1108.c index 958fc785926..42341a85660 100644 --- a/drivers/clk/rockchip/clk_rv1108.c +++ b/drivers/clk/rockchip/clk_rv1108.c @@ -209,12 +209,19 @@ static void rkclk_init(struct rv1108_cru *cru) printf("APLL: %d DPLL:%d GPLL:%d\n", apll, dpll, gpll); } -static int rv1108_clk_probe(struct udevice *dev) +static int rv1108_clk_ofdata_to_platdata(struct udevice *dev) { struct rv1108_clk_priv *priv = dev_get_priv(dev); priv->cru = dev_read_addr_ptr(dev); + return 0; +} + +static int rv1108_clk_probe(struct udevice *dev) +{ + struct rv1108_clk_priv *priv = dev_get_priv(dev); + rkclk_init(priv->cru); return 0; @@ -260,6 +267,7 @@ U_BOOT_DRIVER(clk_rv1108) = { .id = UCLASS_CLK, .of_match = rv1108_clk_ids, .priv_auto_alloc_size = sizeof(struct rv1108_clk_priv), + .ofdata_to_platdata = rv1108_clk_ofdata_to_platdata, .ops = &rv1108_clk_ops, .bind = rv1108_clk_bind, .probe = rv1108_clk_probe, diff --git a/drivers/timer/rockchip_timer.c b/drivers/timer/rockchip_timer.c index 07d14482d68..b847bc40c4e 100644 --- a/drivers/timer/rockchip_timer.c +++ b/drivers/timer/rockchip_timer.c @@ -152,6 +152,8 @@ static const struct timer_ops rockchip_timer_ops = { }; static const struct udevice_id rockchip_timer_ids[] = { + { .compatible = "rockchip,rk3188-timer" }, + { .compatible = "rockchip,rk3288-timer" }, { .compatible = "rockchip,rk3368-timer" }, {} }; diff --git a/include/configs/firefly-rk3288.h b/include/configs/firefly-rk3288.h index d6bb9f6fb4a..2b0ac9ec5f4 100644 --- a/include/configs/firefly-rk3288.h +++ b/include/configs/firefly-rk3288.h @@ -10,8 +10,7 @@ #define ROCKCHIP_DEVICE_SETTINGS \ "stdin=serial,usbkbd\0" \ "stdout=serial,vidconsole\0" \ - "stderr=serial,vidconsole\0" \ - "preboot=usb start\0" + "stderr=serial,vidconsole\0" #include <configs/rk3288_common.h> diff --git a/include/configs/rk3036_common.h b/include/configs/rk3036_common.h index f39a272e6d2..c5ec864b1ed 100644 --- a/include/configs/rk3036_common.h +++ b/include/configs/rk3036_common.h @@ -18,9 +18,6 @@ #define CONFIG_SYS_TIMER_BASE 0x200440a0 /* TIMER5 */ #define CONFIG_SYS_TIMER_COUNTER (CONFIG_SYS_TIMER_BASE + 8) -#define CONFIG_SYS_NS16550 -#define CONFIG_SYS_NS16550_MEM32 - #define CONFIG_SYS_INIT_SP_ADDR 0x60100000 #define CONFIG_SYS_LOAD_ADDR 0x60800800 #define CONFIG_SPL_STACK 0x10081fff diff --git a/include/configs/rk3128_common.h b/include/configs/rk3128_common.h index bd8019c6a56..c593f18fdbe 100644 --- a/include/configs/rk3128_common.h +++ b/include/configs/rk3128_common.h @@ -19,8 +19,6 @@ #define CONFIG_SYS_TIMER_BASE 0x200440a0 /* TIMER5 */ #define CONFIG_SYS_TIMER_COUNTER (CONFIG_SYS_TIMER_BASE + 8) -#define CONFIG_SYS_NS16550_MEM32 - #define CONFIG_SYS_INIT_SP_ADDR 0x60100000 #define CONFIG_SYS_LOAD_ADDR 0x60800800 diff --git a/include/configs/rk3188_common.h b/include/configs/rk3188_common.h index 94f8cda8532..e07facd9c30 100644 --- a/include/configs/rk3188_common.h +++ b/include/configs/rk3188_common.h @@ -17,11 +17,6 @@ #define CONFIG_SYS_MALLOC_LEN (32 << 20) #define CONFIG_SYS_CBSIZE 1024 -#define CONFIG_SYS_TIMER_RATE (24 * 1000 * 1000) -#define CONFIG_SYS_TIMER_BASE 0x2000e000 /* TIMER3 */ -#define CONFIG_SYS_TIMER_COUNTER (CONFIG_SYS_TIMER_BASE + 8) -#define CONFIG_SYS_TIMER_COUNTS_DOWN - #define CONFIG_SYS_NS16550_MEM32 #ifdef CONFIG_SPL_ROCKCHIP_BACK_TO_BROM diff --git a/include/configs/rk322x_common.h b/include/configs/rk322x_common.h index 7f9c7fbfd5e..0fb72214f4a 100644 --- a/include/configs/rk322x_common.h +++ b/include/configs/rk322x_common.h @@ -18,11 +18,10 @@ #define CONFIG_SYS_TIMER_BASE 0x110c00a0 /* TIMER5 */ #define CONFIG_SYS_TIMER_COUNTER (CONFIG_SYS_TIMER_BASE + 8) -#define CONFIG_SYS_NS16550_MEM32 #define CONFIG_SYS_INIT_SP_ADDR 0x60100000 #define CONFIG_SYS_LOAD_ADDR 0x60800800 #define CONFIG_SPL_STACK 0x10088000 -#define CONFIG_SPL_TEXT_BASE 0x10081004 +#define CONFIG_SPL_TEXT_BASE 0x10081000 #define CONFIG_ROCKCHIP_MAX_INIT_SIZE (28 << 10) #define CONFIG_ROCKCHIP_CHIP_TAG "RK32" diff --git a/include/configs/rk3288_common.h b/include/configs/rk3288_common.h index 78595b86ec4..23dbfecf018 100644 --- a/include/configs/rk3288_common.h +++ b/include/configs/rk3288_common.h @@ -19,8 +19,6 @@ #define CONFIG_SYS_TIMER_BASE 0xff810020 /* TIMER7 */ #define CONFIG_SYS_TIMER_COUNTER (CONFIG_SYS_TIMER_BASE + 8) -#define CONFIG_SYS_NS16550_MEM32 - #ifdef CONFIG_SPL_ROCKCHIP_BACK_TO_BROM /* Bootrom will load u-boot binary to 0x0 once return from SPL */ #endif @@ -73,6 +71,7 @@ #define CONFIG_EXTRA_ENV_SETTINGS \ "fdt_high=0x0fffffff\0" \ "initrd_high=0x0fffffff\0" \ + "fdtfile=" CONFIG_DEFAULT_DEVICE_TREE ".dtb\0" \ "partitions=" PARTS_DEFAULT \ ENV_MEM_LAYOUT_SETTINGS \ ROCKCHIP_DEVICE_SETTINGS \ diff --git a/include/configs/rv1108_common.h b/include/configs/rv1108_common.h index 349c53c2898..cd204e97184 100644 --- a/include/configs/rv1108_common.h +++ b/include/configs/rv1108_common.h @@ -18,9 +18,6 @@ #define CONFIG_SYS_TIMER_BASE 0x10350020 #define CONFIG_SYS_TIMER_COUNTER (CONFIG_SYS_TIMER_BASE + 8) -#define CONFIG_SYS_NS16550 -#define CONFIG_SYS_NS16550_MEM32 - #define CONFIG_SYS_SDRAM_BASE 0x60000000 #define CONFIG_NR_DRAM_BANKS 1 #define CONFIG_SYS_INIT_SP_ADDR (CONFIG_SYS_TEXT_BASE + 0x100000) |